net/hamradio/z8530.h

1 /* SPDX-License-Identifier: GPL-2.0 */
34 #define	RES_Tx_CRC	0x80	/* Reset Tx CRC Checker */
40 #define	TxINT_ENAB	0x2	/* Tx Int Enable */
58 #define	ADD_SM		0x4	/* Address Search Mode (SDLC) */
60 #define	ENT_HM		0x10	/* Enter Hunt Mode */
79 #define	SDLC		0x20	/* SDLC Mode (01111110 Sync Flag) */
80 #define	EXTSYNC		0x30	/* External Sync Mode */
82 #define	X1CLK		0x0	/* x1 clock mode */
83 #define	X16CLK		0x40	/* x16 clock mode */
84 #define	X32CLK		0x80	/* x32 clock mode */
85 #define	X64CLK		0xC0	/* x64 clock mode */
89 #define	TxCRC_ENAB	0x1	/* Tx CRC Enable */
91 #define	SDLC_CRC	0x4	/* SDLC/CRC-16 */
92 #define	TxENAB		0x8	/* Tx Enable */
94 #define	Tx5		0x0	/* Tx 5 bits (or less)/character */
95 #define	Tx7		0x20	/* Tx 7 bits/character */
96 #define	Tx6		0x40	/* Tx 6 bits/character */
97 #define	Tx8		0x60	/* Tx 8 bits/character */
100 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */
102 /* Write Register 7 (Sync bits 8-15/SDLC 01111110) */
119 #define	LOOPMODE 2	/* SDLC Loop mode */
123 #define	NRZ	0	/* NRZ mode */
124 #define	NRZI	0x20	/* NRZI mode */
129 /* Write Register 11 (Clock Mode control) */
130 #define	TRxCXT	0	/* TRxC = Xtal output */
132 #define	TRxCBR	2	/* TRxC = BR Generator Output */
133 #define	TRxCDP	3	/* TRxC = DPLL output */
137 #define	TCBR	0x10	/* Transmit clock = BR Generator output */
138 #define	TCDPLL	0x18	/* Transmit clock = DPLL output */
141 #define	RCBR	0x40	/* Receive clock = BR Generator output */
142 #define	RCDPLL	0x60	/* Receive clock = DPLL output */
155 #define	SEARCH	0x20	/* Enter search mode */
160 #define	SFMM	0xc0	/* Set FM mode */
161 #define	SNRZI	0xe0	/* Set NRZI mode */
168 #define	TxUIE	0x40	/* Tx Underrun/EOM IE */
175 #define	Tx_BUF_EMP	0x4	/* Tx Buffer empty */
179 #define	TxEOM		0x40	/* Tx underrun */
199 /* Read Register 2 (channel b only) - Interrupt vector */
203 #define	CHBTxIP	0x2		/* Channel B Tx IP */
206 #define	CHATxIP	0x10		/* Channel A Tx IP */
226 #define AUTOTXF	0x01		/* Auto Tx Flag */
229 #define TXDNRZI 0x08		/* TxD Pulled High in SDLC NRZI mode */
231 #define FASTDTR 0x10		/* Fast DTR/REQ Mode */
233 #define TXFIFOE 0x20		/* Z85230: Int on TX FIFO completely empty */