Lines Matching full:lp
133 static struct skbuf_dma_descriptor *axienet_get_rx_desc(struct axienet_local *lp, int i) in axienet_get_rx_desc() argument
135 return lp->rx_skb_ring[i & (RX_BUF_NUM_DEFAULT - 1)]; in axienet_get_rx_desc()
138 static struct skbuf_dma_descriptor *axienet_get_tx_desc(struct axienet_local *lp, int i) in axienet_get_tx_desc() argument
140 return lp->tx_skb_ring[i & (TX_BD_NUM_MAX - 1)]; in axienet_get_tx_desc()
145 * @lp: Pointer to axienet local structure
152 static inline u32 axienet_dma_in32(struct axienet_local *lp, off_t reg) in axienet_dma_in32() argument
154 return ioread32(lp->dma_regs + reg); in axienet_dma_in32()
157 static void desc_set_phys_addr(struct axienet_local *lp, dma_addr_t addr, in desc_set_phys_addr() argument
161 if (lp->features & XAE_FEATURE_DMA_64BIT) in desc_set_phys_addr()
165 static dma_addr_t desc_get_phys_addr(struct axienet_local *lp, in desc_get_phys_addr() argument
170 if (lp->features & XAE_FEATURE_DMA_64BIT) in desc_get_phys_addr()
187 struct axienet_local *lp = netdev_priv(ndev); in axienet_dma_bd_release() local
190 dma_free_coherent(lp->dev, in axienet_dma_bd_release()
191 sizeof(*lp->tx_bd_v) * lp->tx_bd_num, in axienet_dma_bd_release()
192 lp->tx_bd_v, in axienet_dma_bd_release()
193 lp->tx_bd_p); in axienet_dma_bd_release()
195 if (!lp->rx_bd_v) in axienet_dma_bd_release()
198 for (i = 0; i < lp->rx_bd_num; i++) { in axienet_dma_bd_release()
204 if (!lp->rx_bd_v[i].skb) in axienet_dma_bd_release()
207 dev_kfree_skb(lp->rx_bd_v[i].skb); in axienet_dma_bd_release()
213 if (lp->rx_bd_v[i].cntrl) { in axienet_dma_bd_release()
214 phys = desc_get_phys_addr(lp, &lp->rx_bd_v[i]); in axienet_dma_bd_release()
215 dma_unmap_single(lp->dev, phys, in axienet_dma_bd_release()
216 lp->max_frm_size, DMA_FROM_DEVICE); in axienet_dma_bd_release()
220 dma_free_coherent(lp->dev, in axienet_dma_bd_release()
221 sizeof(*lp->rx_bd_v) * lp->rx_bd_num, in axienet_dma_bd_release()
222 lp->rx_bd_v, in axienet_dma_bd_release()
223 lp->rx_bd_p); in axienet_dma_bd_release()
226 static u64 axienet_dma_rate(struct axienet_local *lp) in axienet_dma_rate() argument
228 if (lp->axi_clk) in axienet_dma_rate()
229 return clk_get_rate(lp->axi_clk); in axienet_dma_rate()
235 * @lp: Device private data
242 static u32 axienet_calc_cr(struct axienet_local *lp, u32 count, u32 usec) in axienet_calc_cr() argument
252 u64 clk_rate = axienet_dma_rate(lp); in axienet_calc_cr()
269 * @lp: Device private data
274 static void axienet_coalesce_params(struct axienet_local *lp, u32 cr, in axienet_coalesce_params() argument
277 u64 clk_rate = axienet_dma_rate(lp); in axienet_coalesce_params()
286 * @lp: Pointer to the axienet_local structure
288 static void axienet_dma_start(struct axienet_local *lp) in axienet_dma_start() argument
290 spin_lock_irq(&lp->rx_cr_lock); in axienet_dma_start()
293 lp->rx_dma_cr &= ~XAXIDMA_CR_RUNSTOP_MASK; in axienet_dma_start()
294 axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, lp->rx_dma_cr); in axienet_dma_start()
299 axienet_dma_out_addr(lp, XAXIDMA_RX_CDESC_OFFSET, lp->rx_bd_p); in axienet_dma_start()
300 lp->rx_dma_cr |= XAXIDMA_CR_RUNSTOP_MASK; in axienet_dma_start()
301 axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, lp->rx_dma_cr); in axienet_dma_start()
302 axienet_dma_out_addr(lp, XAXIDMA_RX_TDESC_OFFSET, lp->rx_bd_p + in axienet_dma_start()
303 (sizeof(*lp->rx_bd_v) * (lp->rx_bd_num - 1))); in axienet_dma_start()
304 lp->rx_dma_started = true; in axienet_dma_start()
306 spin_unlock_irq(&lp->rx_cr_lock); in axienet_dma_start()
307 spin_lock_irq(&lp->tx_cr_lock); in axienet_dma_start()
310 lp->tx_dma_cr &= ~XAXIDMA_CR_RUNSTOP_MASK; in axienet_dma_start()
311 axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, lp->tx_dma_cr); in axienet_dma_start()
317 axienet_dma_out_addr(lp, XAXIDMA_TX_CDESC_OFFSET, lp->tx_bd_p); in axienet_dma_start()
318 lp->tx_dma_cr |= XAXIDMA_CR_RUNSTOP_MASK; in axienet_dma_start()
319 axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, lp->tx_dma_cr); in axienet_dma_start()
320 lp->tx_dma_started = true; in axienet_dma_start()
322 spin_unlock_irq(&lp->tx_cr_lock); in axienet_dma_start()
339 struct axienet_local *lp = netdev_priv(ndev); in axienet_dma_bd_init() local
342 lp->tx_bd_ci = 0; in axienet_dma_bd_init()
343 lp->tx_bd_tail = 0; in axienet_dma_bd_init()
344 lp->rx_bd_ci = 0; in axienet_dma_bd_init()
347 lp->tx_bd_v = dma_alloc_coherent(lp->dev, in axienet_dma_bd_init()
348 sizeof(*lp->tx_bd_v) * lp->tx_bd_num, in axienet_dma_bd_init()
349 &lp->tx_bd_p, GFP_KERNEL); in axienet_dma_bd_init()
350 if (!lp->tx_bd_v) in axienet_dma_bd_init()
353 lp->rx_bd_v = dma_alloc_coherent(lp->dev, in axienet_dma_bd_init()
354 sizeof(*lp->rx_bd_v) * lp->rx_bd_num, in axienet_dma_bd_init()
355 &lp->rx_bd_p, GFP_KERNEL); in axienet_dma_bd_init()
356 if (!lp->rx_bd_v) in axienet_dma_bd_init()
359 for (i = 0; i < lp->tx_bd_num; i++) { in axienet_dma_bd_init()
360 dma_addr_t addr = lp->tx_bd_p + in axienet_dma_bd_init()
361 sizeof(*lp->tx_bd_v) * in axienet_dma_bd_init()
362 ((i + 1) % lp->tx_bd_num); in axienet_dma_bd_init()
364 lp->tx_bd_v[i].next = lower_32_bits(addr); in axienet_dma_bd_init()
365 if (lp->features & XAE_FEATURE_DMA_64BIT) in axienet_dma_bd_init()
366 lp->tx_bd_v[i].next_msb = upper_32_bits(addr); in axienet_dma_bd_init()
369 for (i = 0; i < lp->rx_bd_num; i++) { in axienet_dma_bd_init()
372 addr = lp->rx_bd_p + sizeof(*lp->rx_bd_v) * in axienet_dma_bd_init()
373 ((i + 1) % lp->rx_bd_num); in axienet_dma_bd_init()
374 lp->rx_bd_v[i].next = lower_32_bits(addr); in axienet_dma_bd_init()
375 if (lp->features & XAE_FEATURE_DMA_64BIT) in axienet_dma_bd_init()
376 lp->rx_bd_v[i].next_msb = upper_32_bits(addr); in axienet_dma_bd_init()
378 skb = netdev_alloc_skb_ip_align(ndev, lp->max_frm_size); in axienet_dma_bd_init()
382 lp->rx_bd_v[i].skb = skb; in axienet_dma_bd_init()
383 addr = dma_map_single(lp->dev, skb->data, in axienet_dma_bd_init()
384 lp->max_frm_size, DMA_FROM_DEVICE); in axienet_dma_bd_init()
385 if (dma_mapping_error(lp->dev, addr)) { in axienet_dma_bd_init()
389 desc_set_phys_addr(lp, addr, &lp->rx_bd_v[i]); in axienet_dma_bd_init()
391 lp->rx_bd_v[i].cntrl = lp->max_frm_size; in axienet_dma_bd_init()
394 axienet_dma_start(lp); in axienet_dma_bd_init()
413 struct axienet_local *lp = netdev_priv(ndev); in axienet_set_mac_address() local
421 axienet_iow(lp, XAE_UAW0_OFFSET, in axienet_set_mac_address()
426 axienet_iow(lp, XAE_UAW1_OFFSET, in axienet_set_mac_address()
427 (((axienet_ior(lp, XAE_UAW1_OFFSET)) & in axienet_set_mac_address()
467 struct axienet_local *lp = netdev_priv(ndev); in axienet_set_multicast_list() local
469 reg = axienet_ior(lp, XAE_FMI_OFFSET); in axienet_set_multicast_list()
475 axienet_iow(lp, XAE_FMI_OFFSET, reg); in axienet_set_multicast_list()
480 axienet_iow(lp, XAE_FMI_OFFSET, reg); in axienet_set_multicast_list()
481 axienet_iow(lp, XAE_AF0_OFFSET, 1); /* Multicast bit */ in axienet_set_multicast_list()
482 axienet_iow(lp, XAE_AF1_OFFSET, 0); in axienet_set_multicast_list()
483 axienet_iow(lp, XAE_AM0_OFFSET, 1); /* ditto */ in axienet_set_multicast_list()
484 axienet_iow(lp, XAE_AM1_OFFSET, 0); in axienet_set_multicast_list()
485 axienet_iow(lp, XAE_FFE_OFFSET, 1); in axienet_set_multicast_list()
505 axienet_iow(lp, XAE_FMI_OFFSET, reg); in axienet_set_multicast_list()
506 axienet_iow(lp, XAE_AF0_OFFSET, af0reg); in axienet_set_multicast_list()
507 axienet_iow(lp, XAE_AF1_OFFSET, af1reg); in axienet_set_multicast_list()
508 axienet_iow(lp, XAE_AM0_OFFSET, 0xffffffff); in axienet_set_multicast_list()
509 axienet_iow(lp, XAE_AM1_OFFSET, 0x0000ffff); in axienet_set_multicast_list()
510 axienet_iow(lp, XAE_FFE_OFFSET, 1); in axienet_set_multicast_list()
518 axienet_iow(lp, XAE_FMI_OFFSET, reg); in axienet_set_multicast_list()
519 axienet_iow(lp, XAE_FFE_OFFSET, 0); in axienet_set_multicast_list()
537 struct axienet_local *lp = netdev_priv(ndev); in axienet_setoptions() local
541 reg = ((axienet_ior(lp, tp->reg)) & ~(tp->m_or)); in axienet_setoptions()
544 axienet_iow(lp, tp->reg, reg); in axienet_setoptions()
548 lp->options |= options; in axienet_setoptions()
551 static u64 axienet_stat(struct axienet_local *lp, enum temac_stat stat) in axienet_stat() argument
555 if (lp->reset_in_progress) in axienet_stat()
556 return lp->hw_stat_base[stat]; in axienet_stat()
558 counter = axienet_ior(lp, XAE_STATS_OFFSET + stat * 8); in axienet_stat()
559 return lp->hw_stat_base[stat] + (counter - lp->hw_last_counter[stat]); in axienet_stat()
562 static void axienet_stats_update(struct axienet_local *lp, bool reset) in axienet_stats_update() argument
566 write_seqcount_begin(&lp->hw_stats_seqcount); in axienet_stats_update()
567 lp->reset_in_progress = reset; in axienet_stats_update()
569 u32 counter = axienet_ior(lp, XAE_STATS_OFFSET + stat * 8); in axienet_stats_update()
571 lp->hw_stat_base[stat] += counter - lp->hw_last_counter[stat]; in axienet_stats_update()
572 lp->hw_last_counter[stat] = counter; in axienet_stats_update()
574 write_seqcount_end(&lp->hw_stats_seqcount); in axienet_stats_update()
579 struct axienet_local *lp = container_of(work, struct axienet_local, in axienet_refresh_stats() local
582 mutex_lock(&lp->stats_lock); in axienet_refresh_stats()
583 axienet_stats_update(lp, false); in axienet_refresh_stats()
584 mutex_unlock(&lp->stats_lock); in axienet_refresh_stats()
587 schedule_delayed_work(&lp->stats_work, 13 * HZ); in axienet_refresh_stats()
590 static int __axienet_device_reset(struct axienet_local *lp) in __axienet_device_reset() argument
596 mutex_lock(&lp->stats_lock); in __axienet_device_reset()
597 if (lp->features & XAE_FEATURE_STATS) in __axienet_device_reset()
598 axienet_stats_update(lp, true); in __axienet_device_reset()
607 axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, XAXIDMA_CR_RESET_MASK); in __axienet_device_reset()
610 DELAY_OF_ONE_MILLISEC, 50000, false, lp, in __axienet_device_reset()
613 dev_err(lp->dev, "%s: DMA reset timeout!\n", __func__); in __axienet_device_reset()
620 DELAY_OF_ONE_MILLISEC, 50000, false, lp, in __axienet_device_reset()
623 dev_err(lp->dev, "%s: timeout waiting for PhyRstCmplt\n", __func__); in __axienet_device_reset()
628 if (lp->features & XAE_FEATURE_STATS) { in __axienet_device_reset()
631 write_seqcount_begin(&lp->hw_stats_seqcount); in __axienet_device_reset()
632 lp->reset_in_progress = false; in __axienet_device_reset()
635 axienet_ior(lp, XAE_STATS_OFFSET + stat * 8); in __axienet_device_reset()
637 lp->hw_stat_base[stat] += in __axienet_device_reset()
638 lp->hw_last_counter[stat] - counter; in __axienet_device_reset()
639 lp->hw_last_counter[stat] = counter; in __axienet_device_reset()
641 write_seqcount_end(&lp->hw_stats_seqcount); in __axienet_device_reset()
645 mutex_unlock(&lp->stats_lock); in __axienet_device_reset()
651 * @lp: Pointer to the axienet_local structure
653 static void axienet_dma_stop(struct axienet_local *lp) in axienet_dma_stop() argument
658 spin_lock_irq(&lp->rx_cr_lock); in axienet_dma_stop()
660 cr = lp->rx_dma_cr & ~(XAXIDMA_CR_RUNSTOP_MASK | XAXIDMA_IRQ_ALL_MASK); in axienet_dma_stop()
661 axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, cr); in axienet_dma_stop()
662 lp->rx_dma_started = false; in axienet_dma_stop()
664 spin_unlock_irq(&lp->rx_cr_lock); in axienet_dma_stop()
665 synchronize_irq(lp->rx_irq); in axienet_dma_stop()
667 spin_lock_irq(&lp->tx_cr_lock); in axienet_dma_stop()
669 cr = lp->tx_dma_cr & ~(XAXIDMA_CR_RUNSTOP_MASK | XAXIDMA_IRQ_ALL_MASK); in axienet_dma_stop()
670 axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, cr); in axienet_dma_stop()
671 lp->tx_dma_started = false; in axienet_dma_stop()
673 spin_unlock_irq(&lp->tx_cr_lock); in axienet_dma_stop()
674 synchronize_irq(lp->tx_irq); in axienet_dma_stop()
677 sr = axienet_dma_in32(lp, XAXIDMA_RX_SR_OFFSET); in axienet_dma_stop()
680 sr = axienet_dma_in32(lp, XAXIDMA_RX_SR_OFFSET); in axienet_dma_stop()
683 sr = axienet_dma_in32(lp, XAXIDMA_TX_SR_OFFSET); in axienet_dma_stop()
686 sr = axienet_dma_in32(lp, XAXIDMA_TX_SR_OFFSET); in axienet_dma_stop()
690 axienet_lock_mii(lp); in axienet_dma_stop()
691 __axienet_device_reset(lp); in axienet_dma_stop()
692 axienet_unlock_mii(lp); in axienet_dma_stop()
710 struct axienet_local *lp = netdev_priv(ndev); in axienet_device_reset() local
713 lp->max_frm_size = XAE_MAX_VLAN_FRAME_SIZE; in axienet_device_reset()
714 lp->options |= XAE_OPTION_VLAN; in axienet_device_reset()
715 lp->options &= (~XAE_OPTION_JUMBO); in axienet_device_reset()
718 lp->max_frm_size = ndev->mtu + VLAN_ETH_HLEN + in axienet_device_reset()
721 if (lp->max_frm_size <= lp->rxmem) in axienet_device_reset()
722 lp->options |= XAE_OPTION_JUMBO; in axienet_device_reset()
725 if (!lp->use_dmaengine) { in axienet_device_reset()
726 ret = __axienet_device_reset(lp); in axienet_device_reset()
738 axienet_status = axienet_ior(lp, XAE_RCW1_OFFSET); in axienet_device_reset()
740 axienet_iow(lp, XAE_RCW1_OFFSET, axienet_status); in axienet_device_reset()
742 axienet_status = axienet_ior(lp, XAE_IP_OFFSET); in axienet_device_reset()
744 axienet_iow(lp, XAE_IS_OFFSET, XAE_INT_RXRJECT_MASK); in axienet_device_reset()
745 axienet_iow(lp, XAE_IE_OFFSET, lp->eth_irq > 0 ? in axienet_device_reset()
748 axienet_iow(lp, XAE_FCC_OFFSET, XAE_FCC_FCRX_MASK); in axienet_device_reset()
753 axienet_setoptions(ndev, lp->options & in axienet_device_reset()
757 axienet_setoptions(ndev, lp->options); in axienet_device_reset()
766 * @lp: Pointer to the axienet_local structure
778 static int axienet_free_tx_chain(struct axienet_local *lp, u32 first_bd, in axienet_free_tx_chain() argument
787 cur_p = &lp->tx_bd_v[(first_bd + i) % lp->tx_bd_num]; in axienet_free_tx_chain()
798 phys = desc_get_phys_addr(lp, cur_p); in axienet_free_tx_chain()
799 dma_unmap_single(lp->dev, phys, in axienet_free_tx_chain()
823 lp->tx_bd_ci += i; in axienet_free_tx_chain()
824 if (lp->tx_bd_ci >= lp->tx_bd_num) in axienet_free_tx_chain()
825 lp->tx_bd_ci %= lp->tx_bd_num; in axienet_free_tx_chain()
833 * @lp: Pointer to the axienet_local structure
844 static inline int axienet_check_tx_bd_space(struct axienet_local *lp, in axienet_check_tx_bd_space() argument
851 cur_p = &lp->tx_bd_v[(READ_ONCE(lp->tx_bd_tail) + num_frag) % in axienet_check_tx_bd_space()
852 lp->tx_bd_num]; in axienet_check_tx_bd_space()
868 struct axienet_local *lp = data; in axienet_dma_tx_cb() local
872 skbuf_dma = axienet_get_tx_desc(lp, lp->tx_ring_tail++); in axienet_dma_tx_cb()
874 txq = skb_get_tx_queue(lp->ndev, skbuf_dma->skb); in axienet_dma_tx_cb()
875 u64_stats_update_begin(&lp->tx_stat_sync); in axienet_dma_tx_cb()
876 u64_stats_add(&lp->tx_bytes, len); in axienet_dma_tx_cb()
877 u64_stats_add(&lp->tx_packets, 1); in axienet_dma_tx_cb()
878 u64_stats_update_end(&lp->tx_stat_sync); in axienet_dma_tx_cb()
879 dma_unmap_sg(lp->dev, skbuf_dma->sgl, skbuf_dma->sg_len, DMA_TO_DEVICE); in axienet_dma_tx_cb()
882 CIRC_SPACE(lp->tx_ring_head, lp->tx_ring_tail, TX_BD_NUM_MAX), in axienet_dma_tx_cb()
905 struct axienet_local *lp = netdev_priv(ndev); in axienet_start_xmit_dmaengine() local
915 dma_dev = lp->tx_chan->device; in axienet_start_xmit_dmaengine()
917 if (CIRC_SPACE(lp->tx_ring_head, lp->tx_ring_tail, TX_BD_NUM_MAX) <= sg_len) { in axienet_start_xmit_dmaengine()
924 skbuf_dma = axienet_get_tx_desc(lp, lp->tx_ring_head); in axienet_start_xmit_dmaengine()
928 lp->tx_ring_head++; in axienet_start_xmit_dmaengine()
934 ret = dma_map_sg(lp->dev, skbuf_dma->sgl, sg_len, DMA_TO_DEVICE); in axienet_start_xmit_dmaengine()
940 if (lp->features & XAE_FEATURE_FULL_TX_CSUM) { in axienet_start_xmit_dmaengine()
943 } else if (lp->features & XAE_FEATURE_PARTIAL_TX_CSUM) { in axienet_start_xmit_dmaengine()
954 dma_tx_desc = dma_dev->device_prep_slave_sg(lp->tx_chan, skbuf_dma->sgl, in axienet_start_xmit_dmaengine()
962 dma_tx_desc->callback_param = lp; in axienet_start_xmit_dmaengine()
964 txq = skb_get_tx_queue(lp->ndev, skb); in axienet_start_xmit_dmaengine()
966 netif_txq_maybe_stop(txq, CIRC_SPACE(lp->tx_ring_head, lp->tx_ring_tail, TX_BD_NUM_MAX), in axienet_start_xmit_dmaengine()
970 dma_async_issue_pending(lp->tx_chan); in axienet_start_xmit_dmaengine()
974 dma_unmap_sg(lp->dev, skbuf_dma->sgl, sg_len, DMA_TO_DEVICE); in axienet_start_xmit_dmaengine()
996 struct axienet_local *lp = container_of(napi, struct axienet_local, napi_tx); in axienet_tx_poll() local
997 struct net_device *ndev = lp->ndev; in axienet_tx_poll()
1001 packets = axienet_free_tx_chain(lp, lp->tx_bd_ci, lp->tx_bd_num, false, in axienet_tx_poll()
1006 u64_stats_update_begin(&lp->tx_stat_sync); in axienet_tx_poll()
1007 u64_stats_add(&lp->tx_packets, packets); in axienet_tx_poll()
1008 u64_stats_add(&lp->tx_bytes, size); in axienet_tx_poll()
1009 u64_stats_update_end(&lp->tx_stat_sync); in axienet_tx_poll()
1014 if (!axienet_check_tx_bd_space(lp, MAX_SKB_FRAGS + 1)) in axienet_tx_poll()
1023 spin_lock_irq(&lp->tx_cr_lock); in axienet_tx_poll()
1024 axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, lp->tx_dma_cr); in axienet_tx_poll()
1025 spin_unlock_irq(&lp->tx_cr_lock); in axienet_tx_poll()
1053 struct axienet_local *lp = netdev_priv(ndev); in axienet_start_xmit() local
1056 orig_tail_ptr = lp->tx_bd_tail; in axienet_start_xmit()
1060 cur_p = &lp->tx_bd_v[orig_tail_ptr]; in axienet_start_xmit()
1062 if (axienet_check_tx_bd_space(lp, num_frag + 1)) { in axienet_start_xmit()
1074 if (lp->features & XAE_FEATURE_FULL_TX_CSUM) { in axienet_start_xmit()
1077 } else if (lp->features & XAE_FEATURE_PARTIAL_TX_CSUM) { in axienet_start_xmit()
1088 phys = dma_map_single(lp->dev, skb->data, in axienet_start_xmit()
1090 if (unlikely(dma_mapping_error(lp->dev, phys))) { in axienet_start_xmit()
1097 desc_set_phys_addr(lp, phys, cur_p); in axienet_start_xmit()
1101 if (++new_tail_ptr >= lp->tx_bd_num) in axienet_start_xmit()
1103 cur_p = &lp->tx_bd_v[new_tail_ptr]; in axienet_start_xmit()
1105 phys = dma_map_single(lp->dev, in axienet_start_xmit()
1109 if (unlikely(dma_mapping_error(lp->dev, phys))) { in axienet_start_xmit()
1113 axienet_free_tx_chain(lp, orig_tail_ptr, ii + 1, in axienet_start_xmit()
1118 desc_set_phys_addr(lp, phys, cur_p); in axienet_start_xmit()
1125 tail_p = lp->tx_bd_p + sizeof(*lp->tx_bd_v) * new_tail_ptr; in axienet_start_xmit()
1126 if (++new_tail_ptr >= lp->tx_bd_num) in axienet_start_xmit()
1128 WRITE_ONCE(lp->tx_bd_tail, new_tail_ptr); in axienet_start_xmit()
1132 axienet_dma_out_addr(lp, XAXIDMA_TX_TDESC_OFFSET, tail_p); in axienet_start_xmit()
1135 if (axienet_check_tx_bd_space(lp, MAX_SKB_FRAGS + 1)) { in axienet_start_xmit()
1142 if (!axienet_check_tx_bd_space(lp, MAX_SKB_FRAGS + 1)) in axienet_start_xmit()
1160 struct axienet_local *lp = data; in axienet_dma_rx_cb() local
1164 skbuf_dma = axienet_get_rx_desc(lp, lp->rx_ring_tail++); in axienet_dma_rx_cb()
1168 dma_unmap_single(lp->dev, skbuf_dma->dma_address, lp->max_frm_size, in axienet_dma_rx_cb()
1173 skb->protocol = eth_type_trans(skb, lp->ndev); in axienet_dma_rx_cb()
1177 u64_stats_update_begin(&lp->rx_stat_sync); in axienet_dma_rx_cb()
1178 u64_stats_add(&lp->rx_packets, 1); in axienet_dma_rx_cb()
1179 u64_stats_add(&lp->rx_bytes, rx_len); in axienet_dma_rx_cb()
1180 u64_stats_update_end(&lp->rx_stat_sync); in axienet_dma_rx_cb()
1181 axienet_rx_submit_desc(lp->ndev); in axienet_dma_rx_cb()
1182 dma_async_issue_pending(lp->rx_chan); in axienet_dma_rx_cb()
1201 struct axienet_local *lp = container_of(napi, struct axienet_local, napi_rx); in axienet_rx_poll() local
1203 cur_p = &lp->rx_bd_v[lp->rx_bd_ci]; in axienet_rx_poll()
1222 phys = desc_get_phys_addr(lp, cur_p); in axienet_rx_poll()
1223 dma_unmap_single(lp->dev, phys, lp->max_frm_size, in axienet_rx_poll()
1227 skb->protocol = eth_type_trans(skb, lp->ndev); in axienet_rx_poll()
1232 if (lp->features & XAE_FEATURE_FULL_RX_CSUM) { in axienet_rx_poll()
1239 } else if (lp->features & XAE_FEATURE_PARTIAL_RX_CSUM) { in axienet_rx_poll()
1250 new_skb = napi_alloc_skb(napi, lp->max_frm_size); in axienet_rx_poll()
1254 phys = dma_map_single(lp->dev, new_skb->data, in axienet_rx_poll()
1255 lp->max_frm_size, in axienet_rx_poll()
1257 if (unlikely(dma_mapping_error(lp->dev, phys))) { in axienet_rx_poll()
1259 netdev_err(lp->ndev, "RX DMA mapping error\n"); in axienet_rx_poll()
1263 desc_set_phys_addr(lp, phys, cur_p); in axienet_rx_poll()
1265 cur_p->cntrl = lp->max_frm_size; in axienet_rx_poll()
1272 tail_p = lp->rx_bd_p + sizeof(*lp->rx_bd_v) * lp->rx_bd_ci; in axienet_rx_poll()
1274 if (++lp->rx_bd_ci >= lp->rx_bd_num) in axienet_rx_poll()
1275 lp->rx_bd_ci = 0; in axienet_rx_poll()
1276 cur_p = &lp->rx_bd_v[lp->rx_bd_ci]; in axienet_rx_poll()
1279 u64_stats_update_begin(&lp->rx_stat_sync); in axienet_rx_poll()
1280 u64_stats_add(&lp->rx_packets, packets); in axienet_rx_poll()
1281 u64_stats_add(&lp->rx_bytes, size); in axienet_rx_poll()
1282 u64_stats_update_end(&lp->rx_stat_sync); in axienet_rx_poll()
1285 axienet_dma_out_addr(lp, XAXIDMA_RX_TDESC_OFFSET, tail_p); in axienet_rx_poll()
1288 if (READ_ONCE(lp->rx_dim_enabled)) { in axienet_rx_poll()
1292 .pkt_ctr = u64_stats_read(&lp->rx_packets), in axienet_rx_poll()
1293 .byte_ctr = u64_stats_read(&lp->rx_bytes), in axienet_rx_poll()
1294 .event_ctr = READ_ONCE(lp->rx_irqs), in axienet_rx_poll()
1297 net_dim(&lp->rx_dim, &sample); in axienet_rx_poll()
1304 spin_lock_irq(&lp->rx_cr_lock); in axienet_rx_poll()
1305 axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, lp->rx_dma_cr); in axienet_rx_poll()
1306 spin_unlock_irq(&lp->rx_cr_lock); in axienet_rx_poll()
1325 struct axienet_local *lp = netdev_priv(ndev); in axienet_tx_irq() local
1327 status = axienet_dma_in32(lp, XAXIDMA_TX_SR_OFFSET); in axienet_tx_irq()
1332 axienet_dma_out32(lp, XAXIDMA_TX_SR_OFFSET, status); in axienet_tx_irq()
1337 (lp->tx_bd_v[lp->tx_bd_ci]).phys_msb, in axienet_tx_irq()
1338 (lp->tx_bd_v[lp->tx_bd_ci]).phys); in axienet_tx_irq()
1339 schedule_work(&lp->dma_err_task); in axienet_tx_irq()
1344 if (napi_schedule_prep(&lp->napi_tx)) { in axienet_tx_irq()
1347 spin_lock(&lp->tx_cr_lock); in axienet_tx_irq()
1348 cr = lp->tx_dma_cr; in axienet_tx_irq()
1350 axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, cr); in axienet_tx_irq()
1351 spin_unlock(&lp->tx_cr_lock); in axienet_tx_irq()
1352 __napi_schedule(&lp->napi_tx); in axienet_tx_irq()
1373 struct axienet_local *lp = netdev_priv(ndev); in axienet_rx_irq() local
1375 status = axienet_dma_in32(lp, XAXIDMA_RX_SR_OFFSET); in axienet_rx_irq()
1380 axienet_dma_out32(lp, XAXIDMA_RX_SR_OFFSET, status); in axienet_rx_irq()
1385 (lp->rx_bd_v[lp->rx_bd_ci]).phys_msb, in axienet_rx_irq()
1386 (lp->rx_bd_v[lp->rx_bd_ci]).phys); in axienet_rx_irq()
1387 schedule_work(&lp->dma_err_task); in axienet_rx_irq()
1392 WRITE_ONCE(lp->rx_irqs, READ_ONCE(lp->rx_irqs) + 1); in axienet_rx_irq()
1393 if (napi_schedule_prep(&lp->napi_rx)) { in axienet_rx_irq()
1396 spin_lock(&lp->rx_cr_lock); in axienet_rx_irq()
1397 cr = lp->rx_dma_cr; in axienet_rx_irq()
1399 axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, cr); in axienet_rx_irq()
1400 spin_unlock(&lp->rx_cr_lock); in axienet_rx_irq()
1402 __napi_schedule(&lp->napi_rx); in axienet_rx_irq()
1421 struct axienet_local *lp = netdev_priv(ndev); in axienet_eth_irq() local
1424 pending = axienet_ior(lp, XAE_IP_OFFSET); in axienet_eth_irq()
1434 axienet_iow(lp, XAE_IS_OFFSET, pending); in axienet_eth_irq()
1451 struct axienet_local *lp = netdev_priv(ndev); in axienet_rx_submit_desc() local
1456 skbuf_dma = axienet_get_rx_desc(lp, lp->rx_ring_head); in axienet_rx_submit_desc()
1460 lp->rx_ring_head++; in axienet_rx_submit_desc()
1461 skb = netdev_alloc_skb(ndev, lp->max_frm_size); in axienet_rx_submit_desc()
1466 addr = dma_map_single(lp->dev, skb->data, lp->max_frm_size, DMA_FROM_DEVICE); in axienet_rx_submit_desc()
1467 if (unlikely(dma_mapping_error(lp->dev, addr))) { in axienet_rx_submit_desc()
1473 sg_dma_len(skbuf_dma->sgl) = lp->max_frm_size; in axienet_rx_submit_desc()
1474 dma_rx_desc = dmaengine_prep_slave_sg(lp->rx_chan, skbuf_dma->sgl, in axienet_rx_submit_desc()
1483 dma_rx_desc->callback_param = lp; in axienet_rx_submit_desc()
1490 dma_unmap_single(lp->dev, addr, lp->max_frm_size, DMA_FROM_DEVICE); in axienet_rx_submit_desc()
1506 struct axienet_local *lp = netdev_priv(ndev); in axienet_init_dmaengine() local
1510 lp->tx_chan = dma_request_chan(lp->dev, "tx_chan0"); in axienet_init_dmaengine()
1511 if (IS_ERR(lp->tx_chan)) { in axienet_init_dmaengine()
1512 dev_err(lp->dev, "No Ethernet DMA (TX) channel found\n"); in axienet_init_dmaengine()
1513 return PTR_ERR(lp->tx_chan); in axienet_init_dmaengine()
1516 lp->rx_chan = dma_request_chan(lp->dev, "rx_chan0"); in axienet_init_dmaengine()
1517 if (IS_ERR(lp->rx_chan)) { in axienet_init_dmaengine()
1518 ret = PTR_ERR(lp->rx_chan); in axienet_init_dmaengine()
1519 dev_err(lp->dev, "No Ethernet DMA (RX) channel found\n"); in axienet_init_dmaengine()
1523 lp->tx_ring_tail = 0; in axienet_init_dmaengine()
1524 lp->tx_ring_head = 0; in axienet_init_dmaengine()
1525 lp->rx_ring_tail = 0; in axienet_init_dmaengine()
1526 lp->rx_ring_head = 0; in axienet_init_dmaengine()
1527 lp->tx_skb_ring = kcalloc(TX_BD_NUM_MAX, sizeof(*lp->tx_skb_ring), in axienet_init_dmaengine()
1529 if (!lp->tx_skb_ring) { in axienet_init_dmaengine()
1539 lp->tx_skb_ring[i] = skbuf_dma; in axienet_init_dmaengine()
1542 lp->rx_skb_ring = kcalloc(RX_BUF_NUM_DEFAULT, sizeof(*lp->rx_skb_ring), in axienet_init_dmaengine()
1544 if (!lp->rx_skb_ring) { in axienet_init_dmaengine()
1554 lp->rx_skb_ring[i] = skbuf_dma; in axienet_init_dmaengine()
1559 dma_async_issue_pending(lp->rx_chan); in axienet_init_dmaengine()
1565 kfree(lp->rx_skb_ring[i]); in axienet_init_dmaengine()
1566 kfree(lp->rx_skb_ring); in axienet_init_dmaengine()
1569 kfree(lp->tx_skb_ring[i]); in axienet_init_dmaengine()
1570 kfree(lp->tx_skb_ring); in axienet_init_dmaengine()
1572 dma_release_channel(lp->rx_chan); in axienet_init_dmaengine()
1574 dma_release_channel(lp->tx_chan); in axienet_init_dmaengine()
1592 struct axienet_local *lp = netdev_priv(ndev); in axienet_init_legacy_dma() local
1595 lp->stopping = false; in axienet_init_legacy_dma()
1596 INIT_WORK(&lp->dma_err_task, axienet_dma_err_handler); in axienet_init_legacy_dma()
1598 napi_enable(&lp->napi_rx); in axienet_init_legacy_dma()
1599 napi_enable(&lp->napi_tx); in axienet_init_legacy_dma()
1602 ret = request_irq(lp->tx_irq, axienet_tx_irq, IRQF_SHARED, in axienet_init_legacy_dma()
1607 ret = request_irq(lp->rx_irq, axienet_rx_irq, IRQF_SHARED, in axienet_init_legacy_dma()
1612 if (lp->eth_irq > 0) { in axienet_init_legacy_dma()
1613 ret = request_irq(lp->eth_irq, axienet_eth_irq, IRQF_SHARED, in axienet_init_legacy_dma()
1622 free_irq(lp->rx_irq, ndev); in axienet_init_legacy_dma()
1624 free_irq(lp->tx_irq, ndev); in axienet_init_legacy_dma()
1626 napi_disable(&lp->napi_tx); in axienet_init_legacy_dma()
1627 napi_disable(&lp->napi_rx); in axienet_init_legacy_dma()
1628 cancel_work_sync(&lp->dma_err_task); in axienet_init_legacy_dma()
1629 dev_err(lp->dev, "request_irq() failed\n"); in axienet_init_legacy_dma()
1649 struct axienet_local *lp = netdev_priv(ndev); in axienet_open() local
1655 axienet_lock_mii(lp); in axienet_open()
1657 axienet_unlock_mii(lp); in axienet_open()
1659 ret = phylink_of_phy_connect(lp->phylink, lp->dev->of_node, 0); in axienet_open()
1661 dev_err(lp->dev, "phylink_of_phy_connect() failed: %d\n", ret); in axienet_open()
1665 phylink_start(lp->phylink); in axienet_open()
1668 schedule_delayed_work(&lp->stats_work, 0); in axienet_open()
1670 if (lp->use_dmaengine) { in axienet_open()
1672 if (lp->eth_irq > 0) { in axienet_open()
1673 ret = request_irq(lp->eth_irq, axienet_eth_irq, IRQF_SHARED, in axienet_open()
1691 if (lp->eth_irq > 0) in axienet_open()
1692 free_irq(lp->eth_irq, ndev); in axienet_open()
1694 cancel_work_sync(&lp->rx_dim.work); in axienet_open()
1695 cancel_delayed_work_sync(&lp->stats_work); in axienet_open()
1696 phylink_stop(lp->phylink); in axienet_open()
1697 phylink_disconnect_phy(lp->phylink); in axienet_open()
1713 struct axienet_local *lp = netdev_priv(ndev); in axienet_stop() local
1716 if (!lp->use_dmaengine) { in axienet_stop()
1717 WRITE_ONCE(lp->stopping, true); in axienet_stop()
1718 flush_work(&lp->dma_err_task); in axienet_stop()
1720 napi_disable(&lp->napi_tx); in axienet_stop()
1721 napi_disable(&lp->napi_rx); in axienet_stop()
1724 cancel_work_sync(&lp->rx_dim.work); in axienet_stop()
1725 cancel_delayed_work_sync(&lp->stats_work); in axienet_stop()
1727 phylink_stop(lp->phylink); in axienet_stop()
1728 phylink_disconnect_phy(lp->phylink); in axienet_stop()
1730 axienet_setoptions(ndev, lp->options & in axienet_stop()
1733 if (!lp->use_dmaengine) { in axienet_stop()
1734 axienet_dma_stop(lp); in axienet_stop()
1735 cancel_work_sync(&lp->dma_err_task); in axienet_stop()
1736 free_irq(lp->tx_irq, ndev); in axienet_stop()
1737 free_irq(lp->rx_irq, ndev); in axienet_stop()
1740 dmaengine_terminate_sync(lp->tx_chan); in axienet_stop()
1741 dmaengine_synchronize(lp->tx_chan); in axienet_stop()
1742 dmaengine_terminate_sync(lp->rx_chan); in axienet_stop()
1743 dmaengine_synchronize(lp->rx_chan); in axienet_stop()
1746 kfree(lp->tx_skb_ring[i]); in axienet_stop()
1747 kfree(lp->tx_skb_ring); in axienet_stop()
1749 kfree(lp->rx_skb_ring[i]); in axienet_stop()
1750 kfree(lp->rx_skb_ring); in axienet_stop()
1752 dma_release_channel(lp->rx_chan); in axienet_stop()
1753 dma_release_channel(lp->tx_chan); in axienet_stop()
1757 axienet_iow(lp, XAE_IE_OFFSET, 0); in axienet_stop()
1759 if (lp->eth_irq > 0) in axienet_stop()
1760 free_irq(lp->eth_irq, ndev); in axienet_stop()
1777 struct axienet_local *lp = netdev_priv(ndev); in axienet_change_mtu() local
1783 XAE_TRL_SIZE) > lp->rxmem) in axienet_change_mtu()
1801 struct axienet_local *lp = netdev_priv(ndev); in axienet_poll_controller() local
1803 disable_irq(lp->tx_irq); in axienet_poll_controller()
1804 disable_irq(lp->rx_irq); in axienet_poll_controller()
1805 axienet_rx_irq(lp->tx_irq, ndev); in axienet_poll_controller()
1806 axienet_tx_irq(lp->rx_irq, ndev); in axienet_poll_controller()
1807 enable_irq(lp->tx_irq); in axienet_poll_controller()
1808 enable_irq(lp->rx_irq); in axienet_poll_controller()
1814 struct axienet_local *lp = netdev_priv(dev); in axienet_ioctl() local
1819 return phylink_mii_ioctl(lp->phylink, rq, cmd); in axienet_ioctl()
1825 struct axienet_local *lp = netdev_priv(dev); in axienet_get_stats64() local
1831 start = u64_stats_fetch_begin(&lp->rx_stat_sync); in axienet_get_stats64()
1832 stats->rx_packets = u64_stats_read(&lp->rx_packets); in axienet_get_stats64()
1833 stats->rx_bytes = u64_stats_read(&lp->rx_bytes); in axienet_get_stats64()
1834 } while (u64_stats_fetch_retry(&lp->rx_stat_sync, start)); in axienet_get_stats64()
1837 start = u64_stats_fetch_begin(&lp->tx_stat_sync); in axienet_get_stats64()
1838 stats->tx_packets = u64_stats_read(&lp->tx_packets); in axienet_get_stats64()
1839 stats->tx_bytes = u64_stats_read(&lp->tx_bytes); in axienet_get_stats64()
1840 } while (u64_stats_fetch_retry(&lp->tx_stat_sync, start)); in axienet_get_stats64()
1842 if (!(lp->features & XAE_FEATURE_STATS)) in axienet_get_stats64()
1846 start = read_seqcount_begin(&lp->hw_stats_seqcount); in axienet_get_stats64()
1848 axienet_stat(lp, STAT_RX_LENGTH_ERRORS); in axienet_get_stats64()
1849 stats->rx_crc_errors = axienet_stat(lp, STAT_RX_FCS_ERRORS); in axienet_get_stats64()
1851 axienet_stat(lp, STAT_RX_ALIGNMENT_ERRORS); in axienet_get_stats64()
1852 stats->rx_errors = axienet_stat(lp, STAT_UNDERSIZE_FRAMES) + in axienet_get_stats64()
1853 axienet_stat(lp, STAT_FRAGMENT_FRAMES) + in axienet_get_stats64()
1857 stats->multicast = axienet_stat(lp, STAT_RX_MULTICAST_FRAMES); in axienet_get_stats64()
1860 axienet_stat(lp, STAT_TX_EXCESS_COLLISIONS); in axienet_get_stats64()
1862 axienet_stat(lp, STAT_TX_UNDERRUN_ERRORS); in axienet_get_stats64()
1864 axienet_stat(lp, STAT_TX_LATE_COLLISIONS); in axienet_get_stats64()
1865 stats->tx_errors = axienet_stat(lp, STAT_TX_EXCESS_DEFERRAL) + in axienet_get_stats64()
1869 } while (read_seqcount_retry(&lp->hw_stats_seqcount, start)); in axienet_get_stats64()
1944 struct axienet_local *lp = netdev_priv(ndev); in axienet_ethtools_get_regs() local
1950 data[0] = axienet_ior(lp, XAE_RAF_OFFSET); in axienet_ethtools_get_regs()
1951 data[1] = axienet_ior(lp, XAE_TPF_OFFSET); in axienet_ethtools_get_regs()
1952 data[2] = axienet_ior(lp, XAE_IFGP_OFFSET); in axienet_ethtools_get_regs()
1953 data[3] = axienet_ior(lp, XAE_IS_OFFSET); in axienet_ethtools_get_regs()
1954 data[4] = axienet_ior(lp, XAE_IP_OFFSET); in axienet_ethtools_get_regs()
1955 data[5] = axienet_ior(lp, XAE_IE_OFFSET); in axienet_ethtools_get_regs()
1956 data[6] = axienet_ior(lp, XAE_TTAG_OFFSET); in axienet_ethtools_get_regs()
1957 data[7] = axienet_ior(lp, XAE_RTAG_OFFSET); in axienet_ethtools_get_regs()
1958 data[8] = axienet_ior(lp, XAE_UAWL_OFFSET); in axienet_ethtools_get_regs()
1959 data[9] = axienet_ior(lp, XAE_UAWU_OFFSET); in axienet_ethtools_get_regs()
1960 data[10] = axienet_ior(lp, XAE_TPID0_OFFSET); in axienet_ethtools_get_regs()
1961 data[11] = axienet_ior(lp, XAE_TPID1_OFFSET); in axienet_ethtools_get_regs()
1962 data[12] = axienet_ior(lp, XAE_PPST_OFFSET); in axienet_ethtools_get_regs()
1963 data[13] = axienet_ior(lp, XAE_RCW0_OFFSET); in axienet_ethtools_get_regs()
1964 data[14] = axienet_ior(lp, XAE_RCW1_OFFSET); in axienet_ethtools_get_regs()
1965 data[15] = axienet_ior(lp, XAE_TC_OFFSET); in axienet_ethtools_get_regs()
1966 data[16] = axienet_ior(lp, XAE_FCC_OFFSET); in axienet_ethtools_get_regs()
1967 data[17] = axienet_ior(lp, XAE_EMMC_OFFSET); in axienet_ethtools_get_regs()
1968 data[18] = axienet_ior(lp, XAE_PHYC_OFFSET); in axienet_ethtools_get_regs()
1969 data[19] = axienet_ior(lp, XAE_MDIO_MC_OFFSET); in axienet_ethtools_get_regs()
1970 data[20] = axienet_ior(lp, XAE_MDIO_MCR_OFFSET); in axienet_ethtools_get_regs()
1971 data[21] = axienet_ior(lp, XAE_MDIO_MWD_OFFSET); in axienet_ethtools_get_regs()
1972 data[22] = axienet_ior(lp, XAE_MDIO_MRD_OFFSET); in axienet_ethtools_get_regs()
1973 data[27] = axienet_ior(lp, XAE_UAW0_OFFSET); in axienet_ethtools_get_regs()
1974 data[28] = axienet_ior(lp, XAE_UAW1_OFFSET); in axienet_ethtools_get_regs()
1975 data[29] = axienet_ior(lp, XAE_FMI_OFFSET); in axienet_ethtools_get_regs()
1976 data[30] = axienet_ior(lp, XAE_AF0_OFFSET); in axienet_ethtools_get_regs()
1977 data[31] = axienet_ior(lp, XAE_AF1_OFFSET); in axienet_ethtools_get_regs()
1978 if (!lp->use_dmaengine) { in axienet_ethtools_get_regs()
1979 data[32] = axienet_dma_in32(lp, XAXIDMA_TX_CR_OFFSET); in axienet_ethtools_get_regs()
1980 data[33] = axienet_dma_in32(lp, XAXIDMA_TX_SR_OFFSET); in axienet_ethtools_get_regs()
1981 data[34] = axienet_dma_in32(lp, XAXIDMA_TX_CDESC_OFFSET); in axienet_ethtools_get_regs()
1982 data[35] = axienet_dma_in32(lp, XAXIDMA_TX_TDESC_OFFSET); in axienet_ethtools_get_regs()
1983 data[36] = axienet_dma_in32(lp, XAXIDMA_RX_CR_OFFSET); in axienet_ethtools_get_regs()
1984 data[37] = axienet_dma_in32(lp, XAXIDMA_RX_SR_OFFSET); in axienet_ethtools_get_regs()
1985 data[38] = axienet_dma_in32(lp, XAXIDMA_RX_CDESC_OFFSET); in axienet_ethtools_get_regs()
1986 data[39] = axienet_dma_in32(lp, XAXIDMA_RX_TDESC_OFFSET); in axienet_ethtools_get_regs()
1996 struct axienet_local *lp = netdev_priv(ndev); in axienet_ethtools_get_ringparam() local
2002 ering->rx_pending = lp->rx_bd_num; in axienet_ethtools_get_ringparam()
2005 ering->tx_pending = lp->tx_bd_num; in axienet_ethtools_get_ringparam()
2014 struct axienet_local *lp = netdev_priv(ndev); in axienet_ethtools_set_ringparam() local
2026 lp->rx_bd_num = ering->rx_pending; in axienet_ethtools_set_ringparam()
2027 lp->tx_bd_num = ering->tx_pending; in axienet_ethtools_set_ringparam()
2044 struct axienet_local *lp = netdev_priv(ndev); in axienet_ethtools_get_pauseparam() local
2046 phylink_ethtool_get_pauseparam(lp->phylink, epauseparm); in axienet_ethtools_get_pauseparam()
2065 struct axienet_local *lp = netdev_priv(ndev); in axienet_ethtools_set_pauseparam() local
2067 return phylink_ethtool_set_pauseparam(lp->phylink, epauseparm); in axienet_ethtools_set_pauseparam()
2072 * @lp: Device private data
2076 static void axienet_update_coalesce_rx(struct axienet_local *lp, u32 cr, in axienet_update_coalesce_rx() argument
2079 spin_lock_irq(&lp->rx_cr_lock); in axienet_update_coalesce_rx()
2080 lp->rx_dma_cr &= ~mask; in axienet_update_coalesce_rx()
2081 lp->rx_dma_cr |= cr; in axienet_update_coalesce_rx()
2085 if (lp->rx_dma_started) { in axienet_update_coalesce_rx()
2086 u32 reg = axienet_dma_in32(lp, XAXIDMA_RX_CR_OFFSET); in axienet_update_coalesce_rx()
2090 cr = lp->rx_dma_cr; in axienet_update_coalesce_rx()
2092 cr = lp->rx_dma_cr & ~XAXIDMA_IRQ_ALL_MASK; in axienet_update_coalesce_rx()
2093 axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, cr); in axienet_update_coalesce_rx()
2095 spin_unlock_irq(&lp->rx_cr_lock); in axienet_update_coalesce_rx()
2100 * @lp: Device private data
2102 static u32 axienet_dim_coalesce_count_rx(struct axienet_local *lp) in axienet_dim_coalesce_count_rx() argument
2104 return min(1 << (lp->rx_dim.profile_ix << 1), 255); in axienet_dim_coalesce_count_rx()
2113 struct axienet_local *lp = in axienet_rx_dim_work() local
2115 u32 cr = axienet_calc_cr(lp, axienet_dim_coalesce_count_rx(lp), 0); in axienet_rx_dim_work()
2119 axienet_update_coalesce_rx(lp, cr, mask); in axienet_rx_dim_work()
2120 lp->rx_dim.state = DIM_START_MEASURE; in axienet_rx_dim_work()
2125 * @lp: Device private data
2129 static void axienet_update_coalesce_tx(struct axienet_local *lp, u32 cr, in axienet_update_coalesce_tx() argument
2132 spin_lock_irq(&lp->tx_cr_lock); in axienet_update_coalesce_tx()
2133 lp->tx_dma_cr &= ~mask; in axienet_update_coalesce_tx()
2134 lp->tx_dma_cr |= cr; in axienet_update_coalesce_tx()
2138 if (lp->tx_dma_started) { in axienet_update_coalesce_tx()
2139 u32 reg = axienet_dma_in32(lp, XAXIDMA_TX_CR_OFFSET); in axienet_update_coalesce_tx()
2143 cr = lp->tx_dma_cr; in axienet_update_coalesce_tx()
2145 cr = lp->tx_dma_cr & ~XAXIDMA_IRQ_ALL_MASK; in axienet_update_coalesce_tx()
2146 axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, cr); in axienet_update_coalesce_tx()
2148 spin_unlock_irq(&lp->tx_cr_lock); in axienet_update_coalesce_tx()
2170 struct axienet_local *lp = netdev_priv(ndev); in axienet_ethtools_get_coalesce() local
2173 ecoalesce->use_adaptive_rx_coalesce = lp->rx_dim_enabled; in axienet_ethtools_get_coalesce()
2175 spin_lock_irq(&lp->rx_cr_lock); in axienet_ethtools_get_coalesce()
2176 cr = lp->rx_dma_cr; in axienet_ethtools_get_coalesce()
2177 spin_unlock_irq(&lp->rx_cr_lock); in axienet_ethtools_get_coalesce()
2178 axienet_coalesce_params(lp, cr, in axienet_ethtools_get_coalesce()
2182 spin_lock_irq(&lp->tx_cr_lock); in axienet_ethtools_get_coalesce()
2183 cr = lp->tx_dma_cr; in axienet_ethtools_get_coalesce()
2184 spin_unlock_irq(&lp->tx_cr_lock); in axienet_ethtools_get_coalesce()
2185 axienet_coalesce_params(lp, cr, in axienet_ethtools_get_coalesce()
2210 struct axienet_local *lp = netdev_priv(ndev); in axienet_ethtools_set_coalesce() local
2212 bool old_dim = lp->rx_dim_enabled; in axienet_ethtools_set_coalesce()
2237 cr = axienet_calc_cr(lp, axienet_dim_coalesce_count_rx(lp), in axienet_ethtools_set_coalesce()
2241 WRITE_ONCE(lp->rx_dim_enabled, false); in axienet_ethtools_set_coalesce()
2242 napi_synchronize(&lp->napi_rx); in axienet_ethtools_set_coalesce()
2243 flush_work(&lp->rx_dim.work); in axienet_ethtools_set_coalesce()
2246 cr = axienet_calc_cr(lp, ecoalesce->rx_max_coalesced_frames, in axienet_ethtools_set_coalesce()
2250 cr = axienet_calc_cr(lp, 2, ecoalesce->rx_coalesce_usecs); in axienet_ethtools_set_coalesce()
2254 axienet_update_coalesce_rx(lp, cr, mask); in axienet_ethtools_set_coalesce()
2256 WRITE_ONCE(lp->rx_dim_enabled, true); in axienet_ethtools_set_coalesce()
2258 cr = axienet_calc_cr(lp, ecoalesce->tx_max_coalesced_frames, in axienet_ethtools_set_coalesce()
2260 axienet_update_coalesce_tx(lp, cr, ~XAXIDMA_CR_RUNSTOP_MASK); in axienet_ethtools_set_coalesce()
2268 struct axienet_local *lp = netdev_priv(ndev); in axienet_ethtools_get_link_ksettings() local
2270 return phylink_ethtool_ksettings_get(lp->phylink, cmd); in axienet_ethtools_get_link_ksettings()
2277 struct axienet_local *lp = netdev_priv(ndev); in axienet_ethtools_set_link_ksettings() local
2279 return phylink_ethtool_ksettings_set(lp->phylink, cmd); in axienet_ethtools_set_link_ksettings()
2284 struct axienet_local *lp = netdev_priv(dev); in axienet_ethtools_nway_reset() local
2286 return phylink_ethtool_nway_reset(lp->phylink); in axienet_ethtools_nway_reset()
2293 struct axienet_local *lp = netdev_priv(dev); in axienet_ethtools_get_ethtool_stats() local
2297 start = read_seqcount_begin(&lp->hw_stats_seqcount); in axienet_ethtools_get_ethtool_stats()
2298 data[0] = axienet_stat(lp, STAT_RX_BYTES); in axienet_ethtools_get_ethtool_stats()
2299 data[1] = axienet_stat(lp, STAT_TX_BYTES); in axienet_ethtools_get_ethtool_stats()
2300 data[2] = axienet_stat(lp, STAT_RX_VLAN_FRAMES); in axienet_ethtools_get_ethtool_stats()
2301 data[3] = axienet_stat(lp, STAT_TX_VLAN_FRAMES); in axienet_ethtools_get_ethtool_stats()
2302 data[6] = axienet_stat(lp, STAT_TX_PFC_FRAMES); in axienet_ethtools_get_ethtool_stats()
2303 data[7] = axienet_stat(lp, STAT_RX_PFC_FRAMES); in axienet_ethtools_get_ethtool_stats()
2304 data[8] = axienet_stat(lp, STAT_USER_DEFINED0); in axienet_ethtools_get_ethtool_stats()
2305 data[9] = axienet_stat(lp, STAT_USER_DEFINED1); in axienet_ethtools_get_ethtool_stats()
2306 data[10] = axienet_stat(lp, STAT_USER_DEFINED2); in axienet_ethtools_get_ethtool_stats()
2307 } while (read_seqcount_retry(&lp->hw_stats_seqcount, start)); in axienet_ethtools_get_ethtool_stats()
2334 struct axienet_local *lp = netdev_priv(dev); in axienet_ethtools_get_sset_count() local
2338 if (lp->features & XAE_FEATURE_STATS) in axienet_ethtools_get_sset_count()
2350 struct axienet_local *lp = netdev_priv(dev); in axienet_ethtools_get_pause_stats() local
2353 if (!(lp->features & XAE_FEATURE_STATS)) in axienet_ethtools_get_pause_stats()
2357 start = read_seqcount_begin(&lp->hw_stats_seqcount); in axienet_ethtools_get_pause_stats()
2359 axienet_stat(lp, STAT_TX_PAUSE_FRAMES); in axienet_ethtools_get_pause_stats()
2361 axienet_stat(lp, STAT_RX_PAUSE_FRAMES); in axienet_ethtools_get_pause_stats()
2362 } while (read_seqcount_retry(&lp->hw_stats_seqcount, start)); in axienet_ethtools_get_pause_stats()
2369 struct axienet_local *lp = netdev_priv(dev); in axienet_ethtool_get_eth_mac_stats() local
2372 if (!(lp->features & XAE_FEATURE_STATS)) in axienet_ethtool_get_eth_mac_stats()
2376 start = read_seqcount_begin(&lp->hw_stats_seqcount); in axienet_ethtool_get_eth_mac_stats()
2378 axienet_stat(lp, STAT_TX_GOOD_FRAMES); in axienet_ethtool_get_eth_mac_stats()
2380 axienet_stat(lp, STAT_TX_SINGLE_COLLISION_FRAMES); in axienet_ethtool_get_eth_mac_stats()
2382 axienet_stat(lp, STAT_TX_MULTIPLE_COLLISION_FRAMES); in axienet_ethtool_get_eth_mac_stats()
2384 axienet_stat(lp, STAT_RX_GOOD_FRAMES); in axienet_ethtool_get_eth_mac_stats()
2386 axienet_stat(lp, STAT_RX_FCS_ERRORS); in axienet_ethtool_get_eth_mac_stats()
2388 axienet_stat(lp, STAT_RX_ALIGNMENT_ERRORS); in axienet_ethtool_get_eth_mac_stats()
2390 axienet_stat(lp, STAT_TX_DEFERRED_FRAMES); in axienet_ethtool_get_eth_mac_stats()
2392 axienet_stat(lp, STAT_TX_LATE_COLLISIONS); in axienet_ethtool_get_eth_mac_stats()
2394 axienet_stat(lp, STAT_TX_EXCESS_COLLISIONS); in axienet_ethtool_get_eth_mac_stats()
2396 axienet_stat(lp, STAT_TX_MULTICAST_FRAMES); in axienet_ethtool_get_eth_mac_stats()
2398 axienet_stat(lp, STAT_TX_BROADCAST_FRAMES); in axienet_ethtool_get_eth_mac_stats()
2400 axienet_stat(lp, STAT_TX_EXCESS_DEFERRAL); in axienet_ethtool_get_eth_mac_stats()
2402 axienet_stat(lp, STAT_RX_MULTICAST_FRAMES); in axienet_ethtool_get_eth_mac_stats()
2404 axienet_stat(lp, STAT_RX_BROADCAST_FRAMES); in axienet_ethtool_get_eth_mac_stats()
2406 axienet_stat(lp, STAT_RX_LENGTH_ERRORS); in axienet_ethtool_get_eth_mac_stats()
2407 } while (read_seqcount_retry(&lp->hw_stats_seqcount, start)); in axienet_ethtool_get_eth_mac_stats()
2414 struct axienet_local *lp = netdev_priv(dev); in axienet_ethtool_get_eth_ctrl_stats() local
2417 if (!(lp->features & XAE_FEATURE_STATS)) in axienet_ethtool_get_eth_ctrl_stats()
2421 start = read_seqcount_begin(&lp->hw_stats_seqcount); in axienet_ethtool_get_eth_ctrl_stats()
2423 axienet_stat(lp, STAT_TX_CONTROL_FRAMES); in axienet_ethtool_get_eth_ctrl_stats()
2425 axienet_stat(lp, STAT_RX_CONTROL_FRAMES); in axienet_ethtool_get_eth_ctrl_stats()
2427 axienet_stat(lp, STAT_RX_CONTROL_OPCODE_ERRORS); in axienet_ethtool_get_eth_ctrl_stats()
2428 } while (read_seqcount_retry(&lp->hw_stats_seqcount, start)); in axienet_ethtool_get_eth_ctrl_stats()
2447 struct axienet_local *lp = netdev_priv(dev); in axienet_ethtool_get_rmon_stats() local
2450 if (!(lp->features & XAE_FEATURE_STATS)) in axienet_ethtool_get_rmon_stats()
2454 start = read_seqcount_begin(&lp->hw_stats_seqcount); in axienet_ethtool_get_rmon_stats()
2456 axienet_stat(lp, STAT_UNDERSIZE_FRAMES); in axienet_ethtool_get_rmon_stats()
2458 axienet_stat(lp, STAT_RX_OVERSIZE_FRAMES); in axienet_ethtool_get_rmon_stats()
2460 axienet_stat(lp, STAT_FRAGMENT_FRAMES); in axienet_ethtool_get_rmon_stats()
2463 axienet_stat(lp, STAT_RX_64_BYTE_FRAMES); in axienet_ethtool_get_rmon_stats()
2465 axienet_stat(lp, STAT_RX_65_127_BYTE_FRAMES); in axienet_ethtool_get_rmon_stats()
2467 axienet_stat(lp, STAT_RX_128_255_BYTE_FRAMES); in axienet_ethtool_get_rmon_stats()
2469 axienet_stat(lp, STAT_RX_256_511_BYTE_FRAMES); in axienet_ethtool_get_rmon_stats()
2471 axienet_stat(lp, STAT_RX_512_1023_BYTE_FRAMES); in axienet_ethtool_get_rmon_stats()
2473 axienet_stat(lp, STAT_RX_1024_MAX_BYTE_FRAMES); in axienet_ethtool_get_rmon_stats()
2478 axienet_stat(lp, STAT_TX_64_BYTE_FRAMES); in axienet_ethtool_get_rmon_stats()
2480 axienet_stat(lp, STAT_TX_65_127_BYTE_FRAMES); in axienet_ethtool_get_rmon_stats()
2482 axienet_stat(lp, STAT_TX_128_255_BYTE_FRAMES); in axienet_ethtool_get_rmon_stats()
2484 axienet_stat(lp, STAT_TX_256_511_BYTE_FRAMES); in axienet_ethtool_get_rmon_stats()
2486 axienet_stat(lp, STAT_TX_512_1023_BYTE_FRAMES); in axienet_ethtool_get_rmon_stats()
2488 axienet_stat(lp, STAT_TX_1024_MAX_BYTE_FRAMES); in axienet_ethtool_get_rmon_stats()
2490 axienet_stat(lp, STAT_TX_OVERSIZE_FRAMES); in axienet_ethtool_get_rmon_stats()
2491 } while (read_seqcount_retry(&lp->hw_stats_seqcount, start)); in axienet_ethtool_get_rmon_stats()
2550 struct axienet_local *lp = netdev_priv(ndev); in axienet_pcs_config() local
2553 if (lp->switch_x_sgmii) { in axienet_pcs_config()
2583 struct axienet_local *lp = netdev_priv(ndev); in axienet_mac_select_pcs() local
2587 return &lp->pcs; in axienet_mac_select_pcs()
2612 struct axienet_local *lp = netdev_priv(ndev); in axienet_mac_link_up() local
2615 emmc_reg = axienet_ior(lp, XAE_EMMC_OFFSET); in axienet_mac_link_up()
2634 axienet_iow(lp, XAE_EMMC_OFFSET, emmc_reg); in axienet_mac_link_up()
2636 fcc_reg = axienet_ior(lp, XAE_FCC_OFFSET); in axienet_mac_link_up()
2645 axienet_iow(lp, XAE_FCC_OFFSET, fcc_reg); in axienet_mac_link_up()
2667 struct axienet_local *lp = container_of(work, struct axienet_local, in axienet_dma_err_handler() local
2669 struct net_device *ndev = lp->ndev; in axienet_dma_err_handler()
2672 if (READ_ONCE(lp->stopping)) in axienet_dma_err_handler()
2675 napi_disable(&lp->napi_tx); in axienet_dma_err_handler()
2676 napi_disable(&lp->napi_rx); in axienet_dma_err_handler()
2678 axienet_setoptions(ndev, lp->options & in axienet_dma_err_handler()
2681 axienet_dma_stop(lp); in axienet_dma_err_handler()
2684 for (i = 0; i < lp->tx_bd_num; i++) { in axienet_dma_err_handler()
2685 cur_p = &lp->tx_bd_v[i]; in axienet_dma_err_handler()
2687 dma_addr_t addr = desc_get_phys_addr(lp, cur_p); in axienet_dma_err_handler()
2689 dma_unmap_single(lp->dev, addr, in axienet_dma_err_handler()
2708 for (i = 0; i < lp->rx_bd_num; i++) { in axienet_dma_err_handler()
2709 cur_p = &lp->rx_bd_v[i]; in axienet_dma_err_handler()
2718 lp->tx_bd_ci = 0; in axienet_dma_err_handler()
2719 lp->tx_bd_tail = 0; in axienet_dma_err_handler()
2720 lp->rx_bd_ci = 0; in axienet_dma_err_handler()
2722 axienet_dma_start(lp); in axienet_dma_err_handler()
2724 axienet_status = axienet_ior(lp, XAE_RCW1_OFFSET); in axienet_dma_err_handler()
2726 axienet_iow(lp, XAE_RCW1_OFFSET, axienet_status); in axienet_dma_err_handler()
2728 axienet_status = axienet_ior(lp, XAE_IP_OFFSET); in axienet_dma_err_handler()
2730 axienet_iow(lp, XAE_IS_OFFSET, XAE_INT_RXRJECT_MASK); in axienet_dma_err_handler()
2731 axienet_iow(lp, XAE_IE_OFFSET, lp->eth_irq > 0 ? in axienet_dma_err_handler()
2733 axienet_iow(lp, XAE_FCC_OFFSET, XAE_FCC_FCRX_MASK); in axienet_dma_err_handler()
2738 axienet_setoptions(ndev, lp->options & in axienet_dma_err_handler()
2742 napi_enable(&lp->napi_rx); in axienet_dma_err_handler()
2743 napi_enable(&lp->napi_tx); in axienet_dma_err_handler()
2744 axienet_setoptions(ndev, lp->options); in axienet_dma_err_handler()
2763 struct axienet_local *lp; in axienet_probe() local
2770 ndev = alloc_etherdev(sizeof(*lp)); in axienet_probe()
2784 lp = netdev_priv(ndev); in axienet_probe()
2785 lp->ndev = ndev; in axienet_probe()
2786 lp->dev = &pdev->dev; in axienet_probe()
2787 lp->options = XAE_OPTION_DEFAULTS; in axienet_probe()
2788 lp->rx_bd_num = RX_BD_NUM_DEFAULT; in axienet_probe()
2789 lp->tx_bd_num = TX_BD_NUM_DEFAULT; in axienet_probe()
2791 u64_stats_init(&lp->rx_stat_sync); in axienet_probe()
2792 u64_stats_init(&lp->tx_stat_sync); in axienet_probe()
2794 mutex_init(&lp->stats_lock); in axienet_probe()
2795 seqcount_mutex_init(&lp->hw_stats_seqcount, &lp->stats_lock); in axienet_probe()
2796 INIT_DEFERRABLE_WORK(&lp->stats_work, axienet_refresh_stats); in axienet_probe()
2798 lp->axi_clk = devm_clk_get_optional(&pdev->dev, "s_axi_lite_clk"); in axienet_probe()
2799 if (!lp->axi_clk) { in axienet_probe()
2803 lp->axi_clk = devm_clk_get_optional(&pdev->dev, NULL); in axienet_probe()
2805 if (IS_ERR(lp->axi_clk)) { in axienet_probe()
2806 ret = PTR_ERR(lp->axi_clk); in axienet_probe()
2809 ret = clk_prepare_enable(lp->axi_clk); in axienet_probe()
2815 lp->misc_clks[0].id = "axis_clk"; in axienet_probe()
2816 lp->misc_clks[1].id = "ref_clk"; in axienet_probe()
2817 lp->misc_clks[2].id = "mgt_clk"; in axienet_probe()
2819 ret = devm_clk_bulk_get_optional(&pdev->dev, XAE_NUM_MISC_CLOCKS, lp->misc_clks); in axienet_probe()
2823 ret = clk_bulk_prepare_enable(XAE_NUM_MISC_CLOCKS, lp->misc_clks); in axienet_probe()
2828 lp->regs = devm_platform_get_and_ioremap_resource(pdev, 0, ðres); in axienet_probe()
2829 if (IS_ERR(lp->regs)) { in axienet_probe()
2830 ret = PTR_ERR(lp->regs); in axienet_probe()
2833 lp->regs_start = ethres->start; in axienet_probe()
2836 lp->features = 0; in axienet_probe()
2838 if (axienet_ior(lp, XAE_ABILITY_OFFSET) & XAE_ABILITY_STATS) in axienet_probe()
2839 lp->features |= XAE_FEATURE_STATS; in axienet_probe()
2845 lp->features |= XAE_FEATURE_PARTIAL_TX_CSUM; in axienet_probe()
2850 lp->features |= XAE_FEATURE_FULL_TX_CSUM; in axienet_probe()
2860 lp->features |= XAE_FEATURE_PARTIAL_RX_CSUM; in axienet_probe()
2864 lp->features |= XAE_FEATURE_FULL_RX_CSUM; in axienet_probe()
2875 of_property_read_u32(pdev->dev.of_node, "xlnx,rxmem", &lp->rxmem); in axienet_probe()
2877 lp->switch_x_sgmii = of_property_read_bool(pdev->dev.of_node, in axienet_probe()
2886 lp->phy_mode = PHY_INTERFACE_MODE_MII; in axienet_probe()
2889 lp->phy_mode = PHY_INTERFACE_MODE_GMII; in axienet_probe()
2892 lp->phy_mode = PHY_INTERFACE_MODE_RGMII_ID; in axienet_probe()
2895 lp->phy_mode = PHY_INTERFACE_MODE_SGMII; in axienet_probe()
2898 lp->phy_mode = PHY_INTERFACE_MODE_1000BASEX; in axienet_probe()
2905 ret = of_get_phy_mode(pdev->dev.of_node, &lp->phy_mode); in axienet_probe()
2909 if (lp->switch_x_sgmii && lp->phy_mode != PHY_INTERFACE_MODE_SGMII && in axienet_probe()
2910 lp->phy_mode != PHY_INTERFACE_MODE_1000BASEX) { in axienet_probe()
2930 lp->dma_regs = devm_ioremap_resource(&pdev->dev, in axienet_probe()
2932 lp->rx_irq = irq_of_parse_and_map(np, 1); in axienet_probe()
2933 lp->tx_irq = irq_of_parse_and_map(np, 0); in axienet_probe()
2935 lp->eth_irq = platform_get_irq_optional(pdev, 0); in axienet_probe()
2938 lp->dma_regs = devm_platform_get_and_ioremap_resource(pdev, 1, NULL); in axienet_probe()
2939 lp->rx_irq = platform_get_irq(pdev, 1); in axienet_probe()
2940 lp->tx_irq = platform_get_irq(pdev, 0); in axienet_probe()
2941 lp->eth_irq = platform_get_irq_optional(pdev, 2); in axienet_probe()
2943 if (IS_ERR(lp->dma_regs)) { in axienet_probe()
2945 ret = PTR_ERR(lp->dma_regs); in axienet_probe()
2948 if (lp->rx_irq <= 0 || lp->tx_irq <= 0) { in axienet_probe()
2955 ret = __axienet_device_reset(lp); in axienet_probe()
2967 if ((axienet_ior(lp, XAE_ID_OFFSET) >> 24) >= 0x9) { in axienet_probe()
2968 void __iomem *desc = lp->dma_regs + XAXIDMA_TX_CDESC_OFFSET + 4; in axienet_probe()
2974 lp->features |= XAE_FEATURE_DMA_64BIT; in axienet_probe()
2982 if (!IS_ENABLED(CONFIG_64BIT) && lp->features & XAE_FEATURE_DMA_64BIT) { in axienet_probe()
2993 netif_napi_add(ndev, &lp->napi_rx, axienet_rx_poll); in axienet_probe()
2994 netif_napi_add(ndev, &lp->napi_tx, axienet_tx_poll); in axienet_probe()
2999 lp->eth_irq = platform_get_irq_optional(pdev, 0); in axienet_probe()
3000 if (lp->eth_irq < 0 && lp->eth_irq != -ENXIO) { in axienet_probe()
3001 ret = lp->eth_irq; in axienet_probe()
3004 tx_chan = dma_request_chan(lp->dev, "tx_chan0"); in axienet_probe()
3007 dev_err_probe(lp->dev, ret, "No Ethernet DMA (TX) channel found\n"); in axienet_probe()
3021 lp->use_dmaengine = 1; in axienet_probe()
3024 if (lp->use_dmaengine) in axienet_probe()
3029 if (lp->eth_irq <= 0) in axienet_probe()
3042 spin_lock_init(&lp->rx_cr_lock); in axienet_probe()
3043 spin_lock_init(&lp->tx_cr_lock); in axienet_probe()
3044 INIT_WORK(&lp->rx_dim.work, axienet_rx_dim_work); in axienet_probe()
3045 lp->rx_dim_enabled = true; in axienet_probe()
3046 lp->rx_dim.profile_ix = 1; in axienet_probe()
3047 lp->rx_dma_cr = axienet_calc_cr(lp, axienet_dim_coalesce_count_rx(lp), in axienet_probe()
3049 lp->tx_dma_cr = axienet_calc_cr(lp, XAXIDMA_DFT_TX_THRESHOLD, in axienet_probe()
3052 ret = axienet_mdio_setup(lp); in axienet_probe()
3057 if (lp->phy_mode == PHY_INTERFACE_MODE_SGMII || in axienet_probe()
3058 lp->phy_mode == PHY_INTERFACE_MODE_1000BASEX) { in axienet_probe()
3072 lp->pcs_phy = of_mdio_find_device(np); in axienet_probe()
3073 if (!lp->pcs_phy) { in axienet_probe()
3079 lp->pcs.ops = &axienet_pcs_ops; in axienet_probe()
3080 lp->pcs.poll = true; in axienet_probe()
3083 lp->phylink_config.dev = &ndev->dev; in axienet_probe()
3084 lp->phylink_config.type = PHYLINK_NETDEV; in axienet_probe()
3085 lp->phylink_config.mac_managed_pm = true; in axienet_probe()
3086 lp->phylink_config.mac_capabilities = MAC_SYM_PAUSE | MAC_ASYM_PAUSE | in axienet_probe()
3089 __set_bit(lp->phy_mode, lp->phylink_config.supported_interfaces); in axienet_probe()
3090 if (lp->switch_x_sgmii) { in axienet_probe()
3092 lp->phylink_config.supported_interfaces); in axienet_probe()
3094 lp->phylink_config.supported_interfaces); in axienet_probe()
3097 lp->phylink = phylink_create(&lp->phylink_config, pdev->dev.fwnode, in axienet_probe()
3098 lp->phy_mode, in axienet_probe()
3100 if (IS_ERR(lp->phylink)) { in axienet_probe()
3101 ret = PTR_ERR(lp->phylink); in axienet_probe()
3106 ret = register_netdev(lp->ndev); in axienet_probe()
3108 dev_err(lp->dev, "register_netdev() error (%i)\n", ret); in axienet_probe()
3115 phylink_destroy(lp->phylink); in axienet_probe()
3118 if (lp->pcs_phy) in axienet_probe()
3119 put_device(&lp->pcs_phy->dev); in axienet_probe()
3120 if (lp->mii_bus) in axienet_probe()
3121 axienet_mdio_teardown(lp); in axienet_probe()
3123 clk_bulk_disable_unprepare(XAE_NUM_MISC_CLOCKS, lp->misc_clks); in axienet_probe()
3124 clk_disable_unprepare(lp->axi_clk); in axienet_probe()
3135 struct axienet_local *lp = netdev_priv(ndev); in axienet_remove() local
3139 if (lp->phylink) in axienet_remove()
3140 phylink_destroy(lp->phylink); in axienet_remove()
3142 if (lp->pcs_phy) in axienet_remove()
3143 put_device(&lp->pcs_phy->dev); in axienet_remove()
3145 axienet_mdio_teardown(lp); in axienet_remove()
3147 clk_bulk_disable_unprepare(XAE_NUM_MISC_CLOCKS, lp->misc_clks); in axienet_remove()
3148 clk_disable_unprepare(lp->axi_clk); in axienet_remove()