Lines Matching +full:rx +full:- +full:queues +full:- +full:to +full:- +full:use
1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2005-2006 Fen Systems Ltd.
5 * Copyright 2005-2013 Solarflare Communications Inc.
63 /* Checksum generation is a per-queue option in hardware, so each
64 * queue visible to the networking core is backed by two hardware TX
65 * queues. */
83 /* Size of an RX scatter buffer. Small enough to pack 2 into a 4K page,
86 #define EFX_RX_USR_BUF_SIZE (2048 - 256)
89 * of every buffer. Otherwise, we just need to ensure 4-byte
98 /* Non-standard XDP_PACKET_HEADROOM and tailroom to satisfy XDP_REDIRECT and
111 * struct efx_buffer - A general-purpose DMA buffer
126 * struct efx_tx_buffer - buffer state for a TX descriptor
127 * @skb: When @flags & %EFX_TX_BUF_SKB, the associated socket buffer to be
130 * member is the associated buffer to drop a page reference on.
131 * @option: When @flags & %EFX_TX_BUF_OPTION, an EF10-specific option
137 * @unmap_len: Length of this fragment to unmap
164 * struct efx_tx_queue - An Efx TX queue
179 * Is our index within @channel->tx_queue array.
181 * @tso_version: Version of TSO in use for this queue.
186 * @cb_page: Array of pages of copy buffers. Carved up according to
187 * %EFX_TX_CB_ORDER into %EFX_TX_CB_SIZE-sized chunks.
192 * @piobuf_offset: Buffer offset to be specified in PIO descriptors
206 * only get the up-to-date value of @write_count if this
207 * variable indicates that the queue is empty. This is to
208 * avoid cache-line ping-pong between the xmit path and the
216 * the same values that are reported to BQL).
228 * This is the number of buffers that have been added to the
231 * This is the number of buffers that have been added to the
237 * Filled in iff @efx->type->option_descriptors; only used for PIO.
241 * only get the up-to-date value of read_count if this
242 * variable indicates that the queue is full. This is to
243 * avoid cache-line ping-pong between the xmit path and the
252 * @xmit_pending: Are any packets waiting to be pushed to the NIC
254 * @notify_count: Count of notified descriptors to the NIC
258 * @read_count bitwise-added to %EFX_EMPTY_COUNT_VALID; otherwise 0.
311 /* Statistics to supplement MAC stats */
321 #define EFX_TX_CB_SIZE (1 << EFX_TX_CB_ORDER) - NET_IP_ALIGN
324 * struct efx_rx_buffer - An Efx RX data buffer
350 * struct efx_rx_page_state - Page-based rx buffer state
353 * Used to facilitate sharing dma mappings between recycled rx buffers
354 * and those passed up to the kernel.
365 * struct efx_rx_queue - An Efx RX queue
367 * @core_index: Index of network core RX queue. Will be >= 0 iff this
368 * is associated with a real RX queue.
373 * @flush_pending: Set when a RX flush is pending. Has the same lifetime as
375 * @grant_credits: Posted RX descriptors need to be granted to the MAE with
378 * @added_count: Number of buffers added to the receive queue.
379 * @notified_count: Number of buffers given to NIC (<= @added_count).
380 * @granted_count: Number of buffers granted to the MAE (<= @notified_count).
384 * @page_ring: The ring to store DMA mapped pages for reuse.
385 * @page_add: Counter to calculate the write pointer for the recycle ring.
386 * @page_remove: Counter to calculate the read pointer for the recycle ring.
389 * the kernel still held a reference to them.
392 * @page_ptr_mask: The number of pages in the RX recycle ring minus 1.
393 * @max_fill: RX descriptor maximum fill level (<= ring size)
394 * @fast_fill_trigger: RX descriptor fill level that will trigger a fast fill
396 * @min_fill: RX descriptor minimum non-zero fill level.
399 * @recycle_count: RX buffer recycle counter.
400 * @slow_fill: Timer used to defer efx_nic_generate_fill_event().
401 * @grant_work: workitem used to grant credits to the MAE if @grant_credits
406 * @xdp_rxq_info: XDP specific RX queue information.
440 /* Statistics to supplement MAC stats */
457 * struct efx_channel - An Efx channel
460 * one RX queue, and an associated tasklet for processing the event
468 * @irq: IRQ number (MSI and MSI-X only)
477 * @event_test_cpu: Last CPU to handle interrupt or test event for this channel
484 * @rfs_expire_index: next accelerated RFS filter ID to check for expiry
490 * @n_rx_ip_hdr_chksum_err: Count of RX IP header checksum errors
491 * @n_rx_tcp_udp_chksum_err: Count of RX TCP and UDP checksum errors
494 * @n_skbuff_leaks: Count of skbuffs leaked due to RX overrun
495 * @n_rx_nodesc_trunc: Number of RX packets truncated and then dropped due to
497 * @n_rx_merge_events: Number of RX merged completion events
498 * @n_rx_merge_packets: Number of RX packets completed by merged events
499 * @n_rx_xdp_drops: Count of RX packets intentionally dropped due to XDP
500 * @n_rx_xdp_bad_drops: Count of RX packets dropped due to XDP errors
501 * @n_rx_xdp_tx: Count of RX packets retransmitted due to XDP
502 * @n_rx_xdp_redirect: Count of RX packets redirected to a different NIC by XDP
503 * @n_rx_mport_bad: Count of RX packets dropped because their ingress mport was
505 * @old_n_rx_hw_drops: Count of all RX packets dropped for any reason as of last
509 * @rx_pkt_n_frags: Number of fragments in next packet to be delivered by
511 * @rx_pkt_index: Ring index of first buffer for next packet to be delivered
513 * @rx_list: list of SKBs from current RX, awaiting processing
514 * @rx_queue: RX queue for this channel
515 * @tx_queue: TX queues for this channel
589 * struct efx_msi_context - Context for each MSI
595 * safe for the IRQ handler to access.
604 * struct efx_channel_type - distinguishes traffic and extra channels
605 * @handle_no_channel: Handle failure to allocate an extra channel
606 * @pre_probe: Set up extra state prior to initialisation
612 * @copy: Copy the channel state prior to reallocation. May be %NULL if
614 * @receive_skb: Handle an skb ready to be passed to netif_receive_skb()
615 * @receive_raw: Handle an RX buffer ready to be passed to __efx_rx_packet()
616 * @want_txqs: Determine whether this channel should have TX queues
617 * created. If %NULL, TX queues are not created.
620 * @want_pio: Flag for whether PIO buffers should be linked to this
621 * channel's TX queues.
650 STRING_TABLE_LOOKUP((efx)->loopback_mode, efx_loopback_mode)
653 /* Be careful if altering to correct macro below */
659 #define EFX_INT_MODE_USE_MSI(x) (((x)->interrupt_mode) <= EFX_INT_MODE_MSI)
666 STATE_DISABLED, /* device disabled due to hardware errors */
714 /* Pseudo bit-mask flow control field */
720 * struct efx_link_state - Current state of the link
722 * @fd: Link is full-duplex
736 return left->up == right->up && left->fd == right->fd && in efx_link_state_equal()
737 left->fc == right->fc && left->speed == right->speed; in efx_link_state_equal()
741 * enum efx_phy_mode - PHY operating mode flags
744 * @PHY_MODE_LOW_POWER: set to low power through MDIO
762 * struct efx_hw_stat_desc - Description of a hardware statistic
765 * @dma_width: Width in bits (0 for non-DMA statistics)
766 * @offset: Offset within stats (ignored for non-DMA statistics)
779 * struct efx_rss_context_priv - driver private data for an RSS context
782 * @rx_hash_udp_4tuple: UDP 4-tuple hashing enabled
790 * struct efx_rss_context - an RSS context
791 * @priv: hardware-specific state
803 * is used to test if filter does or will exist.
805 #define EFX_ARFS_FILTER_ID_PENDING -1
806 #define EFX_ARFS_FILTER_ID_ERROR -2
807 #define EFX_ARFS_FILTER_ID_REMOVING -3
809 * struct efx_arfs_rule - record of an ARFS filter and its IDs
811 * @spec: details of the filter (used as key for hash table). Use efx->type to
812 * determine which member to use.
813 * @rxq_index: channel to which the filter will steer traffic.
814 * @arfs_id: filter ID which was returned to ARFS
832 * struct efx_async_filter_insertion - Request to asynchronously insert a filter
833 * @net_dev: Reference to the netdevice
835 * @spec: The filter to insert
838 * @flow_id: Identifies the kernel-side flow for which this request was made
856 EFX_XDP_TX_QUEUES_BORROWED /* queues borrowed from net stack */
862 * struct efx_nic - an Efx NIC
880 * @vi_stride: step between per-VI registers / memory regions
884 * @irq_rx_adaptive: Adaptive IRQ moderation enabled for RX event queues
886 * @irq_rx_mod_step_us: Step size for IRQ moderation for RX event queues
887 * @irq_rx_moderation_us: IRQ moderation time for RX event queues
891 * @tx_queue: TX DMA queues
892 * @rx_queue: RX DMA queues
895 * @extra_channel_types: Types of extra (non-traffic) channels that
899 * @xdp_tx_queues: Array of pointers to tx queues used for XDP transmit.
900 * @xdp_txq_queues_mode: XDP TX queues sharing strategy.
901 * @rxq_entries: Size of receive queues requested by user.
902 * @txq_entries: Size of transmit queues requested by user.
906 * @rx_dc_base: Base qword address in SRAM of RX queue descriptor caches
908 * @n_channels: Number of channels in use
909 * @n_rx_channels: Number of channels used for RX (= number of RX queues)
911 * @n_extra_tx_channels: Number of extra channels with TX queues
912 * @tx_queues_per_channel: number of TX queues probed on each channel
915 * @xdp_tx_per_channel: Max number of TX queues on an XDP TX channel.
916 * @rx_ip_align: RX DMA address offset to have IP header aligned in
918 * @rx_dma_len: Current maximum RX DMA length
919 * @rx_buffer_order: Order (log2) of number of pages for each RX buffer
920 * @rx_buffer_truesize: Amortised allocation size of an RX buffer,
921 * for use in sk_buff::truesize
922 * @rx_prefix_size: Size of RX prefix before packet data
923 * @rx_packet_hash_offset: Offset of RX flow hash from start of packet data
925 * @rx_packet_len_offset: Offset of RX packet length from start of packet data
928 * (valid only if channel->sync_timestamps_enabled; always negative)
934 * @must_realloc_vis: Flag: VIs have yet to be reallocated after MC reboot
935 * @irq_soft_enabled: Are IRQs soft-enabled? If not, IRQ handler will
940 * @selftest_work: Work item for asynchronous self-test
941 * @mtd_list: List of MTDs attached to the NIC
943 * @mcdi: Management-Controller-to-Driver Interface state
948 * efx_mac_work() with kernel interfaces. Safe to read under any
950 * be held to modify it.
958 * @phy_data: PHY private data (including PHY-specific stats)
966 * @fc_disable: When non-zero flow control is disabled. Typically used to
972 * @loopback_selftest: Offline self-test private state
975 * @filter_state: Architecture-dependent filter table state
977 * @rps_slot_map: bitmap of in-flight entries in @rps_slot
983 * @active_queues: Count of RX and TX queues that haven't been flushed and drained.
984 * @rxq_flush_pending: Count of number of receive queues that need to be flushed.
986 * @rxq_flush_outstanding: Count of number of RX flushes started but not yet
987 * completed (either success or failure). Not used when MCDI is used to
988 * flush receive queues.
989 * @flush_wq: wait queue used by efx_nic_flush_queues() to wait for flush completions.
990 * @vf_count: Number of VFs intended to be enabled.
998 * @xdp_rxq_info_failed: Have any of the rx queues failed to initialise their
1003 * @devlink: reference to devlink structure owned by this device
1006 * @reg_base: Offset from the start of the bar to the function control window.
1010 * @last_irq_cpu: Last CPU to handle a possible test interrupt. This
1011 * field is used by efx_test_interrupts() to verify that an
1015 * @n_rx_noskb_drops: Count of RX packets dropped due to failure to allocate an skb
1149 * so we want them next to each other.
1203 * struct efx_probe_data - State after hardware probe
1217 return &probe_data->efx; in efx_netdev_priv()
1222 return efx->net_dev->reg_state == NETREG_REGISTERED; in efx_dev_registered()
1227 return efx->port_num; in efx_port_num()
1245 * struct efx_nic_type - Efx device type definition
1255 * @map_reset_reason: Map ethtool reset reason to a reset method
1256 * @map_reset_flags: Map ethtool reset flags to a reset method, if possible
1262 * @fini_dmaq: Flush and finalise DMA queues (RX and TX queues)
1275 * @reconfigure_port: Push loopback/power/txdis changes to the MAC and PHY
1276 * @prepare_enable_fc_tx: Prepare MAC to enable pause frame TX (may be %NULL)
1278 * to the hardware. Serialised by the mac_lock.
1281 * @set_wol: Push WoL configuration to the NIC
1284 * @test_chip: Test registers. This is expected to reset the NIC.
1287 * The SDU length may be any value from 0 up to the protocol-
1288 * defined maximum, but its buffer will be padded to a multiple
1293 * will be padded so it is safe to round up.
1300 * @irq_disable_non_ev: Disable non-event IRQs on the NIC. Each event
1303 * a pointer to the &struct efx_msi_context for the channel.
1305 * is a pointer to the &struct efx_nic.
1310 * @tx_enqueue: Add an SKB to TX queue
1311 * @rx_push_rss_config: Write RSS hash key and indirection table to the NIC
1314 * user RSS context to the NIC
1317 * @rx_probe: Allocate resources for RX queue
1318 * @rx_init: Initialise RX queue on the NIC
1319 * @rx_remove: Free resources for RX queue
1320 * @rx_write: Write RX descriptors and doorbell
1322 * @rx_packet: Receive the queued RX buffer on a channel
1323 * @rx_buf_hash_valid: Determine whether the RX prefix contains a valid hash
1328 * @ev_process: Process events for a queue, up to the given NAPI quota
1334 * @filter_update_rx_scatter: Update filters after change to rx scatter setting
1338 * @filter_clear_rx: Remove all RX filters whose priority is less than or
1339 * equal to the given priority and is not %EFX_FILTER_PRI_AUTO
1340 * @filter_count_rx_used: Get the number of filters in use at a given priority
1342 * @filter_get_rx_ids: Get list of RX filters at a given priority
1351 * @mtd_write: Write to an MTD partition
1352 * @mtd_sync: Wait for write-back to complete on MTD partition. This
1355 * @ptp_write_host_time: Send host time to MC as part of sync protocol
1356 * @ptp_set_ts_sync_events: Enable or disable sync events for inline RX
1363 * @tso_versions: Returns mask of firmware-assisted TSO versions supported.
1365 * @udp_tnl_push_ports: Push the list of UDP tunnel ports to the NIC if required.
1367 * @print_additional_fwver: Dump NIC-specific additional FW version info
1369 * @rx_recycle_ring_size: Size of the RX recycle ring
1372 * @rxd_ptr_tbl_base: RX descriptor ring base address
1375 * @evq_rptr_tbl_base: Event queue read-pointer table base address
1377 * @rx_prefix_size: Size of RX prefix before packet data
1378 * @rx_hash_offset: Offset of RX flow hash within prefix
1380 * @rx_buffer_padding: Size of padding at end of RX packet
1381 * @can_rx_scatter: NIC is able to scatter packets to multiple buffers
1382 * @always_rx_scatter: NIC will always scatter packets to multiple buffers
1385 * not need to perform image parsing
1581 EFX_WARN_ON_ONCE_PARANOID(index >= efx->n_channels); in efx_get_channel()
1582 return efx->channel[index]; in efx_get_channel()
1587 for (_channel = (_efx)->channel[0]; \
1589 _channel = (_channel->channel + 1 < (_efx)->n_channels) ? \
1590 (_efx)->channel[_channel->channel + 1] : NULL)
1594 for (_channel = (_efx)->channel[(_efx)->n_channels - 1]; \
1596 _channel = _channel->channel ? \
1597 (_efx)->channel[_channel->channel - 1] : NULL)
1602 EFX_WARN_ON_ONCE_PARANOID(index >= efx->n_tx_channels); in efx_get_tx_channel()
1603 return efx->channel[efx->tx_channel_offset + index]; in efx_get_tx_channel()
1609 EFX_WARN_ON_ONCE_PARANOID(index >= efx->n_xdp_channels); in efx_get_xdp_channel()
1610 return efx->channel[efx->xdp_channel_offset + index]; in efx_get_xdp_channel()
1615 return channel->channel - channel->efx->xdp_channel_offset < in efx_channel_is_xdp_tx()
1616 channel->efx->n_xdp_channels; in efx_channel_is_xdp_tx()
1621 return channel && channel->channel >= channel->efx->tx_channel_offset; in efx_channel_has_tx_queues()
1627 return channel->efx->xdp_tx_per_channel; in efx_channel_num_tx_queues()
1628 return channel->efx->tx_queues_per_channel; in efx_channel_num_tx_queues()
1635 return channel->tx_queue_by_type[type]; in efx_channel_get_tx_queue()
1646 /* Iterate over all TX queues belonging to a channel */
1651 for (_tx_queue = (_channel)->tx_queue; \
1652 _tx_queue < (_channel)->tx_queue + \
1658 return channel->rx_queue.core_index >= 0; in efx_channel_has_rx_queue()
1665 return &channel->rx_queue; in efx_channel_get_rx_queue()
1668 /* Iterate over all RX queues belonging to a channel */
1673 for (_rx_queue = &(_channel)->rx_queue; \
1685 return efx_rx_queue_channel(rx_queue)->channel; in efx_rx_queue_index()
1688 /* Returns a pointer to the specified receive buffer in the RX
1694 return &rx_queue->buffer[index]; in efx_rx_buffer()
1700 if (unlikely(rx_buf == efx_rx_buffer(rx_queue, rx_queue->ptr_mask))) in efx_rx_buf_next()
1707 * EFX_MAX_FRAME_LEN - calculate maximum frame length
1710 * given MTU. The frame length will be equal to the MTU plus a
1715 * The 10G MAC requires 8-byte alignment on the frame
1716 * length, so we round up to the nearest 8.
1718 * Re-clocking by the XGXS on RX can reduce an IPG to 32 bits (half an
1729 return skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP; in efx_xmit_with_hwtstamp()
1733 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; in efx_xmit_hwtstamp_pending()
1736 /* Get the max fill level of the TX queues on this channel */
1745 tx_queue->insert_count - tx_queue->read_count); in efx_channel_tx_fill_level()
1759 tx_queue->insert_count - tx_queue->old_read_count); in efx_channel_tx_old_fill_level()
1771 const struct net_device *net_dev = efx->net_dev; in efx_supported_features()
1773 return net_dev->features | net_dev->hw_features; in efx_supported_features()
1780 return tx_queue->insert_count & tx_queue->ptr_mask; in efx_tx_queue_get_insert_index()
1787 return &tx_queue->buffer[efx_tx_queue_get_insert_index(tx_queue)]; in __efx_tx_queue_get_insert_buffer()
1790 /* Get a TX buffer, checking it's not currently in use. */
1797 EFX_WARN_ON_ONCE_PARANOID(buffer->len); in efx_tx_queue_get_insert_buffer()
1798 EFX_WARN_ON_ONCE_PARANOID(buffer->flags); in efx_tx_queue_get_insert_buffer()
1799 EFX_WARN_ON_ONCE_PARANOID(buffer->unmap_len); in efx_tx_queue_get_insert_buffer()