Lines Matching +full:rpm +full:- +full:stats
1 /* SPDX-License-Identifier: GPL-2.0 */
154 /* Driver counted stats */
242 /* MSI-X */
249 /* Stats */
373 /* Stats which need to be accumulated in software because
400 struct cn10k_txsc_stats stats; member
420 struct cn10k_rxsc_stats stats; member
542 /* af_xdp zero-copy */
548 return (pdev->device == PCI_DEVID_OCTEONTX2_RVU_AFVF) || in is_otx2_lbkvf()
549 (pdev->device == PCI_DEVID_RVU_REP); in is_otx2_lbkvf()
554 return (pdev->revision == 0x00) && in is_96xx_A0()
555 (pdev->subsystem_device == PCI_SUBSYS_DEVID_96XX_RVU_PFVF); in is_96xx_A0()
560 return (pdev->revision == 0x01) && in is_96xx_B0()
561 (pdev->subsystem_device == PCI_SUBSYS_DEVID_96XX_RVU_PFVF); in is_96xx_B0()
566 return pdev->device == PCI_DEVID_OCTEONTX2_SDP_REP; in is_otx2_sdp_rep()
582 u8 midr = pdev->revision & 0xF0; in is_dev_otx2()
591 return pdev->subsystem_device == PCI_SUBSYS_DEVID_CN10K_B_RVU_PFVF; in is_dev_cn10kb()
596 if (pdev->subsystem_device == PCI_SUBSYS_DEVID_CN10K_A_RVU_PFVF && in is_dev_cn10ka_b0()
597 (pdev->revision & 0xFF) == 0x54) in is_dev_cn10ka_b0()
605 struct otx2_hw *hw = &pfvf->hw; in otx2_setup_dev_hw_settings()
607 pfvf->hw.cq_time_wait = CQ_TIMER_THRESH_DEFAULT; in otx2_setup_dev_hw_settings()
608 pfvf->hw.cq_ecount_wait = CQ_CQE_THRESH_DEFAULT; in otx2_setup_dev_hw_settings()
609 pfvf->hw.cq_qcount_wait = CQ_QCOUNT_DEFAULT; in otx2_setup_dev_hw_settings()
611 __set_bit(HW_TSO, &hw->cap_flag); in otx2_setup_dev_hw_settings()
613 if (is_96xx_A0(pfvf->pdev)) { in otx2_setup_dev_hw_settings()
614 __clear_bit(HW_TSO, &hw->cap_flag); in otx2_setup_dev_hw_settings()
617 pfvf->hw.cq_qcount_wait = 0x0; in otx2_setup_dev_hw_settings()
622 pfvf->hw.rq_skid = 600; in otx2_setup_dev_hw_settings()
623 pfvf->qset.rqe_cnt = Q_COUNT(Q_SIZE_1K); in otx2_setup_dev_hw_settings()
625 if (is_96xx_B0(pfvf->pdev)) in otx2_setup_dev_hw_settings()
626 __clear_bit(HW_TSO, &hw->cap_flag); in otx2_setup_dev_hw_settings()
628 if (!is_dev_otx2(pfvf->pdev)) { in otx2_setup_dev_hw_settings()
629 __set_bit(CN10K_MBOX, &hw->cap_flag); in otx2_setup_dev_hw_settings()
630 __set_bit(CN10K_LMTST, &hw->cap_flag); in otx2_setup_dev_hw_settings()
631 __set_bit(CN10K_RPM, &hw->cap_flag); in otx2_setup_dev_hw_settings()
632 __set_bit(CN10K_PTP_ONESTEP, &hw->cap_flag); in otx2_setup_dev_hw_settings()
633 __set_bit(QOS_CIR_PIR_SUPPORT, &hw->cap_flag); in otx2_setup_dev_hw_settings()
636 if (is_dev_cn10kb(pfvf->pdev)) in otx2_setup_dev_hw_settings()
637 __set_bit(CN10K_HW_MACSEC, &hw->cap_flag); in otx2_setup_dev_hw_settings()
647 blkaddr = nic->nix_blkaddr; in otx2_get_regaddr()
663 return nic->reg_base + offset; in otx2_get_regaddr()
686 mbox->bbuf_base = devm_kmalloc(&pdev->dev, MBOX_SIZE, GFP_KERNEL); in otx2_mbox_bbuf_init()
687 if (!mbox->bbuf_base) in otx2_mbox_bbuf_init()
688 return -ENOMEM; in otx2_mbox_bbuf_init()
694 otx2_mbox = &mbox->mbox; in otx2_mbox_bbuf_init()
695 mdev = &otx2_mbox->dev[0]; in otx2_mbox_bbuf_init()
696 mdev->mbase = mbox->bbuf_base; in otx2_mbox_bbuf_init()
698 otx2_mbox = &mbox->mbox_up; in otx2_mbox_bbuf_init()
699 mdev = &otx2_mbox->dev[0]; in otx2_mbox_bbuf_init()
700 mdev->mbase = mbox->bbuf_base; in otx2_mbox_bbuf_init()
707 void *hw_mbase = mbox->hwbase + (devid * MBOX_SIZE); in otx2_sync_mbox_bbuf()
708 struct otx2_mbox_dev *mdev = &mbox->dev[devid]; in otx2_sync_mbox_bbuf()
712 if (mdev->mbase == hw_mbase) in otx2_sync_mbox_bbuf()
715 hdr = hw_mbase + mbox->rx_start; in otx2_sync_mbox_bbuf()
716 msg_size = hdr->msg_size; in otx2_sync_mbox_bbuf()
718 if (msg_size > mbox->rx_size - msgs_offset) in otx2_sync_mbox_bbuf()
719 msg_size = mbox->rx_size - msgs_offset; in otx2_sync_mbox_bbuf()
722 memcpy(mdev->mbase + mbox->rx_start, in otx2_sync_mbox_bbuf()
723 hw_mbase + mbox->rx_start, msg_size + msgs_offset); in otx2_sync_mbox_bbuf()
726 /* With the absence of API for 128-bit IO memory access for arm64,
760 lmt_info = per_cpu_ptr(pfvf->hw.lmt_info, smp_processor_id()); in __cn10k_aura_freeptr()
763 val = (lmt_info->lmt_id & 0x7FF) | BIT_ULL(63); in __cn10k_aura_freeptr()
771 * tar_addr[6:4] is LMTST size-1 in units of 128b. in __cn10k_aura_freeptr()
777 tar_addr |= ((size - 1) & 0x7) << 4; in __cn10k_aura_freeptr()
780 memcpy((u64 *)lmt_info->lmt_addr, ptrs, sizeof(u64) * num_ptrs); in __cn10k_aura_freeptr()
818 return pfvf->hw.rqpool_cnt + idx; in otx2_get_pool_idx()
829 if (!otx2_mbox_nonempty(&mbox->mbox, 0)) in otx2_sync_mbox_msg()
831 otx2_mbox_msg_send(&mbox->mbox, 0); in otx2_sync_mbox_msg()
832 err = otx2_mbox_wait_for_rsp(&mbox->mbox, 0); in otx2_sync_mbox_msg()
836 return otx2_mbox_check_rsp_msgs(&mbox->mbox, 0); in otx2_sync_mbox_msg()
843 if (!otx2_mbox_nonempty(&mbox->mbox_up, devid)) in otx2_sync_mbox_up_msg()
845 otx2_mbox_msg_send_up(&mbox->mbox_up, devid); in otx2_sync_mbox_up_msg()
846 err = otx2_mbox_wait_for_rsp(&mbox->mbox_up, devid); in otx2_sync_mbox_up_msg()
850 return otx2_mbox_check_rsp_msgs(&mbox->mbox_up, devid); in otx2_sync_mbox_up_msg()
860 if (!otx2_mbox_nonempty(&mbox->mbox, 0)) in otx2_sync_mbox_msg_busy_poll()
862 otx2_mbox_msg_send(&mbox->mbox, 0); in otx2_sync_mbox_msg_busy_poll()
863 err = otx2_mbox_busy_poll_for_rsp(&mbox->mbox, 0); in otx2_sync_mbox_msg_busy_poll()
867 return otx2_mbox_check_rsp_msgs(&mbox->mbox, 0); in otx2_sync_mbox_msg_busy_poll()
877 &mbox->mbox, 0, sizeof(struct _req_type), \
881 req->hdr.sig = OTX2_MBOX_REQ_SIG; \
882 req->hdr.id = _id; \
883 trace_otx2_msg_alloc(mbox->mbox.pdev, _id, sizeof(*req)); \
925 iova = dma_map_page_attrs(pfvf->dev, page, in otx2_dma_map_page()
927 if (unlikely(dma_mapping_error(pfvf->dev, iova))) in otx2_dma_map_page()
936 dma_unmap_page_attrs(pfvf->dev, addr, size, in otx2_dma_unmap_page()
946 if (qidx < NIX_PF_PFC_PRIO_MAX && pfvf->pfc_alloc_status[qidx]) in otx2_get_smq_idx()
947 return pfvf->pfc_schq_list[NIX_TXSCH_LVL_SMQ][qidx]; in otx2_get_smq_idx()
950 if (qidx >= pfvf->hw.non_qos_queues) { in otx2_get_smq_idx()
951 smq = pfvf->qos.qid_to_sqmap[qidx - pfvf->hw.non_qos_queues]; in otx2_get_smq_idx()
953 idx = qidx % pfvf->hw.txschq_cnt[NIX_TXSCH_LVL_SMQ]; in otx2_get_smq_idx()
954 smq = pfvf->hw.txschq_list[NIX_TXSCH_LVL_SMQ][idx]; in otx2_get_smq_idx()
962 return pfvf->hw.non_qos_queues + pfvf->hw.tc_tx_queues; in otx2_get_total_tx_queues()
979 if (!pfvf->flow_cfg) in otx2_tc_flower_rule_cnt()
982 return pfvf->flow_cfg->nr_flows; in otx2_tc_flower_rule_cnt()
985 /* MSI-X APIs */
1071 /* Device stats APIs */
1074 struct rtnl_link_stats64 *stats);
1126 /* CGX/RPM DMAC filters support */
1162 struct otx2_hw *hw = &pfvf->hw; in otx2_qos_init()
1164 hw->tc_tx_queues = qos_txqs; in otx2_qos_init()
1165 INIT_LIST_HEAD(&pfvf->qos.qos_tree); in otx2_qos_init()
1166 mutex_init(&pfvf->qos.qos_lock); in otx2_qos_init()
1171 mutex_destroy(&pfvf->qos.qos_lock); in otx2_shutdown_qos()
1185 return *(u16 *)a - *(u16 *)b; in mcam_entry_cmp()