1 /* SPDX-License-Identifier: GPL-2.0 */
272 	int	cgx_users;  /* number of cgx users - used only by PFs */
404 	bool    cpt_rxc;   /* Is CPT-RXC supported */
468 	u64 rclk;  member
547 	/* MSI-X */
618 	writeq(val, rvu->afreg_base + ((block << 28) | offset));  in rvu_write64()
623 	return readq(rvu->afreg_base + ((block << 28) | offset));  in rvu_read64()
628 	writeq(val, rvu->pfreg_base + offset);  in rvupf_write64()
633 	return readq(rvu->pfreg_base + offset);  in rvupf_read64()
650 	struct pci_dev *pdev = rvu->pdev;  in is_rvu_pre_96xx_C0()
652 	return ((pdev->revision == 0x00) || (pdev->revision == 0x01) ||  in is_rvu_pre_96xx_C0()
653 		(pdev->revision == 0x10) || (pdev->revision == 0x11) ||  in is_rvu_pre_96xx_C0()
654 		(pdev->revision == 0x14));  in is_rvu_pre_96xx_C0()
659 	struct pci_dev *pdev = rvu->pdev;  in is_rvu_96xx_A0()
661 	return (pdev->revision == 0x00);  in is_rvu_96xx_A0()
666 	struct pci_dev *pdev = rvu->pdev;  in is_rvu_96xx_B0()
668 	return (pdev->revision == 0x00) || (pdev->revision == 0x01);  in is_rvu_96xx_B0()
673 	struct pci_dev *pdev = rvu->pdev;  in is_rvu_95xx_A0()
675 	return (pdev->revision == 0x10) || (pdev->revision == 0x11);  in is_rvu_95xx_A0()
691 	struct pci_dev *pdev = rvu->pdev;  in is_rvu_otx2()
693 	u8 midr = pdev->revision & 0xF0;  in is_rvu_otx2()
702 	struct pci_dev *pdev = rvu->pdev;  in is_cnf10ka_a0()
704 	if (pdev->subsystem_device == PCI_SUBSYS_DEVID_CNF10K_A &&  in is_cnf10ka_a0()
705 	    (pdev->revision & 0x0F) == 0x0)  in is_cnf10ka_a0()
712 	struct pci_dev *pdev = rvu->pdev;  in is_cn10ka_a0()
714 	if (pdev->subsystem_device == PCI_SUBSYS_DEVID_CN10K_A &&  in is_cn10ka_a0()
715 	    (pdev->revision & 0x0F) == 0x0)  in is_cn10ka_a0()
722 	struct pci_dev *pdev = rvu->pdev;  in is_cn10ka_a1()
724 	if (pdev->subsystem_device == PCI_SUBSYS_DEVID_CN10K_A &&  in is_cn10ka_a1()
725 	    (pdev->revision & 0x0F) == 0x1)  in is_cn10ka_a1()
732 	struct pci_dev *pdev = rvu->pdev;  in is_cn10kb()
734 	if (pdev->subsystem_device == PCI_SUBSYS_DEVID_CN10K_B)  in is_cn10kb()
755 	struct rvu_hwinfo *hw = rvu->hw;  in rvu_nix_chan_cgx()
757 	if (!hw->cap.programmable_chans)  in rvu_nix_chan_cgx()
760 	return rvu->hw->cgx_chan_base +  in rvu_nix_chan_cgx()
761 		(cgxid * hw->lmac_per_cgx + lmacid) * cgx_chans + chan;  in rvu_nix_chan_cgx()
769 	struct rvu_hwinfo *hw = rvu->hw;  in rvu_nix_chan_lbk()
771 	if (!hw->cap.programmable_chans)  in rvu_nix_chan_lbk()
774 	return rvu->hw->lbk_chan_base + lbkid * lbk_chans + chan;  in rvu_nix_chan_lbk()
779 	struct rvu_hwinfo *hw = rvu->hw;  in rvu_nix_chan_sdp()
781 	if (!hw->cap.programmable_chans)  in rvu_nix_chan_sdp()
784 	return hw->sdp_chan_base + chan;  in rvu_nix_chan_sdp()
789 	return rvu->hw->cpt_chan_base + chan;  in rvu_nix_chan_cpt()
794 	struct pci_dev *pdev = rvu->pdev;  in is_rvu_supports_nix1()
796 	if (pdev->subsystem_device == PCI_SUBSYS_DEVID_98XX)  in is_rvu_supports_nix1()
809 		(rvu->vf_devid == RVU_LBK_VF_DEVID));  in is_lbk_vf()
825 	return (rvu->fwdata->header_magic == RVU_FWDATA_HEADER_MAGIC) &&  in is_rvu_fwdata_valid()
826 		(rvu->fwdata->version == RVU_FWDATA_VERSION);  in is_rvu_fwdata_valid()
874 	if (rvu->rep_pcifunc && rvu->rep_pcifunc == pcifunc)  in is_rep_dev()
883 	return (pf >= PF_CGXMAP_BASE && pf <= rvu->cgx_mapped_pfs) &&  in is_pf_cgxmapped()
963 int npc_config_ts_kpuaction(struct rvu *rvu, int pf, u16 pcifunc, bool en);
1062 /* CN10K RVU - LMT*/