Lines Matching +full:hw +full:- +full:flow +full:- +full:ctrl
1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
19 static int ixgbe_setup_copper_link_82598(struct ixgbe_hw *hw,
22 static int ixgbe_read_i2c_eeprom_82598(struct ixgbe_hw *hw, u8 byte_offset,
26 * ixgbe_set_pcie_completion_timeout - set pci-e completion timeout
27 * @hw: pointer to the HW structure
31 * than the 10ms recommended by the pci-e spec. To address this we need to
35 static void ixgbe_set_pcie_completion_timeout(struct ixgbe_hw *hw) in ixgbe_set_pcie_completion_timeout() argument
37 u32 gcr = IXGBE_READ_REG(hw, IXGBE_GCR); in ixgbe_set_pcie_completion_timeout()
40 if (ixgbe_removed(hw->hw_addr)) in ixgbe_set_pcie_completion_timeout()
61 pcie_devctl2 = ixgbe_read_pci_cfg_word(hw, IXGBE_PCI_DEVICE_CONTROL2); in ixgbe_set_pcie_completion_timeout()
63 ixgbe_write_pci_cfg_word(hw, IXGBE_PCI_DEVICE_CONTROL2, pcie_devctl2); in ixgbe_set_pcie_completion_timeout()
67 IXGBE_WRITE_REG(hw, IXGBE_GCR, gcr); in ixgbe_set_pcie_completion_timeout()
70 static int ixgbe_get_invariants_82598(struct ixgbe_hw *hw) in ixgbe_get_invariants_82598() argument
72 struct ixgbe_mac_info *mac = &hw->mac; in ixgbe_get_invariants_82598()
75 ixgbe_identify_phy_generic(hw); in ixgbe_get_invariants_82598()
77 mac->mcft_size = IXGBE_82598_MC_TBL_SIZE; in ixgbe_get_invariants_82598()
78 mac->vft_size = IXGBE_82598_VFT_TBL_SIZE; in ixgbe_get_invariants_82598()
79 mac->num_rar_entries = IXGBE_82598_RAR_ENTRIES; in ixgbe_get_invariants_82598()
80 mac->rx_pb_size = IXGBE_82598_RX_PB_SIZE; in ixgbe_get_invariants_82598()
81 mac->max_rx_queues = IXGBE_82598_MAX_RX_QUEUES; in ixgbe_get_invariants_82598()
82 mac->max_tx_queues = IXGBE_82598_MAX_TX_QUEUES; in ixgbe_get_invariants_82598()
83 mac->max_msix_vectors = ixgbe_get_pcie_msix_count_generic(hw); in ixgbe_get_invariants_82598()
89 * ixgbe_init_phy_ops_82598 - PHY/SFP specific init
90 * @hw: pointer to hardware structure
97 static int ixgbe_init_phy_ops_82598(struct ixgbe_hw *hw) in ixgbe_init_phy_ops_82598() argument
99 struct ixgbe_mac_info *mac = &hw->mac; in ixgbe_init_phy_ops_82598()
100 struct ixgbe_phy_info *phy = &hw->phy; in ixgbe_init_phy_ops_82598()
105 phy->ops.identify(hw); in ixgbe_init_phy_ops_82598()
108 if (mac->ops.get_media_type(hw) == ixgbe_media_type_copper) { in ixgbe_init_phy_ops_82598()
109 mac->ops.setup_link = &ixgbe_setup_copper_link_82598; in ixgbe_init_phy_ops_82598()
110 mac->ops.get_link_capabilities = in ixgbe_init_phy_ops_82598()
114 switch (hw->phy.type) { in ixgbe_init_phy_ops_82598()
116 phy->ops.setup_link = &ixgbe_setup_phy_link_tnx; in ixgbe_init_phy_ops_82598()
117 phy->ops.check_link = &ixgbe_check_phy_link_tnx; in ixgbe_init_phy_ops_82598()
120 phy->ops.reset = &ixgbe_reset_phy_nl; in ixgbe_init_phy_ops_82598()
123 ret_val = phy->ops.identify_sfp(hw); in ixgbe_init_phy_ops_82598()
126 if (hw->phy.sfp_type == ixgbe_sfp_type_unknown) in ixgbe_init_phy_ops_82598()
127 return -EOPNOTSUPP; in ixgbe_init_phy_ops_82598()
130 ret_val = ixgbe_get_sfp_init_sequence_offsets(hw, in ixgbe_init_phy_ops_82598()
134 return -EOPNOTSUPP; in ixgbe_init_phy_ops_82598()
144 * ixgbe_start_hw_82598 - Prepare hardware for Tx/Rx
145 * @hw: pointer to hardware structure
152 static int ixgbe_start_hw_82598(struct ixgbe_hw *hw) in ixgbe_start_hw_82598() argument
156 ret_val = ixgbe_start_hw_generic(hw); in ixgbe_start_hw_82598()
161 ixgbe_set_pcie_completion_timeout(hw); in ixgbe_start_hw_82598()
167 * ixgbe_get_link_capabilities_82598 - Determines link capabilities
168 * @hw: pointer to hardware structure
170 * @autoneg: boolean auto-negotiation value
174 static int ixgbe_get_link_capabilities_82598(struct ixgbe_hw *hw, in ixgbe_get_link_capabilities_82598() argument
185 if (hw->mac.orig_link_settings_stored) in ixgbe_get_link_capabilities_82598()
186 autoc = hw->mac.orig_autoc; in ixgbe_get_link_capabilities_82598()
188 autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC); in ixgbe_get_link_capabilities_82598()
217 return -EIO; in ixgbe_get_link_capabilities_82598()
224 * ixgbe_get_media_type_82598 - Determines media type
225 * @hw: pointer to hardware structure
229 static enum ixgbe_media_type ixgbe_get_media_type_82598(struct ixgbe_hw *hw) in ixgbe_get_media_type_82598() argument
232 switch (hw->phy.type) { in ixgbe_get_media_type_82598()
242 switch (hw->device_id) { in ixgbe_get_media_type_82598()
270 * ixgbe_fc_enable_82598 - Enable flow control
271 * @hw: pointer to hardware structure
273 * Enable flow control according to the current settings.
275 static int ixgbe_fc_enable_82598(struct ixgbe_hw *hw) in ixgbe_fc_enable_82598() argument
286 if (!hw->fc.pause_time) in ixgbe_fc_enable_82598()
287 return -EINVAL; in ixgbe_fc_enable_82598()
291 if ((hw->fc.current_mode & ixgbe_fc_tx_pause) && in ixgbe_fc_enable_82598()
292 hw->fc.high_water[i]) { in ixgbe_fc_enable_82598()
293 if (!hw->fc.low_water[i] || in ixgbe_fc_enable_82598()
294 hw->fc.low_water[i] >= hw->fc.high_water[i]) { in ixgbe_fc_enable_82598()
295 hw_dbg(hw, "Invalid water mark configuration\n"); in ixgbe_fc_enable_82598()
296 return -EINVAL; in ixgbe_fc_enable_82598()
306 hw->mac.ops.check_link(hw, &link_speed, &link_up, false); in ixgbe_fc_enable_82598()
308 switch (hw->fc.requested_mode) { in ixgbe_fc_enable_82598()
310 hw->fc.requested_mode = ixgbe_fc_tx_pause; in ixgbe_fc_enable_82598()
313 hw->fc.requested_mode = ixgbe_fc_none; in ixgbe_fc_enable_82598()
322 hw->mac.ops.fc_autoneg(hw); in ixgbe_fc_enable_82598()
324 /* Disable any previous flow control settings */ in ixgbe_fc_enable_82598()
325 fctrl_reg = IXGBE_READ_REG(hw, IXGBE_FCTRL); in ixgbe_fc_enable_82598()
328 rmcs_reg = IXGBE_READ_REG(hw, IXGBE_RMCS); in ixgbe_fc_enable_82598()
333 * 0: Flow control is completely disabled in ixgbe_fc_enable_82598()
334 * 1: Rx flow control is enabled (we can receive pause frames, in ixgbe_fc_enable_82598()
336 * 2: Tx flow control is enabled (we can send pause frames but in ixgbe_fc_enable_82598()
338 * 3: Both Rx and Tx flow control (symmetric) are enabled. in ixgbe_fc_enable_82598()
341 switch (hw->fc.current_mode) { in ixgbe_fc_enable_82598()
344 * Flow control is disabled by software override or autoneg. in ixgbe_fc_enable_82598()
345 * The code below will actually disable it in the HW. in ixgbe_fc_enable_82598()
350 * Rx Flow control is enabled and Tx Flow control is in ixgbe_fc_enable_82598()
361 * Tx Flow control is enabled, and Rx Flow control is in ixgbe_fc_enable_82598()
367 /* Flow control (both Rx and Tx) is enabled by SW override. */ in ixgbe_fc_enable_82598()
372 hw_dbg(hw, "Flow control param set incorrectly\n"); in ixgbe_fc_enable_82598()
373 return -EIO; in ixgbe_fc_enable_82598()
376 /* Set 802.3x based flow control settings. */ in ixgbe_fc_enable_82598()
378 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl_reg); in ixgbe_fc_enable_82598()
379 IXGBE_WRITE_REG(hw, IXGBE_RMCS, rmcs_reg); in ixgbe_fc_enable_82598()
383 if ((hw->fc.current_mode & ixgbe_fc_tx_pause) && in ixgbe_fc_enable_82598()
384 hw->fc.high_water[i]) { in ixgbe_fc_enable_82598()
385 fcrtl = (hw->fc.low_water[i] << 10) | IXGBE_FCRTL_XONE; in ixgbe_fc_enable_82598()
386 fcrth = (hw->fc.high_water[i] << 10) | IXGBE_FCRTH_FCEN; in ixgbe_fc_enable_82598()
387 IXGBE_WRITE_REG(hw, IXGBE_FCRTL(i), fcrtl); in ixgbe_fc_enable_82598()
388 IXGBE_WRITE_REG(hw, IXGBE_FCRTH(i), fcrth); in ixgbe_fc_enable_82598()
390 IXGBE_WRITE_REG(hw, IXGBE_FCRTL(i), 0); in ixgbe_fc_enable_82598()
391 IXGBE_WRITE_REG(hw, IXGBE_FCRTH(i), 0); in ixgbe_fc_enable_82598()
397 reg = hw->fc.pause_time * 0x00010001; in ixgbe_fc_enable_82598()
399 IXGBE_WRITE_REG(hw, IXGBE_FCTTV(i), reg); in ixgbe_fc_enable_82598()
401 /* Configure flow control refresh threshold value */ in ixgbe_fc_enable_82598()
402 IXGBE_WRITE_REG(hw, IXGBE_FCRTV, hw->fc.pause_time / 2); in ixgbe_fc_enable_82598()
408 * ixgbe_start_mac_link_82598 - Configures MAC link settings
409 * @hw: pointer to hardware structure
415 static int ixgbe_start_mac_link_82598(struct ixgbe_hw *hw, in ixgbe_start_mac_link_82598() argument
424 autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC); in ixgbe_start_mac_link_82598()
426 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc_reg); in ixgbe_start_mac_link_82598()
436 links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS); in ixgbe_start_mac_link_82598()
442 status = -EIO; in ixgbe_start_mac_link_82598()
443 hw_dbg(hw, "Autonegotiation did not complete.\n"); in ixgbe_start_mac_link_82598()
455 * ixgbe_validate_link_ready - Function looks for phy link
456 * @hw: pointer to hardware structure
461 static int ixgbe_validate_link_ready(struct ixgbe_hw *hw) in ixgbe_validate_link_ready() argument
466 if (hw->device_id != IXGBE_DEV_ID_82598AT2) in ixgbe_validate_link_ready()
471 hw->phy.ops.read_reg(hw, MDIO_STAT1, MDIO_MMD_AN, &an_reg); in ixgbe_validate_link_ready()
481 hw_dbg(hw, "Link was indicated but link is down\n"); in ixgbe_validate_link_ready()
482 return -EIO; in ixgbe_validate_link_ready()
489 * ixgbe_check_mac_link_82598 - Get link/speed status
490 * @hw: pointer to hardware structure
497 static int ixgbe_check_mac_link_82598(struct ixgbe_hw *hw, in ixgbe_check_mac_link_82598() argument
511 if (hw->phy.type == ixgbe_phy_nl) { in ixgbe_check_mac_link_82598()
512 hw->phy.ops.read_reg(hw, 0xC79F, MDIO_MMD_PMAPMD, &link_reg); in ixgbe_check_mac_link_82598()
513 hw->phy.ops.read_reg(hw, 0xC79F, MDIO_MMD_PMAPMD, &link_reg); in ixgbe_check_mac_link_82598()
514 hw->phy.ops.read_reg(hw, 0xC00C, MDIO_MMD_PMAPMD, in ixgbe_check_mac_link_82598()
526 hw->phy.ops.read_reg(hw, 0xC79F, in ixgbe_check_mac_link_82598()
529 hw->phy.ops.read_reg(hw, 0xC00C, in ixgbe_check_mac_link_82598()
544 links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS); in ixgbe_check_mac_link_82598()
554 links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS); in ixgbe_check_mac_link_82598()
568 if ((hw->device_id == IXGBE_DEV_ID_82598AT2) && *link_up && in ixgbe_check_mac_link_82598()
569 (ixgbe_validate_link_ready(hw) != 0)) in ixgbe_check_mac_link_82598()
576 * ixgbe_setup_mac_link_82598 - Set MAC link speed
577 * @hw: pointer to hardware structure
583 static int ixgbe_setup_mac_link_82598(struct ixgbe_hw *hw, in ixgbe_setup_mac_link_82598() argument
589 u32 curr_autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC); in ixgbe_setup_mac_link_82598()
594 ixgbe_get_link_capabilities_82598(hw, &link_capabilities, &autoneg); in ixgbe_setup_mac_link_82598()
598 return -EINVAL; in ixgbe_setup_mac_link_82598()
609 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc); in ixgbe_setup_mac_link_82598()
616 return ixgbe_start_mac_link_82598(hw, autoneg_wait_to_complete); in ixgbe_setup_mac_link_82598()
621 * ixgbe_setup_copper_link_82598 - Set the PHY autoneg advertised field
622 * @hw: pointer to hardware structure
628 static int ixgbe_setup_copper_link_82598(struct ixgbe_hw *hw, in ixgbe_setup_copper_link_82598() argument
635 status = hw->phy.ops.setup_link_speed(hw, speed, in ixgbe_setup_copper_link_82598()
638 ixgbe_start_mac_link_82598(hw, autoneg_wait_to_complete); in ixgbe_setup_copper_link_82598()
644 * ixgbe_reset_hw_82598 - Performs hardware reset
645 * @hw: pointer to hardware structure
651 static int ixgbe_reset_hw_82598(struct ixgbe_hw *hw) in ixgbe_reset_hw_82598() argument
658 u32 ctrl; in ixgbe_reset_hw_82598() local
662 status = hw->mac.ops.stop_adapter(hw); in ixgbe_reset_hw_82598()
671 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &analog_val); in ixgbe_reset_hw_82598()
674 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, in ixgbe_reset_hw_82598()
677 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, in ixgbe_reset_hw_82598()
680 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, in ixgbe_reset_hw_82598()
683 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, in ixgbe_reset_hw_82598()
686 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, in ixgbe_reset_hw_82598()
689 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, in ixgbe_reset_hw_82598()
692 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, in ixgbe_reset_hw_82598()
695 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, in ixgbe_reset_hw_82598()
700 if (hw->phy.reset_disable == false) { in ixgbe_reset_hw_82598()
704 phy_status = hw->phy.ops.init(hw); in ixgbe_reset_hw_82598()
705 if (phy_status == -EOPNOTSUPP) in ixgbe_reset_hw_82598()
707 if (phy_status == -ENOENT) in ixgbe_reset_hw_82598()
710 hw->phy.ops.reset(hw); in ixgbe_reset_hw_82598()
718 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL) | IXGBE_CTRL_RST; in ixgbe_reset_hw_82598()
719 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl); in ixgbe_reset_hw_82598()
720 IXGBE_WRITE_FLUSH(hw); in ixgbe_reset_hw_82598()
723 /* Poll for reset bit to self-clear indicating reset is complete */ in ixgbe_reset_hw_82598()
725 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL); in ixgbe_reset_hw_82598()
726 if (!(ctrl & IXGBE_CTRL_RST)) in ixgbe_reset_hw_82598()
730 if (ctrl & IXGBE_CTRL_RST) { in ixgbe_reset_hw_82598()
731 status = -EIO; in ixgbe_reset_hw_82598()
732 hw_dbg(hw, "Reset polling failed to complete.\n"); in ixgbe_reset_hw_82598()
740 * for any pending HW events to complete. in ixgbe_reset_hw_82598()
742 if (hw->mac.flags & IXGBE_FLAGS_DOUBLE_RESET_REQUIRED) { in ixgbe_reset_hw_82598()
743 hw->mac.flags &= ~IXGBE_FLAGS_DOUBLE_RESET_REQUIRED; in ixgbe_reset_hw_82598()
747 gheccr = IXGBE_READ_REG(hw, IXGBE_GHECCR); in ixgbe_reset_hw_82598()
749 IXGBE_WRITE_REG(hw, IXGBE_GHECCR, gheccr); in ixgbe_reset_hw_82598()
756 autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC); in ixgbe_reset_hw_82598()
757 if (hw->mac.orig_link_settings_stored == false) { in ixgbe_reset_hw_82598()
758 hw->mac.orig_autoc = autoc; in ixgbe_reset_hw_82598()
759 hw->mac.orig_link_settings_stored = true; in ixgbe_reset_hw_82598()
760 } else if (autoc != hw->mac.orig_autoc) { in ixgbe_reset_hw_82598()
761 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, hw->mac.orig_autoc); in ixgbe_reset_hw_82598()
765 hw->mac.ops.get_mac_addr(hw, hw->mac.perm_addr); in ixgbe_reset_hw_82598()
771 hw->mac.ops.init_rx_addrs(hw); in ixgbe_reset_hw_82598()
780 * ixgbe_set_vmdq_82598 - Associate a VMDq set index with a rx address
781 * @hw: pointer to hardware struct
785 static int ixgbe_set_vmdq_82598(struct ixgbe_hw *hw, u32 rar, u32 vmdq) in ixgbe_set_vmdq_82598() argument
788 u32 rar_entries = hw->mac.num_rar_entries; in ixgbe_set_vmdq_82598()
792 hw_dbg(hw, "RAR index %d is out of range.\n", rar); in ixgbe_set_vmdq_82598()
793 return -EINVAL; in ixgbe_set_vmdq_82598()
796 rar_high = IXGBE_READ_REG(hw, IXGBE_RAH(rar)); in ixgbe_set_vmdq_82598()
799 IXGBE_WRITE_REG(hw, IXGBE_RAH(rar), rar_high); in ixgbe_set_vmdq_82598()
804 * ixgbe_clear_vmdq_82598 - Disassociate a VMDq set index from an rx address
805 * @hw: pointer to hardware struct
809 static int ixgbe_clear_vmdq_82598(struct ixgbe_hw *hw, u32 rar, u32 vmdq) in ixgbe_clear_vmdq_82598() argument
812 u32 rar_entries = hw->mac.num_rar_entries; in ixgbe_clear_vmdq_82598()
817 hw_dbg(hw, "RAR index %d is out of range.\n", rar); in ixgbe_clear_vmdq_82598()
818 return -EINVAL; in ixgbe_clear_vmdq_82598()
821 rar_high = IXGBE_READ_REG(hw, IXGBE_RAH(rar)); in ixgbe_clear_vmdq_82598()
824 IXGBE_WRITE_REG(hw, IXGBE_RAH(rar), rar_high); in ixgbe_clear_vmdq_82598()
831 * ixgbe_set_vfta_82598 - Set VLAN filter table
832 * @hw: pointer to hardware structure
836 * @vlvf_bypass: boolean flag - unused
840 static int ixgbe_set_vfta_82598(struct ixgbe_hw *hw, u32 vlan, u32 vind, in ixgbe_set_vfta_82598() argument
849 return -EINVAL; in ixgbe_set_vfta_82598()
851 /* Determine 32-bit word position in array */ in ixgbe_set_vfta_82598()
859 bits = IXGBE_READ_REG(hw, IXGBE_VFTAVIND(vftabyte, regindex)); in ixgbe_set_vfta_82598()
862 IXGBE_WRITE_REG(hw, IXGBE_VFTAVIND(vftabyte, regindex), bits); in ixgbe_set_vfta_82598()
867 bits = IXGBE_READ_REG(hw, IXGBE_VFTA(regindex)); in ixgbe_set_vfta_82598()
874 IXGBE_WRITE_REG(hw, IXGBE_VFTA(regindex), bits); in ixgbe_set_vfta_82598()
880 * ixgbe_clear_vfta_82598 - Clear VLAN filter table
881 * @hw: pointer to hardware structure
885 static int ixgbe_clear_vfta_82598(struct ixgbe_hw *hw) in ixgbe_clear_vfta_82598() argument
890 for (offset = 0; offset < hw->mac.vft_size; offset++) in ixgbe_clear_vfta_82598()
891 IXGBE_WRITE_REG(hw, IXGBE_VFTA(offset), 0); in ixgbe_clear_vfta_82598()
894 for (offset = 0; offset < hw->mac.vft_size; offset++) in ixgbe_clear_vfta_82598()
895 IXGBE_WRITE_REG(hw, IXGBE_VFTAVIND(vlanbyte, offset), in ixgbe_clear_vfta_82598()
902 * ixgbe_read_analog_reg8_82598 - Reads 8 bit Atlas analog register
903 * @hw: pointer to hardware structure
909 static int ixgbe_read_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 *val) in ixgbe_read_analog_reg8_82598() argument
913 IXGBE_WRITE_REG(hw, IXGBE_ATLASCTL, in ixgbe_read_analog_reg8_82598()
915 IXGBE_WRITE_FLUSH(hw); in ixgbe_read_analog_reg8_82598()
917 atlas_ctl = IXGBE_READ_REG(hw, IXGBE_ATLASCTL); in ixgbe_read_analog_reg8_82598()
924 * ixgbe_write_analog_reg8_82598 - Writes 8 bit Atlas analog register
925 * @hw: pointer to hardware structure
931 static int ixgbe_write_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 val) in ixgbe_write_analog_reg8_82598() argument
936 IXGBE_WRITE_REG(hw, IXGBE_ATLASCTL, atlas_ctl); in ixgbe_write_analog_reg8_82598()
937 IXGBE_WRITE_FLUSH(hw); in ixgbe_write_analog_reg8_82598()
944 * ixgbe_read_i2c_phy_82598 - Reads 8 bit word over I2C interface.
945 * @hw: pointer to hardware structure
952 static int ixgbe_read_i2c_phy_82598(struct ixgbe_hw *hw, u8 dev_addr, in ixgbe_read_i2c_phy_82598() argument
962 if (IXGBE_READ_REG(hw, IXGBE_STATUS) & IXGBE_STATUS_LAN_ID_1) in ixgbe_read_i2c_phy_82598()
967 if (hw->mac.ops.acquire_swfw_sync(hw, gssr) != 0) in ixgbe_read_i2c_phy_82598()
968 return -EBUSY; in ixgbe_read_i2c_phy_82598()
970 if (hw->phy.type == ixgbe_phy_nl) { in ixgbe_read_i2c_phy_82598()
978 hw->phy.ops.write_reg_mdi(hw, in ixgbe_read_i2c_phy_82598()
985 hw->phy.ops.read_reg_mdi(hw, in ixgbe_read_i2c_phy_82598()
996 hw_dbg(hw, "EEPROM read did not pass.\n"); in ixgbe_read_i2c_phy_82598()
997 status = -ENOENT; in ixgbe_read_i2c_phy_82598()
1002 hw->phy.ops.read_reg_mdi(hw, IXGBE_MDIO_PMA_PMD_SDA_SCL_DATA, in ixgbe_read_i2c_phy_82598()
1007 status = -EIO; in ixgbe_read_i2c_phy_82598()
1011 hw->mac.ops.release_swfw_sync(hw, gssr); in ixgbe_read_i2c_phy_82598()
1016 * ixgbe_read_i2c_eeprom_82598 - Reads 8 bit word over I2C interface.
1017 * @hw: pointer to hardware structure
1023 static int ixgbe_read_i2c_eeprom_82598(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_read_i2c_eeprom_82598() argument
1026 return ixgbe_read_i2c_phy_82598(hw, IXGBE_I2C_EEPROM_DEV_ADDR, in ixgbe_read_i2c_eeprom_82598()
1031 * ixgbe_read_i2c_sff8472_82598 - Reads 8 bit word over I2C interface.
1032 * @hw: pointer to hardware structure
1036 * Performs 8 byte read operation to SFP module's SFF-8472 data over I2C
1038 static int ixgbe_read_i2c_sff8472_82598(struct ixgbe_hw *hw, u8 byte_offset, in ixgbe_read_i2c_sff8472_82598() argument
1041 return ixgbe_read_i2c_phy_82598(hw, IXGBE_I2C_EEPROM_DEV_ADDR2, in ixgbe_read_i2c_sff8472_82598()
1046 * ixgbe_set_lan_id_multi_port_pcie_82598 - Set LAN id for PCIe multiple
1048 * @hw: pointer to the HW structure
1053 static void ixgbe_set_lan_id_multi_port_pcie_82598(struct ixgbe_hw *hw) in ixgbe_set_lan_id_multi_port_pcie_82598() argument
1055 struct ixgbe_bus_info *bus = &hw->bus; in ixgbe_set_lan_id_multi_port_pcie_82598()
1059 ixgbe_set_lan_id_multi_port_pcie(hw); in ixgbe_set_lan_id_multi_port_pcie_82598()
1062 hw->eeprom.ops.read(hw, IXGBE_PCIE_GENERAL_PTR, &pci_gen); in ixgbe_set_lan_id_multi_port_pcie_82598()
1065 hw->eeprom.ops.read(hw, pci_gen + IXGBE_PCIE_CTRL2, &pci_ctrl2); in ixgbe_set_lan_id_multi_port_pcie_82598()
1072 bus->func = 0; in ixgbe_set_lan_id_multi_port_pcie_82598()
1078 * ixgbe_set_rxpba_82598 - Initialize RX packet buffer
1079 * @hw: pointer to hardware structure
1084 static void ixgbe_set_rxpba_82598(struct ixgbe_hw *hw, int num_pb, in ixgbe_set_rxpba_82598() argument
1099 IXGBE_WRITE_REG(hw, IXGBE_RXPBSIZE(i), rxpktsize); in ixgbe_set_rxpba_82598()
1100 /* Setup the last four at 48KB...don't re-init i */ in ixgbe_set_rxpba_82598()
1107 IXGBE_WRITE_REG(hw, IXGBE_RXPBSIZE(i), rxpktsize); in ixgbe_set_rxpba_82598()
1113 IXGBE_WRITE_REG(hw, IXGBE_TXPBSIZE(i), IXGBE_TXPBSIZE_40KB); in ixgbe_set_rxpba_82598()