Lines Matching +full:hw +full:- +full:flow +full:- +full:ctrl
1 // SPDX-License-Identifier: GPL-2.0
13 * igc_reset_hw_base - Reset hardware
14 * @hw: pointer to the HW structure
19 static s32 igc_reset_hw_base(struct igc_hw *hw) in igc_reset_hw_base() argument
22 u32 ctrl; in igc_reset_hw_base() local
24 /* Prevent the PCI-E bus from sticking if there is no TLP connection in igc_reset_hw_base()
27 ret_val = igc_disable_pcie_master(hw); in igc_reset_hw_base()
29 hw_dbg("PCI-E Master disable polling has failed\n"); in igc_reset_hw_base()
40 ctrl = rd32(IGC_CTRL); in igc_reset_hw_base()
43 wr32(IGC_CTRL, ctrl | IGC_CTRL_RST); in igc_reset_hw_base()
45 ret_val = igc_get_auto_rd_done(hw); in igc_reset_hw_base()
62 * igc_init_nvm_params_base - Init NVM func ptrs.
63 * @hw: pointer to the HW structure
65 static s32 igc_init_nvm_params_base(struct igc_hw *hw) in igc_init_nvm_params_base() argument
67 struct igc_nvm_info *nvm = &hw->nvm; in igc_init_nvm_params_base()
73 return -ENXIO; in igc_init_nvm_params_base()
77 /* Added to a constant, "size" becomes the left-shift value in igc_init_nvm_params_base()
88 nvm->type = igc_nvm_eeprom_spi; in igc_init_nvm_params_base()
89 nvm->word_size = BIT(size); in igc_init_nvm_params_base()
90 nvm->opcode_bits = 8; in igc_init_nvm_params_base()
91 nvm->delay_usec = 1; in igc_init_nvm_params_base()
93 nvm->page_size = eecd & IGC_EECD_ADDR_BITS ? 32 : 8; in igc_init_nvm_params_base()
94 nvm->address_bits = eecd & IGC_EECD_ADDR_BITS ? in igc_init_nvm_params_base()
97 if (nvm->word_size == BIT(15)) in igc_init_nvm_params_base()
98 nvm->page_size = 128; in igc_init_nvm_params_base()
104 * igc_setup_copper_link_base - Configure copper link settings
105 * @hw: pointer to the HW structure
107 * Configures the link for auto-neg or forced speed and duplex. Then we check
109 * and flow control are called.
111 static s32 igc_setup_copper_link_base(struct igc_hw *hw) in igc_setup_copper_link_base() argument
114 u32 ctrl; in igc_setup_copper_link_base() local
116 ctrl = rd32(IGC_CTRL); in igc_setup_copper_link_base()
117 ctrl |= IGC_CTRL_SLU; in igc_setup_copper_link_base()
118 ctrl &= ~(IGC_CTRL_FRCSPD | IGC_CTRL_FRCDPX); in igc_setup_copper_link_base()
119 wr32(IGC_CTRL, ctrl); in igc_setup_copper_link_base()
121 ret_val = igc_setup_copper_link(hw); in igc_setup_copper_link_base()
127 * igc_init_mac_params_base - Init MAC func ptrs.
128 * @hw: pointer to the HW structure
130 static s32 igc_init_mac_params_base(struct igc_hw *hw) in igc_init_mac_params_base() argument
132 struct igc_dev_spec_base *dev_spec = &hw->dev_spec._base; in igc_init_mac_params_base()
133 struct igc_mac_info *mac = &hw->mac; in igc_init_mac_params_base()
136 mac->mta_reg_count = 128; in igc_init_mac_params_base()
137 mac->rar_entry_count = IGC_RAR_ENTRIES; in igc_init_mac_params_base()
140 mac->ops.reset_hw = igc_reset_hw_base; in igc_init_mac_params_base()
142 mac->ops.acquire_swfw_sync = igc_acquire_swfw_sync_i225; in igc_init_mac_params_base()
143 mac->ops.release_swfw_sync = igc_release_swfw_sync_i225; in igc_init_mac_params_base()
146 if (mac->type == igc_i225) in igc_init_mac_params_base()
147 dev_spec->clear_semaphore_once = true; in igc_init_mac_params_base()
150 mac->ops.setup_physical_interface = igc_setup_copper_link_base; in igc_init_mac_params_base()
156 * igc_init_phy_params_base - Init PHY func ptrs.
157 * @hw: pointer to the HW structure
159 static s32 igc_init_phy_params_base(struct igc_hw *hw) in igc_init_phy_params_base() argument
161 struct igc_phy_info *phy = &hw->phy; in igc_init_phy_params_base()
164 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT_2500; in igc_init_phy_params_base()
165 phy->reset_delay_us = 100; in igc_init_phy_params_base()
168 hw->bus.func = FIELD_GET(IGC_STATUS_FUNC_MASK, rd32(IGC_STATUS)); in igc_init_phy_params_base()
175 ret_val = hw->phy.ops.reset(hw); in igc_init_phy_params_base()
181 ret_val = igc_get_phy_id(hw); in igc_init_phy_params_base()
185 igc_check_for_copper_link(hw); in igc_init_phy_params_base()
191 static s32 igc_get_invariants_base(struct igc_hw *hw) in igc_get_invariants_base() argument
193 struct igc_mac_info *mac = &hw->mac; in igc_get_invariants_base()
196 switch (hw->device_id) { in igc_get_invariants_base()
213 mac->type = igc_i225; in igc_get_invariants_base()
216 return -IGC_ERR_MAC_INIT; in igc_get_invariants_base()
219 hw->phy.media_type = igc_media_type_copper; in igc_get_invariants_base()
222 ret_val = igc_init_mac_params_base(hw); in igc_get_invariants_base()
227 ret_val = igc_init_nvm_params_base(hw); in igc_get_invariants_base()
230 switch (hw->mac.type) { in igc_get_invariants_base()
232 ret_val = igc_init_nvm_params_i225(hw); in igc_get_invariants_base()
239 ret_val = igc_init_phy_params_base(hw); in igc_get_invariants_base()
248 * igc_acquire_phy_base - Acquire rights to access PHY
249 * @hw: pointer to the HW structure
254 static s32 igc_acquire_phy_base(struct igc_hw *hw) in igc_acquire_phy_base() argument
258 return hw->mac.ops.acquire_swfw_sync(hw, mask); in igc_acquire_phy_base()
262 * igc_release_phy_base - Release rights to access PHY
263 * @hw: pointer to the HW structure
268 static void igc_release_phy_base(struct igc_hw *hw) in igc_release_phy_base() argument
272 hw->mac.ops.release_swfw_sync(hw, mask); in igc_release_phy_base()
276 * igc_init_hw_base - Initialize hardware
277 * @hw: pointer to the HW structure
281 static s32 igc_init_hw_base(struct igc_hw *hw) in igc_init_hw_base() argument
283 struct igc_mac_info *mac = &hw->mac; in igc_init_hw_base()
284 u16 i, rar_count = mac->rar_entry_count; in igc_init_hw_base()
288 igc_init_rx_addrs(hw, rar_count); in igc_init_hw_base()
292 for (i = 0; i < mac->mta_reg_count; i++) in igc_init_hw_base()
297 for (i = 0; i < mac->uta_reg_count; i++) in igc_init_hw_base()
300 /* Setup link and flow control */ in igc_init_hw_base()
301 ret_val = igc_setup_link(hw); in igc_init_hw_base()
308 igc_clear_hw_cntrs_base(hw); in igc_init_hw_base()
314 * igc_power_down_phy_copper_base - Remove link during PHY power down
315 * @hw: pointer to the HW structure
320 void igc_power_down_phy_copper_base(struct igc_hw *hw) in igc_power_down_phy_copper_base() argument
323 if (!(igc_enable_mng_pass_thru(hw) || igc_check_reset_block(hw))) in igc_power_down_phy_copper_base()
324 igc_power_down_phy_copper(hw); in igc_power_down_phy_copper_base()
328 * igc_rx_fifo_flush_base - Clean rx fifo after Rx enable
329 * @hw: pointer to the HW structure
336 void igc_rx_fifo_flush_base(struct igc_hw *hw) in igc_rx_fifo_flush_base() argument
403 bool igc_is_device_id_i225(struct igc_hw *hw) in igc_is_device_id_i225() argument
405 switch (hw->device_id) { in igc_is_device_id_i225()
419 bool igc_is_device_id_i226(struct igc_hw *hw) in igc_is_device_id_i226() argument
421 switch (hw->device_id) { in igc_is_device_id_i226()