Lines Matching +full:pme +full:- +full:active +full:- +full:high

1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
13 #define E1000_WUC_PME_EN 0x00000002 /* PME Enable */
62 /* Interrupt acknowledge Auto-mask */
118 #define E1000_MANC_SMBUS_EN 0x00000001 /* SMBus Enabled - RO */
119 #define E1000_MANC_ASF_EN 0x00000002 /* ASF Enabled - RO */
184 #define E1000_CTRL_ASDE 0x00000020 /* Auto-speed detect enable */
186 #define E1000_CTRL_ILOS 0x00000080 /* Invert Loss-Of Signal */
254 /* Constants used to intrepret the masked PCI-X bus speed. */
271 /* 1000/H is not supported, nor spec-compliant. */
309 #define E1000_TCTL_RTLC 0x01000000 /* Re-transmit on late collision */
318 /* DMA Coalescing BMC-to-OS Watchdog Enable */
330 #define E1000_FCRTC_RTH_COAL_MASK 0x0003FFF0 /* FC Rx Thresh High val */
409 #define E1000_EICR_OTHER 0x80000000 /* Interrupt Cause Active */
440 #define E1000_EIMS_OTHER E1000_EICR_OTHER /* Interrupt Cause Active */
469 /* Number of high/low register pairs in the RAR. The RAR (Receive Address
501 /* Loop limit on how long we wait for auto-negotiation to complete */
679 /* 1000BASE-T Control Register */
687 /* 1000BASE-T Status Register */
700 #define PHY_1000T_CTRL 0x09 /* 1000Base-T Control Reg */
701 #define PHY_1000T_STATUS 0x0A /* 1000Base-T Status Reg */
832 /* NVM Commands - Microwire */
834 /* NVM Commands - SPI */
838 #define NVM_A8_OPCODE_SPI 0x08 /* opcode bit-3 = address bit-8 */
866 /* PCI/PCI-X/PCI-EX Config space */
871 #define MAX_PHY_REG_ADDRESS 0x1F /* 5 bit address bus (0-0x1F) */
904 /* 1000BASE-T: Auto crossover, 100BASE-TX/10BASE-T: MDI Mode */
908 /* 1=Enable Extended 10BASE-T distance (Lower 10BASE-T Rx Threshold
909 * 0=Normal 10BASE-T Rx Threshold
911 /* 1=5-bit interface in 100BASE-TX, 0=MII interface in 100BASE-TX */
919 * 1 = 50-80M
920 * 2 = 80-110M
921 * 3 = 110-140M
934 * within 1ms in 1000BASE-T
948 /* Intel i347-AT4 Registers */
957 /* i347-AT4 Extended PHY Specific Control Register */
973 /* i347-AT4 PHY Cable Diagnostics Control */
1036 /* Tx Rate-Scheduler Config fields */
1053 /* Fetch Time Delta - bits 31:16