Lines Matching +full:tx +full:- +full:device
1 // SPDX-License-Identifier: GPL-2.0
20 { TIME_SYNC, { 4, -1 }, { 0, 0 }},
21 { ONE_PPS, { -1, 5 }, { 0, 11 }},
30 { TIME_SYNC, { 4, -1 }, { 11, 0 }},
31 { ONE_PPS, { -1, 5 }, { 0, 9 }},
40 { ONE_PPS, { -1, 5 }, { 0, 1 }},
53 { GNSS, { 1, -1 }, { 0, 0 }},
55 { UFL1, { -1, 0 }, { 0, 1 }},
57 { UFL2, { 3, -1 }, { 0, 0 }},
62 return !pf->adapter ? NULL : pf->adapter->ctrl_pf; in ice_get_ctrl_pf()
69 return !ctrl_pf ? NULL : &ctrl_pf->ptp; in ice_get_ctrl_ptp()
73 * ice_ptp_find_pin_idx - Find pin index in ptp_pin_desc
78 * Return: positive pin number when pin is present, -1 otherwise
83 const struct ptp_clock_info *info = &pf->ptp.info; in ice_ptp_find_pin_idx()
86 for (i = 0; i < info->n_pins; i++) { in ice_ptp_find_pin_idx()
87 if (info->pin_config[i].func == func && in ice_ptp_find_pin_idx()
88 info->pin_config[i].chan == chan) in ice_ptp_find_pin_idx()
92 return -1; in ice_ptp_find_pin_idx()
96 * ice_ptp_update_sma_data - update SMA pins data according to pins setup
110 if (!sma_pins[UFL1 - 1]) { in ice_ptp_update_sma_data()
111 if (sma_pins[SMA1 - 1] == PTP_PF_EXTTS) { in ice_ptp_update_sma_data()
114 } else if (sma_pins[SMA1 - 1] == PTP_PF_PEROUT) { in ice_ptp_update_sma_data()
115 state1 = "SMA1 Tx U.FL1 disabled"; in ice_ptp_update_sma_data()
122 /* U.FL1 Tx will always enable SMA1 Rx */ in ice_ptp_update_sma_data()
123 state1 = "SMA1 Rx, U.FL1 Tx"; in ice_ptp_update_sma_data()
126 if (!sma_pins[UFL2 - 1]) { in ice_ptp_update_sma_data()
127 if (sma_pins[SMA2 - 1] == PTP_PF_EXTTS) { in ice_ptp_update_sma_data()
130 } else if (sma_pins[SMA2 - 1] == PTP_PF_PEROUT) { in ice_ptp_update_sma_data()
131 state2 = "SMA2 Tx, U.FL2 disabled"; in ice_ptp_update_sma_data()
138 if (!sma_pins[SMA2 - 1]) { in ice_ptp_update_sma_data()
142 state2 = "SMA2 Tx, U.FL2 Rx"; in ice_ptp_update_sma_data()
151 * ice_ptp_set_sma_cfg - set the configuration of the SMA control logic
158 const struct ice_ptp_pin_desc *ice_pins = pf->ptp.ice_pin_desc; in ice_ptp_set_sma_cfg()
159 struct ptp_pin_desc *pins = pf->ptp.pin_desc; in ice_ptp_set_sma_cfg()
165 err = ice_read_sma_ctrl(&pf->hw, &data); in ice_ptp_set_sma_cfg()
170 for (int i = 0; i < pf->ptp.info.n_pins; i++) in ice_ptp_set_sma_cfg()
179 sma_pins[name_idx - 1] = pins[i].func; in ice_ptp_set_sma_cfg()
187 return ice_write_sma_ctrl(&pf->hw, data); in ice_ptp_set_sma_cfg()
191 * ice_ptp_cfg_tx_interrupt - Configure Tx timestamp interrupt for the device
194 * Program the device to respond appropriately to the Tx timestamp interrupt
199 struct ice_hw *hw = &pf->hw; in ice_ptp_cfg_tx_interrupt()
203 switch (pf->ptp.tx_interrupt_mode) { in ice_ptp_cfg_tx_interrupt()
206 wr32(hw, PFINT_TSYN_MSK + (0x4 * hw->pf_id), (u32)0x1f); in ice_ptp_cfg_tx_interrupt()
211 wr32(hw, PFINT_TSYN_MSK + (0x4 * hw->pf_id), (u32)0x0); in ice_ptp_cfg_tx_interrupt()
216 enable = pf->ptp.tstamp_config.tx_type == HWTSTAMP_TX_ON; in ice_ptp_cfg_tx_interrupt()
220 /* Configure the Tx timestamp interrupt */ in ice_ptp_cfg_tx_interrupt()
230 * ice_set_rx_tstamp - Enable or disable Rx timestamping
240 if (!vsi || !vsi->rx_rings) in ice_set_rx_tstamp()
245 if (!vsi->rx_rings[i]) in ice_set_rx_tstamp()
247 vsi->rx_rings[i]->ptp_rx = on; in ice_set_rx_tstamp()
252 * ice_ptp_disable_timestamp_mode - Disable current timestamp mode
256 * the device. Called during remove to disable timestamping while cleaning up
261 struct ice_hw *hw = &pf->hw; in ice_ptp_disable_timestamp_mode()
272 * ice_ptp_restore_timestamp_mode - Restore timestamp configuration
276 * a device reset.
280 struct ice_hw *hw = &pf->hw; in ice_ptp_restore_timestamp_mode()
285 enable_rx = pf->ptp.tstamp_config.rx_filter == HWTSTAMP_FILTER_ALL; in ice_ptp_restore_timestamp_mode()
296 * ice_ptp_read_src_clk_reg - Read the source clock register
304 struct ice_hw *hw = &pf->hw; in ice_ptp_read_src_clk_reg()
309 guard(spinlock)(&pf->adapter->ptp_gltsyn_time_lock); in ice_ptp_read_src_clk_reg()
313 if (hw->mac_type == ICE_MAC_E830) { in ice_ptp_read_src_clk_reg()
344 * ice_ptp_extend_32b_ts - Convert a 32b nanoseconds timestamp to 64b
351 * 8 bits are sub-nanoseconds and generally discarded.
368 * This algorithm works even if the PHC time was updated after a Tx timestamp
369 * was requested, but before the Tx timestamp event was reported from
378 * a second, and (b) discarding any Tx timestamp packet if it has waited for
392 delta = (in_tstamp - phc_time_lo); in ice_ptp_extend_32b_ts()
401 delta = (phc_time_lo - in_tstamp); in ice_ptp_extend_32b_ts()
402 ns = cached_phc_time - delta; in ice_ptp_extend_32b_ts()
411 * ice_ptp_extend_40b_ts - Convert a 40b timestamp to 64b nanoseconds
415 * The Tx and Rx timestamps are 40 bits wide, including 32 bits of nominal
416 * nanoseconds, 7 bits of sub-nanoseconds, and a valid bit.
418 * *--------------------------------------------------------------*
420 * *--------------------------------------------------------------*
423 * 7 bits are a capture of the upper 7 bits of the sub-nanosecond underflow,
430 * time stored in the device private PTP structure as the basis for timestamp
442 discard_time = pf->ptp.cached_phc_jiffies + msecs_to_jiffies(2000); in ice_ptp_extend_40b_ts()
444 pf->ptp.tx_hwtstamp_discarded++; in ice_ptp_extend_40b_ts()
448 return ice_ptp_extend_32b_ts(pf->ptp.cached_phc_time, in ice_ptp_extend_40b_ts()
453 * ice_ptp_is_tx_tracker_up - Check if Tx tracker is ready for new timestamps
454 * @tx: the PTP Tx timestamp tracker to check
456 * Check that a given PTP Tx timestamp tracker is up, i.e. that it is ready
459 * Assumes the tx->lock spinlock is already held.
462 ice_ptp_is_tx_tracker_up(struct ice_ptp_tx *tx) in ice_ptp_is_tx_tracker_up() argument
464 lockdep_assert_held(&tx->lock); in ice_ptp_is_tx_tracker_up()
466 return tx->init && !tx->calibrating; in ice_ptp_is_tx_tracker_up()
470 * ice_ptp_req_tx_single_tstamp - Request Tx timestamp for a port from FW
471 * @tx: the PTP Tx timestamp tracker
474 void ice_ptp_req_tx_single_tstamp(struct ice_ptp_tx *tx, u8 idx) in ice_ptp_req_tx_single_tstamp() argument
482 if (!tx->init) in ice_ptp_req_tx_single_tstamp()
485 ptp_port = container_of(tx, struct ice_ptp_port, tx); in ice_ptp_req_tx_single_tstamp()
487 params = &pf->hw.ptp.phy.e810; in ice_ptp_req_tx_single_tstamp()
490 if (time_is_before_jiffies(tx->tstamps[idx].start + 2 * HZ)) { in ice_ptp_req_tx_single_tstamp()
491 /* Count the number of Tx timestamps that timed out */ in ice_ptp_req_tx_single_tstamp()
492 pf->ptp.tx_hwtstamp_timeouts++; in ice_ptp_req_tx_single_tstamp()
494 skb = tx->tstamps[idx].skb; in ice_ptp_req_tx_single_tstamp()
495 tx->tstamps[idx].skb = NULL; in ice_ptp_req_tx_single_tstamp()
496 clear_bit(idx, tx->in_use); in ice_ptp_req_tx_single_tstamp()
502 ice_trace(tx_tstamp_fw_req, tx->tstamps[idx].skb, idx); in ice_ptp_req_tx_single_tstamp()
504 spin_lock_irqsave(¶ms->atqbal_wq.lock, flags); in ice_ptp_req_tx_single_tstamp()
506 params->atqbal_flags |= ATQBAL_FLAGS_INTR_IN_PROGRESS; in ice_ptp_req_tx_single_tstamp()
509 wr32(&pf->hw, REG_LL_PROXY_H, in ice_ptp_req_tx_single_tstamp()
512 tx->last_ll_ts_idx_read = idx; in ice_ptp_req_tx_single_tstamp()
514 spin_unlock_irqrestore(¶ms->atqbal_wq.lock, flags); in ice_ptp_req_tx_single_tstamp()
518 * ice_ptp_complete_tx_single_tstamp - Complete Tx timestamp for a port
519 * @tx: the PTP Tx timestamp tracker
521 void ice_ptp_complete_tx_single_tstamp(struct ice_ptp_tx *tx) in ice_ptp_complete_tx_single_tstamp() argument
524 u8 idx = tx->last_ll_ts_idx_read; in ice_ptp_complete_tx_single_tstamp()
531 struct device *dev; in ice_ptp_complete_tx_single_tstamp()
535 if (!tx->init || tx->last_ll_ts_idx_read < 0) in ice_ptp_complete_tx_single_tstamp()
538 ptp_port = container_of(tx, struct ice_ptp_port, tx); in ice_ptp_complete_tx_single_tstamp()
541 params = &pf->hw.ptp.phy.e810; in ice_ptp_complete_tx_single_tstamp()
543 ice_trace(tx_tstamp_fw_done, tx->tstamps[idx].skb, idx); in ice_ptp_complete_tx_single_tstamp()
545 spin_lock_irqsave(¶ms->atqbal_wq.lock, flags); in ice_ptp_complete_tx_single_tstamp()
547 if (!(params->atqbal_flags & ATQBAL_FLAGS_INTR_IN_PROGRESS)) in ice_ptp_complete_tx_single_tstamp()
552 raw_tstamp = rd32(&pf->hw, REG_LL_PROXY_L); in ice_ptp_complete_tx_single_tstamp()
554 reg_ll_high = rd32(&pf->hw, REG_LL_PROXY_H); in ice_ptp_complete_tx_single_tstamp()
557 params->atqbal_flags &= ~ATQBAL_FLAGS_INTR_IN_PROGRESS; in ice_ptp_complete_tx_single_tstamp()
559 wake_up_locked(¶ms->atqbal_wq); in ice_ptp_complete_tx_single_tstamp()
561 spin_unlock_irqrestore(¶ms->atqbal_wq.lock, flags); in ice_ptp_complete_tx_single_tstamp()
565 dev_err(ice_pf_to_dev(pf), "Failed to get the Tx tstamp - FW not ready"); in ice_ptp_complete_tx_single_tstamp()
575 if (raw_tstamp == tx->tstamps[idx].cached_tstamp) in ice_ptp_complete_tx_single_tstamp()
578 tx->tstamps[idx].cached_tstamp = raw_tstamp; in ice_ptp_complete_tx_single_tstamp()
579 clear_bit(idx, tx->in_use); in ice_ptp_complete_tx_single_tstamp()
580 skb = tx->tstamps[idx].skb; in ice_ptp_complete_tx_single_tstamp()
581 tx->tstamps[idx].skb = NULL; in ice_ptp_complete_tx_single_tstamp()
582 if (test_and_clear_bit(idx, tx->stale)) in ice_ptp_complete_tx_single_tstamp()
605 * ice_ptp_process_tx_tstamp - Process Tx timestamps for a port
606 * @tx: the PTP Tx timestamp tracker
621 * Note that we do not hold the tracking lock while reading the Tx timestamp.
628 * function, or during teardown when the Tx timestamp tracker is being
629 * removed. A timestamp index will never be re-used until the in_use bit for
632 * If a Tx thread starts a new timestamp, we might not begin processing it
633 * right away but we will notice it at the end when we re-queue the task.
635 * If a Tx thread starts a new timestamp just after this function exits, the
636 * interrupt for that timestamp should re-trigger this function once
641 * this case, software will set the stale bit for any outstanding Tx
645 * If a Tx packet has been waiting for more than 2 seconds, it is not possible
648 * we detect a Tx timestamp request that has waited for this long we assume
652 static void ice_ptp_process_tx_tstamp(struct ice_ptp_tx *tx) in ice_ptp_process_tx_tstamp() argument
663 ptp_port = container_of(tx, struct ice_ptp_port, tx); in ice_ptp_process_tx_tstamp()
665 hw = &pf->hw; in ice_ptp_process_tx_tstamp()
667 /* Read the Tx ready status first */ in ice_ptp_process_tx_tstamp()
668 if (tx->has_ready_bitmap) { in ice_ptp_process_tx_tstamp()
669 err = ice_get_phy_tx_tstamp_ready(hw, tx->block, &tstamp_ready); in ice_ptp_process_tx_tstamp()
675 link_up = ptp_port->link_up; in ice_ptp_process_tx_tstamp()
677 for_each_set_bit(idx, tx->in_use, tx->len) { in ice_ptp_process_tx_tstamp()
679 u8 phy_idx = idx + tx->offset; in ice_ptp_process_tx_tstamp()
685 if (time_is_before_jiffies(tx->tstamps[idx].start + 2 * HZ)) { in ice_ptp_process_tx_tstamp()
688 /* Count the number of Tx timestamps that timed out */ in ice_ptp_process_tx_tstamp()
689 pf->ptp.tx_hwtstamp_timeouts++; in ice_ptp_process_tx_tstamp()
700 if (tx->has_ready_bitmap && in ice_ptp_process_tx_tstamp()
708 ice_trace(tx_tstamp_fw_req, tx->tstamps[idx].skb, idx); in ice_ptp_process_tx_tstamp()
710 err = ice_read_phy_tstamp(hw, tx->block, phy_idx, &raw_tstamp); in ice_ptp_process_tx_tstamp()
714 ice_trace(tx_tstamp_fw_done, tx->tstamps[idx].skb, idx); in ice_ptp_process_tx_tstamp()
721 if (!drop_ts && !tx->has_ready_bitmap && in ice_ptp_process_tx_tstamp()
722 raw_tstamp == tx->tstamps[idx].cached_tstamp) in ice_ptp_process_tx_tstamp()
730 spin_lock_irqsave(&tx->lock, flags); in ice_ptp_process_tx_tstamp()
731 if (!tx->has_ready_bitmap && raw_tstamp) in ice_ptp_process_tx_tstamp()
732 tx->tstamps[idx].cached_tstamp = raw_tstamp; in ice_ptp_process_tx_tstamp()
733 clear_bit(idx, tx->in_use); in ice_ptp_process_tx_tstamp()
734 skb = tx->tstamps[idx].skb; in ice_ptp_process_tx_tstamp()
735 tx->tstamps[idx].skb = NULL; in ice_ptp_process_tx_tstamp()
736 if (test_and_clear_bit(idx, tx->stale)) in ice_ptp_process_tx_tstamp()
738 spin_unlock_irqrestore(&tx->lock, flags); in ice_ptp_process_tx_tstamp()
764 * ice_ptp_tx_tstamp_owner - Process Tx timestamps for all ports on the device
772 mutex_lock(&pf->adapter->ports.lock); in ice_ptp_tx_tstamp_owner()
773 list_for_each_entry(port, &pf->adapter->ports.ports, list_node) { in ice_ptp_tx_tstamp_owner()
774 struct ice_ptp_tx *tx = &port->tx; in ice_ptp_tx_tstamp_owner() local
776 if (!tx || !tx->init) in ice_ptp_tx_tstamp_owner()
779 ice_ptp_process_tx_tstamp(tx); in ice_ptp_tx_tstamp_owner()
781 mutex_unlock(&pf->adapter->ports.lock); in ice_ptp_tx_tstamp_owner()
783 for (i = 0; i < ICE_GET_QUAD_NUM(pf->hw.ptp.num_lports); i++) { in ice_ptp_tx_tstamp_owner()
787 /* Read the Tx ready status first */ in ice_ptp_tx_tstamp_owner()
788 err = ice_get_phy_tx_tstamp_ready(&pf->hw, i, &tstamp_ready); in ice_ptp_tx_tstamp_owner()
799 * ice_ptp_tx_tstamp - Process Tx timestamps for this function.
800 * @tx: Tx tracking structure to initialize
803 * Tx timestamps, or ICE_TX_TSTAMP_WORK_DONE otherwise.
805 static enum ice_tx_tstamp_work ice_ptp_tx_tstamp(struct ice_ptp_tx *tx) in ice_ptp_tx_tstamp() argument
810 if (!tx->init) in ice_ptp_tx_tstamp()
813 /* Process the Tx timestamp tracker */ in ice_ptp_tx_tstamp()
814 ice_ptp_process_tx_tstamp(tx); in ice_ptp_tx_tstamp()
816 /* Check if there are outstanding Tx timestamps */ in ice_ptp_tx_tstamp()
817 spin_lock_irqsave(&tx->lock, flags); in ice_ptp_tx_tstamp()
818 more_timestamps = tx->init && !bitmap_empty(tx->in_use, tx->len); in ice_ptp_tx_tstamp()
819 spin_unlock_irqrestore(&tx->lock, flags); in ice_ptp_tx_tstamp()
828 * ice_ptp_alloc_tx_tracker - Initialize tracking for Tx timestamps
829 * @tx: Tx tracking structure to initialize
835 ice_ptp_alloc_tx_tracker(struct ice_ptp_tx *tx) in ice_ptp_alloc_tx_tracker() argument
840 tstamps = kcalloc(tx->len, sizeof(*tstamps), GFP_KERNEL); in ice_ptp_alloc_tx_tracker()
841 in_use = bitmap_zalloc(tx->len, GFP_KERNEL); in ice_ptp_alloc_tx_tracker()
842 stale = bitmap_zalloc(tx->len, GFP_KERNEL); in ice_ptp_alloc_tx_tracker()
849 return -ENOMEM; in ice_ptp_alloc_tx_tracker()
852 tx->tstamps = tstamps; in ice_ptp_alloc_tx_tracker()
853 tx->in_use = in_use; in ice_ptp_alloc_tx_tracker()
854 tx->stale = stale; in ice_ptp_alloc_tx_tracker()
855 tx->init = 1; in ice_ptp_alloc_tx_tracker()
856 tx->last_ll_ts_idx_read = -1; in ice_ptp_alloc_tx_tracker()
858 spin_lock_init(&tx->lock); in ice_ptp_alloc_tx_tracker()
864 * ice_ptp_flush_tx_tracker - Flush any remaining timestamps from the tracker
866 * @tx: the tracker to flush
868 * Called during teardown when a Tx tracker is being removed.
871 ice_ptp_flush_tx_tracker(struct ice_pf *pf, struct ice_ptp_tx *tx) in ice_ptp_flush_tx_tracker() argument
873 struct ice_hw *hw = &pf->hw; in ice_ptp_flush_tx_tracker()
879 err = ice_get_phy_tx_tstamp_ready(hw, tx->block, &tstamp_ready); in ice_ptp_flush_tx_tracker()
881 dev_dbg(ice_pf_to_dev(pf), "Failed to get the Tx tstamp ready bitmap for block %u, err %d\n", in ice_ptp_flush_tx_tracker()
882 tx->block, err); in ice_ptp_flush_tx_tracker()
884 /* If we fail to read the Tx timestamp ready bitmap just in ice_ptp_flush_tx_tracker()
890 for_each_set_bit(idx, tx->in_use, tx->len) { in ice_ptp_flush_tx_tracker()
891 u8 phy_idx = idx + tx->offset; in ice_ptp_flush_tx_tracker()
895 if (!hw->reset_ongoing && (tstamp_ready & BIT_ULL(phy_idx))) in ice_ptp_flush_tx_tracker()
896 ice_clear_phy_tstamp(hw, tx->block, phy_idx); in ice_ptp_flush_tx_tracker()
898 spin_lock_irqsave(&tx->lock, flags); in ice_ptp_flush_tx_tracker()
899 skb = tx->tstamps[idx].skb; in ice_ptp_flush_tx_tracker()
900 tx->tstamps[idx].skb = NULL; in ice_ptp_flush_tx_tracker()
901 clear_bit(idx, tx->in_use); in ice_ptp_flush_tx_tracker()
902 clear_bit(idx, tx->stale); in ice_ptp_flush_tx_tracker()
903 spin_unlock_irqrestore(&tx->lock, flags); in ice_ptp_flush_tx_tracker()
905 /* Count the number of Tx timestamps flushed */ in ice_ptp_flush_tx_tracker()
906 pf->ptp.tx_hwtstamp_flushed++; in ice_ptp_flush_tx_tracker()
914 * ice_ptp_mark_tx_tracker_stale - Mark unfinished timestamps as stale
915 * @tx: the tracker to mark
917 * Mark currently outstanding Tx timestamps as stale. This prevents sending
925 ice_ptp_mark_tx_tracker_stale(struct ice_ptp_tx *tx) in ice_ptp_mark_tx_tracker_stale() argument
929 spin_lock_irqsave(&tx->lock, flags); in ice_ptp_mark_tx_tracker_stale()
930 bitmap_or(tx->stale, tx->stale, tx->in_use, tx->len); in ice_ptp_mark_tx_tracker_stale()
931 spin_unlock_irqrestore(&tx->lock, flags); in ice_ptp_mark_tx_tracker_stale()
935 * ice_ptp_flush_all_tx_tracker - Flush all timestamp trackers on this clock
938 * Called by the clock owner to flush all the Tx timestamp trackers associated
946 list_for_each_entry(port, &pf->adapter->ports.ports, list_node) in ice_ptp_flush_all_tx_tracker()
947 ice_ptp_flush_tx_tracker(ptp_port_to_pf(port), &port->tx); in ice_ptp_flush_all_tx_tracker()
951 * ice_ptp_release_tx_tracker - Release allocated memory for Tx tracker
953 * @tx: Tx tracking structure to release
955 * Free memory associated with the Tx timestamp tracker.
958 ice_ptp_release_tx_tracker(struct ice_pf *pf, struct ice_ptp_tx *tx) in ice_ptp_release_tx_tracker() argument
962 spin_lock_irqsave(&tx->lock, flags); in ice_ptp_release_tx_tracker()
963 tx->init = 0; in ice_ptp_release_tx_tracker()
964 spin_unlock_irqrestore(&tx->lock, flags); in ice_ptp_release_tx_tracker()
967 synchronize_irq(pf->oicr_irq.virq); in ice_ptp_release_tx_tracker()
969 ice_ptp_flush_tx_tracker(pf, tx); in ice_ptp_release_tx_tracker()
971 kfree(tx->tstamps); in ice_ptp_release_tx_tracker()
972 tx->tstamps = NULL; in ice_ptp_release_tx_tracker()
974 bitmap_free(tx->in_use); in ice_ptp_release_tx_tracker()
975 tx->in_use = NULL; in ice_ptp_release_tx_tracker()
977 bitmap_free(tx->stale); in ice_ptp_release_tx_tracker()
978 tx->stale = NULL; in ice_ptp_release_tx_tracker()
980 tx->len = 0; in ice_ptp_release_tx_tracker()
984 * ice_ptp_init_tx_e82x - Initialize tracking for Tx timestamps
986 * @tx: the Tx tracking structure to initialize
989 * Initialize the Tx timestamp tracker for this port. For generic MAC devices,
994 * Return: 0 on success, -ENOMEM when out of memory
996 static int ice_ptp_init_tx_e82x(struct ice_pf *pf, struct ice_ptp_tx *tx, in ice_ptp_init_tx_e82x() argument
999 tx->block = ICE_GET_QUAD_NUM(port); in ice_ptp_init_tx_e82x()
1000 tx->offset = (port % ICE_PORTS_PER_QUAD) * INDEX_PER_PORT_E82X; in ice_ptp_init_tx_e82x()
1001 tx->len = INDEX_PER_PORT_E82X; in ice_ptp_init_tx_e82x()
1002 tx->has_ready_bitmap = 1; in ice_ptp_init_tx_e82x()
1004 return ice_ptp_alloc_tx_tracker(tx); in ice_ptp_init_tx_e82x()
1008 * ice_ptp_init_tx - Initialize tracking for Tx timestamps
1010 * @tx: the Tx tracking structure to initialize
1013 * Initialize the Tx timestamp tracker for this PF. For all PHYs except E82X,
1016 * Return: 0 on success, -ENOMEM when out of memory
1018 static int ice_ptp_init_tx(struct ice_pf *pf, struct ice_ptp_tx *tx, u8 port) in ice_ptp_init_tx() argument
1020 tx->block = port; in ice_ptp_init_tx()
1021 tx->offset = 0; in ice_ptp_init_tx()
1022 tx->len = INDEX_PER_PORT; in ice_ptp_init_tx()
1028 tx->has_ready_bitmap = pf->hw.mac_type != ICE_MAC_E810; in ice_ptp_init_tx()
1030 return ice_ptp_alloc_tx_tracker(tx); in ice_ptp_init_tx()
1034 * ice_ptp_update_cached_phctime - Update the cached PHC time values
1047 * * 0 - OK, successfully updated
1048 * * -EAGAIN - PF was busy, need to reschedule the update
1052 struct device *dev = ice_pf_to_dev(pf); in ice_ptp_update_cached_phctime()
1057 update_before = pf->ptp.cached_phc_jiffies + msecs_to_jiffies(2000); in ice_ptp_update_cached_phctime()
1058 if (pf->ptp.cached_phc_time && in ice_ptp_update_cached_phctime()
1060 unsigned long time_taken = jiffies - pf->ptp.cached_phc_jiffies; in ice_ptp_update_cached_phctime()
1064 pf->ptp.late_cached_phc_updates++; in ice_ptp_update_cached_phctime()
1071 WRITE_ONCE(pf->ptp.cached_phc_time, systime); in ice_ptp_update_cached_phctime()
1072 WRITE_ONCE(pf->ptp.cached_phc_jiffies, jiffies); in ice_ptp_update_cached_phctime()
1074 if (test_and_set_bit(ICE_CFG_BUSY, pf->state)) in ice_ptp_update_cached_phctime()
1075 return -EAGAIN; in ice_ptp_update_cached_phctime()
1078 struct ice_vsi *vsi = pf->vsi[i]; in ice_ptp_update_cached_phctime()
1084 if (vsi->type != ICE_VSI_PF) in ice_ptp_update_cached_phctime()
1088 if (!vsi->rx_rings[j]) in ice_ptp_update_cached_phctime()
1090 WRITE_ONCE(vsi->rx_rings[j]->cached_phctime, systime); in ice_ptp_update_cached_phctime()
1093 clear_bit(ICE_CFG_BUSY, pf->state); in ice_ptp_update_cached_phctime()
1099 * ice_ptp_reset_cached_phctime - Reset cached PHC time after an update
1103 * such as after a time adjustment. It marks any currently outstanding Tx
1113 struct device *dev = ice_pf_to_dev(pf); in ice_ptp_reset_cached_phctime()
1129 kthread_queue_delayed_work(pf->ptp.kworker, &pf->ptp.work, in ice_ptp_reset_cached_phctime()
1138 ice_ptp_mark_tx_tracker_stale(&pf->ptp.port.tx); in ice_ptp_reset_cached_phctime()
1142 * ice_ptp_write_init - Set PHC time to provided value
1151 struct ice_hw *hw = &pf->hw; in ice_ptp_write_init()
1157 * ice_ptp_write_adj - Adjust PHC clock time atomically
1166 struct ice_hw *hw = &pf->hw; in ice_ptp_write_adj()
1172 * ice_base_incval - Get base timer increment value
1175 * Look up the base timer increment value for this device. The base increment
1177 * is programmed during device initialization. It is also used as the basis
1182 struct ice_hw *hw = &pf->hw; in ice_base_incval()
1194 * ice_ptp_check_tx_fifo - Check whether Tx FIFO is in an OK state
1195 * @port: PTP port for which Tx FIFO is checked
1199 int offs = port->port_num % ICE_PORTS_PER_QUAD; in ice_ptp_check_tx_fifo()
1200 int quad = ICE_GET_QUAD_NUM(port->port_num); in ice_ptp_check_tx_fifo()
1207 hw = &pf->hw; in ice_ptp_check_tx_fifo()
1209 if (port->tx_fifo_busy_cnt == FIFO_OK) in ice_ptp_check_tx_fifo()
1221 dev_err(ice_pf_to_dev(pf), "PTP failed to check port %d Tx FIFO, err %d\n", in ice_ptp_check_tx_fifo()
1222 port->port_num, err); in ice_ptp_check_tx_fifo()
1232 port->tx_fifo_busy_cnt = FIFO_OK; in ice_ptp_check_tx_fifo()
1236 port->tx_fifo_busy_cnt++; in ice_ptp_check_tx_fifo()
1239 port->tx_fifo_busy_cnt, port->port_num); in ice_ptp_check_tx_fifo()
1241 if (port->tx_fifo_busy_cnt == ICE_PTP_FIFO_NUM_CHECKS) { in ice_ptp_check_tx_fifo()
1243 "Port %d Tx FIFO still not empty; resetting quad %d\n", in ice_ptp_check_tx_fifo()
1244 port->port_num, quad); in ice_ptp_check_tx_fifo()
1246 port->tx_fifo_busy_cnt = FIFO_OK; in ice_ptp_check_tx_fifo()
1250 return -EAGAIN; in ice_ptp_check_tx_fifo()
1254 * ice_ptp_wait_for_offsets - Check for valid Tx and Rx offsets
1257 * Check whether hardware has completed measuring the Tx and Rx offset values
1261 * registers with the calibrated offset values and enable timestamping. The Tx
1265 * This function reschedules itself until both Tx and Rx calibration have
1278 hw = &pf->hw; in ice_ptp_wait_for_offsets()
1280 if (ice_is_reset_in_progress(pf->state)) { in ice_ptp_wait_for_offsets()
1281 /* wait for device driver to complete reset */ in ice_ptp_wait_for_offsets()
1282 kthread_queue_delayed_work(pf->ptp.kworker, in ice_ptp_wait_for_offsets()
1283 &port->ov_work, in ice_ptp_wait_for_offsets()
1290 tx_err = ice_phy_cfg_tx_offset_e82x(hw, port->port_num); in ice_ptp_wait_for_offsets()
1291 rx_err = ice_phy_cfg_rx_offset_e82x(hw, port->port_num); in ice_ptp_wait_for_offsets()
1293 /* Tx and/or Rx offset not yet configured, try again later */ in ice_ptp_wait_for_offsets()
1294 kthread_queue_delayed_work(pf->ptp.kworker, in ice_ptp_wait_for_offsets()
1295 &port->ov_work, in ice_ptp_wait_for_offsets()
1302 * ice_ptp_port_phy_stop - Stop timestamping for a PHY port
1309 u8 port = ptp_port->port_num; in ice_ptp_port_phy_stop()
1310 struct ice_hw *hw = &pf->hw; in ice_ptp_port_phy_stop()
1313 mutex_lock(&ptp_port->ps_lock); in ice_ptp_port_phy_stop()
1315 switch (hw->mac_type) { in ice_ptp_port_phy_stop()
1321 kthread_cancel_delayed_work_sync(&ptp_port->ov_work); in ice_ptp_port_phy_stop()
1329 err = -ENODEV; in ice_ptp_port_phy_stop()
1331 if (err && err != -EBUSY) in ice_ptp_port_phy_stop()
1335 mutex_unlock(&ptp_port->ps_lock); in ice_ptp_port_phy_stop()
1341 * ice_ptp_port_phy_restart - (Re)start and calibrate PHY timestamping
1352 u8 port = ptp_port->port_num; in ice_ptp_port_phy_restart()
1353 struct ice_hw *hw = &pf->hw; in ice_ptp_port_phy_restart()
1357 if (!ptp_port->link_up) in ice_ptp_port_phy_restart()
1360 mutex_lock(&ptp_port->ps_lock); in ice_ptp_port_phy_restart()
1362 switch (hw->mac_type) { in ice_ptp_port_phy_restart()
1369 kthread_cancel_delayed_work_sync(&ptp_port->ov_work); in ice_ptp_port_phy_restart()
1371 /* temporarily disable Tx timestamps while calibrating in ice_ptp_port_phy_restart()
1374 spin_lock_irqsave(&ptp_port->tx.lock, flags); in ice_ptp_port_phy_restart()
1375 ptp_port->tx.calibrating = true; in ice_ptp_port_phy_restart()
1376 spin_unlock_irqrestore(&ptp_port->tx.lock, flags); in ice_ptp_port_phy_restart()
1377 ptp_port->tx_fifo_busy_cnt = 0; in ice_ptp_port_phy_restart()
1384 /* Enable Tx timestamps right away */ in ice_ptp_port_phy_restart()
1385 spin_lock_irqsave(&ptp_port->tx.lock, flags); in ice_ptp_port_phy_restart()
1386 ptp_port->tx.calibrating = false; in ice_ptp_port_phy_restart()
1387 spin_unlock_irqrestore(&ptp_port->tx.lock, flags); in ice_ptp_port_phy_restart()
1389 kthread_queue_delayed_work(pf->ptp.kworker, &ptp_port->ov_work, in ice_ptp_port_phy_restart()
1396 err = -ENODEV; in ice_ptp_port_phy_restart()
1403 mutex_unlock(&ptp_port->ps_lock); in ice_ptp_port_phy_restart()
1409 * ice_ptp_link_change - Reconfigure PTP after link status change
1416 struct ice_hw *hw = &pf->hw; in ice_ptp_link_change()
1418 if (pf->ptp.state != ICE_PTP_READY) in ice_ptp_link_change()
1421 ptp_port = &pf->ptp.port; in ice_ptp_link_change()
1424 ptp_port->link_up = linkup; in ice_ptp_link_change()
1427 if (pf->hw.reset_ongoing) in ice_ptp_link_change()
1430 switch (hw->mac_type) { in ice_ptp_link_change()
1445 * ice_ptp_cfg_phy_interrupt - Configure PHY interrupt settings
1454 * Return: 0 on success, -EOPNOTSUPP when PHY model incorrect, other error codes
1459 struct device *dev = ice_pf_to_dev(pf); in ice_ptp_cfg_phy_interrupt()
1460 struct ice_hw *hw = &pf->hw; in ice_ptp_cfg_phy_interrupt()
1464 switch (hw->mac_type) { in ice_ptp_cfg_phy_interrupt()
1471 for (quad = 0; quad < ICE_GET_QUAD_NUM(hw->ptp.num_lports); in ice_ptp_cfg_phy_interrupt()
1488 for (port = 0; port < hw->ptp.num_lports; port++) { in ice_ptp_cfg_phy_interrupt()
1503 return -EOPNOTSUPP; in ice_ptp_cfg_phy_interrupt()
1508 * ice_ptp_reset_phy_timestamping - Reset PHY timestamping block
1513 ice_ptp_port_phy_restart(&pf->ptp.port); in ice_ptp_reset_phy_timestamping()
1517 * ice_ptp_restart_all_phy - Restart all PHYs to recalibrate timestamping
1524 list_for_each(entry, &pf->adapter->ports.ports) { in ice_ptp_restart_all_phy()
1529 if (port->link_up) in ice_ptp_restart_all_phy()
1535 * ice_ptp_adjfine - Adjust clock increment rate
1537 * @scaled_ppm: Parts per million with 16-bit fractional field
1545 struct ice_hw *hw = &pf->hw; in ice_ptp_adjfine()
1554 return -EIO; in ice_ptp_adjfine()
1561 * ice_ptp_extts_event - Process PTP external clock event
1567 struct ice_hw *hw = &pf->hw; in ice_ptp_extts_event()
1572 if (pf->ptp.state != ICE_PTP_READY) in ice_ptp_extts_event()
1575 tmr_idx = hw->func_caps.ts_func_info.tmr_index_owned; in ice_ptp_extts_event()
1585 if (!(pf->ptp.ext_ts_irq & (1 << chan))) in ice_ptp_extts_event()
1597 desc = &pf->ptp.ice_pin_desc[pin_desc_idx]; in ice_ptp_extts_event()
1598 event.timestamp -= desc->delay[0]; in ice_ptp_extts_event()
1603 pf->ptp.ext_ts_irq &= ~(1 << chan); in ice_ptp_extts_event()
1604 ptp_clock_event(pf->ptp.clock, &event); in ice_ptp_extts_event()
1609 * ice_ptp_cfg_extts - Configure EXTTS pin and channel
1622 struct ice_hw *hw = &pf->hw; in ice_ptp_cfg_extts()
1629 if (rq->flags & ~(PTP_ENABLE_FEATURE | in ice_ptp_cfg_extts()
1633 return -EOPNOTSUPP; in ice_ptp_cfg_extts()
1635 tmr_idx = hw->func_caps.ts_func_info.tmr_index_owned; in ice_ptp_cfg_extts()
1636 chan = rq->index; in ice_ptp_cfg_extts()
1640 return -EIO; in ice_ptp_cfg_extts()
1642 gpio_pin = pf->ptp.ice_pin_desc[pin_desc_idx].gpio[0]; in ice_ptp_cfg_extts()
1654 if (rq->flags & PTP_FALLING_EDGE) in ice_ptp_cfg_extts()
1656 if (rq->flags & PTP_RISING_EDGE) in ice_ptp_cfg_extts()
1672 for (unsigned int i = 0; i < pf->ptp.info.n_ext_ts; i++) in ice_ptp_cfg_extts()
1673 if ((pf->ptp.extts_rqs[i].flags & in ice_ptp_cfg_extts()
1691 * ice_ptp_disable_all_extts - Disable all EXTTS channels
1696 for (unsigned int i = 0; i < pf->ptp.info.n_ext_ts ; i++) in ice_ptp_disable_all_extts()
1697 if (pf->ptp.extts_rqs[i].flags & PTP_ENABLE_FEATURE) in ice_ptp_disable_all_extts()
1698 ice_ptp_cfg_extts(pf, &pf->ptp.extts_rqs[i], in ice_ptp_disable_all_extts()
1701 synchronize_irq(pf->oicr_irq.virq); in ice_ptp_disable_all_extts()
1705 * ice_ptp_enable_all_extts - Enable all EXTTS channels
1712 for (unsigned int i = 0; i < pf->ptp.info.n_ext_ts ; i++) in ice_ptp_enable_all_extts()
1713 if (pf->ptp.extts_rqs[i].flags & PTP_ENABLE_FEATURE) in ice_ptp_enable_all_extts()
1714 ice_ptp_cfg_extts(pf, &pf->ptp.extts_rqs[i], in ice_ptp_enable_all_extts()
1719 * ice_ptp_write_perout - Write periodic wave parameters to HW
1732 u8 tmr_idx = hw->func_caps.ts_func_info.tmr_index_owned; in ice_ptp_write_perout()
1738 if (hw->mac_type == ICE_MAC_GENERIC_3K_E825) { in ice_ptp_write_perout()
1760 return -EIO; in ice_ptp_write_perout()
1787 * ice_ptp_cfg_perout - Configure clock to generate periodic wave
1802 struct ice_hw *hw = &pf->hw; in ice_ptp_cfg_perout()
1805 if (rq->flags & ~PTP_PEROUT_PHASE) in ice_ptp_cfg_perout()
1806 return -EOPNOTSUPP; in ice_ptp_cfg_perout()
1808 pin_desc_idx = ice_ptp_find_pin_idx(pf, PTP_PF_PEROUT, rq->index); in ice_ptp_cfg_perout()
1810 return -EIO; in ice_ptp_cfg_perout()
1812 gpio_pin = pf->ptp.ice_pin_desc[pin_desc_idx].gpio[1]; in ice_ptp_cfg_perout()
1813 prop_delay_ns = pf->ptp.ice_pin_desc[pin_desc_idx].delay[1]; in ice_ptp_cfg_perout()
1814 period = rq->period.sec * NSEC_PER_SEC + rq->period.nsec; in ice_ptp_cfg_perout()
1820 return ice_ptp_write_perout(hw, rq->index, gpio_pin, 0, 0); in ice_ptp_cfg_perout()
1822 if (strncmp(pf->ptp.pin_desc[pin_desc_idx].name, "1PPS", 64) == 0 && in ice_ptp_cfg_perout()
1823 period != NSEC_PER_SEC && hw->mac_type == ICE_MAC_GENERIC) { in ice_ptp_cfg_perout()
1825 return -EOPNOTSUPP; in ice_ptp_cfg_perout()
1830 return -EIO; in ice_ptp_cfg_perout()
1833 start = rq->start.sec * NSEC_PER_SEC + rq->start.nsec; in ice_ptp_cfg_perout()
1836 if (rq->flags & PTP_PEROUT_PHASE) in ice_ptp_cfg_perout()
1846 if (rq->flags & PTP_PEROUT_PHASE || start <= clk - prop_delay_ns) in ice_ptp_cfg_perout()
1847 start = div64_u64(clk + period - 1, period) * period + phase; in ice_ptp_cfg_perout()
1850 start -= prop_delay_ns; in ice_ptp_cfg_perout()
1852 return ice_ptp_write_perout(hw, rq->index, gpio_pin, start, period); in ice_ptp_cfg_perout()
1856 * ice_ptp_disable_all_perout - Disable all currently configured outputs
1861 * re-enable the clocks again.
1865 for (unsigned int i = 0; i < pf->ptp.info.n_per_out; i++) in ice_ptp_disable_all_perout()
1866 if (pf->ptp.perout_rqs[i].period.sec || in ice_ptp_disable_all_perout()
1867 pf->ptp.perout_rqs[i].period.nsec) in ice_ptp_disable_all_perout()
1868 ice_ptp_cfg_perout(pf, &pf->ptp.perout_rqs[i], in ice_ptp_disable_all_perout()
1873 * ice_ptp_enable_all_perout - Enable all configured periodic clock outputs
1882 for (unsigned int i = 0; i < pf->ptp.info.n_per_out; i++) in ice_ptp_enable_all_perout()
1883 if (pf->ptp.perout_rqs[i].period.sec || in ice_ptp_enable_all_perout()
1884 pf->ptp.perout_rqs[i].period.nsec) in ice_ptp_enable_all_perout()
1885 ice_ptp_cfg_perout(pf, &pf->ptp.perout_rqs[i], in ice_ptp_enable_all_perout()
1890 * ice_ptp_disable_shared_pin - Disable enabled pin that shares GPIO
1904 gpio_pin = pf->ptp.ice_pin_desc[pin].gpio[1]; in ice_ptp_disable_shared_pin()
1907 gpio_pin = pf->ptp.ice_pin_desc[pin].gpio[0]; in ice_ptp_disable_shared_pin()
1910 return -EOPNOTSUPP; in ice_ptp_disable_shared_pin()
1913 for (unsigned int i = 0; i < pf->ptp.info.n_pins; i++) { in ice_ptp_disable_shared_pin()
1914 struct ptp_pin_desc *pin_desc = &pf->ptp.pin_desc[i]; in ice_ptp_disable_shared_pin()
1915 unsigned int chan = pin_desc->chan; in ice_ptp_disable_shared_pin()
1921 if (pin_desc->func == PTP_PF_PEROUT && in ice_ptp_disable_shared_pin()
1922 pf->ptp.ice_pin_desc[i].gpio[1] == gpio_pin) { in ice_ptp_disable_shared_pin()
1923 pf->ptp.perout_rqs[chan].period.sec = 0; in ice_ptp_disable_shared_pin()
1924 pf->ptp.perout_rqs[chan].period.nsec = 0; in ice_ptp_disable_shared_pin()
1925 pin_desc->func = PTP_PF_NONE; in ice_ptp_disable_shared_pin()
1926 pin_desc->chan = 0; in ice_ptp_disable_shared_pin()
1929 return ice_ptp_cfg_perout(pf, &pf->ptp.perout_rqs[chan], in ice_ptp_disable_shared_pin()
1931 } else if (pf->ptp.pin_desc->func == PTP_PF_EXTTS && in ice_ptp_disable_shared_pin()
1932 pf->ptp.ice_pin_desc[i].gpio[0] == gpio_pin) { in ice_ptp_disable_shared_pin()
1933 pf->ptp.extts_rqs[chan].flags &= ~PTP_ENABLE_FEATURE; in ice_ptp_disable_shared_pin()
1934 pin_desc->func = PTP_PF_NONE; in ice_ptp_disable_shared_pin()
1935 pin_desc->chan = 0; in ice_ptp_disable_shared_pin()
1938 return ice_ptp_cfg_extts(pf, &pf->ptp.extts_rqs[chan], in ice_ptp_disable_shared_pin()
1947 * ice_verify_pin - verify if pin supports requested pin function
1953 * Return: 0 on success, -EOPNOTSUPP when function is not supported.
1961 pin_desc = &pf->ptp.ice_pin_desc[pin]; in ice_verify_pin()
1966 if (pin_desc->gpio[0] < 0) in ice_verify_pin()
1967 return -EOPNOTSUPP; in ice_verify_pin()
1970 if (pin_desc->gpio[1] < 0) in ice_verify_pin()
1971 return -EOPNOTSUPP; in ice_verify_pin()
1977 return -EOPNOTSUPP; in ice_verify_pin()
1983 pf->ptp.pin_desc[pin].func = func; in ice_verify_pin()
1984 pf->ptp.pin_desc[pin].chan = chan; in ice_verify_pin()
1992 * ice_ptp_gpio_enable - Enable/disable ancillary features of PHC
2005 switch (rq->type) { in ice_ptp_gpio_enable()
2009 &pf->ptp.perout_rqs[rq->perout.index]; in ice_ptp_gpio_enable()
2011 err = ice_ptp_cfg_perout(pf, &rq->perout, on); in ice_ptp_gpio_enable()
2013 *cached = rq->perout; in ice_ptp_gpio_enable()
2015 cached->period.sec = 0; in ice_ptp_gpio_enable()
2016 cached->period.nsec = 0; in ice_ptp_gpio_enable()
2023 &pf->ptp.extts_rqs[rq->extts.index]; in ice_ptp_gpio_enable()
2025 err = ice_ptp_cfg_extts(pf, &rq->extts, on); in ice_ptp_gpio_enable()
2027 *cached = rq->extts; in ice_ptp_gpio_enable()
2029 cached->flags &= ~PTP_ENABLE_FEATURE; in ice_ptp_gpio_enable()
2033 return -EOPNOTSUPP; in ice_ptp_gpio_enable()
2038 * ice_ptp_gettimex64 - Get the time of the clock
2044 * Read the device clock and return the correct value on ns, after converting it
2060 * ice_ptp_settime64 - Set the time of the clock
2064 * Set the device clock to the user input value. The conversion from timespec
2072 struct ice_hw *hw = &pf->hw; in ice_ptp_settime64()
2078 if (hw->mac_type == ICE_MAC_GENERIC) { in ice_ptp_settime64()
2085 err = -EBUSY; in ice_ptp_settime64()
2101 /* Recalibrate and re-enable timestamp blocks for E822/E823 */ in ice_ptp_settime64()
2102 if (hw->mac_type == ICE_MAC_GENERIC) in ice_ptp_settime64()
2114 * ice_ptp_adjtime_nonatomic - Do a non-atomic clock adjustment
2133 * ice_ptp_adjtime - Adjust the time of the clock by the indicated delta
2140 struct ice_hw *hw = &pf->hw; in ice_ptp_adjtime()
2141 struct device *dev; in ice_ptp_adjtime()
2146 /* Hardware only supports atomic adjustments using signed 32-bit in ice_ptp_adjtime()
2148 * a non-atomic get->adjust->set flow. in ice_ptp_adjtime()
2151 dev_dbg(dev, "delta = %lld, adjtime non-atomic\n", delta); in ice_ptp_adjtime()
2157 return -EBUSY; in ice_ptp_adjtime()
2181 * struct ice_crosststamp_cfg - Device cross timestamp configuration
2186 * @art_time_l: Lower 32-bits of ART system time
2187 * @art_time_h: Upper 32-bits of ART system time
2188 * @dev_time_l: Lower 32-bits of device time (per timer index)
2189 * @dev_time_h: Upper 32-bits of device time (per timer index)
2236 * struct ice_crosststamp_ctx - Device cross timestamp context
2248 * ice_capture_crosststamp - Capture a device/system cross timestamp
2249 * @device: Current device time
2250 * @system: System counter value read synchronously with device time
2253 * Read device and system (ART) clock simultaneously and return the corrected
2258 static int ice_capture_crosststamp(ktime_t *device, in ice_capture_crosststamp() argument
2270 cfg = ctx->cfg; in ice_capture_crosststamp()
2271 pf = ctx->pf; in ice_capture_crosststamp()
2272 hw = &pf->hw; in ice_capture_crosststamp()
2274 tmr_idx = hw->func_caps.ts_func_info.tmr_index_assoc; in ice_capture_crosststamp()
2276 return -EINVAL; in ice_capture_crosststamp()
2278 /* Poll until we obtain the cross-timestamp hardware semaphore */ in ice_capture_crosststamp()
2279 err = rd32_poll_timeout(hw, cfg->lock_reg, lock, in ice_capture_crosststamp()
2280 !(lock & cfg->lock_busy), in ice_capture_crosststamp()
2284 return -EBUSY; in ice_capture_crosststamp()
2288 ktime_get_snapshot(&ctx->snapshot); in ice_capture_crosststamp()
2293 /* Start the ART and device clock sync sequence */ in ice_capture_crosststamp()
2294 ctl = rd32(hw, cfg->ctl_reg); in ice_capture_crosststamp()
2295 ctl |= cfg->ctl_active; in ice_capture_crosststamp()
2296 wr32(hw, cfg->ctl_reg, ctl); in ice_capture_crosststamp()
2299 err = rd32_poll_timeout(hw, cfg->ctl_reg, ctl, !(ctl & cfg->ctl_active), in ice_capture_crosststamp()
2305 ts_lo = rd32(hw, cfg->art_time_l); in ice_capture_crosststamp()
2306 ts_hi = rd32(hw, cfg->art_time_h); in ice_capture_crosststamp()
2308 system->cycles = ts; in ice_capture_crosststamp()
2309 system->cs_id = CSID_X86_ART; in ice_capture_crosststamp()
2311 /* Read Device source clock time */ in ice_capture_crosststamp()
2312 ts_lo = rd32(hw, cfg->dev_time_l[tmr_idx]); in ice_capture_crosststamp()
2313 ts_hi = rd32(hw, cfg->dev_time_h[tmr_idx]); in ice_capture_crosststamp()
2315 *device = ns_to_ktime(ts); in ice_capture_crosststamp()
2322 lock = rd32(hw, cfg->lock_reg); in ice_capture_crosststamp()
2323 lock &= ~cfg->lock_busy; in ice_capture_crosststamp()
2324 wr32(hw, cfg->lock_reg, lock); in ice_capture_crosststamp()
2330 * ice_ptp_getcrosststamp - Capture a device cross timestamp
2334 * Capture a cross timestamp between the ART and the device PTP hardware
2351 switch (pf->hw.mac_type) { in ice_ptp_getcrosststamp()
2362 return -EOPNOTSUPP; in ice_ptp_getcrosststamp()
2370 * ice_ptp_get_ts_config - ioctl interface to read the timestamping config
2380 if (pf->ptp.state != ICE_PTP_READY) in ice_ptp_get_ts_config()
2381 return -EIO; in ice_ptp_get_ts_config()
2383 config = &pf->ptp.tstamp_config; in ice_ptp_get_ts_config()
2385 return copy_to_user(ifr->ifr_data, config, sizeof(*config)) ? in ice_ptp_get_ts_config()
2386 -EFAULT : 0; in ice_ptp_get_ts_config()
2390 * ice_ptp_set_timestamp_mode - Setup driver for requested timestamp mode
2397 switch (config->tx_type) { in ice_ptp_set_timestamp_mode()
2399 pf->ptp.tstamp_config.tx_type = HWTSTAMP_TX_OFF; in ice_ptp_set_timestamp_mode()
2402 pf->ptp.tstamp_config.tx_type = HWTSTAMP_TX_ON; in ice_ptp_set_timestamp_mode()
2405 return -ERANGE; in ice_ptp_set_timestamp_mode()
2408 switch (config->rx_filter) { in ice_ptp_set_timestamp_mode()
2410 pf->ptp.tstamp_config.rx_filter = HWTSTAMP_FILTER_NONE; in ice_ptp_set_timestamp_mode()
2426 pf->ptp.tstamp_config.rx_filter = HWTSTAMP_FILTER_ALL; in ice_ptp_set_timestamp_mode()
2429 return -ERANGE; in ice_ptp_set_timestamp_mode()
2432 /* Immediately update the device timestamping mode */ in ice_ptp_set_timestamp_mode()
2439 * ice_ptp_set_ts_config - ioctl interface to control the timestamping
2450 if (pf->ptp.state != ICE_PTP_READY) in ice_ptp_set_ts_config()
2451 return -EAGAIN; in ice_ptp_set_ts_config()
2453 if (copy_from_user(&config, ifr->ifr_data, sizeof(config))) in ice_ptp_set_ts_config()
2454 return -EFAULT; in ice_ptp_set_ts_config()
2461 config = pf->ptp.tstamp_config; in ice_ptp_set_ts_config()
2463 return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ? in ice_ptp_set_ts_config()
2464 -EFAULT : 0; in ice_ptp_set_ts_config()
2468 * ice_ptp_get_rx_hwts - Get packet Rx timestamp in ns
2480 if (!(rx_desc->wb.time_stamp_low & ICE_PTP_TS_VALID)) in ice_ptp_get_rx_hwts()
2483 cached_time = READ_ONCE(pkt_ctx->cached_phctime); in ice_ptp_get_rx_hwts()
2489 /* Use ice_ptp_extend_32b_ts directly, using the ring-specific cached in ice_ptp_get_rx_hwts()
2495 ts_high = le32_to_cpu(rx_desc->wb.flex_ts.ts_high); in ice_ptp_get_rx_hwts()
2502 * ice_ptp_setup_pin_cfg - setup PTP pin_config structure
2507 for (unsigned int i = 0; i < pf->ptp.info.n_pins; i++) { in ice_ptp_setup_pin_cfg()
2508 const struct ice_ptp_pin_desc *desc = &pf->ptp.ice_pin_desc[i]; in ice_ptp_setup_pin_cfg()
2509 struct ptp_pin_desc *pin = &pf->ptp.pin_desc[i]; in ice_ptp_setup_pin_cfg()
2513 name = ice_pin_names[desc->name_idx]; in ice_ptp_setup_pin_cfg()
2514 else if (desc->name_idx != GPIO_NA) in ice_ptp_setup_pin_cfg()
2515 name = ice_pin_names_nvm[desc->name_idx]; in ice_ptp_setup_pin_cfg()
2517 strscpy(pin->name, name, sizeof(pin->name)); in ice_ptp_setup_pin_cfg()
2519 pin->index = i; in ice_ptp_setup_pin_cfg()
2522 pf->ptp.info.pin_config = pf->ptp.pin_desc; in ice_ptp_setup_pin_cfg()
2526 * ice_ptp_disable_pins - Disable PTP pins
2534 struct ptp_clock_info *info = &pf->ptp.info; in ice_ptp_disable_pins()
2538 info->enable = NULL; in ice_ptp_disable_pins()
2539 info->verify = NULL; in ice_ptp_disable_pins()
2540 info->n_pins = 0; in ice_ptp_disable_pins()
2541 info->n_ext_ts = 0; in ice_ptp_disable_pins()
2542 info->n_per_out = 0; in ice_ptp_disable_pins()
2546 * ice_ptp_parse_sdp_entries - update ice_ptp_pin_desc structure from NVM
2563 pins[i].name_idx = -1; in ice_ptp_parse_sdp_entries()
2564 pins[i].gpio[0] = -1; in ice_ptp_parse_sdp_entries()
2565 pins[i].gpio[1] = -1; in ice_ptp_parse_sdp_entries()
2596 strscpy(pf->ptp.pin_desc[idx].name, in ice_ptp_parse_sdp_entries()
2598 sizeof(pf->ptp.pin_desc[idx] in ice_ptp_parse_sdp_entries()
2613 pf->ptp.info.n_pins = n_pins; in ice_ptp_parse_sdp_entries()
2618 * ice_ptp_set_funcs_e82x - Set specialized functions for E82X support
2622 * Functions which operate across all device families should be set directly
2628 pf->ptp.info.getcrosststamp = ice_ptp_getcrosststamp; in ice_ptp_set_funcs_e82x()
2630 if (pf->hw.mac_type == ICE_MAC_GENERIC_3K_E825) { in ice_ptp_set_funcs_e82x()
2631 pf->ptp.ice_pin_desc = ice_pin_desc_e825c; in ice_ptp_set_funcs_e82x()
2632 pf->ptp.info.n_pins = ICE_PIN_DESC_ARR_LEN(ice_pin_desc_e825c); in ice_ptp_set_funcs_e82x()
2634 pf->ptp.ice_pin_desc = ice_pin_desc_e82x; in ice_ptp_set_funcs_e82x()
2635 pf->ptp.info.n_pins = ICE_PIN_DESC_ARR_LEN(ice_pin_desc_e82x); in ice_ptp_set_funcs_e82x()
2641 * ice_ptp_set_funcs_e810 - Set specialized functions for E810 support
2645 * Functions which operate across all device families should be set directly
2653 struct ice_ptp *ptp = &pf->ptp; in ice_ptp_set_funcs_e810()
2657 err = ice_ptp_read_sdp_ac(&pf->hw, entries, &num_entries); in ice_ptp_set_funcs_e810()
2661 ptp->ice_pin_desc = ice_pin_desc_e810_sma; in ice_ptp_set_funcs_e810()
2662 ptp->info.n_pins = in ice_ptp_set_funcs_e810()
2665 pf->ptp.ice_pin_desc = ice_pin_desc_e810; in ice_ptp_set_funcs_e810()
2666 pf->ptp.info.n_pins = in ice_ptp_set_funcs_e810()
2681 ptp->ice_pin_desc = (const struct ice_ptp_pin_desc *)desc; in ice_ptp_set_funcs_e810()
2684 ptp->info.pin_config = ptp->pin_desc; in ice_ptp_set_funcs_e810()
2697 * ice_ptp_set_funcs_e830 - Set specialized functions for E830 support
2701 * Functions which operate across all device families should be set directly
2708 if (pcie_ptm_enabled(pf->pdev) && boot_cpu_has(X86_FEATURE_ART)) in ice_ptp_set_funcs_e830()
2709 pf->ptp.info.getcrosststamp = ice_ptp_getcrosststamp; in ice_ptp_set_funcs_e830()
2713 pf->ptp.ice_pin_desc = ice_pin_desc_e810; in ice_ptp_set_funcs_e830()
2714 pf->ptp.info.n_pins = ICE_PIN_DESC_ARR_LEN(ice_pin_desc_e810); in ice_ptp_set_funcs_e830()
2719 * ice_ptp_set_caps - Set PTP capabilities
2724 struct ptp_clock_info *info = &pf->ptp.info; in ice_ptp_set_caps()
2725 struct device *dev = ice_pf_to_dev(pf); in ice_ptp_set_caps()
2727 snprintf(info->name, sizeof(info->name) - 1, "%s-%s-clk", in ice_ptp_set_caps()
2729 info->owner = THIS_MODULE; in ice_ptp_set_caps()
2730 info->max_adj = 100000000; in ice_ptp_set_caps()
2731 info->adjtime = ice_ptp_adjtime; in ice_ptp_set_caps()
2732 info->adjfine = ice_ptp_adjfine; in ice_ptp_set_caps()
2733 info->gettimex64 = ice_ptp_gettimex64; in ice_ptp_set_caps()
2734 info->settime64 = ice_ptp_settime64; in ice_ptp_set_caps()
2735 info->n_per_out = GLTSYN_TGT_H_IDX_MAX; in ice_ptp_set_caps()
2736 info->n_ext_ts = GLTSYN_EVNT_H_IDX_MAX; in ice_ptp_set_caps()
2737 info->enable = ice_ptp_gpio_enable; in ice_ptp_set_caps()
2738 info->verify = ice_verify_pin; in ice_ptp_set_caps()
2740 switch (pf->hw.mac_type) { in ice_ptp_set_caps()
2757 * ice_ptp_create_clock - Create PTP clock device for userspace
2760 * This function creates a new PTP clock device. It only creates one if we
2762 * if we already have a device. Should be used by ice_ptp_init to create clock
2768 struct device *dev; in ice_ptp_create_clock()
2770 /* No need to create a clock device if we already have one */ in ice_ptp_create_clock()
2771 if (pf->ptp.clock) in ice_ptp_create_clock()
2776 info = &pf->ptp.info; in ice_ptp_create_clock()
2780 pf->ptp.clock = ptp_clock_register(info, dev); in ice_ptp_create_clock()
2781 if (IS_ERR(pf->ptp.clock)) { in ice_ptp_create_clock()
2782 dev_err(ice_pf_to_dev(pf), "Failed to register PTP clock device"); in ice_ptp_create_clock()
2783 return PTR_ERR(pf->ptp.clock); in ice_ptp_create_clock()
2790 * ice_ptp_request_ts - Request an available Tx timestamp index
2791 * @tx: the PTP Tx timestamp tracker to request from
2794 s8 ice_ptp_request_ts(struct ice_ptp_tx *tx, struct sk_buff *skb) in ice_ptp_request_ts() argument
2799 spin_lock_irqsave(&tx->lock, flags); in ice_ptp_request_ts()
2802 if (!ice_ptp_is_tx_tracker_up(tx)) { in ice_ptp_request_ts()
2803 spin_unlock_irqrestore(&tx->lock, flags); in ice_ptp_request_ts()
2804 return -1; in ice_ptp_request_ts()
2808 idx = find_next_zero_bit(tx->in_use, tx->len, in ice_ptp_request_ts()
2809 tx->last_ll_ts_idx_read + 1); in ice_ptp_request_ts()
2810 if (idx == tx->len) in ice_ptp_request_ts()
2811 idx = find_first_zero_bit(tx->in_use, tx->len); in ice_ptp_request_ts()
2813 if (idx < tx->len) { in ice_ptp_request_ts()
2818 set_bit(idx, tx->in_use); in ice_ptp_request_ts()
2819 clear_bit(idx, tx->stale); in ice_ptp_request_ts()
2820 tx->tstamps[idx].start = jiffies; in ice_ptp_request_ts()
2821 tx->tstamps[idx].skb = skb_get(skb); in ice_ptp_request_ts()
2822 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; in ice_ptp_request_ts()
2826 spin_unlock_irqrestore(&tx->lock, flags); in ice_ptp_request_ts()
2828 /* return the appropriate PHY timestamp register index, -1 if no in ice_ptp_request_ts()
2831 if (idx >= tx->len) in ice_ptp_request_ts()
2832 return -1; in ice_ptp_request_ts()
2834 return idx + tx->offset; in ice_ptp_request_ts()
2838 * ice_ptp_process_ts - Process the PTP Tx timestamps
2841 * Returns: ICE_TX_TSTAMP_WORK_PENDING if there are any outstanding Tx
2846 switch (pf->ptp.tx_interrupt_mode) { in ice_ptp_process_ts()
2848 /* This device has the clock owner handle timestamps for it */ in ice_ptp_process_ts()
2851 /* This device handles its own timestamps */ in ice_ptp_process_ts()
2852 return ice_ptp_tx_tstamp(&pf->ptp.port.tx); in ice_ptp_process_ts()
2854 /* This device handles timestamps for all ports */ in ice_ptp_process_ts()
2857 WARN_ONCE(1, "Unexpected Tx timestamp interrupt mode %u\n", in ice_ptp_process_ts()
2858 pf->ptp.tx_interrupt_mode); in ice_ptp_process_ts()
2864 * ice_ptp_ts_irq - Process the PTP Tx timestamps in IRQ context
2867 * Return: IRQ_WAKE_THREAD if Tx timestamp read has to be handled in the bottom
2872 struct ice_hw *hw = &pf->hw; in ice_ptp_ts_irq()
2874 switch (hw->mac_type) { in ice_ptp_ts_irq()
2880 if (hw->dev_caps.ts_dev_info.ts_ll_int_read) { in ice_ptp_ts_irq()
2881 struct ice_ptp_tx *tx = &pf->ptp.port.tx; in ice_ptp_ts_irq() local
2887 spin_lock(&tx->lock); in ice_ptp_ts_irq()
2888 idx = find_next_bit_wrap(tx->in_use, tx->len, in ice_ptp_ts_irq()
2889 tx->last_ll_ts_idx_read + 1); in ice_ptp_ts_irq()
2890 if (idx != tx->len) in ice_ptp_ts_irq()
2891 ice_ptp_req_tx_single_tstamp(tx, idx); in ice_ptp_ts_irq()
2892 spin_unlock(&tx->lock); in ice_ptp_ts_irq()
2896 fallthrough; /* non-LL_TS E810 */ in ice_ptp_ts_irq()
2905 set_bit(ICE_MISC_THREAD_TX_TSTAMP, pf->misc_thread); in ice_ptp_ts_irq()
2910 /* Process outstanding Tx timestamps. If there in ice_ptp_ts_irq()
2911 * is more work, re-arm the interrupt to trigger again. in ice_ptp_ts_irq()
2923 * ice_ptp_maybe_trigger_tx_interrupt - Trigger Tx timstamp interrupt
2926 * The device PHY issues Tx timestamp interrupts to the driver for processing
2937 struct device *dev = ice_pf_to_dev(pf); in ice_ptp_maybe_trigger_tx_interrupt()
2938 struct ice_hw *hw = &pf->hw; in ice_ptp_maybe_trigger_tx_interrupt()
2942 if (!pf->ptp.port.tx.has_ready_bitmap) in ice_ptp_maybe_trigger_tx_interrupt()
2948 for (i = 0; i < ICE_GET_QUAD_NUM(hw->ptp.num_lports); i++) { in ice_ptp_maybe_trigger_tx_interrupt()
2952 err = ice_get_phy_tx_tstamp_ready(&pf->hw, i, &tstamp_ready); in ice_ptp_maybe_trigger_tx_interrupt()
2963 …dev_dbg(dev, "PTP periodic task detected waiting timestamps. Triggering Tx timestamp interrupt now… in ice_ptp_maybe_trigger_tx_interrupt()
2976 if (pf->ptp.state != ICE_PTP_READY) in ice_ptp_periodic_work()
2984 kthread_queue_delayed_work(ptp->kworker, &ptp->work, in ice_ptp_periodic_work()
2989 * ice_ptp_prepare_for_reset - Prepare PTP for reset
2995 struct ice_ptp *ptp = &pf->ptp; in ice_ptp_prepare_for_reset()
2998 if (ptp->state != ICE_PTP_READY) in ice_ptp_prepare_for_reset()
3001 ptp->state = ICE_PTP_RESETTING; in ice_ptp_prepare_for_reset()
3003 /* Disable timestamping for both Tx and Rx */ in ice_ptp_prepare_for_reset()
3006 kthread_cancel_delayed_work_sync(&ptp->work); in ice_ptp_prepare_for_reset()
3011 ice_ptp_release_tx_tracker(pf, &pf->ptp.port.tx); in ice_ptp_prepare_for_reset()
3016 src_tmr = ice_get_ptp_src_clock_index(&pf->hw); in ice_ptp_prepare_for_reset()
3019 wr32(&pf->hw, GLTSYN_ENA(src_tmr), (u32)~GLTSYN_ENA_TSYN_ENA_M); in ice_ptp_prepare_for_reset()
3022 ptp->reset_time = ktime_get_real_ns(); in ice_ptp_prepare_for_reset()
3026 * ice_ptp_rebuild_owner - Initialize PTP clock owner after reset
3034 struct ice_ptp *ptp = &pf->ptp; in ice_ptp_rebuild_owner()
3035 struct ice_hw *hw = &pf->hw; in ice_ptp_rebuild_owner()
3046 err = -EBUSY; in ice_ptp_rebuild_owner()
3059 if (ptp->cached_phc_time) { in ice_ptp_rebuild_owner()
3060 time_diff = ktime_get_real_ns() - ptp->reset_time; in ice_ptp_rebuild_owner()
3061 ts = ns_to_timespec64(ptp->cached_phc_time + time_diff); in ice_ptp_rebuild_owner()
3084 /* Re-enable all periodic outputs and external timestamp events */ in ice_ptp_rebuild_owner()
3096 * ice_ptp_rebuild - Initialize PTP hardware clock support after reset
3102 struct ice_ptp *ptp = &pf->ptp; in ice_ptp_rebuild()
3105 if (ptp->state == ICE_PTP_READY) { in ice_ptp_rebuild()
3107 } else if (ptp->state != ICE_PTP_RESETTING) { in ice_ptp_rebuild()
3108 err = -EINVAL; in ice_ptp_rebuild()
3119 ptp->state = ICE_PTP_READY; in ice_ptp_rebuild()
3122 kthread_queue_delayed_work(ptp->kworker, &ptp->work, 0); in ice_ptp_rebuild()
3128 ptp->state = ICE_PTP_ERROR; in ice_ptp_rebuild()
3134 return hw->mac_type == ICE_MAC_GENERIC_3K_E825 && ice_is_dual(hw) ? in ice_is_primary()
3135 !!(hw->dev_caps.nac_topo.mode & ICE_NAC_TOPO_PRIMARY_M) : in ice_is_primary()
3141 if (!ice_pf_src_tmr_owned(pf) || !ice_is_primary(&pf->hw)) in ice_ptp_setup_adapter()
3142 return -EPERM; in ice_ptp_setup_adapter()
3144 pf->adapter->ctrl_pf = pf; in ice_ptp_setup_adapter()
3152 struct ice_ptp *ptp = &pf->ptp; in ice_ptp_setup_pf()
3154 if (WARN_ON(!ctrl_ptp) || pf->hw.mac_type == ICE_MAC_UNKNOWN) in ice_ptp_setup_pf()
3155 return -ENODEV; in ice_ptp_setup_pf()
3157 INIT_LIST_HEAD(&ptp->port.list_node); in ice_ptp_setup_pf()
3158 mutex_lock(&pf->adapter->ports.lock); in ice_ptp_setup_pf()
3160 list_add(&ptp->port.list_node, in ice_ptp_setup_pf()
3161 &pf->adapter->ports.ports); in ice_ptp_setup_pf()
3162 mutex_unlock(&pf->adapter->ports.lock); in ice_ptp_setup_pf()
3169 struct ice_ptp *ptp = &pf->ptp; in ice_ptp_cleanup_pf()
3171 if (pf->hw.mac_type != ICE_MAC_UNKNOWN) { in ice_ptp_cleanup_pf()
3172 mutex_lock(&pf->adapter->ports.lock); in ice_ptp_cleanup_pf()
3173 list_del(&ptp->port.list_node); in ice_ptp_cleanup_pf()
3174 mutex_unlock(&pf->adapter->ports.lock); in ice_ptp_cleanup_pf()
3179 * ice_ptp_clock_index - Get the PTP clock index for this device
3182 * Returns: the PTP clock index associated with this PF, or -1 if no PTP clock
3191 return -1; in ice_ptp_clock_index()
3192 clock = ctrl_ptp->clock; in ice_ptp_clock_index()
3194 return clock ? ptp_clock_index(clock) : -1; in ice_ptp_clock_index()
3198 * ice_ptp_init_owner - Initialize PTP_1588_CLOCK device
3201 * Setup and initialize a PTP clock device that represents the device hardware
3207 struct ice_hw *hw = &pf->hw; in ice_ptp_init_owner()
3220 err = -EBUSY; in ice_ptp_init_owner()
3243 /* Ensure we have a clock device */ in ice_ptp_init_owner()
3250 pf->ptp.clock = NULL; in ice_ptp_init_owner()
3260 * ice_ptp_init_work - Initialize PTP work threads
3269 kthread_init_delayed_work(&ptp->work, ice_ptp_periodic_work); in ice_ptp_init_work()
3274 kworker = kthread_run_worker(0, "ice-ptp-%s", in ice_ptp_init_work()
3279 ptp->kworker = kworker; in ice_ptp_init_work()
3282 kthread_queue_delayed_work(ptp->kworker, &ptp->work, 0); in ice_ptp_init_work()
3288 * ice_ptp_init_port - Initialize PTP port structure
3292 * Return: 0 on success, -ENODEV on invalid MAC type, -ENOMEM on failed alloc.
3296 struct ice_hw *hw = &pf->hw; in ice_ptp_init_port()
3298 mutex_init(&ptp_port->ps_lock); in ice_ptp_init_port()
3300 switch (hw->mac_type) { in ice_ptp_init_port()
3304 return ice_ptp_init_tx(pf, &ptp_port->tx, ptp_port->port_num); in ice_ptp_init_port()
3306 kthread_init_delayed_work(&ptp_port->ov_work, in ice_ptp_init_port()
3308 return ice_ptp_init_tx_e82x(pf, &ptp_port->tx, in ice_ptp_init_port()
3309 ptp_port->port_num); in ice_ptp_init_port()
3311 return -ENODEV; in ice_ptp_init_port()
3316 * ice_ptp_init_tx_interrupt_mode - Initialize device Tx interrupt mode
3319 * Initialize the Tx timestamp interrupt mode for this device. For most device
3321 * E822-based devices, only the clock owner processes the timestamps. Other
3326 switch (pf->hw.mac_type) { in ice_ptp_init_tx_interrupt_mode()
3332 pf->ptp.tx_interrupt_mode = ICE_PTP_TX_INTERRUPT_ALL; in ice_ptp_init_tx_interrupt_mode()
3334 pf->ptp.tx_interrupt_mode = ICE_PTP_TX_INTERRUPT_NONE; in ice_ptp_init_tx_interrupt_mode()
3337 /* other PHY types handle their own Tx interrupt */ in ice_ptp_init_tx_interrupt_mode()
3338 pf->ptp.tx_interrupt_mode = ICE_PTP_TX_INTERRUPT_SELF; in ice_ptp_init_tx_interrupt_mode()
3343 * ice_ptp_init - Initialize PTP hardware clock support
3346 * Set up the device for interacting with the PTP hardware clock for all
3352 * items used for asynchronous work such as Tx timestamps and periodic work.
3356 struct ice_ptp *ptp = &pf->ptp; in ice_ptp_init()
3357 struct ice_hw *hw = &pf->hw; in ice_ptp_init()
3360 ptp->state = ICE_PTP_INITIALIZING; in ice_ptp_init()
3368 ptp->port.port_num = (u8)lane_num; in ice_ptp_init()
3374 * configure the PTP clock device to represent it. in ice_ptp_init()
3389 err = ice_ptp_init_port(pf, &ptp->port); in ice_ptp_init()
3396 /* Configure initial Tx interrupt settings */ in ice_ptp_init()
3399 ptp->state = ICE_PTP_READY; in ice_ptp_init()
3410 if (pf->ptp.clock) { in ice_ptp_init()
3411 ptp_clock_unregister(ptp->clock); in ice_ptp_init()
3412 pf->ptp.clock = NULL; in ice_ptp_init()
3414 ptp->state = ICE_PTP_ERROR; in ice_ptp_init()
3419 * ice_ptp_release - Disable the driver/HW support and unregister the clock
3427 if (pf->ptp.state != ICE_PTP_READY) in ice_ptp_release()
3430 pf->ptp.state = ICE_PTP_UNINIT; in ice_ptp_release()
3432 /* Disable timestamping for both Tx and Rx */ in ice_ptp_release()
3437 ice_ptp_release_tx_tracker(pf, &pf->ptp.port.tx); in ice_ptp_release()
3441 kthread_cancel_delayed_work_sync(&pf->ptp.work); in ice_ptp_release()
3443 ice_ptp_port_phy_stop(&pf->ptp.port); in ice_ptp_release()
3444 mutex_destroy(&pf->ptp.port.ps_lock); in ice_ptp_release()
3445 if (pf->ptp.kworker) { in ice_ptp_release()
3446 kthread_destroy_worker(pf->ptp.kworker); in ice_ptp_release()
3447 pf->ptp.kworker = NULL; in ice_ptp_release()
3450 if (!pf->ptp.clock) in ice_ptp_release()
3456 ptp_clock_unregister(pf->ptp.clock); in ice_ptp_release()
3457 pf->ptp.clock = NULL; in ice_ptp_release()