Lines Matching +full:ram +full:- +full:code
1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2018 Intel Corporation. */
10 * i40e_init_nvm - Initialize NVM function pointers
17 * We are accessing FLASH always thru the Shadow RAM.
21 struct i40e_nvm_info *nvm = &hw->nvm; in i40e_init_nvm()
32 nvm->sr_size = BIT(sr_size) * I40E_SR_WORDS_IN_1KB; in i40e_init_nvm()
38 nvm->timeout = I40E_MAX_NVM_TIMEOUT; in i40e_init_nvm()
39 nvm->blank_nvm_mode = false; in i40e_init_nvm()
41 nvm->blank_nvm_mode = true; in i40e_init_nvm()
42 ret_code = -EIO; in i40e_init_nvm()
50 * i40e_acquire_nvm - Generic request for acquiring the NVM ownership
64 if (hw->nvm.blank_nvm_mode) in i40e_acquire_nvm()
73 hw->nvm.hw_semaphore_timeout = I40E_MS_TO_GTIME(time_left) + gtime; in i40e_acquire_nvm()
78 access, time_left, ret_code, hw->aq.asq_last_status); in i40e_acquire_nvm()
91 hw->nvm.hw_semaphore_timeout = in i40e_acquire_nvm()
97 hw->nvm.hw_semaphore_timeout = 0; in i40e_acquire_nvm()
100 time_left, ret_code, hw->aq.asq_last_status); in i40e_acquire_nvm()
109 * i40e_release_nvm - Generic request for releasing the NVM ownership
119 if (hw->nvm.blank_nvm_mode) in i40e_release_nvm()
127 while ((ret_code == -EIO) && in i40e_release_nvm()
128 (total_delay < hw->aq.asq_cmd_timeout)) { in i40e_release_nvm()
138 * i40e_poll_sr_srctl_done_bit - Polls the GLNVM_SRCTL done bit
141 * Polls the SRCTL Shadow RAM register done bit.
145 int ret_code = -EIO; in i40e_poll_sr_srctl_done_bit()
157 if (ret_code == -EIO) in i40e_poll_sr_srctl_done_bit()
163 * i40e_read_nvm_word_srctl - Reads Shadow RAM via SRCTL register
165 * @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF)
166 * @data: word read from the Shadow RAM
168 * Reads one 16 bit word from the Shadow RAM using the GLNVM_SRCTL register.
173 int ret_code = -EIO; in i40e_read_nvm_word_srctl()
176 if (offset >= hw->nvm.sr_size) { in i40e_read_nvm_word_srctl()
178 "NVM read error: offset %d beyond Shadow RAM limit %d\n", in i40e_read_nvm_word_srctl()
179 offset, hw->nvm.sr_size); in i40e_read_nvm_word_srctl()
180 ret_code = -EINVAL; in i40e_read_nvm_word_srctl()
202 "NVM read error: Couldn't access Shadow RAM address: 0x%x\n", in i40e_read_nvm_word_srctl()
210 * i40e_read_nvm_aq - Read Shadow RAM.
215 * @data: buffer with words to read to the Shadow RAM
218 * Reads a 16 bit words buffer to the Shadow RAM using the admin command.
226 int ret_code = -EIO; in i40e_read_nvm_aq()
229 cmd_details.wb_desc = &hw->nvm_wb_desc; in i40e_read_nvm_aq()
232 * We cannot do it for the module-based model, as we did not acquire in i40e_read_nvm_aq()
234 * Firmware will check the module-based model. in i40e_read_nvm_aq()
236 if ((offset + words) > hw->nvm.sr_size) in i40e_read_nvm_aq()
238 "NVM read error: offset %d beyond Shadow RAM limit %d\n", in i40e_read_nvm_aq()
239 (offset + words), hw->nvm.sr_size); in i40e_read_nvm_aq()
245 else if (((offset + (words - 1)) / I40E_SR_SECTOR_SIZE_IN_WORDS) in i40e_read_nvm_aq()
261 * i40e_read_nvm_word_aq - Reads Shadow RAM via AQ
263 * @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF)
264 * @data: word read from the Shadow RAM
266 * Reads one 16 bit word from the Shadow RAM using the AdminQ
271 int ret_code = -EIO; in i40e_read_nvm_word_aq()
280 * __i40e_read_nvm_word - Reads nvm word, assumes caller does the locking
282 * @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF)
283 * @data: word read from the Shadow RAM
285 * Reads one 16 bit word from the Shadow RAM.
293 if (test_bit(I40E_HW_CAP_AQ_SRCTL_ACCESS_ENABLE, hw->caps)) in __i40e_read_nvm_word()
300 * i40e_read_nvm_word - Reads nvm word and acquire lock if necessary
302 * @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF)
303 * @data: word read from the Shadow RAM
305 * Reads one 16 bit word from the Shadow RAM.
312 if (test_bit(I40E_HW_CAP_NVM_READ_REQUIRES_LOCK, hw->caps)) in i40e_read_nvm_word()
319 if (test_bit(I40E_HW_CAP_NVM_READ_REQUIRES_LOCK, hw->caps)) in i40e_read_nvm_word()
326 * i40e_read_nvm_module_data - Reads NVM Buffer to specified memory location
350 "Reading nvm word failed.Error code: %d.\n", in i40e_read_nvm_module_data()
352 return -EIO; in i40e_read_nvm_module_data()
362 return -EINVAL; in i40e_read_nvm_module_data()
367 /* Pointer points outside of the Shared RAM mapped area */ in i40e_read_nvm_module_data()
369 "Reading nvm data failed. Pointer points outside of the Shared RAM mapped area.\n"); in i40e_read_nvm_module_data()
371 return -EINVAL; in i40e_read_nvm_module_data()
373 /* Read from the Shadow RAM */ in i40e_read_nvm_module_data()
379 "Reading nvm word failed.Error code: %d.\n", in i40e_read_nvm_module_data()
381 return -EIO; in i40e_read_nvm_module_data()
391 "Reading nvm buffer failed.Error code: %d.\n", in i40e_read_nvm_module_data()
400 * i40e_read_nvm_buffer_srctl - Reads Shadow RAM buffer via SRCTL register
402 * @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF).
404 * @data: words read from the Shadow RAM
424 /* Update the number of words read from the Shadow RAM */ in i40e_read_nvm_buffer_srctl()
431 * i40e_read_nvm_buffer_aq - Reads Shadow RAM buffer via AQ
433 * @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF).
435 * @data: words read from the Shadow RAM
457 (u16)(I40E_SR_SECTOR_SIZE_IN_WORDS - in i40e_read_nvm_buffer_aq()
460 read_size = min((*words - words_read), in i40e_read_nvm_buffer_aq()
488 * __i40e_read_nvm_buffer - Reads nvm buffer, caller must acquire lock
490 * @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF).
492 * @data: words read from the Shadow RAM
501 if (test_bit(I40E_HW_CAP_AQ_SRCTL_ACCESS_ENABLE, hw->caps)) in __i40e_read_nvm_buffer()
508 * i40e_read_nvm_buffer - Reads Shadow RAM buffer and acquire lock if necessary
510 * @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF).
512 * @data: words read from the Shadow RAM
523 if (test_bit(I40E_HW_CAP_AQ_SRCTL_ACCESS_ENABLE, hw->caps)) { in i40e_read_nvm_buffer()
538 * i40e_write_nvm_aq - Writes Shadow RAM.
543 * @data: buffer with words to write to the Shadow RAM
546 * Writes a 16 bit words buffer to the Shadow RAM using the admin command.
553 int ret_code = -EIO; in i40e_write_nvm_aq()
556 cmd_details.wb_desc = &hw->nvm_wb_desc; in i40e_write_nvm_aq()
559 * We cannot do it for the module-based model, as we did not acquire in i40e_write_nvm_aq()
561 * Firmware will check the module-based model. in i40e_write_nvm_aq()
563 if ((offset + words) > hw->nvm.sr_size) in i40e_write_nvm_aq()
565 "NVM write error: offset %d beyond Shadow RAM limit %d\n", in i40e_write_nvm_aq()
566 (offset + words), hw->nvm.sr_size); in i40e_write_nvm_aq()
572 else if (((offset + (words - 1)) / I40E_SR_SECTOR_SIZE_IN_WORDS) in i40e_write_nvm_aq()
589 * i40e_calc_nvm_checksum - Calculates and returns the checksum
593 * This function calculates SW Checksum that covers the whole 64kB shadow RAM
594 * except the VPD and PCIe ALT Auto-load modules. The structure and size of VPD
618 ret_code = -EIO; in i40e_calc_nvm_checksum()
622 /* read pointer to PCIe Alt Auto-load module */ in i40e_calc_nvm_checksum()
626 ret_code = -EIO; in i40e_calc_nvm_checksum()
630 /* Calculate SW checksum that covers the whole 64kB shadow RAM in i40e_calc_nvm_checksum()
631 * except the VPD and PCIe ALT Auto-load modules in i40e_calc_nvm_checksum()
633 for (i = 0; i < hw->nvm.sr_size; i++) { in i40e_calc_nvm_checksum()
640 ret_code = -EIO; in i40e_calc_nvm_checksum()
664 *checksum = (u16)I40E_SR_SW_CHECKSUM_BASE - checksum_local; in i40e_calc_nvm_checksum()
672 * i40e_update_nvm_checksum - Updates the NVM checksum
696 * i40e_validate_nvm_checksum - Validate EEPROM checksum
728 ret_code = -EIO; in i40e_validate_nvm_checksum()
772 * i40e_nvmupd_validate_command - Validate given command
775 * @perrno: pointer to return error code
789 transaction = i40e_nvmupd_get_transaction(cmd->config); in i40e_nvmupd_validate_command()
790 module = i40e_nvmupd_get_module(cmd->config); in i40e_nvmupd_validate_command()
793 if (cmd->data_size < 1 || cmd->data_size > I40E_NVMUPD_MAX_DATA) { in i40e_nvmupd_validate_command()
795 "%s data_size %d\n", __func__, cmd->data_size); in i40e_nvmupd_validate_command()
796 *perrno = -EFAULT; in i40e_nvmupd_validate_command()
800 switch (cmd->command) { in i40e_nvmupd_validate_command()
865 * i40e_nvmupd_nvm_erase - Erase an NVM module
868 * @perrno: pointer to return error code
881 transaction = i40e_nvmupd_get_transaction(cmd->config); in i40e_nvmupd_nvm_erase()
882 module = i40e_nvmupd_get_module(cmd->config); in i40e_nvmupd_nvm_erase()
886 cmd_details.wb_desc = &hw->nvm_wb_desc; in i40e_nvmupd_nvm_erase()
888 status = i40e_aq_erase_nvm(hw, module, cmd->offset, (u16)cmd->data_size, in i40e_nvmupd_nvm_erase()
893 __func__, module, cmd->offset, cmd->data_size); in i40e_nvmupd_nvm_erase()
896 __func__, status, hw->aq.asq_last_status); in i40e_nvmupd_nvm_erase()
897 *perrno = i40e_aq_rc_to_posix(status, hw->aq.asq_last_status); in i40e_nvmupd_nvm_erase()
904 * i40e_nvmupd_nvm_write - Write NVM
908 * @perrno: pointer to return error code
922 transaction = i40e_nvmupd_get_transaction(cmd->config); in i40e_nvmupd_nvm_write()
923 module = i40e_nvmupd_get_module(cmd->config); in i40e_nvmupd_nvm_write()
925 preservation_flags = i40e_nvmupd_get_preservation_flags(cmd->config); in i40e_nvmupd_nvm_write()
928 cmd_details.wb_desc = &hw->nvm_wb_desc; in i40e_nvmupd_nvm_write()
930 status = i40e_aq_update_nvm(hw, module, cmd->offset, in i40e_nvmupd_nvm_write()
931 (u16)cmd->data_size, bytes, last, in i40e_nvmupd_nvm_write()
936 __func__, module, cmd->offset, cmd->data_size); in i40e_nvmupd_nvm_write()
939 __func__, status, hw->aq.asq_last_status); in i40e_nvmupd_nvm_write()
940 *perrno = i40e_aq_rc_to_posix(status, hw->aq.asq_last_status); in i40e_nvmupd_nvm_write()
947 * i40e_nvmupd_nvm_read - Read NVM
951 * @perrno: pointer to return error code
964 transaction = i40e_nvmupd_get_transaction(cmd->config); in i40e_nvmupd_nvm_read()
965 module = i40e_nvmupd_get_module(cmd->config); in i40e_nvmupd_nvm_read()
969 cmd_details.wb_desc = &hw->nvm_wb_desc; in i40e_nvmupd_nvm_read()
971 status = i40e_aq_read_nvm(hw, module, cmd->offset, (u16)cmd->data_size, in i40e_nvmupd_nvm_read()
976 __func__, module, cmd->offset, cmd->data_size); in i40e_nvmupd_nvm_read()
979 __func__, status, hw->aq.asq_last_status); in i40e_nvmupd_nvm_read()
980 *perrno = i40e_aq_rc_to_posix(status, hw->aq.asq_last_status); in i40e_nvmupd_nvm_read()
987 * i40e_nvmupd_exec_aq - Run an AQ command
991 * @perrno: pointer to return error code
1008 if (cmd->offset == 0xffff) in i40e_nvmupd_exec_aq()
1012 cmd_details.wb_desc = &hw->nvm_wb_desc; in i40e_nvmupd_exec_aq()
1015 memset(&hw->nvm_wb_desc, 0, aq_desc_len); in i40e_nvmupd_exec_aq()
1018 if (cmd->data_size < aq_desc_len) { in i40e_nvmupd_exec_aq()
1021 cmd->data_size, aq_desc_len); in i40e_nvmupd_exec_aq()
1022 *perrno = -EINVAL; in i40e_nvmupd_exec_aq()
1023 return -EINVAL; in i40e_nvmupd_exec_aq()
1028 aq_data_len = cmd->data_size - aq_desc_len; in i40e_nvmupd_exec_aq()
1029 buff_size = max_t(u32, aq_data_len, le16_to_cpu(aq_desc->datalen)); in i40e_nvmupd_exec_aq()
1031 if (!hw->nvm_buff.va) { in i40e_nvmupd_exec_aq()
1032 status = i40e_allocate_virt_mem(hw, &hw->nvm_buff, in i40e_nvmupd_exec_aq()
1033 hw->aq.asq_buf_size); in i40e_nvmupd_exec_aq()
1040 if (hw->nvm_buff.va) { in i40e_nvmupd_exec_aq()
1041 buff = hw->nvm_buff.va; in i40e_nvmupd_exec_aq()
1046 if (cmd->offset) in i40e_nvmupd_exec_aq()
1047 memset(&hw->nvm_aq_event_desc, 0, aq_desc_len); in i40e_nvmupd_exec_aq()
1056 i40e_aq_str(hw, hw->aq.asq_last_status)); in i40e_nvmupd_exec_aq()
1057 *perrno = i40e_aq_rc_to_posix(status, hw->aq.asq_last_status); in i40e_nvmupd_exec_aq()
1062 if (cmd->offset) { in i40e_nvmupd_exec_aq()
1063 hw->nvm_wait_opcode = cmd->offset; in i40e_nvmupd_exec_aq()
1064 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT; in i40e_nvmupd_exec_aq()
1071 * i40e_nvmupd_get_aq_result - Get the results from the previous exec_aq
1075 * @perrno: pointer to return error code
1091 aq_total_len = aq_desc_len + le16_to_cpu(hw->nvm_wb_desc.datalen); in i40e_nvmupd_get_aq_result()
1094 if (cmd->offset > aq_total_len) { in i40e_nvmupd_get_aq_result()
1096 __func__, cmd->offset, aq_total_len); in i40e_nvmupd_get_aq_result()
1097 *perrno = -EINVAL; in i40e_nvmupd_get_aq_result()
1098 return -EINVAL; in i40e_nvmupd_get_aq_result()
1102 if (cmd->data_size > (aq_total_len - cmd->offset)) { in i40e_nvmupd_get_aq_result()
1103 int new_len = aq_total_len - cmd->offset; in i40e_nvmupd_get_aq_result()
1106 __func__, cmd->data_size, new_len); in i40e_nvmupd_get_aq_result()
1107 cmd->data_size = new_len; in i40e_nvmupd_get_aq_result()
1110 remainder = cmd->data_size; in i40e_nvmupd_get_aq_result()
1111 if (cmd->offset < aq_desc_len) { in i40e_nvmupd_get_aq_result()
1112 u32 len = aq_desc_len - cmd->offset; in i40e_nvmupd_get_aq_result()
1114 len = min(len, cmd->data_size); in i40e_nvmupd_get_aq_result()
1116 __func__, cmd->offset, cmd->offset + len); in i40e_nvmupd_get_aq_result()
1118 buff = ((u8 *)&hw->nvm_wb_desc) + cmd->offset; in i40e_nvmupd_get_aq_result()
1122 remainder -= len; in i40e_nvmupd_get_aq_result()
1123 buff = hw->nvm_buff.va; in i40e_nvmupd_get_aq_result()
1125 buff = hw->nvm_buff.va + (cmd->offset - aq_desc_len); in i40e_nvmupd_get_aq_result()
1129 int start_byte = buff - (u8 *)hw->nvm_buff.va; in i40e_nvmupd_get_aq_result()
1140 * i40e_nvmupd_get_aq_event - Get the Admin Queue event from previous exec_aq
1144 * @perrno: pointer to return error code
1158 aq_total_len = aq_desc_len + le16_to_cpu(hw->nvm_aq_event_desc.datalen); in i40e_nvmupd_get_aq_event()
1161 if (cmd->data_size > aq_total_len) { in i40e_nvmupd_get_aq_event()
1164 __func__, cmd->data_size, aq_total_len); in i40e_nvmupd_get_aq_event()
1165 cmd->data_size = aq_total_len; in i40e_nvmupd_get_aq_event()
1168 memcpy(bytes, &hw->nvm_aq_event_desc, cmd->data_size); in i40e_nvmupd_get_aq_event()
1174 * i40e_nvmupd_state_init - Handle NVM update state Init
1178 * @perrno: pointer to return error code
1197 hw->aq.asq_last_status); in i40e_nvmupd_state_init()
1208 hw->aq.asq_last_status); in i40e_nvmupd_state_init()
1214 hw->nvmupd_state = I40E_NVMUPD_STATE_READING; in i40e_nvmupd_state_init()
1222 hw->aq.asq_last_status); in i40e_nvmupd_state_init()
1228 hw->nvm_release_on_done = true; in i40e_nvmupd_state_init()
1229 hw->nvm_wait_opcode = i40e_aqc_opc_nvm_erase; in i40e_nvmupd_state_init()
1230 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT; in i40e_nvmupd_state_init()
1239 hw->aq.asq_last_status); in i40e_nvmupd_state_init()
1245 hw->nvm_release_on_done = true; in i40e_nvmupd_state_init()
1246 hw->nvm_wait_opcode = i40e_aqc_opc_nvm_update; in i40e_nvmupd_state_init()
1247 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT; in i40e_nvmupd_state_init()
1256 hw->aq.asq_last_status); in i40e_nvmupd_state_init()
1262 hw->nvm_wait_opcode = i40e_aqc_opc_nvm_update; in i40e_nvmupd_state_init()
1263 hw->nvmupd_state = I40E_NVMUPD_STATE_WRITE_WAIT; in i40e_nvmupd_state_init()
1272 hw->aq.asq_last_status); in i40e_nvmupd_state_init()
1276 *perrno = hw->aq.asq_last_status ? in i40e_nvmupd_state_init()
1278 hw->aq.asq_last_status) : in i40e_nvmupd_state_init()
1279 -EIO; in i40e_nvmupd_state_init()
1282 hw->nvm_release_on_done = true; in i40e_nvmupd_state_init()
1283 hw->nvm_wait_opcode = i40e_aqc_opc_nvm_update; in i40e_nvmupd_state_init()
1284 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT; in i40e_nvmupd_state_init()
1305 status = -EIO; in i40e_nvmupd_state_init()
1306 *perrno = -ESRCH; in i40e_nvmupd_state_init()
1313 * i40e_nvmupd_state_reading - Handle NVM update state Reading
1317 * @perrno: pointer to return error code
1340 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT; in i40e_nvmupd_state_reading()
1347 status = -EOPNOTSUPP; in i40e_nvmupd_state_reading()
1348 *perrno = -ESRCH; in i40e_nvmupd_state_reading()
1355 * i40e_nvmupd_state_writing - Handle NVM update state Writing
1359 * @perrno: pointer to return error code
1379 hw->nvm_wait_opcode = i40e_aqc_opc_nvm_update; in i40e_nvmupd_state_writing()
1380 hw->nvmupd_state = I40E_NVMUPD_STATE_WRITE_WAIT; in i40e_nvmupd_state_writing()
1387 *perrno = hw->aq.asq_last_status ? in i40e_nvmupd_state_writing()
1389 hw->aq.asq_last_status) : in i40e_nvmupd_state_writing()
1390 -EIO; in i40e_nvmupd_state_writing()
1391 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT; in i40e_nvmupd_state_writing()
1393 hw->nvm_release_on_done = true; in i40e_nvmupd_state_writing()
1394 hw->nvm_wait_opcode = i40e_aqc_opc_nvm_update; in i40e_nvmupd_state_writing()
1395 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT; in i40e_nvmupd_state_writing()
1403 *perrno = hw->aq.asq_last_status ? in i40e_nvmupd_state_writing()
1405 hw->aq.asq_last_status) : in i40e_nvmupd_state_writing()
1406 -EIO; in i40e_nvmupd_state_writing()
1407 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT; in i40e_nvmupd_state_writing()
1409 hw->nvm_wait_opcode = i40e_aqc_opc_nvm_update; in i40e_nvmupd_state_writing()
1410 hw->nvmupd_state = I40E_NVMUPD_STATE_WRITE_WAIT; in i40e_nvmupd_state_writing()
1418 *perrno = hw->aq.asq_last_status ? in i40e_nvmupd_state_writing()
1420 hw->aq.asq_last_status) : in i40e_nvmupd_state_writing()
1421 -EIO; in i40e_nvmupd_state_writing()
1422 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT; in i40e_nvmupd_state_writing()
1424 hw->nvm_release_on_done = true; in i40e_nvmupd_state_writing()
1425 hw->nvm_wait_opcode = i40e_aqc_opc_nvm_update; in i40e_nvmupd_state_writing()
1426 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT; in i40e_nvmupd_state_writing()
1434 status = -EOPNOTSUPP; in i40e_nvmupd_state_writing()
1435 *perrno = -ESRCH; in i40e_nvmupd_state_writing()
1439 /* In some circumstances, a multi-write transaction takes longer in i40e_nvmupd_state_writing()
1445 if (status && hw->aq.asq_last_status == I40E_AQ_RC_EBUSY && in i40e_nvmupd_state_writing()
1447 u32 old_asq_status = hw->aq.asq_last_status; in i40e_nvmupd_state_writing()
1452 if (gtime >= hw->nvm.hw_semaphore_timeout) { in i40e_nvmupd_state_writing()
1455 gtime, hw->nvm.hw_semaphore_timeout); in i40e_nvmupd_state_writing()
1461 hw->aq.asq_last_status); in i40e_nvmupd_state_writing()
1463 hw->aq.asq_last_status = old_asq_status; in i40e_nvmupd_state_writing()
1475 * i40e_nvmupd_command - Process an NVM update command
1479 * @perrno: pointer to return error code
1498 hw->nvmupd_state, in i40e_nvmupd_command()
1499 hw->nvm_release_on_done, hw->nvm_wait_opcode, in i40e_nvmupd_command()
1500 cmd->command, cmd->config, cmd->offset, cmd->data_size); in i40e_nvmupd_command()
1503 *perrno = -EFAULT; in i40e_nvmupd_command()
1513 if (!cmd->data_size) { in i40e_nvmupd_command()
1514 *perrno = -EFAULT; in i40e_nvmupd_command()
1515 return -EINVAL; in i40e_nvmupd_command()
1518 bytes[0] = hw->nvmupd_state; in i40e_nvmupd_command()
1520 if (cmd->data_size >= 4) { in i40e_nvmupd_command()
1522 *((u16 *)&bytes[2]) = hw->nvm_wait_opcode; in i40e_nvmupd_command()
1526 if (hw->nvmupd_state == I40E_NVMUPD_STATE_ERROR) in i40e_nvmupd_command()
1527 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT; in i40e_nvmupd_command()
1533 if (hw->nvmupd_state == I40E_NVMUPD_STATE_ERROR) { in i40e_nvmupd_command()
1536 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT; in i40e_nvmupd_command()
1547 mutex_lock(&hw->aq.arq_mutex); in i40e_nvmupd_command()
1548 switch (hw->nvmupd_state) { in i40e_nvmupd_command()
1566 if (cmd->offset == 0xffff) { in i40e_nvmupd_command()
1572 status = -EBUSY; in i40e_nvmupd_command()
1573 *perrno = -EBUSY; in i40e_nvmupd_command()
1579 "NVMUPD: no such state %d\n", hw->nvmupd_state); in i40e_nvmupd_command()
1580 status = -EOPNOTSUPP; in i40e_nvmupd_command()
1581 *perrno = -ESRCH; in i40e_nvmupd_command()
1585 mutex_unlock(&hw->aq.arq_mutex); in i40e_nvmupd_command()
1590 * i40e_nvmupd_clear_wait_state - clear wait state on hw
1597 hw->nvm_wait_opcode); in i40e_nvmupd_clear_wait_state()
1599 if (hw->nvm_release_on_done) { in i40e_nvmupd_clear_wait_state()
1601 hw->nvm_release_on_done = false; in i40e_nvmupd_clear_wait_state()
1603 hw->nvm_wait_opcode = 0; in i40e_nvmupd_clear_wait_state()
1605 if (hw->aq.arq_last_status) { in i40e_nvmupd_clear_wait_state()
1606 hw->nvmupd_state = I40E_NVMUPD_STATE_ERROR; in i40e_nvmupd_clear_wait_state()
1610 switch (hw->nvmupd_state) { in i40e_nvmupd_clear_wait_state()
1612 hw->nvmupd_state = I40E_NVMUPD_STATE_INIT; in i40e_nvmupd_clear_wait_state()
1616 hw->nvmupd_state = I40E_NVMUPD_STATE_WRITING; in i40e_nvmupd_clear_wait_state()
1625 * i40e_nvmupd_check_wait_event - handle NVM update operation events
1635 if (opcode == hw->nvm_wait_opcode) { in i40e_nvmupd_check_wait_event()
1636 memcpy(&hw->nvm_aq_event_desc, desc, aq_desc_len); in i40e_nvmupd_check_wait_event()