Lines Matching +full:hw +full:- +full:gro
1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright (c) 2016-2017 Hisilicon Limited.
38 /* hclgevf_cmd_send - send command to command queue
39 * @hw: pointer to the hw struct
46 int hclgevf_cmd_send(struct hclgevf_hw *hw, struct hclge_desc *desc, int num) in hclgevf_cmd_send() argument
48 return hclge_comm_cmd_send(&hw->hw, desc, num); in hclgevf_cmd_send()
51 static void hclgevf_trace_cmd_send(struct hclge_comm_hw *hw, struct hclge_desc *desc, in hclgevf_trace_cmd_send() argument
56 trace_hclge_vf_cmd_send(hw, desc, 0, num); in hclgevf_trace_cmd_send()
62 trace_hclge_vf_cmd_send(hw, &desc[i], i, num); in hclgevf_trace_cmd_send()
65 static void hclgevf_trace_cmd_get(struct hclge_comm_hw *hw, struct hclge_desc *desc, in hclgevf_trace_cmd_get() argument
70 if (!HCLGE_COMM_SEND_SYNC(le16_to_cpu(desc->flag))) in hclgevf_trace_cmd_get()
73 trace_hclge_vf_cmd_get(hw, desc, 0, num); in hclgevf_trace_cmd_get()
79 trace_hclge_vf_cmd_get(hw, &desc[i], i, num); in hclgevf_trace_cmd_get()
89 struct hclge_comm_cmq *cmdq = &hdev->hw.hw.cmq; in hclgevf_arq_init()
91 spin_lock(&cmdq->crq.lock); in hclgevf_arq_init()
93 hdev->arq.hdev = hdev; in hclgevf_arq_init()
94 hdev->arq.head = 0; in hclgevf_arq_init()
95 hdev->arq.tail = 0; in hclgevf_arq_init()
96 atomic_set(&hdev->arq.count, 0); in hclgevf_arq_init()
97 spin_unlock(&cmdq->crq.lock); in hclgevf_arq_init()
102 if (!handle->client) in hclgevf_ae_get_hdev()
104 else if (handle->client->type == HNAE3_CLIENT_ROCE) in hclgevf_ae_get_hdev()
115 status = hclge_comm_tqps_update_stats(handle, &hdev->hw.hw); in hclgevf_update_stats()
117 dev_err(&hdev->pdev->dev, in hclgevf_update_stats()
125 return -EOPNOTSUPP; in hclgevf_get_sset_count()
149 msg->code = code; in hclgevf_build_send_msg()
150 msg->subcode = subcode; in hclgevf_build_send_msg()
156 struct hnae3_ae_dev *ae_dev = hdev->ae_dev; in hclgevf_get_basic_info()
167 dev_err(&hdev->pdev->dev, in hclgevf_get_basic_info()
174 hdev->hw_tc_map = basic_info->hw_tc_map; in hclgevf_get_basic_info()
175 hdev->mbx_api_version = le16_to_cpu(basic_info->mbx_api_version); in hclgevf_get_basic_info()
176 caps = le32_to_cpu(basic_info->pf_caps); in hclgevf_get_basic_info()
178 set_bit(HNAE3_DEV_SUPPORT_VLAN_FLTR_MDF_B, ae_dev->caps); in hclgevf_get_basic_info()
185 struct hnae3_handle *nic = &hdev->nic; in hclgevf_get_port_base_vlan_filter_state()
195 dev_err(&hdev->pdev->dev, in hclgevf_get_port_base_vlan_filter_state()
201 nic->port_base_vlan_state = resp_msg; in hclgevf_get_port_base_vlan_filter_state()
219 dev_err(&hdev->pdev->dev, in hclgevf_get_queue_info()
226 hdev->num_tqps = le16_to_cpu(queue_info->num_tqps); in hclgevf_get_queue_info()
227 hdev->rss_size_max = le16_to_cpu(queue_info->rss_size); in hclgevf_get_queue_info()
228 hdev->rx_buf_len = le16_to_cpu(queue_info->rx_buf_len); in hclgevf_get_queue_info()
246 dev_err(&hdev->pdev->dev, in hclgevf_get_queue_depth()
253 hdev->num_tx_desc = le16_to_cpu(queue_depth->num_tx_desc); in hclgevf_get_queue_depth()
254 hdev->num_rx_desc = le16_to_cpu(queue_depth->num_rx_desc); in hclgevf_get_queue_depth()
287 dev_err(&hdev->pdev->dev, in hclgevf_get_pf_media_type()
293 hdev->hw.mac.media_type = resp_msg[0]; in hclgevf_get_pf_media_type()
294 hdev->hw.mac.module_type = resp_msg[1]; in hclgevf_get_pf_media_type()
301 struct hnae3_ae_dev *ae_dev = pci_get_drvdata(hdev->pdev); in hclgevf_alloc_tqps()
305 hdev->htqp = devm_kcalloc(&hdev->pdev->dev, hdev->num_tqps, in hclgevf_alloc_tqps()
307 if (!hdev->htqp) in hclgevf_alloc_tqps()
308 return -ENOMEM; in hclgevf_alloc_tqps()
310 tqp = hdev->htqp; in hclgevf_alloc_tqps()
312 for (i = 0; i < hdev->num_tqps; i++) { in hclgevf_alloc_tqps()
313 tqp->dev = &hdev->pdev->dev; in hclgevf_alloc_tqps()
314 tqp->index = i; in hclgevf_alloc_tqps()
316 tqp->q.ae_algo = &ae_algovf; in hclgevf_alloc_tqps()
317 tqp->q.buf_size = hdev->rx_buf_len; in hclgevf_alloc_tqps()
318 tqp->q.tx_desc_num = hdev->num_tx_desc; in hclgevf_alloc_tqps()
319 tqp->q.rx_desc_num = hdev->num_rx_desc; in hclgevf_alloc_tqps()
325 tqp->q.io_base = hdev->hw.hw.io_base + in hclgevf_alloc_tqps()
329 tqp->q.io_base = hdev->hw.hw.io_base + in hclgevf_alloc_tqps()
332 (i - HCLGEVF_TQP_MAX_SIZE_DEV_V2) * in hclgevf_alloc_tqps()
339 if (test_bit(HNAE3_DEV_SUPPORT_TX_PUSH_B, ae_dev->caps)) in hclgevf_alloc_tqps()
340 tqp->q.mem_base = hdev->hw.hw.mem_base + in hclgevf_alloc_tqps()
351 struct hnae3_handle *nic = &hdev->nic; in hclgevf_knic_setup()
353 u16 new_tqps = hdev->num_tqps; in hclgevf_knic_setup()
357 kinfo = &nic->kinfo; in hclgevf_knic_setup()
358 kinfo->num_tx_desc = hdev->num_tx_desc; in hclgevf_knic_setup()
359 kinfo->num_rx_desc = hdev->num_rx_desc; in hclgevf_knic_setup()
360 kinfo->rx_buf_len = hdev->rx_buf_len; in hclgevf_knic_setup()
362 if (hdev->hw_tc_map & BIT(i)) in hclgevf_knic_setup()
366 kinfo->tc_info.num_tc = num_tc; in hclgevf_knic_setup()
367 kinfo->rss_size = min_t(u16, hdev->rss_size_max, new_tqps / num_tc); in hclgevf_knic_setup()
368 new_tqps = kinfo->rss_size * num_tc; in hclgevf_knic_setup()
369 kinfo->num_tqps = min(new_tqps, hdev->num_tqps); in hclgevf_knic_setup()
371 kinfo->tqp = devm_kcalloc(&hdev->pdev->dev, kinfo->num_tqps, in hclgevf_knic_setup()
373 if (!kinfo->tqp) in hclgevf_knic_setup()
374 return -ENOMEM; in hclgevf_knic_setup()
376 for (i = 0; i < kinfo->num_tqps; i++) { in hclgevf_knic_setup()
377 hdev->htqp[i].q.handle = &hdev->nic; in hclgevf_knic_setup()
378 hdev->htqp[i].q.tqp_index = i; in hclgevf_knic_setup()
379 kinfo->tqp[i] = &hdev->htqp[i].q; in hclgevf_knic_setup()
385 kinfo->num_tqps = min_t(u16, hdev->num_nic_msix - 1, kinfo->num_tqps); in hclgevf_knic_setup()
386 kinfo->rss_size = min_t(u16, kinfo->num_tqps / num_tc, in hclgevf_knic_setup()
387 kinfo->rss_size); in hclgevf_knic_setup()
400 dev_err(&hdev->pdev->dev, in hclgevf_request_link_info()
406 struct hnae3_handle *rhandle = &hdev->roce; in hclgevf_update_link_status()
407 struct hnae3_handle *handle = &hdev->nic; in hclgevf_update_link_status()
411 if (test_and_set_bit(HCLGEVF_STATE_LINK_UPDATING, &hdev->state)) in hclgevf_update_link_status()
414 client = handle->client; in hclgevf_update_link_status()
415 rclient = hdev->roce_client; in hclgevf_update_link_status()
418 test_bit(HCLGEVF_STATE_DOWN, &hdev->state) ? 0 : link_state; in hclgevf_update_link_status()
419 if (link_state != hdev->hw.mac.link) { in hclgevf_update_link_status()
420 hdev->hw.mac.link = link_state; in hclgevf_update_link_status()
421 client->ops->link_status_change(handle, !!link_state); in hclgevf_update_link_status()
422 if (rclient && rclient->ops->link_status_change) in hclgevf_update_link_status()
423 rclient->ops->link_status_change(rhandle, !!link_state); in hclgevf_update_link_status()
426 clear_bit(HCLGEVF_STATE_LINK_UPDATING, &hdev->state); in hclgevf_update_link_status()
445 struct hnae3_handle *nic = &hdev->nic; in hclgevf_set_handle_info()
448 nic->ae_algo = &ae_algovf; in hclgevf_set_handle_info()
449 nic->pdev = hdev->pdev; in hclgevf_set_handle_info()
450 bitmap_copy(nic->numa_node_mask.bits, hdev->numa_node_mask.bits, in hclgevf_set_handle_info()
452 nic->flags |= HNAE3_SUPPORT_VF; in hclgevf_set_handle_info()
453 nic->kinfo.io_base = hdev->hw.hw.io_base; in hclgevf_set_handle_info()
457 dev_err(&hdev->pdev->dev, "VF knic setup failed %d\n", in hclgevf_set_handle_info()
464 if (hdev->vector_status[vector_id] == HCLGEVF_INVALID_VPORT) { in hclgevf_free_vector()
465 dev_warn(&hdev->pdev->dev, in hclgevf_free_vector()
470 hdev->vector_status[vector_id] = HCLGEVF_INVALID_VPORT; in hclgevf_free_vector()
471 hdev->num_msi_left += 1; in hclgevf_free_vector()
472 hdev->num_msi_used -= 1; in hclgevf_free_vector()
483 vector_num = min_t(u16, hdev->num_nic_msix - 1, vector_num); in hclgevf_get_vector()
484 vector_num = min(hdev->num_msi_left, vector_num); in hclgevf_get_vector()
487 for (i = HCLGEVF_MISC_VECTOR_NUM + 1; i < hdev->num_msi; i++) { in hclgevf_get_vector()
488 if (hdev->vector_status[i] == HCLGEVF_INVALID_VPORT) { in hclgevf_get_vector()
489 vector->vector = pci_irq_vector(hdev->pdev, i); in hclgevf_get_vector()
490 vector->io_addr = hdev->hw.hw.io_base + in hclgevf_get_vector()
492 (i - 1) * HCLGEVF_VECTOR_REG_OFFSET; in hclgevf_get_vector()
493 hdev->vector_status[i] = 0; in hclgevf_get_vector()
494 hdev->vector_irq[i] = vector->vector; in hclgevf_get_vector()
503 hdev->num_msi_left -= alloc; in hclgevf_get_vector()
504 hdev->num_msi_used += alloc; in hclgevf_get_vector()
513 for (i = 0; i < hdev->num_msi; i++) in hclgevf_get_vector_index()
514 if (vector == hdev->vector_irq[i]) in hclgevf_get_vector_index()
517 return -EINVAL; in hclgevf_get_vector_index()
524 struct hclge_comm_rss_cfg *rss_cfg = &hdev->rss_cfg; in hclgevf_get_rss_hash_key()
532 msg_num = (HCLGE_COMM_RSS_KEY_SIZE + HCLGEVF_RSS_MBX_RESP_LEN - 1) / in hclgevf_get_rss_hash_key()
539 dev_err(&hdev->pdev->dev, in hclgevf_get_rss_hash_key()
546 if (index == msg_num - 1) in hclgevf_get_rss_hash_key()
547 memcpy(&rss_cfg->rss_hash_key[hash_key_index], in hclgevf_get_rss_hash_key()
549 HCLGE_COMM_RSS_KEY_SIZE - hash_key_index); in hclgevf_get_rss_hash_key()
551 memcpy(&rss_cfg->rss_hash_key[hash_key_index], in hclgevf_get_rss_hash_key()
562 struct hclge_comm_rss_cfg *rss_cfg = &hdev->rss_cfg; in hclgevf_get_rss()
565 if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2) { in hclgevf_get_rss()
574 memcpy(key, rss_cfg->rss_hash_key, in hclgevf_get_rss()
580 hdev->ae_dev->dev_specs.rss_ind_tbl_size); in hclgevf_get_rss()
589 struct hclge_comm_rss_cfg *rss_cfg = &hdev->rss_cfg; in hclgevf_set_rss()
592 if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2) { in hclgevf_set_rss()
593 ret = hclge_comm_set_rss_hash_key(rss_cfg, &hdev->hw.hw, key, in hclgevf_set_rss()
600 for (i = 0; i < hdev->ae_dev->dev_specs.rss_ind_tbl_size; i++) in hclgevf_set_rss()
601 rss_cfg->rss_indirection_tbl[i] = indir[i]; in hclgevf_set_rss()
604 return hclge_comm_set_rss_indir_table(hdev->ae_dev, &hdev->hw.hw, in hclgevf_set_rss()
605 rss_cfg->rss_indirection_tbl); in hclgevf_set_rss()
614 if (hdev->ae_dev->dev_version < HNAE3_DEVICE_VERSION_V2) in hclgevf_set_rss_tuple()
615 return -EOPNOTSUPP; in hclgevf_set_rss_tuple()
617 ret = hclge_comm_set_rss_tuple(hdev->ae_dev, &hdev->hw.hw, in hclgevf_set_rss_tuple()
618 &hdev->rss_cfg, nfc); in hclgevf_set_rss_tuple()
620 dev_err(&hdev->pdev->dev, in hclgevf_set_rss_tuple()
633 if (hdev->ae_dev->dev_version < HNAE3_DEVICE_VERSION_V2) in hclgevf_get_rss_tuple()
634 return -EOPNOTSUPP; in hclgevf_get_rss_tuple()
636 nfc->data = 0; in hclgevf_get_rss_tuple()
638 ret = hclge_comm_get_rss_tuple(&hdev->rss_cfg, nfc->flow_type, in hclgevf_get_rss_tuple()
643 nfc->data = hclge_comm_convert_rss_tuple(tuple_sets); in hclgevf_get_rss_tuple()
651 struct hclge_comm_rss_cfg *rss_cfg = &hdev->rss_cfg; in hclgevf_get_tc_size()
653 return rss_cfg->rss_size; in hclgevf_get_tc_size()
671 for (node = ring_chain; node; node = node->next) { in hclgevf_bind_ring_to_vector()
673 hnae3_get_bit(node->flag, HNAE3_RING_TYPE_B); in hclgevf_bind_ring_to_vector()
675 send_msg.param[i].tqp_index = node->tqp_index; in hclgevf_bind_ring_to_vector()
677 hnae3_get_field(node->int_gl_idx, in hclgevf_bind_ring_to_vector()
682 if (i == HCLGE_MBX_MAX_RING_CHAIN_PARAM_NUM || !node->next) { in hclgevf_bind_ring_to_vector()
688 dev_err(&hdev->pdev->dev, in hclgevf_bind_ring_to_vector()
708 dev_err(&handle->pdev->dev, in hclgevf_map_ring_to_vector()
724 if (test_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state)) in hclgevf_unmap_ring_from_vector()
729 dev_err(&handle->pdev->dev, in hclgevf_unmap_ring_from_vector()
736 dev_err(&handle->pdev->dev, in hclgevf_unmap_ring_from_vector()
751 dev_err(&handle->pdev->dev, in hclgevf_put_vector()
766 struct hnae3_handle *handle = &hdev->nic; in hclgevf_cmd_set_promisc_mode()
776 &handle->priv_flags) ? 1 : 0; in hclgevf_cmd_set_promisc_mode()
780 dev_err(&hdev->pdev->dev, in hclgevf_cmd_set_promisc_mode()
792 en_bc_pmc = hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2; in hclgevf_set_promisc_mode()
802 set_bit(HCLGEVF_STATE_PROMISC_CHANGED, &hdev->state); in hclgevf_request_update_promisc_mode()
808 struct hnae3_handle *handle = &hdev->nic; in hclgevf_sync_promisc_mode()
809 bool en_uc_pmc = handle->netdev_flags & HNAE3_UPE; in hclgevf_sync_promisc_mode()
810 bool en_mc_pmc = handle->netdev_flags & HNAE3_MPE; in hclgevf_sync_promisc_mode()
813 if (test_bit(HCLGEVF_STATE_PROMISC_CHANGED, &hdev->state)) { in hclgevf_sync_promisc_mode()
816 clear_bit(HCLGEVF_STATE_PROMISC_CHANGED, &hdev->state); in hclgevf_sync_promisc_mode()
829 req->tqp_id = cpu_to_le16(tqp_id & HCLGEVF_RING_ID_MASK); in hclgevf_tqp_enable_cmd_send()
830 req->stream_id = cpu_to_le16(stream_id); in hclgevf_tqp_enable_cmd_send()
832 req->enable |= 1U << HCLGEVF_TQP_ENABLE_B; in hclgevf_tqp_enable_cmd_send()
834 return hclgevf_cmd_send(&hdev->hw, &desc, 1); in hclgevf_tqp_enable_cmd_send()
843 for (i = 0; i < handle->kinfo.num_tqps; i++) { in hclgevf_tqp_enable()
862 dev_err(&hdev->pdev->dev, in hclgevf_get_host_mac_addr()
880 hdev->has_pf_mac = !is_zero_ether_addr(host_mac_addr); in hclgevf_get_mac_addr()
881 if (hdev->has_pf_mac) in hclgevf_get_mac_addr()
884 ether_addr_copy(p, hdev->hw.mac.mac_addr); in hclgevf_get_mac_addr()
891 u8 *old_mac_addr = (u8 *)hdev->hw.mac.mac_addr; in hclgevf_set_mac_addr()
899 if (is_first && !hdev->has_pf_mac) in hclgevf_set_mac_addr()
905 ether_addr_copy(hdev->hw.mac.mac_addr, new_mac_addr); in hclgevf_set_mac_addr()
916 if (ether_addr_equal(mac_addr, mac_node->mac_addr)) in hclgevf_find_mac_node()
928 if (mac_node->state == HCLGEVF_MAC_TO_DEL) in hclgevf_update_mac_node()
929 mac_node->state = HCLGEVF_MAC_ACTIVE; in hclgevf_update_mac_node()
933 if (mac_node->state == HCLGEVF_MAC_TO_ADD) { in hclgevf_update_mac_node()
934 list_del(&mac_node->node); in hclgevf_update_mac_node()
937 mac_node->state = HCLGEVF_MAC_TO_DEL; in hclgevf_update_mac_node()
940 /* only from tmp_add_list, the mac_node->state won't be in hclgevf_update_mac_node()
944 if (mac_node->state == HCLGEVF_MAC_TO_ADD) in hclgevf_update_mac_node()
945 mac_node->state = HCLGEVF_MAC_ACTIVE; in hclgevf_update_mac_node()
960 &hdev->mac_table.uc_mac_list : &hdev->mac_table.mc_mac_list; in hclgevf_update_mac_list()
962 spin_lock_bh(&hdev->mac_table.mac_list_lock); in hclgevf_update_mac_list()
971 spin_unlock_bh(&hdev->mac_table.mac_list_lock); in hclgevf_update_mac_list()
976 spin_unlock_bh(&hdev->mac_table.mac_list_lock); in hclgevf_update_mac_list()
977 return -ENOENT; in hclgevf_update_mac_list()
982 spin_unlock_bh(&hdev->mac_table.mac_list_lock); in hclgevf_update_mac_list()
983 return -ENOMEM; in hclgevf_update_mac_list()
986 mac_node->state = state; in hclgevf_update_mac_list()
987 ether_addr_copy(mac_node->mac_addr, addr); in hclgevf_update_mac_list()
988 list_add_tail(&mac_node->node, list); in hclgevf_update_mac_list()
990 spin_unlock_bh(&hdev->mac_table.mac_list_lock); in hclgevf_update_mac_list()
1031 if (mac_node->state == HCLGEVF_MAC_TO_ADD) in hclgevf_add_del_mac_addr()
1037 if (mac_node->state == HCLGEVF_MAC_TO_ADD) in hclgevf_add_del_mac_addr()
1044 ether_addr_copy(send_msg.data, mac_node->mac_addr); in hclgevf_add_del_mac_addr()
1060 mac_node->mac_addr); in hclgevf_config_mac_list()
1061 dev_err(&hdev->pdev->dev, in hclgevf_config_mac_list()
1063 format_mac_addr, mac_node->state, ret); in hclgevf_config_mac_list()
1066 if (mac_node->state == HCLGEVF_MAC_TO_ADD) { in hclgevf_config_mac_list()
1067 mac_node->state = HCLGEVF_MAC_ACTIVE; in hclgevf_config_mac_list()
1069 list_del(&mac_node->node); in hclgevf_config_mac_list()
1088 new_node = hclgevf_find_mac_node(mac_list, mac_node->mac_addr); in hclgevf_sync_from_add_list()
1090 hclgevf_update_mac_node(new_node, mac_node->state); in hclgevf_sync_from_add_list()
1091 list_del(&mac_node->node); in hclgevf_sync_from_add_list()
1093 } else if (mac_node->state == HCLGEVF_MAC_ACTIVE) { in hclgevf_sync_from_add_list()
1094 mac_node->state = HCLGEVF_MAC_TO_DEL; in hclgevf_sync_from_add_list()
1095 list_move_tail(&mac_node->node, mac_list); in hclgevf_sync_from_add_list()
1097 list_del(&mac_node->node); in hclgevf_sync_from_add_list()
1109 new_node = hclgevf_find_mac_node(mac_list, mac_node->mac_addr); in hclgevf_sync_from_del_list()
1116 new_node->state = HCLGEVF_MAC_ACTIVE; in hclgevf_sync_from_del_list()
1117 list_del(&mac_node->node); in hclgevf_sync_from_del_list()
1120 list_move_tail(&mac_node->node, mac_list); in hclgevf_sync_from_del_list()
1130 list_del(&mac_node->node); in hclgevf_clear_list()
1149 &hdev->mac_table.uc_mac_list : &hdev->mac_table.mc_mac_list; in hclgevf_sync_mac_list()
1151 spin_lock_bh(&hdev->mac_table.mac_list_lock); in hclgevf_sync_mac_list()
1154 switch (mac_node->state) { in hclgevf_sync_mac_list()
1156 list_move_tail(&mac_node->node, &tmp_del_list); in hclgevf_sync_mac_list()
1163 ether_addr_copy(new_node->mac_addr, mac_node->mac_addr); in hclgevf_sync_mac_list()
1164 new_node->state = mac_node->state; in hclgevf_sync_mac_list()
1165 list_add_tail(&new_node->node, &tmp_add_list); in hclgevf_sync_mac_list()
1173 spin_unlock_bh(&hdev->mac_table.mac_list_lock); in hclgevf_sync_mac_list()
1182 spin_lock_bh(&hdev->mac_table.mac_list_lock); in hclgevf_sync_mac_list()
1187 spin_unlock_bh(&hdev->mac_table.mac_list_lock); in hclgevf_sync_mac_list()
1198 spin_lock_bh(&hdev->mac_table.mac_list_lock); in hclgevf_uninit_mac_list()
1200 hclgevf_clear_list(&hdev->mac_table.uc_mac_list); in hclgevf_uninit_mac_list()
1201 hclgevf_clear_list(&hdev->mac_table.mc_mac_list); in hclgevf_uninit_mac_list()
1203 spin_unlock_bh(&hdev->mac_table.mac_list_lock); in hclgevf_uninit_mac_list()
1209 struct hnae3_ae_dev *ae_dev = hdev->ae_dev; in hclgevf_enable_vlan_filter()
1212 if (!test_bit(HNAE3_DEV_SUPPORT_VLAN_FLTR_MDF_B, ae_dev->caps)) in hclgevf_enable_vlan_filter()
1213 return -EOPNOTSUPP; in hclgevf_enable_vlan_filter()
1232 return -EINVAL; in hclgevf_set_vlan_filter()
1235 return -EPROTONOSUPPORT; in hclgevf_set_vlan_filter()
1241 if ((test_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state) || in hclgevf_set_vlan_filter()
1242 test_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state)) && is_kill) { in hclgevf_set_vlan_filter()
1243 set_bit(vlan_id, hdev->vlan_del_fail_bmap); in hclgevf_set_vlan_filter()
1244 return -EBUSY; in hclgevf_set_vlan_filter()
1245 } else if (!is_kill && test_bit(vlan_id, hdev->vlan_del_fail_bmap)) { in hclgevf_set_vlan_filter()
1246 clear_bit(vlan_id, hdev->vlan_del_fail_bmap); in hclgevf_set_vlan_filter()
1252 vlan_filter->is_kill = is_kill; in hclgevf_set_vlan_filter()
1253 vlan_filter->vlan_id = cpu_to_le16(vlan_id); in hclgevf_set_vlan_filter()
1254 vlan_filter->proto = cpu_to_le16(be16_to_cpu(proto)); in hclgevf_set_vlan_filter()
1256 /* when remove hw vlan filter failed, record the vlan id, in hclgevf_set_vlan_filter()
1257 * and try to remove it from hw later, to be consistence in hclgevf_set_vlan_filter()
1262 set_bit(vlan_id, hdev->vlan_del_fail_bmap); in hclgevf_set_vlan_filter()
1270 struct hnae3_handle *handle = &hdev->nic; in hclgevf_sync_vlan_filter()
1274 if (bitmap_empty(hdev->vlan_del_fail_bmap, VLAN_N_VID)) in hclgevf_sync_vlan_filter()
1278 vlan_id = find_first_bit(hdev->vlan_del_fail_bmap, VLAN_N_VID); in hclgevf_sync_vlan_filter()
1285 clear_bit(vlan_id, hdev->vlan_del_fail_bmap); in hclgevf_sync_vlan_filter()
1290 vlan_id = find_first_bit(hdev->vlan_del_fail_bmap, VLAN_N_VID); in hclgevf_sync_vlan_filter()
1314 hdev->rxvtag_strip_en = enable; in hclgevf_en_hw_strip_rxvtag()
1330 dev_err(&hdev->pdev->dev, "failed to disable tqp, ret = %d\n", in hclgevf_reset_tqp()
1342 for (i = 1; i < handle->kinfo.num_tqps; i++) { in hclgevf_reset_tqp()
1361 mtu_info->mtu = cpu_to_le32(new_mtu); in hclgevf_set_mtu()
1369 struct hnae3_client *client = hdev->nic_client; in hclgevf_notify_client()
1370 struct hnae3_handle *handle = &hdev->nic; in hclgevf_notify_client()
1373 if (!test_bit(HCLGEVF_STATE_NIC_REGISTERED, &hdev->state) || in hclgevf_notify_client()
1377 if (!client->ops->reset_notify) in hclgevf_notify_client()
1378 return -EOPNOTSUPP; in hclgevf_notify_client()
1380 ret = client->ops->reset_notify(handle, type); in hclgevf_notify_client()
1382 dev_err(&hdev->pdev->dev, "notify nic client failed %d(%d)\n", in hclgevf_notify_client()
1391 struct hnae3_client *client = hdev->roce_client; in hclgevf_notify_roce_client()
1392 struct hnae3_handle *handle = &hdev->roce; in hclgevf_notify_roce_client()
1395 if (!test_bit(HCLGEVF_STATE_ROCE_REGISTERED, &hdev->state) || !client) in hclgevf_notify_roce_client()
1398 if (!client->ops->reset_notify) in hclgevf_notify_roce_client()
1399 return -EOPNOTSUPP; in hclgevf_notify_roce_client()
1401 ret = client->ops->reset_notify(handle, type); in hclgevf_notify_roce_client()
1403 dev_err(&hdev->pdev->dev, "notify roce client failed %d(%d)", in hclgevf_notify_roce_client()
1416 set_bit(reset_type, &hdev->reset_pending); in hclgevf_set_reset_pending()
1429 if (hdev->reset_type == HNAE3_VF_RESET) in hclgevf_reset_wait()
1430 ret = readl_poll_timeout(hdev->hw.hw.io_base + in hclgevf_reset_wait()
1436 ret = readl_poll_timeout(hdev->hw.hw.io_base + in hclgevf_reset_wait()
1444 dev_err(&hdev->pdev->dev, in hclgevf_reset_wait()
1453 if (hdev->reset_type == HNAE3_VF_FULL_RESET) in hclgevf_reset_wait()
1465 reg_val = hclgevf_read_dev(&hdev->hw, HCLGE_COMM_NIC_CSQ_DEPTH_REG); in hclgevf_reset_handshake()
1471 hclgevf_write_dev(&hdev->hw, HCLGE_COMM_NIC_CSQ_DEPTH_REG, in hclgevf_reset_handshake()
1484 /* re-initialize the hclge device */ in hclgevf_reset_stack()
1487 dev_err(&hdev->pdev->dev, in hclgevf_reset_stack()
1488 "hclge device re-init failed, VF is disabled!\n"); in hclgevf_reset_stack()
1508 if (hdev->reset_type == HNAE3_VF_FUNC_RESET) { in hclgevf_reset_prepare_wait()
1515 dev_err(&hdev->pdev->dev, in hclgevf_reset_prepare_wait()
1519 hdev->rst_stats.vf_func_rst_cnt++; in hclgevf_reset_prepare_wait()
1522 set_bit(HCLGE_COMM_STATE_CMD_DISABLE, &hdev->hw.hw.comm_state); in hclgevf_reset_prepare_wait()
1526 dev_info(&hdev->pdev->dev, "prepare reset(%d) wait done\n", in hclgevf_reset_prepare_wait()
1527 hdev->reset_type); in hclgevf_reset_prepare_wait()
1534 dev_info(&hdev->pdev->dev, "VF function reset count: %u\n", in hclgevf_dump_rst_info()
1535 hdev->rst_stats.vf_func_rst_cnt); in hclgevf_dump_rst_info()
1536 dev_info(&hdev->pdev->dev, "FLR reset count: %u\n", in hclgevf_dump_rst_info()
1537 hdev->rst_stats.flr_rst_cnt); in hclgevf_dump_rst_info()
1538 dev_info(&hdev->pdev->dev, "VF reset count: %u\n", in hclgevf_dump_rst_info()
1539 hdev->rst_stats.vf_rst_cnt); in hclgevf_dump_rst_info()
1540 dev_info(&hdev->pdev->dev, "reset done count: %u\n", in hclgevf_dump_rst_info()
1541 hdev->rst_stats.rst_done_cnt); in hclgevf_dump_rst_info()
1542 dev_info(&hdev->pdev->dev, "HW reset done count: %u\n", in hclgevf_dump_rst_info()
1543 hdev->rst_stats.hw_rst_done_cnt); in hclgevf_dump_rst_info()
1544 dev_info(&hdev->pdev->dev, "reset count: %u\n", in hclgevf_dump_rst_info()
1545 hdev->rst_stats.rst_cnt); in hclgevf_dump_rst_info()
1546 dev_info(&hdev->pdev->dev, "reset fail count: %u\n", in hclgevf_dump_rst_info()
1547 hdev->rst_stats.rst_fail_cnt); in hclgevf_dump_rst_info()
1548 dev_info(&hdev->pdev->dev, "vector0 interrupt enable status: 0x%x\n", in hclgevf_dump_rst_info()
1549 hclgevf_read_dev(&hdev->hw, HCLGEVF_MISC_VECTOR_REG_BASE)); in hclgevf_dump_rst_info()
1550 dev_info(&hdev->pdev->dev, "vector0 interrupt status: 0x%x\n", in hclgevf_dump_rst_info()
1551 hclgevf_read_dev(&hdev->hw, HCLGE_COMM_VECTOR0_CMDQ_STATE_REG)); in hclgevf_dump_rst_info()
1552 dev_info(&hdev->pdev->dev, "handshake status: 0x%x\n", in hclgevf_dump_rst_info()
1553 hclgevf_read_dev(&hdev->hw, HCLGE_COMM_NIC_CSQ_DEPTH_REG)); in hclgevf_dump_rst_info()
1554 dev_info(&hdev->pdev->dev, "function reset status: 0x%x\n", in hclgevf_dump_rst_info()
1555 hclgevf_read_dev(&hdev->hw, HCLGEVF_RST_ING)); in hclgevf_dump_rst_info()
1556 dev_info(&hdev->pdev->dev, "hdev state: 0x%lx\n", hdev->state); in hclgevf_dump_rst_info()
1563 hdev->rst_stats.rst_fail_cnt++; in hclgevf_reset_err_handle()
1564 dev_err(&hdev->pdev->dev, "failed to reset VF(%u)\n", in hclgevf_reset_err_handle()
1565 hdev->rst_stats.rst_fail_cnt); in hclgevf_reset_err_handle()
1567 if (hdev->rst_stats.rst_fail_cnt < HCLGEVF_RESET_MAX_FAIL_CNT) in hclgevf_reset_err_handle()
1568 hclgevf_set_reset_pending(hdev, hdev->reset_type); in hclgevf_reset_err_handle()
1571 set_bit(HCLGEVF_RESET_PENDING, &hdev->reset_state); in hclgevf_reset_err_handle()
1574 set_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state); in hclgevf_reset_err_handle()
1583 hdev->rst_stats.rst_cnt++; in hclgevf_reset_prepare()
1604 hdev->rst_stats.hw_rst_done_cnt++; in hclgevf_reset_rebuild()
1610 /* now, re-initialize the nic client and ae device */ in hclgevf_reset_rebuild()
1614 dev_err(&hdev->pdev->dev, "failed to reset VF stack\n"); in hclgevf_reset_rebuild()
1619 /* ignore RoCE notify error if it fails HCLGEVF_RESET_MAX_FAIL_CNT - 1 in hclgevf_reset_rebuild()
1623 hdev->rst_stats.rst_fail_cnt < HCLGEVF_RESET_MAX_FAIL_CNT - 1) in hclgevf_reset_rebuild()
1630 hdev->last_reset_time = jiffies; in hclgevf_reset_rebuild()
1631 hdev->rst_stats.rst_done_cnt++; in hclgevf_reset_rebuild()
1632 hdev->rst_stats.rst_fail_cnt = 0; in hclgevf_reset_rebuild()
1633 clear_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state); in hclgevf_reset_rebuild()
1648 dev_err(&hdev->pdev->dev, in hclgevf_reset()
1697 struct hclgevf_dev *hdev = ae_dev->priv; in hclgevf_reset_event()
1699 if (hdev->default_reset_request) in hclgevf_reset_event()
1700 hdev->reset_level = in hclgevf_reset_event()
1701 hclgevf_get_reset_level(&hdev->default_reset_request); in hclgevf_reset_event()
1703 hdev->reset_level = HNAE3_VF_FUNC_RESET; in hclgevf_reset_event()
1705 dev_info(&hdev->pdev->dev, "received reset request from VF enet, reset level is %d\n", in hclgevf_reset_event()
1706 hdev->reset_level); in hclgevf_reset_event()
1709 set_bit(HCLGEVF_RESET_REQUESTED, &hdev->reset_state); in hclgevf_reset_event()
1712 hdev->last_reset_time = jiffies; in hclgevf_reset_event()
1723 struct hclgevf_dev *hdev = ae_dev->priv; in hclgevf_set_def_reset_request()
1727 set_bit(HNAE3_NONE_RESET, &hdev->default_reset_request); in hclgevf_set_def_reset_request()
1728 dev_info(&hdev->pdev->dev, "unsupported reset type %d\n", in hclgevf_set_def_reset_request()
1732 set_bit(rst_type, &hdev->default_reset_request); in hclgevf_set_def_reset_request()
1737 writel(en ? 1 : 0, vector->addr); in hclgevf_enable_vector()
1746 struct hclgevf_dev *hdev = ae_dev->priv; in hclgevf_reset_prepare_general()
1751 down(&hdev->reset_sem); in hclgevf_reset_prepare_general()
1752 set_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state); in hclgevf_reset_prepare_general()
1753 hdev->reset_type = rst_type; in hclgevf_reset_prepare_general()
1755 if (!ret && !hdev->reset_pending) in hclgevf_reset_prepare_general()
1758 dev_err(&hdev->pdev->dev, in hclgevf_reset_prepare_general()
1760 ret, hdev->reset_pending, retry_cnt); in hclgevf_reset_prepare_general()
1761 clear_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state); in hclgevf_reset_prepare_general()
1762 up(&hdev->reset_sem); in hclgevf_reset_prepare_general()
1767 hclgevf_enable_vector(&hdev->misc_vector, false); in hclgevf_reset_prepare_general()
1769 if (hdev->reset_type == HNAE3_FLR_RESET) in hclgevf_reset_prepare_general()
1770 hdev->rst_stats.flr_rst_cnt++; in hclgevf_reset_prepare_general()
1775 struct hclgevf_dev *hdev = ae_dev->priv; in hclgevf_reset_done()
1778 hclgevf_enable_vector(&hdev->misc_vector, true); in hclgevf_reset_done()
1782 dev_warn(&hdev->pdev->dev, "fail to rebuild, ret=%d\n", in hclgevf_reset_done()
1785 hdev->reset_type = HNAE3_NONE_RESET; in hclgevf_reset_done()
1786 if (test_and_clear_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state)) in hclgevf_reset_done()
1787 up(&hdev->reset_sem); in hclgevf_reset_done()
1794 return hdev->fw_version; in hclgevf_get_fw_version()
1799 struct hclgevf_misc_vector *vector = &hdev->misc_vector; in hclgevf_get_misc_vector()
1801 vector->vector_irq = pci_irq_vector(hdev->pdev, in hclgevf_get_misc_vector()
1803 vector->addr = hdev->hw.hw.io_base + HCLGEVF_MISC_VECTOR_REG_BASE; in hclgevf_get_misc_vector()
1805 hdev->vector_status[HCLGEVF_MISC_VECTOR_NUM] = 0; in hclgevf_get_misc_vector()
1806 hdev->vector_irq[HCLGEVF_MISC_VECTOR_NUM] = vector->vector_irq; in hclgevf_get_misc_vector()
1808 hdev->num_msi_left -= 1; in hclgevf_get_misc_vector()
1809 hdev->num_msi_used += 1; in hclgevf_get_misc_vector()
1814 if (!test_bit(HCLGEVF_STATE_REMOVING, &hdev->state) && in hclgevf_reset_task_schedule()
1815 test_bit(HCLGEVF_STATE_SERVICE_INITED, &hdev->state) && in hclgevf_reset_task_schedule()
1817 &hdev->state)) in hclgevf_reset_task_schedule()
1818 mod_delayed_work(hclgevf_wq, &hdev->service_task, 0); in hclgevf_reset_task_schedule()
1823 if (!test_bit(HCLGEVF_STATE_REMOVING, &hdev->state) && in hclgevf_mbx_task_schedule()
1825 &hdev->state)) in hclgevf_mbx_task_schedule()
1826 mod_delayed_work(hclgevf_wq, &hdev->service_task, 0); in hclgevf_mbx_task_schedule()
1832 if (!test_bit(HCLGEVF_STATE_REMOVING, &hdev->state) && in hclgevf_task_schedule()
1833 !test_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state)) in hclgevf_task_schedule()
1834 mod_delayed_work(hclgevf_wq, &hdev->service_task, delay); in hclgevf_task_schedule()
1841 if (!test_and_clear_bit(HCLGEVF_STATE_RST_SERVICE_SCHED, &hdev->state)) in hclgevf_reset_service_task()
1844 down(&hdev->reset_sem); in hclgevf_reset_service_task()
1845 set_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state); in hclgevf_reset_service_task()
1848 &hdev->reset_state)) { in hclgevf_reset_service_task()
1854 hdev->reset_attempts = 0; in hclgevf_reset_service_task()
1856 hdev->last_reset_time = jiffies; in hclgevf_reset_service_task()
1857 hdev->reset_type = in hclgevf_reset_service_task()
1858 hclgevf_get_reset_level(&hdev->reset_pending); in hclgevf_reset_service_task()
1859 if (hdev->reset_type != HNAE3_NONE_RESET) in hclgevf_reset_service_task()
1862 &hdev->reset_state)) { in hclgevf_reset_service_task()
1886 if (hdev->reset_attempts > HCLGEVF_MAX_RESET_ATTEMPTS_CNT) { in hclgevf_reset_service_task()
1891 set_bit(HCLGEVF_RESET_PENDING, &hdev->reset_state); in hclgevf_reset_service_task()
1893 hdev->reset_attempts++; in hclgevf_reset_service_task()
1895 hclgevf_set_reset_pending(hdev, hdev->reset_level); in hclgevf_reset_service_task()
1896 set_bit(HCLGEVF_RESET_PENDING, &hdev->reset_state); in hclgevf_reset_service_task()
1901 hdev->reset_type = HNAE3_NONE_RESET; in hclgevf_reset_service_task()
1902 clear_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state); in hclgevf_reset_service_task()
1903 up(&hdev->reset_sem); in hclgevf_reset_service_task()
1908 if (!test_and_clear_bit(HCLGEVF_STATE_MBX_SERVICE_SCHED, &hdev->state)) in hclgevf_mailbox_service_task()
1911 if (test_and_set_bit(HCLGEVF_STATE_MBX_HANDLING, &hdev->state)) in hclgevf_mailbox_service_task()
1916 clear_bit(HCLGEVF_STATE_MBX_HANDLING, &hdev->state); in hclgevf_mailbox_service_task()
1924 if (test_bit(HCLGE_COMM_STATE_CMD_DISABLE, &hdev->hw.hw.comm_state)) in hclgevf_keep_alive()
1930 dev_err(&hdev->pdev->dev, in hclgevf_keep_alive()
1937 struct hnae3_handle *handle = &hdev->nic; in hclgevf_periodic_service_task()
1939 if (test_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state) || in hclgevf_periodic_service_task()
1940 test_bit(HCLGE_COMM_STATE_CMD_DISABLE, &hdev->hw.hw.comm_state)) in hclgevf_periodic_service_task()
1943 if (time_is_after_jiffies(hdev->last_serv_processed + HZ)) { in hclgevf_periodic_service_task()
1944 delta = jiffies - hdev->last_serv_processed; in hclgevf_periodic_service_task()
1947 delta = round_jiffies_relative(HZ) - delta; in hclgevf_periodic_service_task()
1952 hdev->serv_processed_cnt++; in hclgevf_periodic_service_task()
1953 if (!(hdev->serv_processed_cnt % HCLGEVF_KEEP_ALIVE_TASK_INTERVAL)) in hclgevf_periodic_service_task()
1956 if (test_bit(HCLGEVF_STATE_DOWN, &hdev->state)) { in hclgevf_periodic_service_task()
1957 hdev->last_serv_processed = jiffies; in hclgevf_periodic_service_task()
1961 if (!(hdev->serv_processed_cnt % HCLGEVF_STATS_TIMER_INTERVAL)) in hclgevf_periodic_service_task()
1962 hclge_comm_tqps_update_stats(handle, &hdev->hw.hw); in hclgevf_periodic_service_task()
1967 if (!test_bit(HCLGEVF_STATE_PF_PUSH_LINK_STATUS, &hdev->state)) in hclgevf_periodic_service_task()
1978 hdev->last_serv_processed = jiffies; in hclgevf_periodic_service_task()
2003 hclgevf_write_dev(&hdev->hw, HCLGE_COMM_VECTOR0_CMDQ_SRC_REG, regclr); in hclgevf_clear_event_cause()
2012 cmdq_stat_reg = hclgevf_read_dev(&hdev->hw, in hclgevf_check_evt_cause()
2015 rst_ing_reg = hclgevf_read_dev(&hdev->hw, HCLGEVF_RST_ING); in hclgevf_check_evt_cause()
2016 dev_info(&hdev->pdev->dev, in hclgevf_check_evt_cause()
2019 set_bit(HCLGEVF_RESET_PENDING, &hdev->reset_state); in hclgevf_check_evt_cause()
2020 set_bit(HCLGE_COMM_STATE_CMD_DISABLE, &hdev->hw.hw.comm_state); in hclgevf_check_evt_cause()
2022 hdev->rst_stats.vf_rst_cnt++; in hclgevf_check_evt_cause()
2026 val = hclgevf_read_dev(&hdev->hw, HCLGEVF_VF_RST_ING); in hclgevf_check_evt_cause()
2027 hclgevf_write_dev(&hdev->hw, HCLGEVF_VF_RST_ING, in hclgevf_check_evt_cause()
2041 if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2) in hclgevf_check_evt_cause()
2051 dev_info(&hdev->pdev->dev, in hclgevf_check_evt_cause()
2074 hclgevf_enable_vector(&hdev->misc_vector, false); in hclgevf_misc_irq_handle()
2081 mod_timer(&hdev->reset_timer, in hclgevf_misc_irq_handle()
2091 hclgevf_enable_vector(&hdev->misc_vector, true); in hclgevf_misc_irq_handle()
2100 hdev->gro_en = true; in hclgevf_configure()
2126 struct pci_dev *pdev = ae_dev->pdev; in hclgevf_alloc_hdev()
2129 hdev = devm_kzalloc(&pdev->dev, sizeof(*hdev), GFP_KERNEL); in hclgevf_alloc_hdev()
2131 return -ENOMEM; in hclgevf_alloc_hdev()
2133 hdev->pdev = pdev; in hclgevf_alloc_hdev()
2134 hdev->ae_dev = ae_dev; in hclgevf_alloc_hdev()
2135 ae_dev->priv = hdev; in hclgevf_alloc_hdev()
2142 struct hnae3_handle *roce = &hdev->roce; in hclgevf_init_roce_base_info()
2143 struct hnae3_handle *nic = &hdev->nic; in hclgevf_init_roce_base_info()
2145 roce->rinfo.num_vectors = hdev->num_roce_msix; in hclgevf_init_roce_base_info()
2147 if (hdev->num_msi_left < roce->rinfo.num_vectors || in hclgevf_init_roce_base_info()
2148 hdev->num_msi_left == 0) in hclgevf_init_roce_base_info()
2149 return -EINVAL; in hclgevf_init_roce_base_info()
2151 roce->rinfo.base_vector = hdev->roce_base_msix_offset; in hclgevf_init_roce_base_info()
2153 roce->rinfo.netdev = nic->kinfo.netdev; in hclgevf_init_roce_base_info()
2154 roce->rinfo.roce_io_base = hdev->hw.hw.io_base; in hclgevf_init_roce_base_info()
2155 roce->rinfo.roce_mem_base = hdev->hw.hw.mem_base; in hclgevf_init_roce_base_info()
2157 roce->pdev = nic->pdev; in hclgevf_init_roce_base_info()
2158 roce->ae_algo = nic->ae_algo; in hclgevf_init_roce_base_info()
2159 bitmap_copy(roce->numa_node_mask.bits, nic->numa_node_mask.bits, in hclgevf_init_roce_base_info()
2170 if (!hnae3_ae_dev_gro_supported(hdev->ae_dev)) in hclgevf_config_gro()
2177 req->gro_en = hdev->gro_en ? 1 : 0; in hclgevf_config_gro()
2179 ret = hclgevf_cmd_send(&hdev->hw, &desc, 1); in hclgevf_config_gro()
2181 dev_err(&hdev->pdev->dev, in hclgevf_config_gro()
2182 "VF GRO hardware config cmd failed, ret = %d.\n", ret); in hclgevf_config_gro()
2189 struct hclge_comm_rss_cfg *rss_cfg = &hdev->rss_cfg; in hclgevf_rss_init_hw()
2195 if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2) { in hclgevf_rss_init_hw()
2196 ret = hclge_comm_set_rss_algo_key(&hdev->hw.hw, in hclgevf_rss_init_hw()
2197 rss_cfg->rss_algo, in hclgevf_rss_init_hw()
2198 rss_cfg->rss_hash_key); in hclgevf_rss_init_hw()
2202 ret = hclge_comm_set_rss_input_tuple(&hdev->hw.hw, rss_cfg); in hclgevf_rss_init_hw()
2207 ret = hclge_comm_set_rss_indir_table(hdev->ae_dev, &hdev->hw.hw, in hclgevf_rss_init_hw()
2208 rss_cfg->rss_indirection_tbl); in hclgevf_rss_init_hw()
2212 hclge_comm_get_rss_tc_info(rss_cfg->rss_size, hdev->hw_tc_map, in hclgevf_rss_init_hw()
2215 return hclge_comm_set_rss_tc_mode(&hdev->hw.hw, tc_offset, in hclgevf_rss_init_hw()
2222 struct hnae3_handle *nic = &hdev->nic; in hclgevf_init_vlan_config()
2227 dev_err(&hdev->pdev->dev, in hclgevf_init_vlan_config()
2232 return hclgevf_set_vlan_filter(&hdev->nic, htons(ETH_P_8021Q), 0, in hclgevf_init_vlan_config()
2240 unsigned long last = hdev->serv_processed_cnt; in hclgevf_flush_link_update()
2243 while (test_bit(HCLGEVF_STATE_LINK_UPDATING, &hdev->state) && in hclgevf_flush_link_update()
2245 last == hdev->serv_processed_cnt) in hclgevf_flush_link_update()
2256 set_bit(HCLGEVF_STATE_DOWN, &hdev->state); in hclgevf_set_timer_task()
2267 clear_bit(HCLGEVF_STATE_DOWN, &hdev->state); in hclgevf_ae_start()
2268 clear_bit(HCLGEVF_STATE_PF_PUSH_LINK_STATUS, &hdev->state); in hclgevf_ae_start()
2283 set_bit(HCLGEVF_STATE_DOWN, &hdev->state); in hclgevf_ae_stop()
2285 if (hdev->reset_type != HNAE3_VF_RESET) in hclgevf_ae_stop()
2318 dev_warn(&hdev->pdev->dev, in hclgevf_client_stop()
2324 clear_bit(HCLGEVF_STATE_MBX_SERVICE_SCHED, &hdev->state); in hclgevf_state_init()
2325 clear_bit(HCLGEVF_STATE_MBX_HANDLING, &hdev->state); in hclgevf_state_init()
2326 clear_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state); in hclgevf_state_init()
2328 INIT_DELAYED_WORK(&hdev->service_task, hclgevf_service_task); in hclgevf_state_init()
2330 timer_setup(&hdev->reset_timer, hclgevf_reset_timer, 0); in hclgevf_state_init()
2332 mutex_init(&hdev->mbx_resp.mbx_mutex); in hclgevf_state_init()
2333 sema_init(&hdev->reset_sem, 1); in hclgevf_state_init()
2335 spin_lock_init(&hdev->mac_table.mac_list_lock); in hclgevf_state_init()
2336 INIT_LIST_HEAD(&hdev->mac_table.uc_mac_list); in hclgevf_state_init()
2337 INIT_LIST_HEAD(&hdev->mac_table.mc_mac_list); in hclgevf_state_init()
2340 set_bit(HCLGEVF_STATE_DOWN, &hdev->state); in hclgevf_state_init()
2345 set_bit(HCLGEVF_STATE_DOWN, &hdev->state); in hclgevf_state_uninit()
2346 set_bit(HCLGEVF_STATE_REMOVING, &hdev->state); in hclgevf_state_uninit()
2348 if (hdev->service_task.work.func) in hclgevf_state_uninit()
2349 cancel_delayed_work_sync(&hdev->service_task); in hclgevf_state_uninit()
2351 mutex_destroy(&hdev->mbx_resp.mbx_mutex); in hclgevf_state_uninit()
2356 struct pci_dev *pdev = hdev->pdev; in hclgevf_init_msi()
2362 hdev->roce_base_msix_offset + 1, in hclgevf_init_msi()
2363 hdev->num_msi, in hclgevf_init_msi()
2367 hdev->num_msi, in hclgevf_init_msi()
2371 dev_err(&pdev->dev, in hclgevf_init_msi()
2372 "failed(%d) to allocate MSI/MSI-X vectors\n", in hclgevf_init_msi()
2376 if (vectors < hdev->num_msi) in hclgevf_init_msi()
2377 dev_warn(&hdev->pdev->dev, in hclgevf_init_msi()
2378 "requested %u MSI/MSI-X, but allocated %d MSI/MSI-X\n", in hclgevf_init_msi()
2379 hdev->num_msi, vectors); in hclgevf_init_msi()
2381 hdev->num_msi = vectors; in hclgevf_init_msi()
2382 hdev->num_msi_left = vectors; in hclgevf_init_msi()
2384 hdev->vector_status = devm_kcalloc(&pdev->dev, hdev->num_msi, in hclgevf_init_msi()
2386 if (!hdev->vector_status) { in hclgevf_init_msi()
2388 return -ENOMEM; in hclgevf_init_msi()
2391 for (i = 0; i < hdev->num_msi; i++) in hclgevf_init_msi()
2392 hdev->vector_status[i] = HCLGEVF_INVALID_VPORT; in hclgevf_init_msi()
2394 hdev->vector_irq = devm_kcalloc(&pdev->dev, hdev->num_msi, in hclgevf_init_msi()
2396 if (!hdev->vector_irq) { in hclgevf_init_msi()
2397 devm_kfree(&pdev->dev, hdev->vector_status); in hclgevf_init_msi()
2399 return -ENOMEM; in hclgevf_init_msi()
2407 struct pci_dev *pdev = hdev->pdev; in hclgevf_uninit_msi()
2409 devm_kfree(&pdev->dev, hdev->vector_status); in hclgevf_uninit_msi()
2410 devm_kfree(&pdev->dev, hdev->vector_irq); in hclgevf_uninit_msi()
2420 snprintf(hdev->misc_vector.name, HNAE3_INT_NAME_LEN, "%s-misc-%s", in hclgevf_misc_irq_init()
2421 HCLGEVF_NAME, pci_name(hdev->pdev)); in hclgevf_misc_irq_init()
2422 ret = request_irq(hdev->misc_vector.vector_irq, hclgevf_misc_irq_handle, in hclgevf_misc_irq_init()
2423 0, hdev->misc_vector.name, hdev); in hclgevf_misc_irq_init()
2425 dev_err(&hdev->pdev->dev, "VF failed to request misc irq(%d)\n", in hclgevf_misc_irq_init()
2426 hdev->misc_vector.vector_irq); in hclgevf_misc_irq_init()
2433 hclgevf_enable_vector(&hdev->misc_vector, true); in hclgevf_misc_irq_init()
2441 hclgevf_enable_vector(&hdev->misc_vector, false); in hclgevf_misc_irq_uninit()
2442 synchronize_irq(hdev->misc_vector.vector_irq); in hclgevf_misc_irq_uninit()
2443 free_irq(hdev->misc_vector.vector_irq, hdev); in hclgevf_misc_irq_uninit()
2449 struct device *dev = &hdev->pdev->dev; in hclgevf_info_show()
2453 dev_info(dev, "Task queue pairs numbers: %u\n", hdev->num_tqps); in hclgevf_info_show()
2454 dev_info(dev, "Desc num per TX queue: %u\n", hdev->num_tx_desc); in hclgevf_info_show()
2455 dev_info(dev, "Desc num per RX queue: %u\n", hdev->num_rx_desc); in hclgevf_info_show()
2456 dev_info(dev, "Numbers of vports: %u\n", hdev->num_alloc_vport); in hclgevf_info_show()
2457 dev_info(dev, "HW tc map: 0x%x\n", hdev->hw_tc_map); in hclgevf_info_show()
2459 hdev->hw.mac.media_type); in hclgevf_info_show()
2467 struct hclgevf_dev *hdev = ae_dev->priv; in hclgevf_init_nic_client_instance()
2468 int rst_cnt = hdev->rst_stats.rst_cnt; in hclgevf_init_nic_client_instance()
2471 ret = client->ops->init_instance(&hdev->nic); in hclgevf_init_nic_client_instance()
2475 set_bit(HCLGEVF_STATE_NIC_REGISTERED, &hdev->state); in hclgevf_init_nic_client_instance()
2476 if (test_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state) || in hclgevf_init_nic_client_instance()
2477 rst_cnt != hdev->rst_stats.rst_cnt) { in hclgevf_init_nic_client_instance()
2478 clear_bit(HCLGEVF_STATE_NIC_REGISTERED, &hdev->state); in hclgevf_init_nic_client_instance()
2480 client->ops->uninit_instance(&hdev->nic, 0); in hclgevf_init_nic_client_instance()
2481 return -EBUSY; in hclgevf_init_nic_client_instance()
2486 if (netif_msg_drv(&hdev->nic)) in hclgevf_init_nic_client_instance()
2495 struct hclgevf_dev *hdev = ae_dev->priv; in hclgevf_init_roce_client_instance()
2498 if (!hnae3_dev_roce_supported(hdev) || !hdev->roce_client || in hclgevf_init_roce_client_instance()
2499 !hdev->nic_client) in hclgevf_init_roce_client_instance()
2506 ret = client->ops->init_instance(&hdev->roce); in hclgevf_init_roce_client_instance()
2510 set_bit(HCLGEVF_STATE_ROCE_REGISTERED, &hdev->state); in hclgevf_init_roce_client_instance()
2519 struct hclgevf_dev *hdev = ae_dev->priv; in hclgevf_init_client_instance()
2522 switch (client->type) { in hclgevf_init_client_instance()
2524 hdev->nic_client = client; in hclgevf_init_client_instance()
2525 hdev->nic.client = client; in hclgevf_init_client_instance()
2532 hdev->roce_client); in hclgevf_init_client_instance()
2539 hdev->roce_client = client; in hclgevf_init_client_instance()
2540 hdev->roce.client = client; in hclgevf_init_client_instance()
2549 return -EINVAL; in hclgevf_init_client_instance()
2555 hdev->nic_client = NULL; in hclgevf_init_client_instance()
2556 hdev->nic.client = NULL; in hclgevf_init_client_instance()
2559 hdev->roce_client = NULL; in hclgevf_init_client_instance()
2560 hdev->roce.client = NULL; in hclgevf_init_client_instance()
2567 struct hclgevf_dev *hdev = ae_dev->priv; in hclgevf_uninit_client_instance()
2569 /* un-init roce, if it exists */ in hclgevf_uninit_client_instance()
2570 if (hdev->roce_client) { in hclgevf_uninit_client_instance()
2571 while (test_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state)) in hclgevf_uninit_client_instance()
2573 clear_bit(HCLGEVF_STATE_ROCE_REGISTERED, &hdev->state); in hclgevf_uninit_client_instance()
2575 hdev->roce_client->ops->uninit_instance(&hdev->roce, 0); in hclgevf_uninit_client_instance()
2576 hdev->roce_client = NULL; in hclgevf_uninit_client_instance()
2577 hdev->roce.client = NULL; in hclgevf_uninit_client_instance()
2580 /* un-init nic/unic, if this was not called by roce client */ in hclgevf_uninit_client_instance()
2581 if (client->ops->uninit_instance && hdev->nic_client && in hclgevf_uninit_client_instance()
2582 client->type != HNAE3_CLIENT_ROCE) { in hclgevf_uninit_client_instance()
2583 while (test_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state)) in hclgevf_uninit_client_instance()
2585 clear_bit(HCLGEVF_STATE_NIC_REGISTERED, &hdev->state); in hclgevf_uninit_client_instance()
2587 client->ops->uninit_instance(&hdev->nic, 0); in hclgevf_uninit_client_instance()
2588 hdev->nic_client = NULL; in hclgevf_uninit_client_instance()
2589 hdev->nic.client = NULL; in hclgevf_uninit_client_instance()
2595 struct pci_dev *pdev = hdev->pdev; in hclgevf_dev_mem_map()
2596 struct hclgevf_hw *hw = &hdev->hw; in hclgevf_dev_mem_map() local
2602 hw->hw.mem_base = in hclgevf_dev_mem_map()
2603 devm_ioremap_wc(&pdev->dev, in hclgevf_dev_mem_map()
2606 if (!hw->hw.mem_base) { in hclgevf_dev_mem_map()
2607 dev_err(&pdev->dev, "failed to map device memory\n"); in hclgevf_dev_mem_map()
2608 return -EFAULT; in hclgevf_dev_mem_map()
2616 struct pci_dev *pdev = hdev->pdev; in hclgevf_pci_init()
2617 struct hclgevf_hw *hw; in hclgevf_pci_init() local
2622 dev_err(&pdev->dev, "failed to enable PCI device\n"); in hclgevf_pci_init()
2626 ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); in hclgevf_pci_init()
2628 dev_err(&pdev->dev, "can't set consistent PCI DMA, exiting"); in hclgevf_pci_init()
2634 dev_err(&pdev->dev, "PCI request regions failed %d\n", ret); in hclgevf_pci_init()
2639 hw = &hdev->hw; in hclgevf_pci_init()
2640 hw->hw.io_base = pci_iomap(pdev, 2, 0); in hclgevf_pci_init()
2641 if (!hw->hw.io_base) { in hclgevf_pci_init()
2642 dev_err(&pdev->dev, "can't map configuration register space\n"); in hclgevf_pci_init()
2643 ret = -ENOMEM; in hclgevf_pci_init()
2654 pci_iounmap(pdev, hdev->hw.hw.io_base); in hclgevf_pci_init()
2665 struct pci_dev *pdev = hdev->pdev; in hclgevf_pci_uninit()
2667 if (hdev->hw.hw.mem_base) in hclgevf_pci_uninit()
2668 devm_iounmap(&pdev->dev, hdev->hw.hw.mem_base); in hclgevf_pci_uninit()
2670 pci_iounmap(pdev, hdev->hw.hw.io_base); in hclgevf_pci_uninit()
2682 ret = hclgevf_cmd_send(&hdev->hw, &desc, 1); in hclgevf_query_vf_resource()
2684 dev_err(&hdev->pdev->dev, in hclgevf_query_vf_resource()
2692 hdev->roce_base_msix_offset = in hclgevf_query_vf_resource()
2693 hnae3_get_field(le16_to_cpu(req->msixcap_localid_ba_rocee), in hclgevf_query_vf_resource()
2696 hdev->num_roce_msix = in hclgevf_query_vf_resource()
2697 hnae3_get_field(le16_to_cpu(req->vf_intr_vector_number), in hclgevf_query_vf_resource()
2701 hdev->num_nic_msix = hdev->num_roce_msix; in hclgevf_query_vf_resource()
2706 hdev->num_msi = hdev->num_roce_msix + in hclgevf_query_vf_resource()
2707 hdev->roce_base_msix_offset; in hclgevf_query_vf_resource()
2709 hdev->num_msi = in hclgevf_query_vf_resource()
2710 hnae3_get_field(le16_to_cpu(req->vf_intr_vector_number), in hclgevf_query_vf_resource()
2713 hdev->num_nic_msix = hdev->num_msi; in hclgevf_query_vf_resource()
2716 if (hdev->num_nic_msix < HNAE3_MIN_VECTOR_NUM) { in hclgevf_query_vf_resource()
2717 dev_err(&hdev->pdev->dev, in hclgevf_query_vf_resource()
2719 hdev->num_nic_msix); in hclgevf_query_vf_resource()
2720 return -EINVAL; in hclgevf_query_vf_resource()
2730 struct hnae3_ae_dev *ae_dev = pci_get_drvdata(hdev->pdev); in hclgevf_set_default_dev_specs()
2732 ae_dev->dev_specs.max_non_tso_bd_num = in hclgevf_set_default_dev_specs()
2734 ae_dev->dev_specs.rss_ind_tbl_size = HCLGEVF_RSS_IND_TBL_SIZE; in hclgevf_set_default_dev_specs()
2735 ae_dev->dev_specs.rss_key_size = HCLGE_COMM_RSS_KEY_SIZE; in hclgevf_set_default_dev_specs()
2736 ae_dev->dev_specs.max_int_gl = HCLGEVF_DEF_MAX_INT_GL; in hclgevf_set_default_dev_specs()
2737 ae_dev->dev_specs.max_frm_size = HCLGEVF_MAC_MAX_FRAME; in hclgevf_set_default_dev_specs()
2743 struct hnae3_ae_dev *ae_dev = pci_get_drvdata(hdev->pdev); in hclgevf_parse_dev_specs()
2750 ae_dev->dev_specs.max_non_tso_bd_num = req0->max_non_tso_bd_num; in hclgevf_parse_dev_specs()
2751 ae_dev->dev_specs.rss_ind_tbl_size = in hclgevf_parse_dev_specs()
2752 le16_to_cpu(req0->rss_ind_tbl_size); in hclgevf_parse_dev_specs()
2753 ae_dev->dev_specs.int_ql_max = le16_to_cpu(req0->int_ql_max); in hclgevf_parse_dev_specs()
2754 ae_dev->dev_specs.rss_key_size = le16_to_cpu(req0->rss_key_size); in hclgevf_parse_dev_specs()
2755 ae_dev->dev_specs.max_int_gl = le16_to_cpu(req1->max_int_gl); in hclgevf_parse_dev_specs()
2756 ae_dev->dev_specs.max_frm_size = le16_to_cpu(req1->max_frm_size); in hclgevf_parse_dev_specs()
2761 struct hnae3_dev_specs *dev_specs = &hdev->ae_dev->dev_specs; in hclgevf_check_dev_specs()
2763 if (!dev_specs->max_non_tso_bd_num) in hclgevf_check_dev_specs()
2764 dev_specs->max_non_tso_bd_num = HCLGEVF_MAX_NON_TSO_BD_NUM; in hclgevf_check_dev_specs()
2765 if (!dev_specs->rss_ind_tbl_size) in hclgevf_check_dev_specs()
2766 dev_specs->rss_ind_tbl_size = HCLGEVF_RSS_IND_TBL_SIZE; in hclgevf_check_dev_specs()
2767 if (!dev_specs->rss_key_size) in hclgevf_check_dev_specs()
2768 dev_specs->rss_key_size = HCLGE_COMM_RSS_KEY_SIZE; in hclgevf_check_dev_specs()
2769 if (!dev_specs->max_int_gl) in hclgevf_check_dev_specs()
2770 dev_specs->max_int_gl = HCLGEVF_DEF_MAX_INT_GL; in hclgevf_check_dev_specs()
2771 if (!dev_specs->max_frm_size) in hclgevf_check_dev_specs()
2772 dev_specs->max_frm_size = HCLGEVF_MAC_MAX_FRAME; in hclgevf_check_dev_specs()
2784 if (hdev->ae_dev->dev_version < HNAE3_DEVICE_VERSION_V3) { in hclgevf_query_dev_specs()
2789 for (i = 0; i < HCLGEVF_QUERY_DEV_SPECS_BD_NUM - 1; i++) { in hclgevf_query_dev_specs()
2796 ret = hclgevf_cmd_send(&hdev->hw, desc, HCLGEVF_QUERY_DEV_SPECS_BD_NUM); in hclgevf_query_dev_specs()
2808 struct pci_dev *pdev = hdev->pdev; in hclgevf_pci_reset()
2811 if ((hdev->reset_type == HNAE3_VF_FULL_RESET || in hclgevf_pci_reset()
2812 hdev->reset_type == HNAE3_FLR_RESET) && in hclgevf_pci_reset()
2813 test_bit(HCLGEVF_STATE_IRQ_INITED, &hdev->state)) { in hclgevf_pci_reset()
2816 clear_bit(HCLGEVF_STATE_IRQ_INITED, &hdev->state); in hclgevf_pci_reset()
2819 if (!test_bit(HCLGEVF_STATE_IRQ_INITED, &hdev->state)) { in hclgevf_pci_reset()
2823 dev_err(&pdev->dev, in hclgevf_pci_reset()
2824 "failed(%d) to init MSI/MSI-X\n", ret); in hclgevf_pci_reset()
2831 dev_err(&pdev->dev, "failed(%d) to init Misc IRQ(vector0)\n", in hclgevf_pci_reset()
2836 set_bit(HCLGEVF_STATE_IRQ_INITED, &hdev->state); in hclgevf_pci_reset()
2853 if (hnae3_ae_dev_rxd_adv_layout_supported(hdev->ae_dev)) in hclgevf_init_rxd_adv_layout()
2854 hclgevf_write_dev(&hdev->hw, HCLGEVF_RXD_ADV_LAYOUT_EN_REG, 1); in hclgevf_init_rxd_adv_layout()
2859 if (hnae3_ae_dev_rxd_adv_layout_supported(hdev->ae_dev)) in hclgevf_uninit_rxd_adv_layout()
2860 hclgevf_write_dev(&hdev->hw, HCLGEVF_RXD_ADV_LAYOUT_EN_REG, 0); in hclgevf_uninit_rxd_adv_layout()
2865 struct pci_dev *pdev = hdev->pdev; in hclgevf_reset_hdev()
2870 dev_err(&pdev->dev, "pci reset failed %d\n", ret); in hclgevf_reset_hdev()
2876 ret = hclge_comm_cmd_init(hdev->ae_dev, &hdev->hw.hw, in hclgevf_reset_hdev()
2877 &hdev->fw_version, false, in hclgevf_reset_hdev()
2878 hdev->reset_pending); in hclgevf_reset_hdev()
2880 dev_err(&pdev->dev, "cmd failed %d\n", ret); in hclgevf_reset_hdev()
2886 dev_err(&hdev->pdev->dev, in hclgevf_reset_hdev()
2895 ret = hclgevf_init_vlan_config(hdev, hdev->rxvtag_strip_en); in hclgevf_reset_hdev()
2897 dev_err(&hdev->pdev->dev, in hclgevf_reset_hdev()
2907 set_bit(HCLGEVF_STATE_PROMISC_CHANGED, &hdev->state); in hclgevf_reset_hdev()
2911 dev_info(&hdev->pdev->dev, "Reset done\n"); in hclgevf_reset_hdev()
2918 struct pci_dev *pdev = hdev->pdev; in hclgevf_init_hdev()
2925 ret = hclge_comm_cmd_queue_init(hdev->pdev, &hdev->hw.hw); in hclgevf_init_hdev()
2931 hclge_comm_cmd_init_ops(&hdev->hw.hw, &hclgevf_cmq_ops); in hclgevf_init_hdev()
2932 ret = hclge_comm_cmd_init(hdev->ae_dev, &hdev->hw.hw, in hclgevf_init_hdev()
2933 &hdev->fw_version, false, in hclgevf_init_hdev()
2934 hdev->reset_pending); in hclgevf_init_hdev()
2945 dev_err(&pdev->dev, in hclgevf_init_hdev()
2952 dev_err(&pdev->dev, "failed(%d) to init MSI/MSI-X\n", ret); in hclgevf_init_hdev()
2957 hdev->reset_level = HNAE3_VF_FUNC_RESET; in hclgevf_init_hdev()
2958 hdev->reset_type = HNAE3_NONE_RESET; in hclgevf_init_hdev()
2964 set_bit(HCLGEVF_STATE_IRQ_INITED, &hdev->state); in hclgevf_init_hdev()
2968 dev_err(&pdev->dev, "failed(%d) to fetch configuration\n", ret); in hclgevf_init_hdev()
2974 dev_err(&pdev->dev, "failed(%d) to allocate TQPs\n", ret); in hclgevf_init_hdev()
2987 ret = hclge_comm_rss_init_cfg(&hdev->nic, hdev->ae_dev, in hclgevf_init_hdev()
2988 &hdev->rss_cfg); in hclgevf_init_hdev()
2990 dev_err(&pdev->dev, "failed to init rss cfg, ret = %d\n", ret); in hclgevf_init_hdev()
2996 dev_err(&hdev->pdev->dev, in hclgevf_init_hdev()
3004 dev_err(&pdev->dev, in hclgevf_init_hdev()
3012 dev_err(&hdev->pdev->dev, in hclgevf_init_hdev()
3023 set_bit(HCLGEVF_STATE_SERVICE_INITED, &hdev->state); in hclgevf_init_hdev()
3025 hdev->last_reset_time = jiffies; in hclgevf_init_hdev()
3026 dev_info(&hdev->pdev->dev, "finished initializing %s driver\n", in hclgevf_init_hdev()
3039 hclge_comm_cmd_uninit(hdev->ae_dev, &hdev->hw.hw); in hclgevf_init_hdev()
3042 clear_bit(HCLGEVF_STATE_IRQ_INITED, &hdev->state); in hclgevf_init_hdev()
3056 if (test_bit(HCLGEVF_STATE_IRQ_INITED, &hdev->state)) { in hclgevf_uninit_hdev()
3061 hclge_comm_cmd_uninit(hdev->ae_dev, &hdev->hw.hw); in hclgevf_uninit_hdev()
3069 struct pci_dev *pdev = ae_dev->pdev; in hclgevf_init_ae_dev()
3074 dev_err(&pdev->dev, "hclge device allocation failed\n"); in hclgevf_init_ae_dev()
3078 ret = hclgevf_init_hdev(ae_dev->priv); in hclgevf_init_ae_dev()
3080 dev_err(&pdev->dev, "hclge device initialization failed\n"); in hclgevf_init_ae_dev()
3089 struct hclgevf_dev *hdev = ae_dev->priv; in hclgevf_uninit_ae_dev()
3092 ae_dev->priv = NULL; in hclgevf_uninit_ae_dev()
3097 struct hnae3_handle *nic = &hdev->nic; in hclgevf_get_max_channels()
3098 struct hnae3_knic_private_info *kinfo = &nic->kinfo; in hclgevf_get_max_channels()
3100 return min_t(u32, hdev->rss_size_max, in hclgevf_get_max_channels()
3101 hdev->num_tqps / kinfo->tc_info.num_tc); in hclgevf_get_max_channels()
3105 * hclgevf_get_channels - Get the current channels enabled and max supported.
3119 ch->max_combined = hclgevf_get_max_channels(hdev); in hclgevf_get_channels()
3120 ch->other_count = 0; in hclgevf_get_channels()
3121 ch->max_other = 0; in hclgevf_get_channels()
3122 ch->combined_count = handle->kinfo.rss_size; in hclgevf_get_channels()
3130 *alloc_tqps = hdev->num_tqps; in hclgevf_get_tqps_and_rss_info()
3131 *max_rss_size = hdev->rss_size_max; in hclgevf_get_tqps_and_rss_info()
3137 struct hnae3_knic_private_info *kinfo = &handle->kinfo; in hclgevf_update_rss_size()
3141 kinfo->req_rss_size = new_tqps_num; in hclgevf_update_rss_size()
3143 max_rss_size = min_t(u16, hdev->rss_size_max, in hclgevf_update_rss_size()
3144 hdev->num_tqps / kinfo->tc_info.num_tc); in hclgevf_update_rss_size()
3149 if (kinfo->req_rss_size != kinfo->rss_size && kinfo->req_rss_size && in hclgevf_update_rss_size()
3150 kinfo->req_rss_size <= max_rss_size) in hclgevf_update_rss_size()
3151 kinfo->rss_size = kinfo->req_rss_size; in hclgevf_update_rss_size()
3152 else if (kinfo->rss_size > max_rss_size || in hclgevf_update_rss_size()
3153 (!kinfo->req_rss_size && kinfo->rss_size < max_rss_size)) in hclgevf_update_rss_size()
3154 kinfo->rss_size = max_rss_size; in hclgevf_update_rss_size()
3156 kinfo->num_tqps = kinfo->tc_info.num_tc * kinfo->rss_size; in hclgevf_update_rss_size()
3163 struct hnae3_knic_private_info *kinfo = &handle->kinfo; in hclgevf_set_channels()
3167 u16 cur_rss_size = kinfo->rss_size; in hclgevf_set_channels()
3168 u16 cur_tqps = kinfo->num_tqps; in hclgevf_set_channels()
3175 hclge_comm_get_rss_tc_info(kinfo->rss_size, hdev->hw_tc_map, in hclgevf_set_channels()
3177 ret = hclge_comm_set_rss_tc_mode(&hdev->hw.hw, tc_offset, in hclgevf_set_channels()
3187 rss_indir = kcalloc(hdev->ae_dev->dev_specs.rss_ind_tbl_size, in hclgevf_set_channels()
3190 return -ENOMEM; in hclgevf_set_channels()
3192 for (i = 0; i < hdev->ae_dev->dev_specs.rss_ind_tbl_size; i++) in hclgevf_set_channels()
3193 rss_indir[i] = i % kinfo->rss_size; in hclgevf_set_channels()
3195 hdev->rss_cfg.rss_size = kinfo->rss_size; in hclgevf_set_channels()
3199 dev_err(&hdev->pdev->dev, "set rss indir table fail, ret=%d\n", in hclgevf_set_channels()
3206 dev_info(&hdev->pdev->dev, in hclgevf_set_channels()
3208 cur_rss_size, kinfo->rss_size, in hclgevf_set_channels()
3209 cur_tqps, kinfo->rss_size * kinfo->tc_info.num_tc); in hclgevf_set_channels()
3218 return hdev->hw.mac.link; in hclgevf_get_status()
3228 *speed = hdev->hw.mac.speed; in hclgevf_get_ksettings_an_result()
3230 *duplex = hdev->hw.mac.duplex; in hclgevf_get_ksettings_an_result()
3238 hdev->hw.mac.speed = speed; in hclgevf_update_speed_duplex()
3239 hdev->hw.mac.duplex = duplex; in hclgevf_update_speed_duplex()
3245 bool gro_en_old = hdev->gro_en; in hclgevf_gro_en()
3248 hdev->gro_en = enable; in hclgevf_gro_en()
3251 hdev->gro_en = gro_en_old; in hclgevf_gro_en()
3262 *media_type = hdev->hw.mac.media_type; in hclgevf_get_media_type()
3265 *module_type = hdev->hw.mac.module_type; in hclgevf_get_media_type()
3272 return !!hclgevf_read_dev(&hdev->hw, HCLGEVF_RST_ING); in hclgevf_get_hw_reset_stat()
3279 return test_bit(HCLGE_COMM_STATE_CMD_DISABLE, &hdev->hw.hw.comm_state); in hclgevf_get_cmdq_stat()
3286 return test_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state); in hclgevf_ae_dev_resetting()
3293 return hdev->rst_stats.hw_rst_done_cnt; in hclgevf_ae_dev_reset_cnt()
3302 *supported = hdev->hw.mac.supported; in hclgevf_get_link_mode()
3303 *advertising = hdev->hw.mac.advertising; in hclgevf_get_link_mode()
3309 struct hnae3_handle *nic = &hdev->nic; in hclgevf_update_port_base_vlan_info()
3315 if (test_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state) || in hclgevf_update_port_base_vlan_info()
3316 test_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state)) { in hclgevf_update_port_base_vlan_info()
3317 dev_warn(&hdev->pdev->dev, in hclgevf_update_port_base_vlan_info()
3336 nic->port_base_vlan_state = state; in hclgevf_update_port_base_vlan_info()
3338 nic->port_base_vlan_state = HNAE3_PORT_BASE_VLAN_ENABLE; in hclgevf_update_port_base_vlan_info()
3416 return -ENOMEM; in hclgevf_init()