Lines Matching +full:local +full:- +full:bd +full:- +full:address
1 // SPDX-License-Identifier: GPL-2.0+
17 * Copyright (c) 2001-2005 Greg Ungerer (gerg@snapgear.com)
20 * Copyright (c) 2004-2006 Macq Electronique SA.
22 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
194 { .compatible = "fsl,imx25-fec", .data = &fec_imx25_info, },
195 { .compatible = "fsl,imx27-fec", .data = &fec_imx27_info, },
196 { .compatible = "fsl,imx28-fec", .data = &fec_imx28_info, },
197 { .compatible = "fsl,imx6q-fec", .data = &fec_imx6q_info, },
198 { .compatible = "fsl,mvf600-fec", .data = &fec_mvf600_info, },
199 { .compatible = "fsl,imx6sx-fec", .data = &fec_imx6x_info, },
200 { .compatible = "fsl,imx6ul-fec", .data = &fec_imx6ul_info, },
201 { .compatible = "fsl,imx8mq-fec", .data = &fec_imx8mq_info, },
202 { .compatible = "fsl,imx8qm-fec", .data = &fec_imx8qm_info, },
203 { .compatible = "fsl,s32v234-fec", .data = &fec_s32v234_info, },
210 MODULE_PARM_DESC(macaddr, "FEC Ethernet MAC address");
214 * Some hardware gets it MAC address out of local flash memory.
215 * if this is non-zero then assume it is the address to get MAC from.
237 #define PKT_MAXBUF_SIZE (round_down(2048 - 64, 64))
308 ((addr >= txq->tso_hdrs_dma) && \
309 (addr < txq->tso_hdrs_dma + txq->bd.ring_size * TSO_HEADER_SIZE))
314 struct bufdesc_prop *bd) in fec_enet_get_nextdesc() argument
316 return (bdp >= bd->last) ? bd->base in fec_enet_get_nextdesc()
317 : (struct bufdesc *)(((void *)bdp) + bd->dsize); in fec_enet_get_nextdesc()
321 struct bufdesc_prop *bd) in fec_enet_get_prevdesc() argument
323 return (bdp <= bd->base) ? bd->last in fec_enet_get_prevdesc()
324 : (struct bufdesc *)(((void *)bdp) - bd->dsize); in fec_enet_get_prevdesc()
328 struct bufdesc_prop *bd) in fec_enet_get_bd_index() argument
330 return ((const char *)bdp - (const char *)bd->base) >> bd->dsize_log2; in fec_enet_get_bd_index()
337 entries = (((const char *)txq->dirty_tx - in fec_enet_get_free_txdesc_num()
338 (const char *)txq->bd.cur) >> txq->bd.dsize_log2) - 1; in fec_enet_get_free_txdesc_num()
340 return entries >= 0 ? entries : entries + txq->bd.ring_size; in fec_enet_get_free_txdesc_num()
362 txq = fep->tx_queue[0]; in fec_dump()
363 bdp = txq->bd.base; in fec_dump()
368 bdp == txq->bd.cur ? 'S' : ' ', in fec_dump()
369 bdp == txq->dirty_tx ? 'H' : ' ', in fec_dump()
370 fec16_to_cpu(bdp->cbd_sc), in fec_dump()
371 fec32_to_cpu(bdp->cbd_bufaddr), in fec_dump()
372 fec16_to_cpu(bdp->cbd_datlen), in fec_dump()
373 txq->tx_buf[index].buf_p); in fec_dump()
374 bdp = fec_enet_get_nextdesc(bdp, &txq->bd); in fec_dump()
376 } while (bdp != txq->bd.base); in fec_dump()
381 * a band-aid with a manual flush in fec_enet_rx_queue.
419 fec_dma_free(dev, this->size, this->vaddr, this->dma_handle); in fec_dmam_release()
436 dr->vaddr = vaddr; in fec_dmam_alloc()
437 dr->dma_handle = *handle; in fec_dmam_alloc()
438 dr->size = size; in fec_dmam_alloc()
445 return skb->protocol == htons(ETH_P_IP) && ip_hdr(skb)->version == 4; in is_ipv4_pkt()
452 if (skb->ip_summed != CHECKSUM_PARTIAL) in fec_enet_clear_csum()
456 return -1; in fec_enet_clear_csum()
459 ip_hdr(skb)->check = 0; in fec_enet_clear_csum()
460 *(__sum16 *)(skb->head + skb->csum_start + skb->csum_offset) = 0; in fec_enet_clear_csum()
469 struct bpf_prog *xdp_prog = READ_ONCE(fep->xdp_prog); in fec_enet_create_page_pool()
474 .nid = dev_to_node(&fep->pdev->dev), in fec_enet_create_page_pool()
475 .dev = &fep->pdev->dev, in fec_enet_create_page_pool()
482 rxq->page_pool = page_pool_create(&pp_params); in fec_enet_create_page_pool()
483 if (IS_ERR(rxq->page_pool)) { in fec_enet_create_page_pool()
484 err = PTR_ERR(rxq->page_pool); in fec_enet_create_page_pool()
485 rxq->page_pool = NULL; in fec_enet_create_page_pool()
489 err = xdp_rxq_info_reg(&rxq->xdp_rxq, fep->netdev, rxq->id, 0); in fec_enet_create_page_pool()
493 err = xdp_rxq_info_reg_mem_model(&rxq->xdp_rxq, MEM_TYPE_PAGE_POOL, in fec_enet_create_page_pool()
494 rxq->page_pool); in fec_enet_create_page_pool()
501 xdp_rxq_info_unreg(&rxq->xdp_rxq); in fec_enet_create_page_pool()
503 page_pool_destroy(rxq->page_pool); in fec_enet_create_page_pool()
504 rxq->page_pool = NULL; in fec_enet_create_page_pool()
514 struct bufdesc *bdp = txq->bd.cur; in fec_enet_txq_submit_frag_skb()
516 int nr_frags = skb_shinfo(skb)->nr_frags; in fec_enet_txq_submit_frag_skb()
527 this_frag = &skb_shinfo(skb)->frags[frag]; in fec_enet_txq_submit_frag_skb()
528 bdp = fec_enet_get_nextdesc(bdp, &txq->bd); in fec_enet_txq_submit_frag_skb()
531 status = fec16_to_cpu(bdp->cbd_sc); in fec_enet_txq_submit_frag_skb()
534 frag_len = skb_frag_size(&skb_shinfo(skb)->frags[frag]); in fec_enet_txq_submit_frag_skb()
536 /* Handle the last BD specially */ in fec_enet_txq_submit_frag_skb()
537 if (frag == nr_frags - 1) { in fec_enet_txq_submit_frag_skb()
539 if (fep->bufdesc_ex) { in fec_enet_txq_submit_frag_skb()
541 if (unlikely(skb_shinfo(skb)->tx_flags & in fec_enet_txq_submit_frag_skb()
542 SKBTX_HW_TSTAMP && fep->hwts_tx_en)) in fec_enet_txq_submit_frag_skb()
547 if (fep->bufdesc_ex) { in fec_enet_txq_submit_frag_skb()
548 if (fep->quirks & FEC_QUIRK_HAS_AVB) in fec_enet_txq_submit_frag_skb()
549 estatus |= FEC_TX_BD_FTYPE(txq->bd.qid); in fec_enet_txq_submit_frag_skb()
550 if (skb->ip_summed == CHECKSUM_PARTIAL) in fec_enet_txq_submit_frag_skb()
553 ebdp->cbd_bdu = 0; in fec_enet_txq_submit_frag_skb()
554 ebdp->cbd_esc = cpu_to_fec32(estatus); in fec_enet_txq_submit_frag_skb()
559 index = fec_enet_get_bd_index(bdp, &txq->bd); in fec_enet_txq_submit_frag_skb()
560 if (((unsigned long) bufaddr) & fep->tx_align || in fec_enet_txq_submit_frag_skb()
561 fep->quirks & FEC_QUIRK_SWAP_FRAME) { in fec_enet_txq_submit_frag_skb()
562 memcpy(txq->tx_bounce[index], bufaddr, frag_len); in fec_enet_txq_submit_frag_skb()
563 bufaddr = txq->tx_bounce[index]; in fec_enet_txq_submit_frag_skb()
565 if (fep->quirks & FEC_QUIRK_SWAP_FRAME) in fec_enet_txq_submit_frag_skb()
569 addr = dma_map_single(&fep->pdev->dev, bufaddr, frag_len, in fec_enet_txq_submit_frag_skb()
571 if (dma_mapping_error(&fep->pdev->dev, addr)) { in fec_enet_txq_submit_frag_skb()
577 bdp->cbd_bufaddr = cpu_to_fec32(addr); in fec_enet_txq_submit_frag_skb()
578 bdp->cbd_datlen = cpu_to_fec16(frag_len); in fec_enet_txq_submit_frag_skb()
583 bdp->cbd_sc = cpu_to_fec16(status); in fec_enet_txq_submit_frag_skb()
588 bdp = txq->bd.cur; in fec_enet_txq_submit_frag_skb()
590 bdp = fec_enet_get_nextdesc(bdp, &txq->bd); in fec_enet_txq_submit_frag_skb()
591 dma_unmap_single(&fep->pdev->dev, fec32_to_cpu(bdp->cbd_bufaddr), in fec_enet_txq_submit_frag_skb()
592 fec16_to_cpu(bdp->cbd_datlen), DMA_TO_DEVICE); in fec_enet_txq_submit_frag_skb()
594 return ERR_PTR(-ENOMEM); in fec_enet_txq_submit_frag_skb()
601 int nr_frags = skb_shinfo(skb)->nr_frags; in fec_enet_txq_submit_skb()
615 netdev_err(ndev, "NOT enough BD for SG!\n"); in fec_enet_txq_submit_skb()
619 /* Protocol checksum off-load for TCP and UDP. */ in fec_enet_txq_submit_skb()
626 bdp = txq->bd.cur; in fec_enet_txq_submit_skb()
628 status = fec16_to_cpu(bdp->cbd_sc); in fec_enet_txq_submit_skb()
632 bufaddr = skb->data; in fec_enet_txq_submit_skb()
635 index = fec_enet_get_bd_index(bdp, &txq->bd); in fec_enet_txq_submit_skb()
636 if (((unsigned long) bufaddr) & fep->tx_align || in fec_enet_txq_submit_skb()
637 fep->quirks & FEC_QUIRK_SWAP_FRAME) { in fec_enet_txq_submit_skb()
638 memcpy(txq->tx_bounce[index], skb->data, buflen); in fec_enet_txq_submit_skb()
639 bufaddr = txq->tx_bounce[index]; in fec_enet_txq_submit_skb()
641 if (fep->quirks & FEC_QUIRK_SWAP_FRAME) in fec_enet_txq_submit_skb()
646 addr = dma_map_single(&fep->pdev->dev, bufaddr, buflen, DMA_TO_DEVICE); in fec_enet_txq_submit_skb()
647 if (dma_mapping_error(&fep->pdev->dev, addr)) { in fec_enet_txq_submit_skb()
657 dma_unmap_single(&fep->pdev->dev, addr, in fec_enet_txq_submit_skb()
664 if (fep->bufdesc_ex) { in fec_enet_txq_submit_skb()
666 if (unlikely(skb_shinfo(skb)->tx_flags & in fec_enet_txq_submit_skb()
667 SKBTX_HW_TSTAMP && fep->hwts_tx_en)) in fec_enet_txq_submit_skb()
671 bdp->cbd_bufaddr = cpu_to_fec32(addr); in fec_enet_txq_submit_skb()
672 bdp->cbd_datlen = cpu_to_fec16(buflen); in fec_enet_txq_submit_skb()
674 if (fep->bufdesc_ex) { in fec_enet_txq_submit_skb()
678 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP && in fec_enet_txq_submit_skb()
679 fep->hwts_tx_en)) in fec_enet_txq_submit_skb()
680 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; in fec_enet_txq_submit_skb()
682 if (fep->quirks & FEC_QUIRK_HAS_AVB) in fec_enet_txq_submit_skb()
683 estatus |= FEC_TX_BD_FTYPE(txq->bd.qid); in fec_enet_txq_submit_skb()
685 if (skb->ip_summed == CHECKSUM_PARTIAL) in fec_enet_txq_submit_skb()
688 ebdp->cbd_bdu = 0; in fec_enet_txq_submit_skb()
689 ebdp->cbd_esc = cpu_to_fec32(estatus); in fec_enet_txq_submit_skb()
692 index = fec_enet_get_bd_index(last_bdp, &txq->bd); in fec_enet_txq_submit_skb()
694 txq->tx_buf[index].buf_p = skb; in fec_enet_txq_submit_skb()
702 * it's the last BD of the frame, and to put the CRC on the end. in fec_enet_txq_submit_skb()
705 bdp->cbd_sc = cpu_to_fec16(status); in fec_enet_txq_submit_skb()
707 /* If this was the last BD in the ring, start at the beginning again. */ in fec_enet_txq_submit_skb()
708 bdp = fec_enet_get_nextdesc(last_bdp, &txq->bd); in fec_enet_txq_submit_skb()
712 /* Make sure the update to bdp is performed before txq->bd.cur. */ in fec_enet_txq_submit_skb()
714 txq->bd.cur = bdp; in fec_enet_txq_submit_skb()
717 if (!(fep->quirks & FEC_QUIRK_ERR007885) || in fec_enet_txq_submit_skb()
718 !readl(txq->bd.reg_desc_active) || in fec_enet_txq_submit_skb()
719 !readl(txq->bd.reg_desc_active) || in fec_enet_txq_submit_skb()
720 !readl(txq->bd.reg_desc_active) || in fec_enet_txq_submit_skb()
721 !readl(txq->bd.reg_desc_active)) in fec_enet_txq_submit_skb()
722 writel(0, txq->bd.reg_desc_active); in fec_enet_txq_submit_skb()
739 status = fec16_to_cpu(bdp->cbd_sc); in fec_enet_txq_put_data_tso()
744 if (((unsigned long) data) & fep->tx_align || in fec_enet_txq_put_data_tso()
745 fep->quirks & FEC_QUIRK_SWAP_FRAME) { in fec_enet_txq_put_data_tso()
746 memcpy(txq->tx_bounce[index], data, size); in fec_enet_txq_put_data_tso()
747 data = txq->tx_bounce[index]; in fec_enet_txq_put_data_tso()
749 if (fep->quirks & FEC_QUIRK_SWAP_FRAME) in fec_enet_txq_put_data_tso()
753 addr = dma_map_single(&fep->pdev->dev, data, size, DMA_TO_DEVICE); in fec_enet_txq_put_data_tso()
754 if (dma_mapping_error(&fep->pdev->dev, addr)) { in fec_enet_txq_put_data_tso()
761 bdp->cbd_datlen = cpu_to_fec16(size); in fec_enet_txq_put_data_tso()
762 bdp->cbd_bufaddr = cpu_to_fec32(addr); in fec_enet_txq_put_data_tso()
764 if (fep->bufdesc_ex) { in fec_enet_txq_put_data_tso()
765 if (fep->quirks & FEC_QUIRK_HAS_AVB) in fec_enet_txq_put_data_tso()
766 estatus |= FEC_TX_BD_FTYPE(txq->bd.qid); in fec_enet_txq_put_data_tso()
767 if (skb->ip_summed == CHECKSUM_PARTIAL) in fec_enet_txq_put_data_tso()
769 ebdp->cbd_bdu = 0; in fec_enet_txq_put_data_tso()
770 ebdp->cbd_esc = cpu_to_fec32(estatus); in fec_enet_txq_put_data_tso()
773 /* Handle the last BD specially */ in fec_enet_txq_put_data_tso()
778 if (fep->bufdesc_ex) in fec_enet_txq_put_data_tso()
779 ebdp->cbd_esc |= cpu_to_fec32(BD_ENET_TX_INT); in fec_enet_txq_put_data_tso()
782 bdp->cbd_sc = cpu_to_fec16(status); in fec_enet_txq_put_data_tso()
800 status = fec16_to_cpu(bdp->cbd_sc); in fec_enet_txq_put_hdr_tso()
804 bufaddr = txq->tso_hdrs + index * TSO_HEADER_SIZE; in fec_enet_txq_put_hdr_tso()
805 dmabuf = txq->tso_hdrs_dma + index * TSO_HEADER_SIZE; in fec_enet_txq_put_hdr_tso()
806 if (((unsigned long)bufaddr) & fep->tx_align || in fec_enet_txq_put_hdr_tso()
807 fep->quirks & FEC_QUIRK_SWAP_FRAME) { in fec_enet_txq_put_hdr_tso()
808 memcpy(txq->tx_bounce[index], skb->data, hdr_len); in fec_enet_txq_put_hdr_tso()
809 bufaddr = txq->tx_bounce[index]; in fec_enet_txq_put_hdr_tso()
811 if (fep->quirks & FEC_QUIRK_SWAP_FRAME) in fec_enet_txq_put_hdr_tso()
814 dmabuf = dma_map_single(&fep->pdev->dev, bufaddr, in fec_enet_txq_put_hdr_tso()
816 if (dma_mapping_error(&fep->pdev->dev, dmabuf)) { in fec_enet_txq_put_hdr_tso()
824 bdp->cbd_bufaddr = cpu_to_fec32(dmabuf); in fec_enet_txq_put_hdr_tso()
825 bdp->cbd_datlen = cpu_to_fec16(hdr_len); in fec_enet_txq_put_hdr_tso()
827 if (fep->bufdesc_ex) { in fec_enet_txq_put_hdr_tso()
828 if (fep->quirks & FEC_QUIRK_HAS_AVB) in fec_enet_txq_put_hdr_tso()
829 estatus |= FEC_TX_BD_FTYPE(txq->bd.qid); in fec_enet_txq_put_hdr_tso()
830 if (skb->ip_summed == CHECKSUM_PARTIAL) in fec_enet_txq_put_hdr_tso()
832 ebdp->cbd_bdu = 0; in fec_enet_txq_put_hdr_tso()
833 ebdp->cbd_esc = cpu_to_fec32(estatus); in fec_enet_txq_put_hdr_tso()
836 bdp->cbd_sc = cpu_to_fec16(status); in fec_enet_txq_put_hdr_tso()
847 struct bufdesc *bdp = txq->bd.cur; in fec_enet_txq_submit_tso()
857 netdev_err(ndev, "NOT enough BD for TSO!\n"); in fec_enet_txq_submit_tso()
861 /* Protocol checksum off-load for TCP and UDP. */ in fec_enet_txq_submit_tso()
870 total_len = skb->len - hdr_len; in fec_enet_txq_submit_tso()
874 index = fec_enet_get_bd_index(bdp, &txq->bd); in fec_enet_txq_submit_tso()
875 data_left = min_t(int, skb_shinfo(skb)->gso_size, total_len); in fec_enet_txq_submit_tso()
876 total_len -= data_left; in fec_enet_txq_submit_tso()
879 hdr = txq->tso_hdrs + index * TSO_HEADER_SIZE; in fec_enet_txq_submit_tso()
889 bdp = fec_enet_get_nextdesc(bdp, &txq->bd); in fec_enet_txq_submit_tso()
890 index = fec_enet_get_bd_index(bdp, &txq->bd); in fec_enet_txq_submit_tso()
899 data_left -= size; in fec_enet_txq_submit_tso()
903 bdp = fec_enet_get_nextdesc(bdp, &txq->bd); in fec_enet_txq_submit_tso()
907 txq->tx_buf[index].buf_p = skb; in fec_enet_txq_submit_tso()
910 txq->bd.cur = bdp; in fec_enet_txq_submit_tso()
913 if (!(fep->quirks & FEC_QUIRK_ERR007885) || in fec_enet_txq_submit_tso()
914 !readl(txq->bd.reg_desc_active) || in fec_enet_txq_submit_tso()
915 !readl(txq->bd.reg_desc_active) || in fec_enet_txq_submit_tso()
916 !readl(txq->bd.reg_desc_active) || in fec_enet_txq_submit_tso()
917 !readl(txq->bd.reg_desc_active)) in fec_enet_txq_submit_tso()
918 writel(0, txq->bd.reg_desc_active); in fec_enet_txq_submit_tso()
924 tmp_bdp = txq->bd.cur; in fec_enet_txq_submit_tso()
928 if (tmp_bdp->cbd_bufaddr && in fec_enet_txq_submit_tso()
929 !IS_TSO_HEADER(txq, fec32_to_cpu(tmp_bdp->cbd_bufaddr))) in fec_enet_txq_submit_tso()
930 dma_unmap_single(&fep->pdev->dev, in fec_enet_txq_submit_tso()
931 fec32_to_cpu(tmp_bdp->cbd_bufaddr), in fec_enet_txq_submit_tso()
932 fec16_to_cpu(tmp_bdp->cbd_datlen), in fec_enet_txq_submit_tso()
936 tmp_bdp->cbd_sc = 0; in fec_enet_txq_submit_tso()
937 tmp_bdp->cbd_datlen = 0; in fec_enet_txq_submit_tso()
938 tmp_bdp->cbd_bufaddr = 0; in fec_enet_txq_submit_tso()
941 if (fep->bufdesc_ex) { in fec_enet_txq_submit_tso()
943 ebdp->cbd_esc = 0; in fec_enet_txq_submit_tso()
946 tmp_bdp = fec_enet_get_nextdesc(tmp_bdp, &txq->bd); in fec_enet_txq_submit_tso()
965 txq = fep->tx_queue[queue]; in fec_enet_start_xmit()
976 if (entries_free <= txq->tx_stop_threshold) in fec_enet_start_xmit()
993 for (q = 0; q < fep->num_rx_queues; q++) { in fec_enet_bd_init()
995 rxq = fep->rx_queue[q]; in fec_enet_bd_init()
996 bdp = rxq->bd.base; in fec_enet_bd_init()
998 for (i = 0; i < rxq->bd.ring_size; i++) { in fec_enet_bd_init()
1000 /* Initialize the BD for every fragment in the page. */ in fec_enet_bd_init()
1001 if (bdp->cbd_bufaddr) in fec_enet_bd_init()
1002 bdp->cbd_sc = cpu_to_fec16(BD_ENET_RX_EMPTY); in fec_enet_bd_init()
1004 bdp->cbd_sc = cpu_to_fec16(0); in fec_enet_bd_init()
1005 bdp = fec_enet_get_nextdesc(bdp, &rxq->bd); in fec_enet_bd_init()
1009 bdp = fec_enet_get_prevdesc(bdp, &rxq->bd); in fec_enet_bd_init()
1010 bdp->cbd_sc |= cpu_to_fec16(BD_SC_WRAP); in fec_enet_bd_init()
1012 rxq->bd.cur = rxq->bd.base; in fec_enet_bd_init()
1015 for (q = 0; q < fep->num_tx_queues; q++) { in fec_enet_bd_init()
1017 txq = fep->tx_queue[q]; in fec_enet_bd_init()
1018 bdp = txq->bd.base; in fec_enet_bd_init()
1019 txq->bd.cur = bdp; in fec_enet_bd_init()
1021 for (i = 0; i < txq->bd.ring_size; i++) { in fec_enet_bd_init()
1022 /* Initialize the BD for every fragment in the page. */ in fec_enet_bd_init()
1023 bdp->cbd_sc = cpu_to_fec16(0); in fec_enet_bd_init()
1024 if (txq->tx_buf[i].type == FEC_TXBUF_T_SKB) { in fec_enet_bd_init()
1025 if (bdp->cbd_bufaddr && in fec_enet_bd_init()
1026 !IS_TSO_HEADER(txq, fec32_to_cpu(bdp->cbd_bufaddr))) in fec_enet_bd_init()
1027 dma_unmap_single(&fep->pdev->dev, in fec_enet_bd_init()
1028 fec32_to_cpu(bdp->cbd_bufaddr), in fec_enet_bd_init()
1029 fec16_to_cpu(bdp->cbd_datlen), in fec_enet_bd_init()
1031 if (txq->tx_buf[i].buf_p) in fec_enet_bd_init()
1032 dev_kfree_skb_any(txq->tx_buf[i].buf_p); in fec_enet_bd_init()
1033 } else if (txq->tx_buf[i].type == FEC_TXBUF_T_XDP_NDO) { in fec_enet_bd_init()
1034 if (bdp->cbd_bufaddr) in fec_enet_bd_init()
1035 dma_unmap_single(&fep->pdev->dev, in fec_enet_bd_init()
1036 fec32_to_cpu(bdp->cbd_bufaddr), in fec_enet_bd_init()
1037 fec16_to_cpu(bdp->cbd_datlen), in fec_enet_bd_init()
1040 if (txq->tx_buf[i].buf_p) in fec_enet_bd_init()
1041 xdp_return_frame(txq->tx_buf[i].buf_p); in fec_enet_bd_init()
1043 struct page *page = txq->tx_buf[i].buf_p; in fec_enet_bd_init()
1046 page_pool_put_page(page->pp, page, 0, false); in fec_enet_bd_init()
1049 txq->tx_buf[i].buf_p = NULL; in fec_enet_bd_init()
1051 txq->tx_buf[i].type = FEC_TXBUF_T_SKB; in fec_enet_bd_init()
1052 bdp->cbd_bufaddr = cpu_to_fec32(0); in fec_enet_bd_init()
1053 bdp = fec_enet_get_nextdesc(bdp, &txq->bd); in fec_enet_bd_init()
1057 bdp = fec_enet_get_prevdesc(bdp, &txq->bd); in fec_enet_bd_init()
1058 bdp->cbd_sc |= cpu_to_fec16(BD_SC_WRAP); in fec_enet_bd_init()
1059 txq->dirty_tx = bdp; in fec_enet_bd_init()
1068 for (i = 0; i < fep->num_rx_queues; i++) in fec_enet_active_rxring()
1069 writel(0, fep->rx_queue[i]->bd.reg_desc_active); in fec_enet_active_rxring()
1079 for (i = 0; i < fep->num_rx_queues; i++) { in fec_enet_enable_ring()
1080 rxq = fep->rx_queue[i]; in fec_enet_enable_ring()
1081 writel(rxq->bd.dma, fep->hwp + FEC_R_DES_START(i)); in fec_enet_enable_ring()
1082 writel(PKT_MAXBUF_SIZE, fep->hwp + FEC_R_BUFF_SIZE(i)); in fec_enet_enable_ring()
1087 fep->hwp + FEC_RCMR(i)); in fec_enet_enable_ring()
1090 for (i = 0; i < fep->num_tx_queues; i++) { in fec_enet_enable_ring()
1091 txq = fep->tx_queue[i]; in fec_enet_enable_ring()
1092 writel(txq->bd.dma, fep->hwp + FEC_X_DES_START(i)); in fec_enet_enable_ring()
1097 fep->hwp + FEC_DMA_CFG(i)); in fec_enet_enable_ring()
1109 if (!allow_wol || !(fep->wol_flag & FEC_WOL_FLAG_SLEEP_ON)) { in fec_ctrl_reset()
1110 if (fep->quirks & FEC_QUIRK_HAS_MULTI_QUEUES || in fec_ctrl_reset()
1111 ((fep->quirks & FEC_QUIRK_NO_HARD_RESET) && fep->link)) { in fec_ctrl_reset()
1112 writel(0, fep->hwp + FEC_ECNTRL); in fec_ctrl_reset()
1114 writel(FEC_ECR_RESET, fep->hwp + FEC_ECNTRL); in fec_ctrl_reset()
1118 val = readl(fep->hwp + FEC_ECNTRL); in fec_ctrl_reset()
1120 writel(val, fep->hwp + FEC_ECNTRL); in fec_ctrl_reset()
1137 if (fep->bufdesc_ex) in fec_restart()
1143 * enet-mac reset will reset mac address registers too, in fec_restart()
1146 memcpy(&temp_mac, ndev->dev_addr, ETH_ALEN); in fec_restart()
1148 fep->hwp + FEC_ADDR_LOW); in fec_restart()
1150 fep->hwp + FEC_ADDR_HIGH); in fec_restart()
1153 writel((0xffffffff & ~FEC_ENET_MII), fep->hwp + FEC_IEVENT); in fec_restart()
1160 if (fep->full_duplex == DUPLEX_FULL) { in fec_restart()
1162 writel(0x04, fep->hwp + FEC_X_CNTRL); in fec_restart()
1166 writel(0x0, fep->hwp + FEC_X_CNTRL); in fec_restart()
1170 writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED); in fec_restart()
1173 if (fep->quirks & FEC_QUIRK_HAS_RACC) { in fec_restart()
1174 u32 val = readl(fep->hwp + FEC_RACC); in fec_restart()
1178 if (fep->csum_flags & FLAG_RX_CSUM_ENABLED) in fec_restart()
1183 writel(val, fep->hwp + FEC_RACC); in fec_restart()
1184 writel(PKT_MAXBUF_SIZE, fep->hwp + FEC_FTRL); in fec_restart()
1190 * differently on enet-mac. in fec_restart()
1192 if (fep->quirks & FEC_QUIRK_ENET_MAC) { in fec_restart()
1197 if (fep->phy_interface == PHY_INTERFACE_MODE_RGMII || in fec_restart()
1198 fep->phy_interface == PHY_INTERFACE_MODE_RGMII_ID || in fec_restart()
1199 fep->phy_interface == PHY_INTERFACE_MODE_RGMII_RXID || in fec_restart()
1200 fep->phy_interface == PHY_INTERFACE_MODE_RGMII_TXID) in fec_restart()
1202 else if (fep->phy_interface == PHY_INTERFACE_MODE_RMII) in fec_restart()
1208 if (ndev->phydev) { in fec_restart()
1209 if (ndev->phydev->speed == SPEED_1000) in fec_restart()
1211 else if (ndev->phydev->speed == SPEED_100) in fec_restart()
1218 if (fep->quirks & FEC_QUIRK_USE_GASKET) { in fec_restart()
1221 writel(0, fep->hwp + FEC_MIIGSK_ENR); in fec_restart()
1222 while (readl(fep->hwp + FEC_MIIGSK_ENR) & 4) in fec_restart()
1230 cfgr = (fep->phy_interface == PHY_INTERFACE_MODE_RMII) in fec_restart()
1232 if (ndev->phydev && ndev->phydev->speed == SPEED_10) in fec_restart()
1234 writel(cfgr, fep->hwp + FEC_MIIGSK_CFGR); in fec_restart()
1236 /* re-enable the gasket */ in fec_restart()
1237 writel(2, fep->hwp + FEC_MIIGSK_ENR); in fec_restart()
1244 if ((fep->pause_flag & FEC_PAUSE_FLAG_ENABLE) || in fec_restart()
1245 ((fep->pause_flag & FEC_PAUSE_FLAG_AUTONEG) && in fec_restart()
1246 ndev->phydev && ndev->phydev->pause)) { in fec_restart()
1250 writel(FEC_ENET_RSEM_V, fep->hwp + FEC_R_FIFO_RSEM); in fec_restart()
1251 writel(FEC_ENET_RSFL_V, fep->hwp + FEC_R_FIFO_RSFL); in fec_restart()
1252 writel(FEC_ENET_RAEM_V, fep->hwp + FEC_R_FIFO_RAEM); in fec_restart()
1253 writel(FEC_ENET_RAFL_V, fep->hwp + FEC_R_FIFO_RAFL); in fec_restart()
1256 writel(FEC_ENET_OPD_V, fep->hwp + FEC_OPD); in fec_restart()
1262 writel(rcntl, fep->hwp + FEC_R_CNTRL); in fec_restart()
1267 writel(0, fep->hwp + FEC_HASH_TABLE_HIGH); in fec_restart()
1268 writel(0, fep->hwp + FEC_HASH_TABLE_LOW); in fec_restart()
1271 if (fep->quirks & FEC_QUIRK_ENET_MAC) { in fec_restart()
1275 writel(FEC_TXWMRK_STRFWD, fep->hwp + FEC_X_WMRK); in fec_restart()
1278 if (fep->bufdesc_ex) in fec_restart()
1281 if (fep->quirks & FEC_QUIRK_DELAYED_CLKS_SUPPORT && in fec_restart()
1282 fep->rgmii_txc_dly) in fec_restart()
1284 if (fep->quirks & FEC_QUIRK_DELAYED_CLKS_SUPPORT && in fec_restart()
1285 fep->rgmii_rxc_dly) in fec_restart()
1290 writel(0 << 31, fep->hwp + FEC_MIB_CTRLSTAT); in fec_restart()
1294 writel(ecntl, fep->hwp + FEC_ECNTRL); in fec_restart()
1297 if (fep->bufdesc_ex) { in fec_restart()
1303 if (fep->link) in fec_restart()
1304 writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK); in fec_restart()
1306 writel(0, fep->hwp + FEC_IMASK); in fec_restart()
1309 if (fep->quirks & FEC_QUIRK_HAS_COALESCE) in fec_restart()
1320 return imx_scu_get_handle(&fep->ipc_handle); in fec_enet_ipc_handle_init()
1325 struct device_node *np = fep->pdev->dev.of_node; in fec_enet_ipg_stop_set()
1329 if (!np || !fep->ipc_handle) in fec_enet_ipg_stop_set()
1338 imx_sc_misc_set_control(fep->ipc_handle, rsrc_id, IMX_SC_C_IPG_STOP, val); in fec_enet_ipg_stop_set()
1343 struct fec_platform_data *pdata = fep->pdev->dev.platform_data; in fec_enet_stop_mode()
1344 struct fec_stop_mode_gpr *stop_gpr = &fep->stop_gpr; in fec_enet_stop_mode()
1346 if (stop_gpr->gpr) { in fec_enet_stop_mode()
1348 regmap_update_bits(stop_gpr->gpr, stop_gpr->reg, in fec_enet_stop_mode()
1349 BIT(stop_gpr->bit), in fec_enet_stop_mode()
1350 BIT(stop_gpr->bit)); in fec_enet_stop_mode()
1352 regmap_update_bits(stop_gpr->gpr, stop_gpr->reg, in fec_enet_stop_mode()
1353 BIT(stop_gpr->bit), 0); in fec_enet_stop_mode()
1354 } else if (pdata && pdata->sleep_mode_enable) { in fec_enet_stop_mode()
1355 pdata->sleep_mode_enable(enabled); in fec_enet_stop_mode()
1365 writel(0, fep->hwp + FEC_IMASK); in fec_irqs_disable()
1372 writel(0, fep->hwp + FEC_IMASK); in fec_irqs_disable_except_wakeup()
1373 writel(FEC_ENET_WAKEUP, fep->hwp + FEC_IMASK); in fec_irqs_disable_except_wakeup()
1380 u32 rmii_mode = readl(fep->hwp + FEC_R_CNTRL) & FEC_RCR_RMII; in fec_stop()
1384 if (fep->link) { in fec_stop()
1385 writel(1, fep->hwp + FEC_X_CNTRL); /* Graceful transmit stop */ in fec_stop()
1387 if (!(readl(fep->hwp + FEC_IEVENT) & FEC_ENET_GRA)) in fec_stop()
1391 if (fep->bufdesc_ex) in fec_stop()
1395 writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED); in fec_stop()
1396 writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK); in fec_stop()
1399 if (fep->quirks & FEC_QUIRK_ENET_MAC && in fec_stop()
1400 !(fep->wol_flag & FEC_WOL_FLAG_SLEEP_ON)) { in fec_stop()
1401 writel(FEC_ECR_ETHEREN, fep->hwp + FEC_ECNTRL); in fec_stop()
1402 writel(rmii_mode, fep->hwp + FEC_R_CNTRL); in fec_stop()
1405 if (fep->bufdesc_ex) { in fec_stop()
1406 val = readl(fep->hwp + FEC_ECNTRL); in fec_stop()
1408 writel(val, fep->hwp + FEC_ECNTRL); in fec_stop()
1422 ndev->stats.tx_errors++; in fec_timeout()
1424 schedule_work(&fep->tx_timeout_work); in fec_timeout()
1431 struct net_device *ndev = fep->netdev; in fec_enet_timeout_work()
1435 napi_disable(&fep->napi); in fec_enet_timeout_work()
1440 napi_enable(&fep->napi); in fec_enet_timeout_work()
1452 spin_lock_irqsave(&fep->tmreg_lock, flags); in fec_enet_hwtstamp()
1453 ns = timecounter_cyc2time(&fep->tc, ts); in fec_enet_hwtstamp()
1454 spin_unlock_irqrestore(&fep->tmreg_lock, flags); in fec_enet_hwtstamp()
1457 hwtstamps->hwtstamp = ns_to_ktime(ns); in fec_enet_hwtstamp()
1477 txq = fep->tx_queue[queue_id]; in fec_enet_tx_queue()
1480 bdp = txq->dirty_tx; in fec_enet_tx_queue()
1483 bdp = fec_enet_get_nextdesc(bdp, &txq->bd); in fec_enet_tx_queue()
1485 while (bdp != READ_ONCE(txq->bd.cur)) { in fec_enet_tx_queue()
1486 /* Order the load of bd.cur and cbd_sc */ in fec_enet_tx_queue()
1488 status = fec16_to_cpu(READ_ONCE(bdp->cbd_sc)); in fec_enet_tx_queue()
1492 index = fec_enet_get_bd_index(bdp, &txq->bd); in fec_enet_tx_queue()
1494 if (txq->tx_buf[index].type == FEC_TXBUF_T_SKB) { in fec_enet_tx_queue()
1495 skb = txq->tx_buf[index].buf_p; in fec_enet_tx_queue()
1496 if (bdp->cbd_bufaddr && in fec_enet_tx_queue()
1497 !IS_TSO_HEADER(txq, fec32_to_cpu(bdp->cbd_bufaddr))) in fec_enet_tx_queue()
1498 dma_unmap_single(&fep->pdev->dev, in fec_enet_tx_queue()
1499 fec32_to_cpu(bdp->cbd_bufaddr), in fec_enet_tx_queue()
1500 fec16_to_cpu(bdp->cbd_datlen), in fec_enet_tx_queue()
1502 bdp->cbd_bufaddr = cpu_to_fec32(0); in fec_enet_tx_queue()
1514 if (txq->tx_buf[index].type == FEC_TXBUF_T_XDP_NDO) { in fec_enet_tx_queue()
1515 xdpf = txq->tx_buf[index].buf_p; in fec_enet_tx_queue()
1516 if (bdp->cbd_bufaddr) in fec_enet_tx_queue()
1517 dma_unmap_single(&fep->pdev->dev, in fec_enet_tx_queue()
1518 fec32_to_cpu(bdp->cbd_bufaddr), in fec_enet_tx_queue()
1519 fec16_to_cpu(bdp->cbd_datlen), in fec_enet_tx_queue()
1522 page = txq->tx_buf[index].buf_p; in fec_enet_tx_queue()
1525 bdp->cbd_bufaddr = cpu_to_fec32(0); in fec_enet_tx_queue()
1526 if (unlikely(!txq->tx_buf[index].buf_p)) { in fec_enet_tx_queue()
1527 txq->tx_buf[index].type = FEC_TXBUF_T_SKB; in fec_enet_tx_queue()
1531 frame_len = fec16_to_cpu(bdp->cbd_datlen); in fec_enet_tx_queue()
1538 ndev->stats.tx_errors++; in fec_enet_tx_queue()
1540 ndev->stats.tx_heartbeat_errors++; in fec_enet_tx_queue()
1542 ndev->stats.tx_window_errors++; in fec_enet_tx_queue()
1544 ndev->stats.tx_aborted_errors++; in fec_enet_tx_queue()
1546 ndev->stats.tx_fifo_errors++; in fec_enet_tx_queue()
1548 ndev->stats.tx_carrier_errors++; in fec_enet_tx_queue()
1550 ndev->stats.tx_packets++; in fec_enet_tx_queue()
1552 if (txq->tx_buf[index].type == FEC_TXBUF_T_SKB) in fec_enet_tx_queue()
1553 ndev->stats.tx_bytes += skb->len; in fec_enet_tx_queue()
1555 ndev->stats.tx_bytes += frame_len; in fec_enet_tx_queue()
1562 ndev->stats.collisions++; in fec_enet_tx_queue()
1564 if (txq->tx_buf[index].type == FEC_TXBUF_T_SKB) { in fec_enet_tx_queue()
1569 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_IN_PROGRESS && in fec_enet_tx_queue()
1570 fep->hwts_tx_en) && fep->bufdesc_ex) { in fec_enet_tx_queue()
1574 fec_enet_hwtstamp(fep, fec32_to_cpu(ebdp->ts), &shhwtstamps); in fec_enet_tx_queue()
1580 } else if (txq->tx_buf[index].type == FEC_TXBUF_T_XDP_NDO) { in fec_enet_tx_queue()
1584 page_pool_put_page(page->pp, page, 0, true); in fec_enet_tx_queue()
1587 txq->tx_buf[index].buf_p = NULL; in fec_enet_tx_queue()
1589 txq->tx_buf[index].type = FEC_TXBUF_T_SKB; in fec_enet_tx_queue()
1596 txq->dirty_tx = bdp; in fec_enet_tx_queue()
1599 bdp = fec_enet_get_nextdesc(bdp, &txq->bd); in fec_enet_tx_queue()
1605 if (entries_free >= txq->tx_wake_threshold) in fec_enet_tx_queue()
1611 if (bdp != txq->bd.cur && in fec_enet_tx_queue()
1612 readl(txq->bd.reg_desc_active) == 0) in fec_enet_tx_queue()
1613 writel(0, txq->bd.reg_desc_active); in fec_enet_tx_queue()
1622 for (i = fep->num_tx_queues - 1; i >= 0; i--) in fec_enet_tx()
1632 new_page = page_pool_dev_alloc_pages(rxq->page_pool); in fec_enet_update_cbd()
1634 return -ENOMEM; in fec_enet_update_cbd()
1636 rxq->rx_skb_info[index].page = new_page; in fec_enet_update_cbd()
1637 rxq->rx_skb_info[index].offset = FEC_ENET_XDP_HEADROOM; in fec_enet_update_cbd()
1639 bdp->cbd_bufaddr = cpu_to_fec32(phys_addr); in fec_enet_update_cbd()
1648 unsigned int sync, len = xdp->data_end - xdp->data; in fec_enet_run_xdp()
1659 sync = xdp->data_end - xdp->data; in fec_enet_run_xdp()
1664 rxq->stats[RX_XDP_PASS]++; in fec_enet_run_xdp()
1669 rxq->stats[RX_XDP_REDIRECT]++; in fec_enet_run_xdp()
1670 err = xdp_do_redirect(fep->netdev, xdp, prog); in fec_enet_run_xdp()
1678 rxq->stats[RX_XDP_TX]++; in fec_enet_run_xdp()
1681 rxq->stats[RX_XDP_TX_ERRORS]++; in fec_enet_run_xdp()
1689 bpf_warn_invalid_xdp_action(fep->netdev, prog, act); in fec_enet_run_xdp()
1696 rxq->stats[RX_XDP_DROP]++; in fec_enet_run_xdp()
1699 page = virt_to_head_page(xdp->data); in fec_enet_run_xdp()
1700 page_pool_put_page(rxq->page_pool, page, sync, true); in fec_enet_run_xdp()
1702 trace_xdp_exception(fep->netdev, prog, act); in fec_enet_run_xdp()
1729 bool need_swap = fep->quirks & FEC_QUIRK_SWAP_FRAME; in fec_enet_rx_queue()
1730 struct bpf_prog *xdp_prog = READ_ONCE(fep->xdp_prog); in fec_enet_rx_queue()
1743 if (fep->quirks & FEC_QUIRK_HAS_RACC) { in fec_enet_rx_queue()
1756 rxq = fep->rx_queue[queue_id]; in fec_enet_rx_queue()
1761 bdp = rxq->bd.cur; in fec_enet_rx_queue()
1762 xdp_init_buff(&xdp, PAGE_SIZE, &rxq->xdp_rxq); in fec_enet_rx_queue()
1764 while (!((status = fec16_to_cpu(bdp->cbd_sc)) & BD_ENET_RX_EMPTY)) { in fec_enet_rx_queue()
1770 writel(FEC_ENET_RXF_GET(queue_id), fep->hwp + FEC_IEVENT); in fec_enet_rx_queue()
1777 ndev->stats.rx_errors++; in fec_enet_rx_queue()
1780 ndev->stats.rx_fifo_errors++; in fec_enet_rx_queue()
1786 ndev->stats.rx_length_errors++; in fec_enet_rx_queue()
1791 ndev->stats.rx_crc_errors++; in fec_enet_rx_queue()
1794 ndev->stats.rx_frame_errors++; in fec_enet_rx_queue()
1799 ndev->stats.rx_packets++; in fec_enet_rx_queue()
1800 pkt_len = fec16_to_cpu(bdp->cbd_datlen); in fec_enet_rx_queue()
1801 ndev->stats.rx_bytes += pkt_len; in fec_enet_rx_queue()
1803 index = fec_enet_get_bd_index(bdp, &rxq->bd); in fec_enet_rx_queue()
1804 page = rxq->rx_skb_info[index].page; in fec_enet_rx_queue()
1805 cbd_bufaddr = bdp->cbd_bufaddr; in fec_enet_rx_queue()
1807 ndev->stats.rx_dropped++; in fec_enet_rx_queue()
1811 dma_sync_single_for_cpu(&fep->pdev->dev, in fec_enet_rx_queue()
1821 data_start, pkt_len - sub_len, false); in fec_enet_rx_queue()
1834 page_pool_recycle_direct(rxq->page_pool, page); in fec_enet_rx_queue()
1835 ndev->stats.rx_dropped++; in fec_enet_rx_queue()
1842 skb_put(skb, pkt_len - sub_len); in fec_enet_rx_queue()
1849 data = skb->data; in fec_enet_rx_queue()
1853 if (fep->bufdesc_ex) in fec_enet_rx_queue()
1858 if ((ndev->features & NETIF_F_HW_VLAN_CTAG_RX) && in fec_enet_rx_queue()
1859 fep->bufdesc_ex && in fec_enet_rx_queue()
1860 (ebdp->cbd_esc & cpu_to_fec32(BD_ENET_RX_VLAN))) { in fec_enet_rx_queue()
1864 vlan_tag = ntohs(vlan_header->h_vlan_TCI); in fec_enet_rx_queue()
1868 memmove(skb->data + VLAN_HLEN, data, ETH_ALEN * 2); in fec_enet_rx_queue()
1872 skb->protocol = eth_type_trans(skb, ndev); in fec_enet_rx_queue()
1875 if (fep->hwts_rx_en && fep->bufdesc_ex) in fec_enet_rx_queue()
1876 fec_enet_hwtstamp(fep, fec32_to_cpu(ebdp->ts), in fec_enet_rx_queue()
1879 if (fep->bufdesc_ex && in fec_enet_rx_queue()
1880 (fep->csum_flags & FLAG_RX_CSUM_ENABLED)) { in fec_enet_rx_queue()
1881 if (!(ebdp->cbd_esc & cpu_to_fec32(FLAG_RX_CSUM_ERROR))) { in fec_enet_rx_queue()
1883 skb->ip_summed = CHECKSUM_UNNECESSARY; in fec_enet_rx_queue()
1896 napi_gro_receive(&fep->napi, skb); in fec_enet_rx_queue()
1905 if (fep->bufdesc_ex) { in fec_enet_rx_queue()
1908 ebdp->cbd_esc = cpu_to_fec32(BD_ENET_RX_INT); in fec_enet_rx_queue()
1909 ebdp->cbd_prot = 0; in fec_enet_rx_queue()
1910 ebdp->cbd_bdu = 0; in fec_enet_rx_queue()
1916 bdp->cbd_sc = cpu_to_fec16(status); in fec_enet_rx_queue()
1918 /* Update BD pointer to next entry */ in fec_enet_rx_queue()
1919 bdp = fec_enet_get_nextdesc(bdp, &rxq->bd); in fec_enet_rx_queue()
1925 writel(0, rxq->bd.reg_desc_active); in fec_enet_rx_queue()
1927 rxq->bd.cur = bdp; in fec_enet_rx_queue()
1941 for (i = fep->num_rx_queues - 1; i >= 0; i--) in fec_enet_rx()
1942 done += fec_enet_rx_queue(ndev, budget - done, i); in fec_enet_rx()
1951 int_events = readl(fep->hwp + FEC_IEVENT); in fec_enet_collect_events()
1956 writel(int_events, fep->hwp + FEC_IEVENT); in fec_enet_collect_events()
1968 if (fec_enet_collect_events(fep) && fep->link) { in fec_enet_interrupt()
1971 if (napi_schedule_prep(&fep->napi)) { in fec_enet_interrupt()
1973 writel(0, fep->hwp + FEC_IMASK); in fec_enet_interrupt()
1974 __napi_schedule(&fep->napi); in fec_enet_interrupt()
1983 struct net_device *ndev = napi->dev; in fec_enet_rx_napi()
1988 done += fec_enet_rx(ndev, budget - done); in fec_enet_rx_napi()
1994 writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK); in fec_enet_rx_napi()
2000 /* ------------------------------------------------------------------------- */
2008 * try to get mac address in following order: in fec_get_mac()
2019 struct device_node *np = fep->pdev->dev.of_node; in fec_get_mac()
2024 else if (ret == -EPROBE_DEFER) in fec_get_mac()
2037 struct fec_platform_data *pdata = dev_get_platdata(&fep->pdev->dev); in fec_get_mac()
2040 iap = (unsigned char *)&pdata->mac; in fec_get_mac()
2049 cpu_to_be32(readl(fep->hwp + FEC_ADDR_LOW)); in fec_get_mac()
2051 cpu_to_be16(readl(fep->hwp + FEC_ADDR_HIGH) >> 16); in fec_get_mac()
2056 * 5) random mac address in fec_get_mac()
2059 /* Report it and use a random ethernet address instead */ in fec_get_mac()
2060 dev_err(&fep->pdev->dev, "Invalid MAC address: %pM\n", iap); in fec_get_mac()
2062 dev_info(&fep->pdev->dev, "Using random MAC address: %pM\n", in fec_get_mac()
2063 ndev->dev_addr); in fec_get_mac()
2068 eth_hw_addr_gen(ndev, iap, iap == macaddr ? fep->dev_id : 0); in fec_get_mac()
2073 /* ------------------------------------------------------------------------- */
2086 return us * (fep->clk_ref_rate / 1000) / 1000; in fec_enet_us_to_tx_cycle()
2103 writel(sleep_cycle, fep->hwp + FEC_LPI_SLEEP); in fec_enet_eee_mode_set()
2104 writel(wake_cycle, fep->hwp + FEC_LPI_WAKE); in fec_enet_eee_mode_set()
2112 struct phy_device *phy_dev = ndev->phydev; in fec_enet_adjust_link()
2121 fep->link = 0; in fec_enet_adjust_link()
2122 } else if (phy_dev->link) { in fec_enet_adjust_link()
2123 if (!fep->link) { in fec_enet_adjust_link()
2124 fep->link = phy_dev->link; in fec_enet_adjust_link()
2128 if (fep->full_duplex != phy_dev->duplex) { in fec_enet_adjust_link()
2129 fep->full_duplex = phy_dev->duplex; in fec_enet_adjust_link()
2133 if (phy_dev->speed != fep->speed) { in fec_enet_adjust_link()
2134 fep->speed = phy_dev->speed; in fec_enet_adjust_link()
2141 napi_disable(&fep->napi); in fec_enet_adjust_link()
2146 napi_enable(&fep->napi); in fec_enet_adjust_link()
2148 if (fep->quirks & FEC_QUIRK_HAS_EEE) in fec_enet_adjust_link()
2150 phy_dev->eee_cfg.tx_lpi_timer, in fec_enet_adjust_link()
2151 phy_dev->enable_tx_lpi); in fec_enet_adjust_link()
2153 if (fep->link) { in fec_enet_adjust_link()
2155 napi_disable(&fep->napi); in fec_enet_adjust_link()
2159 napi_enable(&fep->napi); in fec_enet_adjust_link()
2160 fep->link = phy_dev->link; in fec_enet_adjust_link()
2174 ret = readl_poll_timeout_atomic(fep->hwp + FEC_IEVENT, ievent, in fec_enet_mdio_wait()
2178 writel(FEC_ENET_MII, fep->hwp + FEC_IEVENT); in fec_enet_mdio_wait()
2185 struct fec_enet_private *fep = bus->priv; in fec_enet_mdio_read_c22()
2186 struct device *dev = &fep->pdev->dev; in fec_enet_mdio_read_c22()
2201 FEC_MMFR_TA, fep->hwp + FEC_MII_DATA); in fec_enet_mdio_read_c22()
2206 netdev_err(fep->netdev, "MDIO read timeout\n"); in fec_enet_mdio_read_c22()
2210 ret = FEC_MMFR_DATA(readl(fep->hwp + FEC_MII_DATA)); in fec_enet_mdio_read_c22()
2222 struct fec_enet_private *fep = bus->priv; in fec_enet_mdio_read_c45()
2223 struct device *dev = &fep->pdev->dev; in fec_enet_mdio_read_c45()
2232 /* write address */ in fec_enet_mdio_read_c45()
2236 fep->hwp + FEC_MII_DATA); in fec_enet_mdio_read_c45()
2241 netdev_err(fep->netdev, "MDIO address write timeout\n"); in fec_enet_mdio_read_c45()
2250 FEC_MMFR_TA, fep->hwp + FEC_MII_DATA); in fec_enet_mdio_read_c45()
2255 netdev_err(fep->netdev, "MDIO read timeout\n"); in fec_enet_mdio_read_c45()
2259 ret = FEC_MMFR_DATA(readl(fep->hwp + FEC_MII_DATA)); in fec_enet_mdio_read_c45()
2271 struct fec_enet_private *fep = bus->priv; in fec_enet_mdio_write_c22()
2272 struct device *dev = &fep->pdev->dev; in fec_enet_mdio_write_c22()
2287 fep->hwp + FEC_MII_DATA); in fec_enet_mdio_write_c22()
2292 netdev_err(fep->netdev, "MDIO write timeout\n"); in fec_enet_mdio_write_c22()
2303 struct fec_enet_private *fep = bus->priv; in fec_enet_mdio_write_c45()
2304 struct device *dev = &fep->pdev->dev; in fec_enet_mdio_write_c45()
2313 /* write address */ in fec_enet_mdio_write_c45()
2317 fep->hwp + FEC_MII_DATA); in fec_enet_mdio_write_c45()
2322 netdev_err(fep->netdev, "MDIO address write timeout\n"); in fec_enet_mdio_write_c45()
2330 fep->hwp + FEC_MII_DATA); in fec_enet_mdio_write_c45()
2335 netdev_err(fep->netdev, "MDIO write timeout\n"); in fec_enet_mdio_write_c45()
2347 struct phy_device *phy_dev = ndev->phydev; in fec_enet_phy_reset_after_clk_enable()
2351 } else if (fep->phy_node) { in fec_enet_phy_reset_after_clk_enable()
2359 phy_dev = of_phy_find_device(fep->phy_node); in fec_enet_phy_reset_after_clk_enable()
2361 put_device(&phy_dev->mdio.dev); in fec_enet_phy_reset_after_clk_enable()
2371 ret = clk_prepare_enable(fep->clk_enet_out); in fec_enet_clk_enable()
2375 if (fep->clk_ptp) { in fec_enet_clk_enable()
2376 mutex_lock(&fep->ptp_clk_mutex); in fec_enet_clk_enable()
2377 ret = clk_prepare_enable(fep->clk_ptp); in fec_enet_clk_enable()
2379 mutex_unlock(&fep->ptp_clk_mutex); in fec_enet_clk_enable()
2382 fep->ptp_clk_on = true; in fec_enet_clk_enable()
2384 mutex_unlock(&fep->ptp_clk_mutex); in fec_enet_clk_enable()
2387 ret = clk_prepare_enable(fep->clk_ref); in fec_enet_clk_enable()
2391 ret = clk_prepare_enable(fep->clk_2x_txclk); in fec_enet_clk_enable()
2397 clk_disable_unprepare(fep->clk_enet_out); in fec_enet_clk_enable()
2398 if (fep->clk_ptp) { in fec_enet_clk_enable()
2399 mutex_lock(&fep->ptp_clk_mutex); in fec_enet_clk_enable()
2400 clk_disable_unprepare(fep->clk_ptp); in fec_enet_clk_enable()
2401 fep->ptp_clk_on = false; in fec_enet_clk_enable()
2402 mutex_unlock(&fep->ptp_clk_mutex); in fec_enet_clk_enable()
2404 clk_disable_unprepare(fep->clk_ref); in fec_enet_clk_enable()
2405 clk_disable_unprepare(fep->clk_2x_txclk); in fec_enet_clk_enable()
2411 if (fep->clk_ref) in fec_enet_clk_enable()
2412 clk_disable_unprepare(fep->clk_ref); in fec_enet_clk_enable()
2414 if (fep->clk_ptp) { in fec_enet_clk_enable()
2415 mutex_lock(&fep->ptp_clk_mutex); in fec_enet_clk_enable()
2416 clk_disable_unprepare(fep->clk_ptp); in fec_enet_clk_enable()
2417 fep->ptp_clk_on = false; in fec_enet_clk_enable()
2418 mutex_unlock(&fep->ptp_clk_mutex); in fec_enet_clk_enable()
2421 clk_disable_unprepare(fep->clk_enet_out); in fec_enet_clk_enable()
2432 if (!of_property_read_u32(np, "tx-internal-delay-ps", &rgmii_tx_delay)) { in fec_enet_parse_rgmii_delay()
2434 dev_err(&fep->pdev->dev, "The only allowed RGMII TX delay values are: 0ps, 2000ps"); in fec_enet_parse_rgmii_delay()
2435 return -EINVAL; in fec_enet_parse_rgmii_delay()
2437 fep->rgmii_txc_dly = true; in fec_enet_parse_rgmii_delay()
2442 if (!of_property_read_u32(np, "rx-internal-delay-ps", &rgmii_rx_delay)) { in fec_enet_parse_rgmii_delay()
2444 dev_err(&fep->pdev->dev, "The only allowed RGMII RX delay values are: 0ps, 2000ps"); in fec_enet_parse_rgmii_delay()
2445 return -EINVAL; in fec_enet_parse_rgmii_delay()
2447 fep->rgmii_rxc_dly = true; in fec_enet_parse_rgmii_delay()
2461 int dev_id = fep->dev_id; in fec_enet_mii_probe()
2463 if (fep->phy_node) { in fec_enet_mii_probe()
2464 phy_dev = of_phy_connect(ndev, fep->phy_node, in fec_enet_mii_probe()
2466 fep->phy_interface); in fec_enet_mii_probe()
2469 return -ENODEV; in fec_enet_mii_probe()
2474 if (!mdiobus_is_registered_device(fep->mii_bus, phy_id)) in fec_enet_mii_probe()
2476 if (dev_id--) in fec_enet_mii_probe()
2478 strscpy(mdio_bus_id, fep->mii_bus->id, MII_BUS_ID_SIZE); in fec_enet_mii_probe()
2484 strscpy(mdio_bus_id, "fixed-0", MII_BUS_ID_SIZE); in fec_enet_mii_probe()
2491 fep->phy_interface); in fec_enet_mii_probe()
2500 if (fep->quirks & FEC_QUIRK_HAS_GBIT) { in fec_enet_mii_probe()
2511 if (fep->quirks & FEC_QUIRK_HAS_EEE) in fec_enet_mii_probe()
2514 fep->link = 0; in fec_enet_mii_probe()
2515 fep->full_duplex = 0; in fec_enet_mii_probe()
2530 int err = -ENXIO; in fec_enet_mii_init()
2539 * - fec0 supports MII & RMII modes while fec1 only supports RMII in fec_enet_mii_init()
2540 * - fec0 acts as the 1588 time master while fec1 is slave in fec_enet_mii_init()
2541 * - external phys can only be configured by fec0 in fec_enet_mii_init()
2551 if ((fep->quirks & FEC_QUIRK_SINGLE_MDIO) && fep->dev_id > 0) { in fec_enet_mii_init()
2554 fep->mii_bus = fec0_mii_bus; in fec_enet_mii_init()
2558 return -ENOENT; in fec_enet_mii_init()
2562 node = of_get_child_by_name(pdev->dev.of_node, "mdio"); in fec_enet_mii_init()
2564 of_property_read_u32(node, "clock-frequency", &bus_freq); in fec_enet_mii_init()
2566 "suppress-preamble"); in fec_enet_mii_init()
2573 * for ENET-MAC is 'ref_freq / ((MII_SPEED + 1) x 2)'. The i.MX28 in fec_enet_mii_init()
2577 mii_speed = DIV_ROUND_UP(clk_get_rate(fep->clk_ipg), bus_freq * 2); in fec_enet_mii_init()
2578 if (fep->quirks & FEC_QUIRK_ENET_MAC) in fec_enet_mii_init()
2579 mii_speed--; in fec_enet_mii_init()
2581 dev_err(&pdev->dev, in fec_enet_mii_init()
2583 clk_get_rate(fep->clk_ipg)); in fec_enet_mii_init()
2584 err = -EINVAL; in fec_enet_mii_init()
2600 holdtime = DIV_ROUND_UP(clk_get_rate(fep->clk_ipg), 100000000) - 1; in fec_enet_mii_init()
2602 fep->phy_speed = mii_speed << 1 | holdtime << 8; in fec_enet_mii_init()
2605 fep->phy_speed |= BIT(7); in fec_enet_mii_init()
2607 if (fep->quirks & FEC_QUIRK_CLEAR_SETUP_MII) { in fec_enet_mii_init()
2610 * - writing MSCR: in fec_enet_mii_init()
2611 * - mmfr[31:0]_not_zero & mscr[7:0]_is_zero & in fec_enet_mii_init()
2613 * - writing MMFR: in fec_enet_mii_init()
2614 * - mscr[7:0]_not_zero in fec_enet_mii_init()
2616 writel(0, fep->hwp + FEC_MII_DATA); in fec_enet_mii_init()
2619 writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED); in fec_enet_mii_init()
2622 writel(FEC_ENET_MII, fep->hwp + FEC_IEVENT); in fec_enet_mii_init()
2624 fep->mii_bus = mdiobus_alloc(); in fec_enet_mii_init()
2625 if (fep->mii_bus == NULL) { in fec_enet_mii_init()
2626 err = -ENOMEM; in fec_enet_mii_init()
2630 fep->mii_bus->name = "fec_enet_mii_bus"; in fec_enet_mii_init()
2631 fep->mii_bus->read = fec_enet_mdio_read_c22; in fec_enet_mii_init()
2632 fep->mii_bus->write = fec_enet_mdio_write_c22; in fec_enet_mii_init()
2633 if (fep->quirks & FEC_QUIRK_HAS_MDIO_C45) { in fec_enet_mii_init()
2634 fep->mii_bus->read_c45 = fec_enet_mdio_read_c45; in fec_enet_mii_init()
2635 fep->mii_bus->write_c45 = fec_enet_mdio_write_c45; in fec_enet_mii_init()
2637 snprintf(fep->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x", in fec_enet_mii_init()
2638 pdev->name, fep->dev_id + 1); in fec_enet_mii_init()
2639 fep->mii_bus->priv = fep; in fec_enet_mii_init()
2640 fep->mii_bus->parent = &pdev->dev; in fec_enet_mii_init()
2642 err = of_mdiobus_register(fep->mii_bus, node); in fec_enet_mii_init()
2649 phydev = mdiobus_get_phy(fep->mii_bus, addr); in fec_enet_mii_init()
2651 phydev->mac_managed_pm = true; in fec_enet_mii_init()
2657 if (fep->quirks & FEC_QUIRK_SINGLE_MDIO) in fec_enet_mii_init()
2658 fec0_mii_bus = fep->mii_bus; in fec_enet_mii_init()
2663 mdiobus_free(fep->mii_bus); in fec_enet_mii_init()
2671 if (--mii_cnt == 0) { in fec_enet_mii_remove()
2672 mdiobus_unregister(fep->mii_bus); in fec_enet_mii_remove()
2673 mdiobus_free(fep->mii_bus); in fec_enet_mii_remove()
2682 strscpy(info->driver, fep->pdev->dev.driver->name, in fec_enet_get_drvinfo()
2683 sizeof(info->driver)); in fec_enet_get_drvinfo()
2684 strscpy(info->bus_info, dev_name(&ndev->dev), sizeof(info->bus_info)); in fec_enet_get_drvinfo()
2693 r = platform_get_resource(fep->pdev, IORESOURCE_MEM, 0); in fec_enet_get_regs_len()
2778 u32 __iomem *theregs = (u32 __iomem *)fep->hwp; in fec_enet_get_regs()
2779 struct device *dev = &fep->pdev->dev; in fec_enet_get_regs()
2805 regs->version = fec_enet_register_version; in fec_enet_get_regs()
2807 memset(buf, 0, regs->len); in fec_enet_get_regs()
2813 !(fep->quirks & FEC_QUIRK_HAS_FRREG)) in fec_enet_get_regs()
2829 if (fep->bufdesc_ex) { in fec_enet_get_ts_info()
2831 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | in fec_enet_get_ts_info()
2835 if (fep->ptp_clock) in fec_enet_get_ts_info()
2836 info->phc_index = ptp_clock_index(fep->ptp_clock); in fec_enet_get_ts_info()
2838 info->tx_types = (1 << HWTSTAMP_TX_OFF) | in fec_enet_get_ts_info()
2841 info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) | in fec_enet_get_ts_info()
2856 pause->autoneg = (fep->pause_flag & FEC_PAUSE_FLAG_AUTONEG) != 0; in fec_enet_get_pauseparam()
2857 pause->tx_pause = (fep->pause_flag & FEC_PAUSE_FLAG_ENABLE) != 0; in fec_enet_get_pauseparam()
2858 pause->rx_pause = pause->tx_pause; in fec_enet_get_pauseparam()
2866 if (!ndev->phydev) in fec_enet_set_pauseparam()
2867 return -ENODEV; in fec_enet_set_pauseparam()
2869 if (pause->tx_pause != pause->rx_pause) { in fec_enet_set_pauseparam()
2872 return -EINVAL; in fec_enet_set_pauseparam()
2875 fep->pause_flag = 0; in fec_enet_set_pauseparam()
2878 fep->pause_flag |= pause->rx_pause ? FEC_PAUSE_FLAG_ENABLE : 0; in fec_enet_set_pauseparam()
2879 fep->pause_flag |= pause->autoneg ? FEC_PAUSE_FLAG_AUTONEG : 0; in fec_enet_set_pauseparam()
2881 phy_set_sym_pause(ndev->phydev, pause->rx_pause, pause->tx_pause, in fec_enet_set_pauseparam()
2882 pause->autoneg); in fec_enet_set_pauseparam()
2884 if (pause->autoneg) { in fec_enet_set_pauseparam()
2887 phy_start_aneg(ndev->phydev); in fec_enet_set_pauseparam()
2890 napi_disable(&fep->napi); in fec_enet_set_pauseparam()
2895 napi_enable(&fep->napi); in fec_enet_set_pauseparam()
2985 fep->ethtool_stats[i] = readl(fep->hwp + fec_stats[i].offset); in fec_enet_update_ethtool_stats()
2994 for (i = fep->num_rx_queues - 1; i >= 0; i--) { in fec_enet_get_xdp_stats()
2995 rxq = fep->rx_queue[i]; in fec_enet_get_xdp_stats()
2998 xdp_stats[j] += rxq->stats[j]; in fec_enet_get_xdp_stats()
3011 for (i = fep->num_rx_queues - 1; i >= 0; i--) { in fec_enet_page_pool_stats()
3012 rxq = fep->rx_queue[i]; in fec_enet_page_pool_stats()
3014 if (!rxq->page_pool) in fec_enet_page_pool_stats()
3017 page_pool_get_stats(rxq->page_pool, &stats); in fec_enet_page_pool_stats()
3032 memcpy(data, fep->ethtool_stats, FEC_STATS_SIZE); in fec_enet_get_ethtool_stats()
3075 return -EOPNOTSUPP; in fec_enet_get_sset_count()
3086 writel(FEC_MIB_CTRLSTAT_DISABLE, fep->hwp + FEC_MIB_CTRLSTAT); in fec_enet_clear_ethtool_stats()
3089 writel(0, fep->hwp + fec_stats[i].offset); in fec_enet_clear_ethtool_stats()
3091 for (i = fep->num_rx_queues - 1; i >= 0; i--) { in fec_enet_clear_ethtool_stats()
3092 rxq = fep->rx_queue[i]; in fec_enet_clear_ethtool_stats()
3094 rxq->stats[j] = 0; in fec_enet_clear_ethtool_stats()
3098 writel(0, fep->hwp + FEC_MIB_CTRLSTAT); in fec_enet_clear_ethtool_stats()
3120 return us * (fep->itr_clk_rate / 64000) / 1000; in fec_enet_us_to_itr_clock()
3130 if (!fep->rx_time_itr || !fep->rx_pkts_itr || in fec_enet_itr_coal_set()
3131 !fep->tx_time_itr || !fep->tx_pkts_itr) in fec_enet_itr_coal_set()
3141 rx_itr |= FEC_ITR_ICFT(fep->rx_pkts_itr); in fec_enet_itr_coal_set()
3142 rx_itr |= FEC_ITR_ICTT(fec_enet_us_to_itr_clock(ndev, fep->rx_time_itr)); in fec_enet_itr_coal_set()
3143 tx_itr |= FEC_ITR_ICFT(fep->tx_pkts_itr); in fec_enet_itr_coal_set()
3144 tx_itr |= FEC_ITR_ICTT(fec_enet_us_to_itr_clock(ndev, fep->tx_time_itr)); in fec_enet_itr_coal_set()
3149 writel(tx_itr, fep->hwp + FEC_TXIC0); in fec_enet_itr_coal_set()
3150 writel(rx_itr, fep->hwp + FEC_RXIC0); in fec_enet_itr_coal_set()
3151 if (fep->quirks & FEC_QUIRK_HAS_MULTI_QUEUES) { in fec_enet_itr_coal_set()
3152 writel(tx_itr, fep->hwp + FEC_TXIC1); in fec_enet_itr_coal_set()
3153 writel(rx_itr, fep->hwp + FEC_RXIC1); in fec_enet_itr_coal_set()
3154 writel(tx_itr, fep->hwp + FEC_TXIC2); in fec_enet_itr_coal_set()
3155 writel(rx_itr, fep->hwp + FEC_RXIC2); in fec_enet_itr_coal_set()
3166 if (!(fep->quirks & FEC_QUIRK_HAS_COALESCE)) in fec_enet_get_coalesce()
3167 return -EOPNOTSUPP; in fec_enet_get_coalesce()
3169 ec->rx_coalesce_usecs = fep->rx_time_itr; in fec_enet_get_coalesce()
3170 ec->rx_max_coalesced_frames = fep->rx_pkts_itr; in fec_enet_get_coalesce()
3172 ec->tx_coalesce_usecs = fep->tx_time_itr; in fec_enet_get_coalesce()
3173 ec->tx_max_coalesced_frames = fep->tx_pkts_itr; in fec_enet_get_coalesce()
3184 struct device *dev = &fep->pdev->dev; in fec_enet_set_coalesce()
3187 if (!(fep->quirks & FEC_QUIRK_HAS_COALESCE)) in fec_enet_set_coalesce()
3188 return -EOPNOTSUPP; in fec_enet_set_coalesce()
3190 if (ec->rx_max_coalesced_frames > 255) { in fec_enet_set_coalesce()
3192 return -EINVAL; in fec_enet_set_coalesce()
3195 if (ec->tx_max_coalesced_frames > 255) { in fec_enet_set_coalesce()
3197 return -EINVAL; in fec_enet_set_coalesce()
3200 cycle = fec_enet_us_to_itr_clock(ndev, ec->rx_coalesce_usecs); in fec_enet_set_coalesce()
3203 return -EINVAL; in fec_enet_set_coalesce()
3206 cycle = fec_enet_us_to_itr_clock(ndev, ec->tx_coalesce_usecs); in fec_enet_set_coalesce()
3209 return -EINVAL; in fec_enet_set_coalesce()
3212 fep->rx_time_itr = ec->rx_coalesce_usecs; in fec_enet_set_coalesce()
3213 fep->rx_pkts_itr = ec->rx_max_coalesced_frames; in fec_enet_set_coalesce()
3215 fep->tx_time_itr = ec->tx_coalesce_usecs; in fec_enet_set_coalesce()
3216 fep->tx_pkts_itr = ec->tx_max_coalesced_frames; in fec_enet_set_coalesce()
3228 if (!(fep->quirks & FEC_QUIRK_HAS_EEE)) in fec_enet_get_eee()
3229 return -EOPNOTSUPP; in fec_enet_get_eee()
3232 return -ENETDOWN; in fec_enet_get_eee()
3234 return phy_ethtool_get_eee(ndev->phydev, edata); in fec_enet_get_eee()
3242 if (!(fep->quirks & FEC_QUIRK_HAS_EEE)) in fec_enet_set_eee()
3243 return -EOPNOTSUPP; in fec_enet_set_eee()
3246 return -ENETDOWN; in fec_enet_set_eee()
3248 return phy_ethtool_set_eee(ndev->phydev, edata); in fec_enet_set_eee()
3256 if (fep->wol_flag & FEC_WOL_HAS_MAGIC_PACKET) { in fec_enet_get_wol()
3257 wol->supported = WAKE_MAGIC; in fec_enet_get_wol()
3258 wol->wolopts = fep->wol_flag & FEC_WOL_FLAG_ENABLE ? WAKE_MAGIC : 0; in fec_enet_get_wol()
3260 wol->supported = wol->wolopts = 0; in fec_enet_get_wol()
3269 if (!(fep->wol_flag & FEC_WOL_HAS_MAGIC_PACKET)) in fec_enet_set_wol()
3270 return -EINVAL; in fec_enet_set_wol()
3272 if (wol->wolopts & ~WAKE_MAGIC) in fec_enet_set_wol()
3273 return -EINVAL; in fec_enet_set_wol()
3275 device_set_wakeup_enable(&ndev->dev, wol->wolopts & WAKE_MAGIC); in fec_enet_set_wol()
3276 if (device_may_wakeup(&ndev->dev)) in fec_enet_set_wol()
3277 fep->wol_flag |= FEC_WOL_FLAG_ENABLE; in fec_enet_set_wol()
3279 fep->wol_flag &= (~FEC_WOL_FLAG_ENABLE); in fec_enet_set_wol()
3319 for (q = 0; q < fep->num_rx_queues; q++) { in fec_enet_free_buffers()
3320 rxq = fep->rx_queue[q]; in fec_enet_free_buffers()
3321 for (i = 0; i < rxq->bd.ring_size; i++) in fec_enet_free_buffers()
3322 page_pool_put_full_page(rxq->page_pool, rxq->rx_skb_info[i].page, false); in fec_enet_free_buffers()
3325 rxq->stats[i] = 0; in fec_enet_free_buffers()
3327 if (xdp_rxq_info_is_reg(&rxq->xdp_rxq)) in fec_enet_free_buffers()
3328 xdp_rxq_info_unreg(&rxq->xdp_rxq); in fec_enet_free_buffers()
3329 page_pool_destroy(rxq->page_pool); in fec_enet_free_buffers()
3330 rxq->page_pool = NULL; in fec_enet_free_buffers()
3333 for (q = 0; q < fep->num_tx_queues; q++) { in fec_enet_free_buffers()
3334 txq = fep->tx_queue[q]; in fec_enet_free_buffers()
3335 for (i = 0; i < txq->bd.ring_size; i++) { in fec_enet_free_buffers()
3336 kfree(txq->tx_bounce[i]); in fec_enet_free_buffers()
3337 txq->tx_bounce[i] = NULL; in fec_enet_free_buffers()
3339 if (!txq->tx_buf[i].buf_p) { in fec_enet_free_buffers()
3340 txq->tx_buf[i].type = FEC_TXBUF_T_SKB; in fec_enet_free_buffers()
3344 if (txq->tx_buf[i].type == FEC_TXBUF_T_SKB) { in fec_enet_free_buffers()
3345 dev_kfree_skb(txq->tx_buf[i].buf_p); in fec_enet_free_buffers()
3346 } else if (txq->tx_buf[i].type == FEC_TXBUF_T_XDP_NDO) { in fec_enet_free_buffers()
3347 xdp_return_frame(txq->tx_buf[i].buf_p); in fec_enet_free_buffers()
3349 struct page *page = txq->tx_buf[i].buf_p; in fec_enet_free_buffers()
3351 page_pool_put_page(page->pp, page, 0, false); in fec_enet_free_buffers()
3354 txq->tx_buf[i].buf_p = NULL; in fec_enet_free_buffers()
3355 txq->tx_buf[i].type = FEC_TXBUF_T_SKB; in fec_enet_free_buffers()
3366 for (i = 0; i < fep->num_tx_queues; i++) in fec_enet_free_queue()
3367 if (fep->tx_queue[i] && fep->tx_queue[i]->tso_hdrs) { in fec_enet_free_queue()
3368 txq = fep->tx_queue[i]; in fec_enet_free_queue()
3369 fec_dma_free(&fep->pdev->dev, in fec_enet_free_queue()
3370 txq->bd.ring_size * TSO_HEADER_SIZE, in fec_enet_free_queue()
3371 txq->tso_hdrs, txq->tso_hdrs_dma); in fec_enet_free_queue()
3374 for (i = 0; i < fep->num_rx_queues; i++) in fec_enet_free_queue()
3375 kfree(fep->rx_queue[i]); in fec_enet_free_queue()
3376 for (i = 0; i < fep->num_tx_queues; i++) in fec_enet_free_queue()
3377 kfree(fep->tx_queue[i]); in fec_enet_free_queue()
3387 for (i = 0; i < fep->num_tx_queues; i++) { in fec_enet_alloc_queue()
3390 ret = -ENOMEM; in fec_enet_alloc_queue()
3394 fep->tx_queue[i] = txq; in fec_enet_alloc_queue()
3395 txq->bd.ring_size = TX_RING_SIZE; in fec_enet_alloc_queue()
3396 fep->total_tx_ring_size += fep->tx_queue[i]->bd.ring_size; in fec_enet_alloc_queue()
3398 txq->tx_stop_threshold = FEC_MAX_SKB_DESCS; in fec_enet_alloc_queue()
3399 txq->tx_wake_threshold = FEC_MAX_SKB_DESCS + 2 * MAX_SKB_FRAGS; in fec_enet_alloc_queue()
3401 txq->tso_hdrs = fec_dma_alloc(&fep->pdev->dev, in fec_enet_alloc_queue()
3402 txq->bd.ring_size * TSO_HEADER_SIZE, in fec_enet_alloc_queue()
3403 &txq->tso_hdrs_dma, GFP_KERNEL); in fec_enet_alloc_queue()
3404 if (!txq->tso_hdrs) { in fec_enet_alloc_queue()
3405 ret = -ENOMEM; in fec_enet_alloc_queue()
3410 for (i = 0; i < fep->num_rx_queues; i++) { in fec_enet_alloc_queue()
3411 fep->rx_queue[i] = kzalloc(sizeof(*fep->rx_queue[i]), in fec_enet_alloc_queue()
3413 if (!fep->rx_queue[i]) { in fec_enet_alloc_queue()
3414 ret = -ENOMEM; in fec_enet_alloc_queue()
3418 fep->rx_queue[i]->bd.ring_size = RX_RING_SIZE; in fec_enet_alloc_queue()
3419 fep->total_rx_ring_size += fep->rx_queue[i]->bd.ring_size; in fec_enet_alloc_queue()
3438 rxq = fep->rx_queue[queue]; in fec_enet_alloc_rxq_buffers()
3439 bdp = rxq->bd.base; in fec_enet_alloc_rxq_buffers()
3441 err = fec_enet_create_page_pool(fep, rxq, rxq->bd.ring_size); in fec_enet_alloc_rxq_buffers()
3447 for (i = 0; i < rxq->bd.ring_size; i++) { in fec_enet_alloc_rxq_buffers()
3448 page = page_pool_dev_alloc_pages(rxq->page_pool); in fec_enet_alloc_rxq_buffers()
3453 bdp->cbd_bufaddr = cpu_to_fec32(phys_addr); in fec_enet_alloc_rxq_buffers()
3455 rxq->rx_skb_info[i].page = page; in fec_enet_alloc_rxq_buffers()
3456 rxq->rx_skb_info[i].offset = FEC_ENET_XDP_HEADROOM; in fec_enet_alloc_rxq_buffers()
3457 bdp->cbd_sc = cpu_to_fec16(BD_ENET_RX_EMPTY); in fec_enet_alloc_rxq_buffers()
3459 if (fep->bufdesc_ex) { in fec_enet_alloc_rxq_buffers()
3461 ebdp->cbd_esc = cpu_to_fec32(BD_ENET_RX_INT); in fec_enet_alloc_rxq_buffers()
3464 bdp = fec_enet_get_nextdesc(bdp, &rxq->bd); in fec_enet_alloc_rxq_buffers()
3468 bdp = fec_enet_get_prevdesc(bdp, &rxq->bd); in fec_enet_alloc_rxq_buffers()
3469 bdp->cbd_sc |= cpu_to_fec16(BD_SC_WRAP); in fec_enet_alloc_rxq_buffers()
3474 return -ENOMEM; in fec_enet_alloc_rxq_buffers()
3485 txq = fep->tx_queue[queue]; in fec_enet_alloc_txq_buffers()
3486 bdp = txq->bd.base; in fec_enet_alloc_txq_buffers()
3487 for (i = 0; i < txq->bd.ring_size; i++) { in fec_enet_alloc_txq_buffers()
3488 txq->tx_bounce[i] = kmalloc(FEC_ENET_TX_FRSIZE, GFP_KERNEL); in fec_enet_alloc_txq_buffers()
3489 if (!txq->tx_bounce[i]) in fec_enet_alloc_txq_buffers()
3492 bdp->cbd_sc = cpu_to_fec16(0); in fec_enet_alloc_txq_buffers()
3493 bdp->cbd_bufaddr = cpu_to_fec32(0); in fec_enet_alloc_txq_buffers()
3495 if (fep->bufdesc_ex) { in fec_enet_alloc_txq_buffers()
3497 ebdp->cbd_esc = cpu_to_fec32(BD_ENET_TX_INT); in fec_enet_alloc_txq_buffers()
3500 bdp = fec_enet_get_nextdesc(bdp, &txq->bd); in fec_enet_alloc_txq_buffers()
3504 bdp = fec_enet_get_prevdesc(bdp, &txq->bd); in fec_enet_alloc_txq_buffers()
3505 bdp->cbd_sc |= cpu_to_fec16(BD_SC_WRAP); in fec_enet_alloc_txq_buffers()
3511 return -ENOMEM; in fec_enet_alloc_txq_buffers()
3519 for (i = 0; i < fep->num_rx_queues; i++) in fec_enet_alloc_buffers()
3521 return -ENOMEM; in fec_enet_alloc_buffers()
3523 for (i = 0; i < fep->num_tx_queues; i++) in fec_enet_alloc_buffers()
3525 return -ENOMEM; in fec_enet_alloc_buffers()
3536 ret = pm_runtime_resume_and_get(&fep->pdev->dev); in fec_enet_open()
3540 pinctrl_pm_select_default_state(&fep->pdev->dev); in fec_enet_open()
3551 if (ndev->phydev && ndev->phydev->drv) in fec_enet_open()
3578 if (fep->quirks & FEC_QUIRK_ERR006687) in fec_enet_open()
3581 if (fep->quirks & FEC_QUIRK_HAS_PMQOS) in fec_enet_open()
3582 cpu_latency_qos_add_request(&fep->pm_qos_req, 0); in fec_enet_open()
3584 napi_enable(&fep->napi); in fec_enet_open()
3585 phy_start(ndev->phydev); in fec_enet_open()
3588 device_set_wakeup_enable(&ndev->dev, fep->wol_flag & in fec_enet_open()
3598 pm_runtime_mark_last_busy(&fep->pdev->dev); in fec_enet_open()
3599 pm_runtime_put_autosuspend(&fep->pdev->dev); in fec_enet_open()
3600 pinctrl_pm_select_sleep_state(&fep->pdev->dev); in fec_enet_open()
3609 phy_stop(ndev->phydev); in fec_enet_close()
3612 napi_disable(&fep->napi); in fec_enet_close()
3617 phy_disconnect(ndev->phydev); in fec_enet_close()
3619 if (fep->quirks & FEC_QUIRK_ERR006687) in fec_enet_close()
3625 if (fep->quirks & FEC_QUIRK_HAS_PMQOS) in fec_enet_close()
3626 cpu_latency_qos_remove_request(&fep->pm_qos_req); in fec_enet_close()
3628 pinctrl_pm_select_sleep_state(&fep->pdev->dev); in fec_enet_close()
3629 pm_runtime_mark_last_busy(&fep->pdev->dev); in fec_enet_close()
3630 pm_runtime_put_autosuspend(&fep->pdev->dev); in fec_enet_close()
3640 * MAC address filtering. Some of the drivers check to make sure it is
3641 * a group multicast address, and discard those that are not. I guess I
3657 if (ndev->flags & IFF_PROMISC) { in set_multicast_list()
3658 tmp = readl(fep->hwp + FEC_R_CNTRL); in set_multicast_list()
3660 writel(tmp, fep->hwp + FEC_R_CNTRL); in set_multicast_list()
3664 tmp = readl(fep->hwp + FEC_R_CNTRL); in set_multicast_list()
3666 writel(tmp, fep->hwp + FEC_R_CNTRL); in set_multicast_list()
3668 if (ndev->flags & IFF_ALLMULTI) { in set_multicast_list()
3672 writel(0xffffffff, fep->hwp + FEC_GRP_HASH_TABLE_HIGH); in set_multicast_list()
3673 writel(0xffffffff, fep->hwp + FEC_GRP_HASH_TABLE_LOW); in set_multicast_list()
3680 /* calculate crc32 value of mac address */ in set_multicast_list()
3681 crc = ether_crc_le(ndev->addr_len, ha->addr); in set_multicast_list()
3686 hash = (crc >> (32 - FEC_HASH_BITS)) & 0x3f; in set_multicast_list()
3689 hash_high |= 1 << (hash - 32); in set_multicast_list()
3694 writel(hash_high, fep->hwp + FEC_GRP_HASH_TABLE_HIGH); in set_multicast_list()
3695 writel(hash_low, fep->hwp + FEC_GRP_HASH_TABLE_LOW); in set_multicast_list()
3706 if (!is_valid_ether_addr(addr->sa_data)) in fec_set_mac_address()
3707 return -EADDRNOTAVAIL; in fec_set_mac_address()
3708 eth_hw_addr_set(ndev, addr->sa_data); in fec_set_mac_address()
3719 writel(ndev->dev_addr[3] | (ndev->dev_addr[2] << 8) | in fec_set_mac_address()
3720 (ndev->dev_addr[1] << 16) | (ndev->dev_addr[0] << 24), in fec_set_mac_address()
3721 fep->hwp + FEC_ADDR_LOW); in fec_set_mac_address()
3722 writel((ndev->dev_addr[5] << 16) | (ndev->dev_addr[4] << 24), in fec_set_mac_address()
3723 fep->hwp + FEC_ADDR_HIGH); in fec_set_mac_address()
3731 netdev_features_t changed = features ^ netdev->features; in fec_enet_set_netdev_features()
3733 netdev->features = features; in fec_enet_set_netdev_features()
3738 fep->csum_flags |= FLAG_RX_CSUM_ENABLED; in fec_enet_set_netdev_features()
3740 fep->csum_flags &= ~FLAG_RX_CSUM_ENABLED; in fec_enet_set_netdev_features()
3748 netdev_features_t changed = features ^ netdev->features; in fec_set_features()
3751 napi_disable(&fep->napi); in fec_set_features()
3758 napi_enable(&fep->napi); in fec_set_features()
3772 if (!(fep->quirks & FEC_QUIRK_HAS_AVB)) in fec_enet_select_queue()
3776 if (eth_type_vlan(skb->protocol)) { in fec_enet_select_queue()
3779 vlan_tag = ntohs(vhdr->h_vlan_TCI); in fec_enet_select_queue()
3782 vlan_tag = skb->vlan_tci; in fec_enet_select_queue()
3796 switch (bpf->command) { in fec_enet_bpf()
3802 if (fep->quirks & FEC_QUIRK_SWAP_FRAME) in fec_enet_bpf()
3803 return -EOPNOTSUPP; in fec_enet_bpf()
3805 if (!bpf->prog) in fec_enet_bpf()
3809 napi_disable(&fep->napi); in fec_enet_bpf()
3813 old_prog = xchg(&fep->xdp_prog, bpf->prog); in fec_enet_bpf()
3820 napi_enable(&fep->napi); in fec_enet_bpf()
3824 if (bpf->prog) in fec_enet_bpf()
3830 return -EOPNOTSUPP; in fec_enet_bpf()
3833 return -EOPNOTSUPP; in fec_enet_bpf()
3843 return (index % fep->num_tx_queues); in fec_enet_xdp_get_tx_queue()
3859 netdev_err_once(fep->netdev, "NOT enough BD for SG!\n"); in fec_enet_txq_xmit_frame()
3860 return -EBUSY; in fec_enet_txq_xmit_frame()
3864 bdp = txq->bd.cur; in fec_enet_txq_xmit_frame()
3865 status = fec16_to_cpu(bdp->cbd_sc); in fec_enet_txq_xmit_frame()
3868 index = fec_enet_get_bd_index(bdp, &txq->bd); in fec_enet_txq_xmit_frame()
3873 dma_addr = dma_map_single(&fep->pdev->dev, xdpf->data, in fec_enet_txq_xmit_frame()
3874 xdpf->len, DMA_TO_DEVICE); in fec_enet_txq_xmit_frame()
3875 if (dma_mapping_error(&fep->pdev->dev, dma_addr)) in fec_enet_txq_xmit_frame()
3876 return -ENOMEM; in fec_enet_txq_xmit_frame()
3878 frame_len = xdpf->len; in fec_enet_txq_xmit_frame()
3879 txq->tx_buf[index].buf_p = xdpf; in fec_enet_txq_xmit_frame()
3880 txq->tx_buf[index].type = FEC_TXBUF_T_XDP_NDO; in fec_enet_txq_xmit_frame()
3885 page = virt_to_page(xdpb->data); in fec_enet_txq_xmit_frame()
3887 (xdpb->data - xdpb->data_hard_start); in fec_enet_txq_xmit_frame()
3888 dma_sync_single_for_device(&fep->pdev->dev, dma_addr, in fec_enet_txq_xmit_frame()
3890 frame_len = xdpb->data_end - xdpb->data; in fec_enet_txq_xmit_frame()
3891 txq->tx_buf[index].buf_p = page; in fec_enet_txq_xmit_frame()
3892 txq->tx_buf[index].type = FEC_TXBUF_T_XDP_TX; in fec_enet_txq_xmit_frame()
3896 if (fep->bufdesc_ex) in fec_enet_txq_xmit_frame()
3899 bdp->cbd_bufaddr = cpu_to_fec32(dma_addr); in fec_enet_txq_xmit_frame()
3900 bdp->cbd_datlen = cpu_to_fec16(frame_len); in fec_enet_txq_xmit_frame()
3902 if (fep->bufdesc_ex) { in fec_enet_txq_xmit_frame()
3905 if (fep->quirks & FEC_QUIRK_HAS_AVB) in fec_enet_txq_xmit_frame()
3906 estatus |= FEC_TX_BD_FTYPE(txq->bd.qid); in fec_enet_txq_xmit_frame()
3908 ebdp->cbd_bdu = 0; in fec_enet_txq_xmit_frame()
3909 ebdp->cbd_esc = cpu_to_fec32(estatus); in fec_enet_txq_xmit_frame()
3918 * it's the last BD of the frame, and to put the CRC on the end. in fec_enet_txq_xmit_frame()
3921 bdp->cbd_sc = cpu_to_fec16(status); in fec_enet_txq_xmit_frame()
3923 /* If this was the last BD in the ring, start at the beginning again. */ in fec_enet_txq_xmit_frame()
3924 bdp = fec_enet_get_nextdesc(bdp, &txq->bd); in fec_enet_txq_xmit_frame()
3926 /* Make sure the update to bdp are performed before txq->bd.cur. */ in fec_enet_txq_xmit_frame()
3929 txq->bd.cur = bdp; in fec_enet_txq_xmit_frame()
3932 writel(0, txq->bd.reg_desc_active); in fec_enet_txq_xmit_frame()
3946 txq = fep->tx_queue[queue]; in fec_enet_xdp_tx_xmit()
3947 nq = netdev_get_tx_queue(fep->netdev, queue); in fec_enet_xdp_tx_xmit()
3974 txq = fep->tx_queue[queue]; in fec_enet_xdp_xmit()
3975 nq = netdev_get_tx_queue(fep->netdev, queue); in fec_enet_xdp_xmit()
3998 return -EINVAL; in fec_hwtstamp_get()
4000 if (!fep->bufdesc_ex) in fec_hwtstamp_get()
4001 return -EOPNOTSUPP; in fec_hwtstamp_get()
4015 return -EINVAL; in fec_hwtstamp_set()
4017 if (!fep->bufdesc_ex) in fec_hwtstamp_set()
4018 return -EOPNOTSUPP; in fec_hwtstamp_set()
4059 unsigned dsize = fep->bufdesc_ex ? sizeof(struct bufdesc_ex) : in fec_enet_init()
4066 fep->rx_align = 0xf; in fec_enet_init()
4067 fep->tx_align = 0xf; in fec_enet_init()
4069 fep->rx_align = 0x3; in fec_enet_init()
4070 fep->tx_align = 0x3; in fec_enet_init()
4072 fep->rx_pkts_itr = FEC_ITR_ICFT_DEFAULT; in fec_enet_init()
4073 fep->tx_pkts_itr = FEC_ITR_ICFT_DEFAULT; in fec_enet_init()
4074 fep->rx_time_itr = FEC_ITR_ICTT_DEFAULT; in fec_enet_init()
4075 fep->tx_time_itr = FEC_ITR_ICTT_DEFAULT; in fec_enet_init()
4078 ret = dma_set_mask_and_coherent(&fep->pdev->dev, DMA_BIT_MASK(32)); in fec_enet_init()
4080 dev_warn(&fep->pdev->dev, "No suitable DMA available\n"); in fec_enet_init()
4088 bd_size = (fep->total_tx_ring_size + fep->total_rx_ring_size) * dsize; in fec_enet_init()
4091 cbd_base = fec_dmam_alloc(&fep->pdev->dev, bd_size, &bd_dma, in fec_enet_init()
4094 ret = -ENOMEM; in fec_enet_init()
4098 /* Get the Ethernet address */ in fec_enet_init()
4104 for (i = 0; i < fep->num_rx_queues; i++) { in fec_enet_init()
4105 struct fec_enet_priv_rx_q *rxq = fep->rx_queue[i]; in fec_enet_init()
4106 unsigned size = dsize * rxq->bd.ring_size; in fec_enet_init()
4108 rxq->bd.qid = i; in fec_enet_init()
4109 rxq->bd.base = cbd_base; in fec_enet_init()
4110 rxq->bd.cur = cbd_base; in fec_enet_init()
4111 rxq->bd.dma = bd_dma; in fec_enet_init()
4112 rxq->bd.dsize = dsize; in fec_enet_init()
4113 rxq->bd.dsize_log2 = dsize_log2; in fec_enet_init()
4114 rxq->bd.reg_desc_active = fep->hwp + offset_des_active_rxq[i]; in fec_enet_init()
4117 rxq->bd.last = (struct bufdesc *)(((void *)cbd_base) - dsize); in fec_enet_init()
4120 for (i = 0; i < fep->num_tx_queues; i++) { in fec_enet_init()
4121 struct fec_enet_priv_tx_q *txq = fep->tx_queue[i]; in fec_enet_init()
4122 unsigned size = dsize * txq->bd.ring_size; in fec_enet_init()
4124 txq->bd.qid = i; in fec_enet_init()
4125 txq->bd.base = cbd_base; in fec_enet_init()
4126 txq->bd.cur = cbd_base; in fec_enet_init()
4127 txq->bd.dma = bd_dma; in fec_enet_init()
4128 txq->bd.dsize = dsize; in fec_enet_init()
4129 txq->bd.dsize_log2 = dsize_log2; in fec_enet_init()
4130 txq->bd.reg_desc_active = fep->hwp + offset_des_active_txq[i]; in fec_enet_init()
4133 txq->bd.last = (struct bufdesc *)(((void *)cbd_base) - dsize); in fec_enet_init()
4138 ndev->watchdog_timeo = TX_TIMEOUT; in fec_enet_init()
4139 ndev->netdev_ops = &fec_netdev_ops; in fec_enet_init()
4140 ndev->ethtool_ops = &fec_enet_ethtool_ops; in fec_enet_init()
4142 writel(FEC_RX_DISABLED_IMASK, fep->hwp + FEC_IMASK); in fec_enet_init()
4143 netif_napi_add(ndev, &fep->napi, fec_enet_rx_napi); in fec_enet_init()
4145 if (fep->quirks & FEC_QUIRK_HAS_VLAN) in fec_enet_init()
4147 ndev->features |= NETIF_F_HW_VLAN_CTAG_RX; in fec_enet_init()
4149 if (fep->quirks & FEC_QUIRK_HAS_CSUM) { in fec_enet_init()
4153 ndev->features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM in fec_enet_init()
4155 fep->csum_flags |= FLAG_RX_CSUM_ENABLED; in fec_enet_init()
4158 if (fep->quirks & FEC_QUIRK_HAS_MULTI_QUEUES) { in fec_enet_init()
4159 fep->tx_align = 0; in fec_enet_init()
4160 fep->rx_align = 0x3f; in fec_enet_init()
4163 ndev->hw_features = ndev->features; in fec_enet_init()
4165 if (!(fep->quirks & FEC_QUIRK_SWAP_FRAME)) in fec_enet_init()
4166 ndev->xdp_features = NETDEV_XDP_ACT_BASIC | in fec_enet_init()
4171 if (fep->quirks & FEC_QUIRK_MIB_CLEAR) in fec_enet_init()
4187 netif_napi_del(&fep->napi); in fec_enet_deinit()
4196 struct device_node *np = pdev->dev.of_node; in fec_reset_phy()
4202 err = of_property_read_u32(np, "phy-reset-duration", &msec); in fec_reset_phy()
4207 err = of_property_read_u32(np, "phy-reset-post-delay", &phy_post_delay); in fec_reset_phy()
4210 return -EINVAL; in fec_reset_phy()
4212 phy_reset = devm_gpiod_get_optional(&pdev->dev, "phy-reset", in fec_reset_phy()
4215 return dev_err_probe(&pdev->dev, PTR_ERR(phy_reset), in fec_reset_phy()
4216 "failed to get phy-reset-gpios\n"); in fec_reset_phy()
4253 struct device_node *np = pdev->dev.of_node; in fec_enet_get_queue_num()
4261 of_property_read_u32(np, "fsl,num-tx-queues", num_tx); in fec_enet_get_queue_num()
4263 of_property_read_u32(np, "fsl,num-rx-queues", num_rx); in fec_enet_get_queue_num()
4266 dev_warn(&pdev->dev, "Invalid num_tx(=%d), fall back to 1\n", in fec_enet_get_queue_num()
4273 dev_warn(&pdev->dev, "Invalid num_rx(=%d), fall back to 1\n", in fec_enet_get_queue_num()
4299 if (fep->quirks & FEC_QUIRK_WAKEUP_FROM_INT2) in fec_enet_get_wakeup_irq()
4300 fep->wake_irq = fep->irq[2]; in fec_enet_get_wakeup_irq()
4302 fep->wake_irq = fep->irq[0]; in fec_enet_get_wakeup_irq()
4312 gpr_np = of_parse_phandle(np, "fsl,stop-mode", 0); in fec_enet_init_stop_mode()
4316 ret = of_property_read_u32_array(np, "fsl,stop-mode", out_val, in fec_enet_init_stop_mode()
4319 dev_dbg(&fep->pdev->dev, "no stop mode property\n"); in fec_enet_init_stop_mode()
4323 fep->stop_gpr.gpr = syscon_node_to_regmap(gpr_np); in fec_enet_init_stop_mode()
4324 if (IS_ERR(fep->stop_gpr.gpr)) { in fec_enet_init_stop_mode()
4325 dev_err(&fep->pdev->dev, "could not find gpr regmap\n"); in fec_enet_init_stop_mode()
4326 ret = PTR_ERR(fep->stop_gpr.gpr); in fec_enet_init_stop_mode()
4327 fep->stop_gpr.gpr = NULL; in fec_enet_init_stop_mode()
4331 fep->stop_gpr.reg = out_val[1]; in fec_enet_init_stop_mode()
4332 fep->stop_gpr.bit = out_val[2]; in fec_enet_init_stop_mode()
4349 struct device_node *np = pdev->dev.of_node, *phy_node; in fec_probe()
4362 return -ENOMEM; in fec_probe()
4364 SET_NETDEV_DEV(ndev, &pdev->dev); in fec_probe()
4369 dev_info = device_get_match_data(&pdev->dev); in fec_probe()
4371 dev_info = (const struct fec_devinfo *)pdev->id_entry->driver_data; in fec_probe()
4373 fep->quirks = dev_info->quirks; in fec_probe()
4375 fep->netdev = ndev; in fec_probe()
4376 fep->num_rx_queues = num_rx_qs; in fec_probe()
4377 fep->num_tx_queues = num_tx_qs; in fec_probe()
4381 if (fep->quirks & FEC_QUIRK_HAS_GBIT) in fec_probe()
4382 fep->pause_flag |= FEC_PAUSE_FLAG_AUTONEG; in fec_probe()
4386 pinctrl_pm_select_default_state(&pdev->dev); in fec_probe()
4388 fep->hwp = devm_platform_ioremap_resource(pdev, 0); in fec_probe()
4389 if (IS_ERR(fep->hwp)) { in fec_probe()
4390 ret = PTR_ERR(fep->hwp); in fec_probe()
4394 fep->pdev = pdev; in fec_probe()
4395 fep->dev_id = dev_id++; in fec_probe()
4401 !of_property_read_bool(np, "fsl,err006687-workaround-present")) in fec_probe()
4402 fep->quirks |= FEC_QUIRK_ERR006687; in fec_probe()
4408 if (of_property_read_bool(np, "fsl,magic-packet")) in fec_probe()
4409 fep->wol_flag |= FEC_WOL_HAS_MAGIC_PACKET; in fec_probe()
4415 phy_node = of_parse_phandle(np, "phy-handle", 0); in fec_probe()
4419 dev_err(&pdev->dev, in fec_probe()
4420 "broken fixed-link specification\n"); in fec_probe()
4425 fep->phy_node = phy_node; in fec_probe()
4427 ret = of_get_phy_mode(pdev->dev.of_node, &interface); in fec_probe()
4429 pdata = dev_get_platdata(&pdev->dev); in fec_probe()
4431 fep->phy_interface = pdata->phy; in fec_probe()
4433 fep->phy_interface = PHY_INTERFACE_MODE_MII; in fec_probe()
4435 fep->phy_interface = interface; in fec_probe()
4442 fep->clk_ipg = devm_clk_get(&pdev->dev, "ipg"); in fec_probe()
4443 if (IS_ERR(fep->clk_ipg)) { in fec_probe()
4444 ret = PTR_ERR(fep->clk_ipg); in fec_probe()
4448 fep->clk_ahb = devm_clk_get(&pdev->dev, "ahb"); in fec_probe()
4449 if (IS_ERR(fep->clk_ahb)) { in fec_probe()
4450 ret = PTR_ERR(fep->clk_ahb); in fec_probe()
4454 fep->itr_clk_rate = clk_get_rate(fep->clk_ahb); in fec_probe()
4457 fep->clk_enet_out = devm_clk_get_optional(&pdev->dev, "enet_out"); in fec_probe()
4458 if (IS_ERR(fep->clk_enet_out)) { in fec_probe()
4459 ret = PTR_ERR(fep->clk_enet_out); in fec_probe()
4463 fep->ptp_clk_on = false; in fec_probe()
4464 mutex_init(&fep->ptp_clk_mutex); in fec_probe()
4467 fep->clk_ref = devm_clk_get_optional(&pdev->dev, "enet_clk_ref"); in fec_probe()
4468 if (IS_ERR(fep->clk_ref)) { in fec_probe()
4469 ret = PTR_ERR(fep->clk_ref); in fec_probe()
4472 fep->clk_ref_rate = clk_get_rate(fep->clk_ref); in fec_probe()
4475 if (fep->rgmii_txc_dly || fep->rgmii_rxc_dly) { in fec_probe()
4476 fep->clk_2x_txclk = devm_clk_get(&pdev->dev, "enet_2x_txclk"); in fec_probe()
4477 if (IS_ERR(fep->clk_2x_txclk)) in fec_probe()
4478 fep->clk_2x_txclk = NULL; in fec_probe()
4481 fep->bufdesc_ex = fep->quirks & FEC_QUIRK_HAS_BUFDESC_EX; in fec_probe()
4482 fep->clk_ptp = devm_clk_get(&pdev->dev, "ptp"); in fec_probe()
4483 if (IS_ERR(fep->clk_ptp)) { in fec_probe()
4484 fep->clk_ptp = NULL; in fec_probe()
4485 fep->bufdesc_ex = false; in fec_probe()
4492 ret = clk_prepare_enable(fep->clk_ipg); in fec_probe()
4495 ret = clk_prepare_enable(fep->clk_ahb); in fec_probe()
4499 fep->reg_phy = devm_regulator_get_optional(&pdev->dev, "phy"); in fec_probe()
4500 if (!IS_ERR(fep->reg_phy)) { in fec_probe()
4501 ret = regulator_enable(fep->reg_phy); in fec_probe()
4503 dev_err(&pdev->dev, in fec_probe()
4508 if (PTR_ERR(fep->reg_phy) == -EPROBE_DEFER) { in fec_probe()
4509 ret = -EPROBE_DEFER; in fec_probe()
4512 fep->reg_phy = NULL; in fec_probe()
4515 pm_runtime_set_autosuspend_delay(&pdev->dev, FEC_MDIO_PM_TIMEOUT); in fec_probe()
4516 pm_runtime_use_autosuspend(&pdev->dev); in fec_probe()
4517 pm_runtime_get_noresume(&pdev->dev); in fec_probe()
4518 pm_runtime_set_active(&pdev->dev); in fec_probe()
4519 pm_runtime_enable(&pdev->dev); in fec_probe()
4526 if (fep->bufdesc_ex) in fec_probe()
4542 ret = devm_request_irq(&pdev->dev, irq, fec_enet_interrupt, in fec_probe()
4543 0, pdev->name, ndev); in fec_probe()
4547 fep->irq[i] = irq; in fec_probe()
4560 pinctrl_pm_select_sleep_state(&pdev->dev); in fec_probe()
4562 ndev->max_mtu = PKT_MAXBUF_SIZE - ETH_HLEN - ETH_FCS_LEN; in fec_probe()
4568 device_init_wakeup(&ndev->dev, fep->wol_flag & in fec_probe()
4571 if (fep->bufdesc_ex && fep->ptp_clock) in fec_probe()
4572 netdev_info(ndev, "registered PHC device %d\n", fep->dev_id); in fec_probe()
4574 INIT_WORK(&fep->tx_timeout_work, fec_enet_timeout_work); in fec_probe()
4576 pm_runtime_mark_last_busy(&pdev->dev); in fec_probe()
4577 pm_runtime_put_autosuspend(&pdev->dev); in fec_probe()
4589 pm_runtime_put_noidle(&pdev->dev); in fec_probe()
4590 pm_runtime_disable(&pdev->dev); in fec_probe()
4591 if (fep->reg_phy) in fec_probe()
4592 regulator_disable(fep->reg_phy); in fec_probe()
4594 clk_disable_unprepare(fep->clk_ahb); in fec_probe()
4596 clk_disable_unprepare(fep->clk_ipg); in fec_probe()
4607 dev_id--; in fec_probe()
4619 struct device_node *np = pdev->dev.of_node; in fec_drv_remove()
4622 ret = pm_runtime_get_sync(&pdev->dev); in fec_drv_remove()
4624 dev_err(&pdev->dev, in fec_drv_remove()
4628 cancel_work_sync(&fep->tx_timeout_work); in fec_drv_remove()
4632 if (fep->reg_phy) in fec_drv_remove()
4633 regulator_disable(fep->reg_phy); in fec_drv_remove()
4637 of_node_put(fep->phy_node); in fec_drv_remove()
4643 clk_disable_unprepare(fep->clk_ahb); in fec_drv_remove()
4644 clk_disable_unprepare(fep->clk_ipg); in fec_drv_remove()
4646 pm_runtime_put_noidle(&pdev->dev); in fec_drv_remove()
4647 pm_runtime_disable(&pdev->dev); in fec_drv_remove()
4661 if (fep->wol_flag & FEC_WOL_FLAG_ENABLE) in fec_suspend()
4662 fep->wol_flag |= FEC_WOL_FLAG_SLEEP_ON; in fec_suspend()
4663 phy_stop(ndev->phydev); in fec_suspend()
4664 napi_disable(&fep->napi); in fec_suspend()
4669 if (!(fep->wol_flag & FEC_WOL_FLAG_ENABLE)) { in fec_suspend()
4671 pinctrl_pm_select_sleep_state(&fep->pdev->dev); in fec_suspend()
4674 if (fep->wake_irq > 0) { in fec_suspend()
4675 disable_irq(fep->wake_irq); in fec_suspend()
4676 enable_irq_wake(fep->wake_irq); in fec_suspend()
4683 fep->rpm_active = !pm_runtime_status_suspended(dev); in fec_suspend()
4684 if (fep->rpm_active) { in fec_suspend()
4694 if (fep->reg_phy && !(fep->wol_flag & FEC_WOL_FLAG_ENABLE)) in fec_suspend()
4695 regulator_disable(fep->reg_phy); in fec_suspend()
4700 if (fep->clk_enet_out || fep->reg_phy) in fec_suspend()
4701 fep->link = 0; in fec_suspend()
4713 if (fep->reg_phy && !(fep->wol_flag & FEC_WOL_FLAG_ENABLE)) { in fec_resume()
4714 ret = regulator_enable(fep->reg_phy); in fec_resume()
4721 if (fep->rpm_active) in fec_resume()
4729 if (fep->wol_flag & FEC_WOL_FLAG_ENABLE) { in fec_resume()
4731 if (fep->wake_irq) { in fec_resume()
4732 disable_irq_wake(fep->wake_irq); in fec_resume()
4733 enable_irq(fep->wake_irq); in fec_resume()
4736 val = readl(fep->hwp + FEC_ECNTRL); in fec_resume()
4738 writel(val, fep->hwp + FEC_ECNTRL); in fec_resume()
4739 fep->wol_flag &= ~FEC_WOL_FLAG_SLEEP_ON; in fec_resume()
4741 pinctrl_pm_select_default_state(&fep->pdev->dev); in fec_resume()
4747 napi_enable(&fep->napi); in fec_resume()
4748 phy_init_hw(ndev->phydev); in fec_resume()
4749 phy_start(ndev->phydev); in fec_resume()
4756 if (fep->reg_phy) in fec_resume()
4757 regulator_disable(fep->reg_phy); in fec_resume()
4766 clk_disable_unprepare(fep->clk_ahb); in fec_runtime_suspend()
4767 clk_disable_unprepare(fep->clk_ipg); in fec_runtime_suspend()
4778 ret = clk_prepare_enable(fep->clk_ahb); in fec_runtime_resume()
4781 ret = clk_prepare_enable(fep->clk_ipg); in fec_runtime_resume()
4788 clk_disable_unprepare(fep->clk_ahb); in fec_runtime_resume()