Lines Matching +full:zynqmp +full:- +full:gem
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Cadence MACB/GEM Ethernet Controller driver
5 * Copyright (C) 2004-2006 Atmel Corporation
10 #include <linux/clk-provider.h>
23 #include <linux/dma-mapping.h>
37 #include <linux/firmware/xlnx-zynqmp.h>
55 * (bp)->rx_ring_size)
61 * (bp)->tx_ring_size)
64 #define MACB_TX_WAKEUP_THRESH(bp) (3 * (bp)->tx_ring_size / 4)
75 …MAX_TX_LEN ((unsigned int)((1 << MACB_TX_FRMLEN_SIZE) - 1) & ~((unsigned int)(MACB_TX_LEN_ALIGN -…
91 * 1 frame time (10 Mbits/s, full-duplex, ignoring collisions)
130 switch (bp->hw_dma_cap) { in macb_dma_desc_get_size()
155 switch (bp->hw_dma_cap) { in macb_adj_dma_desc_idx()
181 return index & (bp->tx_ring_size - 1); in macb_tx_ring_wrap()
187 index = macb_tx_ring_wrap(queue->bp, index); in macb_tx_desc()
188 index = macb_adj_dma_desc_idx(queue->bp, index); in macb_tx_desc()
189 return &queue->tx_ring[index]; in macb_tx_desc()
195 return &queue->tx_skb[macb_tx_ring_wrap(queue->bp, index)]; in macb_tx_skb()
202 offset = macb_tx_ring_wrap(queue->bp, index) * in macb_tx_dma()
203 macb_dma_desc_get_size(queue->bp); in macb_tx_dma()
205 return queue->tx_ring_dma + offset; in macb_tx_dma()
210 return index & (bp->rx_ring_size - 1); in macb_rx_ring_wrap()
215 index = macb_rx_ring_wrap(queue->bp, index); in macb_rx_desc()
216 index = macb_adj_dma_desc_idx(queue->bp, index); in macb_rx_desc()
217 return &queue->rx_ring[index]; in macb_rx_desc()
222 return queue->rx_buffers + queue->bp->rx_buffer_size * in macb_rx_buffer()
223 macb_rx_ring_wrap(queue->bp, index); in macb_rx_buffer()
229 return __raw_readl(bp->regs + offset); in hw_readl_native()
234 __raw_writel(value, bp->regs + offset); in hw_writel_native()
239 return readl_relaxed(bp->regs + offset); in hw_readl()
244 writel_relaxed(value, bp->regs + offset); in hw_writel()
281 bottom = cpu_to_le32(*((u32 *)bp->dev->dev_addr)); in macb_set_hwaddr()
283 top = cpu_to_le16(*((u16 *)(bp->dev->dev_addr + 4))); in macb_set_hwaddr()
320 eth_hw_addr_set(bp->dev, addr); in macb_get_hwaddr()
325 dev_info(&bp->pdev->dev, "invalid hw address, using random\n"); in macb_get_hwaddr()
326 eth_hw_addr_random(bp->dev); in macb_get_hwaddr()
339 struct macb *bp = bus->priv; in macb_mdio_read_c22()
342 status = pm_runtime_resume_and_get(&bp->pdev->dev); in macb_mdio_read_c22()
363 pm_runtime_mark_last_busy(&bp->pdev->dev); in macb_mdio_read_c22()
364 pm_runtime_put_autosuspend(&bp->pdev->dev); in macb_mdio_read_c22()
372 struct macb *bp = bus->priv; in macb_mdio_read_c45()
375 status = pm_runtime_get_sync(&bp->pdev->dev); in macb_mdio_read_c45()
377 pm_runtime_put_noidle(&bp->pdev->dev); in macb_mdio_read_c45()
409 pm_runtime_mark_last_busy(&bp->pdev->dev); in macb_mdio_read_c45()
410 pm_runtime_put_autosuspend(&bp->pdev->dev); in macb_mdio_read_c45()
418 struct macb *bp = bus->priv; in macb_mdio_write_c22()
421 status = pm_runtime_resume_and_get(&bp->pdev->dev); in macb_mdio_write_c22()
441 pm_runtime_mark_last_busy(&bp->pdev->dev); in macb_mdio_write_c22()
442 pm_runtime_put_autosuspend(&bp->pdev->dev); in macb_mdio_write_c22()
451 struct macb *bp = bus->priv; in macb_mdio_write_c45()
454 status = pm_runtime_get_sync(&bp->pdev->dev); in macb_mdio_write_c45()
456 pm_runtime_put_noidle(&bp->pdev->dev); in macb_mdio_write_c45()
487 pm_runtime_mark_last_busy(&bp->pdev->dev); in macb_mdio_write_c45()
488 pm_runtime_put_autosuspend(&bp->pdev->dev); in macb_mdio_write_c45()
498 for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) { in macb_init_buffers()
499 queue_writel(queue, RBQP, lower_32_bits(queue->rx_ring_dma)); in macb_init_buffers()
501 if (bp->hw_dma_cap & HW_DMA_CAP_64B) in macb_init_buffers()
503 upper_32_bits(queue->rx_ring_dma)); in macb_init_buffers()
505 queue_writel(queue, TBQP, lower_32_bits(queue->tx_ring_dma)); in macb_init_buffers()
507 if (bp->hw_dma_cap & HW_DMA_CAP_64B) in macb_init_buffers()
509 upper_32_bits(queue->tx_ring_dma)); in macb_init_buffers()
515 * macb_set_tx_clk() - Set a clock to a new frequency
523 if (!bp->tx_clk || (bp->caps & MACB_CAPS_CLK_HW_CHG)) in macb_set_tx_clk()
527 if (bp->phy_interface == PHY_INTERFACE_MODE_MII) in macb_set_tx_clk()
534 rate_rounded = clk_round_rate(bp->tx_clk, rate); in macb_set_tx_clk()
541 ferr = abs(rate_rounded - rate); in macb_set_tx_clk()
544 netdev_warn(bp->dev, in macb_set_tx_clk()
548 if (clk_set_rate(bp->tx_clk, rate_rounded)) in macb_set_tx_clk()
549 netdev_err(bp->dev, "adjusting tx_clk failed.\n"); in macb_set_tx_clk()
574 state->speed = SPEED_10000; in macb_usx_pcs_get_state()
575 state->duplex = 1; in macb_usx_pcs_get_state()
576 state->an_complete = 1; in macb_usx_pcs_get_state()
579 state->link = !!(val & GEM_BIT(USX_BLOCK_LOCK)); in macb_usx_pcs_get_state()
582 state->pause = MLO_PAUSE_RX; in macb_usx_pcs_get_state()
602 state->link = 0; in macb_pcs_get_state()
634 struct net_device *ndev = to_net_dev(config->dev); in macb_mac_config()
640 spin_lock_irqsave(&bp->lock, flags); in macb_mac_config()
645 if (bp->caps & MACB_CAPS_MACB_IS_EMAC) { in macb_mac_config()
646 if (state->interface == PHY_INTERFACE_MODE_RMII) in macb_mac_config()
652 if (state->interface == PHY_INTERFACE_MODE_SGMII) { in macb_mac_config()
654 } else if (state->interface == PHY_INTERFACE_MODE_10GBASER) { in macb_mac_config()
657 } else if (bp->caps & MACB_CAPS_MIIONRGMII && in macb_mac_config()
658 bp->phy_interface == PHY_INTERFACE_MODE_MII) { in macb_mac_config()
674 if (macb_is_gem(bp) && state->interface == PHY_INTERFACE_MODE_SGMII) { in macb_mac_config()
686 spin_unlock_irqrestore(&bp->lock, flags); in macb_mac_config()
692 struct net_device *ndev = to_net_dev(config->dev); in macb_mac_link_down()
698 if (!(bp->caps & MACB_CAPS_MACB_IS_EMAC)) in macb_mac_link_down()
699 for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) in macb_mac_link_down()
701 bp->rx_intr_mask | MACB_TX_INT_FLAGS | MACB_BIT(HRESP)); in macb_mac_link_down()
716 struct net_device *ndev = to_net_dev(config->dev); in macb_mac_link_up()
723 spin_lock_irqsave(&bp->lock, flags); in macb_mac_link_up()
735 if (!(bp->caps & MACB_CAPS_MACB_IS_EMAC)) { in macb_mac_link_up()
750 bp->macbgem_ops.mog_init_rings(bp); in macb_mac_link_up()
753 for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) in macb_mac_link_up()
755 bp->rx_intr_mask | MACB_TX_INT_FLAGS | MACB_BIT(HRESP)); in macb_mac_link_up()
760 if (bp->phy_interface == PHY_INTERFACE_MODE_10GBASER) in macb_mac_link_up()
764 spin_unlock_irqrestore(&bp->lock, flags); in macb_mac_link_up()
766 if (!(bp->caps & MACB_CAPS_MACB_IS_EMAC)) in macb_mac_link_up()
782 struct net_device *ndev = to_net_dev(config->dev); in macb_mac_select_pcs()
786 return &bp->phylink_usx_pcs; in macb_mac_select_pcs()
788 return &bp->phylink_sgmii_pcs; in macb_mac_select_pcs()
802 dn = of_parse_phandle(dn, "phy-handle", 0); in macb_phy_handle_exists()
809 struct device_node *dn = bp->pdev->dev.of_node; in macb_phylink_connect()
810 struct net_device *dev = bp->dev; in macb_phylink_connect()
815 ret = phylink_of_phy_connect(bp->phylink, dn, 0); in macb_phylink_connect()
818 phydev = phy_find_first(bp->mii_bus); in macb_phylink_connect()
821 return -ENXIO; in macb_phylink_connect()
825 ret = phylink_connect_phy(bp->phylink, phydev); in macb_phylink_connect()
833 phylink_start(bp->phylink); in macb_phylink_connect()
841 struct net_device *ndev = to_net_dev(config->dev); in macb_get_pcs_fixed_state()
844 state->link = (macb_readl(bp, NSR) & MACB_BIT(NSR_LINK)) != 0; in macb_get_pcs_fixed_state()
852 bp->phylink_sgmii_pcs.ops = &macb_phylink_pcs_ops; in macb_mii_probe()
853 bp->phylink_usx_pcs.ops = &macb_phylink_usx_pcs_ops; in macb_mii_probe()
855 bp->phylink_config.dev = &dev->dev; in macb_mii_probe()
856 bp->phylink_config.type = PHYLINK_NETDEV; in macb_mii_probe()
857 bp->phylink_config.mac_managed_pm = true; in macb_mii_probe()
859 if (bp->phy_interface == PHY_INTERFACE_MODE_SGMII) { in macb_mii_probe()
860 bp->phylink_config.poll_fixed_state = true; in macb_mii_probe()
861 bp->phylink_config.get_fixed_state = macb_get_pcs_fixed_state; in macb_mii_probe()
864 bp->phylink_config.mac_capabilities = MAC_ASYM_PAUSE | in macb_mii_probe()
868 bp->phylink_config.supported_interfaces); in macb_mii_probe()
870 bp->phylink_config.supported_interfaces); in macb_mii_probe()
873 if (macb_is_gem(bp) && (bp->caps & MACB_CAPS_GIGABIT_MODE_AVAILABLE)) { in macb_mii_probe()
874 bp->phylink_config.mac_capabilities |= MAC_1000FD; in macb_mii_probe()
875 if (!(bp->caps & MACB_CAPS_NO_GIGABIT_HALF)) in macb_mii_probe()
876 bp->phylink_config.mac_capabilities |= MAC_1000HD; in macb_mii_probe()
879 bp->phylink_config.supported_interfaces); in macb_mii_probe()
880 phy_interface_set_rgmii(bp->phylink_config.supported_interfaces); in macb_mii_probe()
882 if (bp->caps & MACB_CAPS_PCS) in macb_mii_probe()
884 bp->phylink_config.supported_interfaces); in macb_mii_probe()
886 if (bp->caps & MACB_CAPS_HIGH_SPEED) { in macb_mii_probe()
888 bp->phylink_config.supported_interfaces); in macb_mii_probe()
889 bp->phylink_config.mac_capabilities |= MAC_10000FD; in macb_mii_probe()
893 bp->phylink = phylink_create(&bp->phylink_config, bp->pdev->dev.fwnode, in macb_mii_probe()
894 bp->phy_interface, &macb_phylink_ops); in macb_mii_probe()
895 if (IS_ERR(bp->phylink)) { in macb_mii_probe()
897 PTR_ERR(bp->phylink)); in macb_mii_probe()
898 return PTR_ERR(bp->phylink); in macb_mii_probe()
906 struct device_node *child, *np = bp->pdev->dev.of_node; in macb_mdiobus_register()
912 return of_mdiobus_register(bp->mii_bus, mdio_np); in macb_mdiobus_register()
926 return of_mdiobus_register(bp->mii_bus, np); in macb_mdiobus_register()
929 return mdiobus_register(bp->mii_bus); in macb_mdiobus_register()
934 struct device_node *mdio_np, *np = bp->pdev->dev.of_node; in macb_mii_init()
935 int err = -ENXIO; in macb_mii_init()
937 /* With fixed-link, we don't need to register the MDIO bus, in macb_mii_init()
943 return macb_mii_probe(bp->dev); in macb_mii_init()
948 bp->mii_bus = mdiobus_alloc(); in macb_mii_init()
949 if (!bp->mii_bus) { in macb_mii_init()
950 err = -ENOMEM; in macb_mii_init()
954 bp->mii_bus->name = "MACB_mii_bus"; in macb_mii_init()
955 bp->mii_bus->read = &macb_mdio_read_c22; in macb_mii_init()
956 bp->mii_bus->write = &macb_mdio_write_c22; in macb_mii_init()
957 bp->mii_bus->read_c45 = &macb_mdio_read_c45; in macb_mii_init()
958 bp->mii_bus->write_c45 = &macb_mdio_write_c45; in macb_mii_init()
959 snprintf(bp->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x", in macb_mii_init()
960 bp->pdev->name, bp->pdev->id); in macb_mii_init()
961 bp->mii_bus->priv = bp; in macb_mii_init()
962 bp->mii_bus->parent = &bp->pdev->dev; in macb_mii_init()
964 dev_set_drvdata(&bp->dev->dev, bp->mii_bus); in macb_mii_init()
970 err = macb_mii_probe(bp->dev); in macb_mii_init()
977 mdiobus_unregister(bp->mii_bus); in macb_mii_init()
979 mdiobus_free(bp->mii_bus); in macb_mii_init()
988 u64 *p = &bp->hw_stats.macb.rx_pause_frames; in macb_update_stats()
989 u64 *end = &bp->hw_stats.macb.tx_pause_frames + 1; in macb_update_stats()
992 WARN_ON((unsigned long)(end - p - 1) != (MACB_TPF - MACB_PFR) / 4); in macb_update_stats()
995 *p += bp->macb_reg_readl(bp, offset); in macb_update_stats()
1013 if (tx_skb->mapping) { in macb_tx_unmap()
1014 if (tx_skb->mapped_as_page) in macb_tx_unmap()
1015 dma_unmap_page(&bp->pdev->dev, tx_skb->mapping, in macb_tx_unmap()
1016 tx_skb->size, DMA_TO_DEVICE); in macb_tx_unmap()
1018 dma_unmap_single(&bp->pdev->dev, tx_skb->mapping, in macb_tx_unmap()
1019 tx_skb->size, DMA_TO_DEVICE); in macb_tx_unmap()
1020 tx_skb->mapping = 0; in macb_tx_unmap()
1023 if (tx_skb->skb) { in macb_tx_unmap()
1024 napi_consume_skb(tx_skb->skb, budget); in macb_tx_unmap()
1025 tx_skb->skb = NULL; in macb_tx_unmap()
1034 if (bp->hw_dma_cap & HW_DMA_CAP_64B) { in macb_set_addr()
1036 desc_64->addrh = upper_32_bits(addr); in macb_set_addr()
1044 desc->addr = lower_32_bits(addr); in macb_set_addr()
1053 if (bp->hw_dma_cap & HW_DMA_CAP_64B) { in macb_get_addr()
1055 addr = ((u64)(desc_64->addrh) << 32); in macb_get_addr()
1058 addr |= MACB_BF(RX_WADDR, MACB_BFEXT(RX_WADDR, desc->addr)); in macb_get_addr()
1060 if (bp->hw_dma_cap & HW_DMA_CAP_PTP) in macb_get_addr()
1071 struct macb *bp = queue->bp; in macb_tx_error_task()
1081 queue_index = queue - bp->queues; in macb_tx_error_task()
1082 netdev_vdbg(bp->dev, "macb_tx_error_task: q = %u, t = %u, h = %u\n", in macb_tx_error_task()
1083 queue_index, queue->tx_tail, queue->tx_head); in macb_tx_error_task()
1089 * network engine about the macb/gem being halted. in macb_tx_error_task()
1091 napi_disable(&queue->napi_tx); in macb_tx_error_task()
1092 spin_lock_irqsave(&bp->lock, flags); in macb_tx_error_task()
1095 netif_tx_stop_all_queues(bp->dev); in macb_tx_error_task()
1099 * macb/gem must be halted to write TBQP register in macb_tx_error_task()
1102 netdev_err(bp->dev, "BUG: halt tx timed out\n"); in macb_tx_error_task()
1110 for (tail = queue->tx_tail; tail != queue->tx_head; tail++) { in macb_tx_error_task()
1114 ctrl = desc->ctrl; in macb_tx_error_task()
1116 skb = tx_skb->skb; in macb_tx_error_task()
1124 skb = tx_skb->skb; in macb_tx_error_task()
1131 netdev_vdbg(bp->dev, "txerr skb %u (data %p) TX complete\n", in macb_tx_error_task()
1133 skb->data); in macb_tx_error_task()
1134 bp->dev->stats.tx_packets++; in macb_tx_error_task()
1135 queue->stats.tx_packets++; in macb_tx_error_task()
1137 bp->dev->stats.tx_bytes += skb->len; in macb_tx_error_task()
1138 queue->stats.tx_bytes += skb->len; in macb_tx_error_task()
1139 bytes += skb->len; in macb_tx_error_task()
1142 /* "Buffers exhausted mid-frame" errors may only happen in macb_tx_error_task()
1147 netdev_err(bp->dev, in macb_tx_error_task()
1148 "BUG: TX buffers exhausted mid-frame\n"); in macb_tx_error_task()
1150 desc->ctrl = ctrl | MACB_BIT(TX_USED); in macb_tx_error_task()
1156 netdev_tx_completed_queue(netdev_get_tx_queue(bp->dev, queue_index), in macb_tx_error_task()
1162 desc->ctrl = MACB_BIT(TX_USED); in macb_tx_error_task()
1168 queue_writel(queue, TBQP, lower_32_bits(queue->tx_ring_dma)); in macb_tx_error_task()
1170 if (bp->hw_dma_cap & HW_DMA_CAP_64B) in macb_tx_error_task()
1171 queue_writel(queue, TBQPH, upper_32_bits(queue->tx_ring_dma)); in macb_tx_error_task()
1174 queue->tx_head = 0; in macb_tx_error_task()
1175 queue->tx_tail = 0; in macb_tx_error_task()
1185 netif_tx_start_all_queues(bp->dev); in macb_tx_error_task()
1188 spin_unlock_irqrestore(&bp->lock, flags); in macb_tx_error_task()
1189 napi_enable(&queue->napi_tx); in macb_tx_error_task()
1199 if (likely(!(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP))) in ptp_one_step_sync()
1211 if (hdr->flag_field[0] & PTP_FLAG_TWOSTEP) in ptp_one_step_sync()
1224 struct macb *bp = queue->bp; in macb_tx_complete()
1225 u16 queue_index = queue - bp->queues; in macb_tx_complete()
1231 spin_lock(&queue->tx_ptr_lock); in macb_tx_complete()
1232 head = queue->tx_head; in macb_tx_complete()
1233 for (tail = queue->tx_tail; tail != head && packets < budget; tail++) { in macb_tx_complete()
1244 ctrl = desc->ctrl; in macb_tx_complete()
1255 skb = tx_skb->skb; in macb_tx_complete()
1259 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) && in macb_tx_complete()
1263 netdev_vdbg(bp->dev, "skb %u (data %p) TX complete\n", in macb_tx_complete()
1265 skb->data); in macb_tx_complete()
1266 bp->dev->stats.tx_packets++; in macb_tx_complete()
1267 queue->stats.tx_packets++; in macb_tx_complete()
1268 bp->dev->stats.tx_bytes += skb->len; in macb_tx_complete()
1269 queue->stats.tx_bytes += skb->len; in macb_tx_complete()
1271 bytes += skb->len; in macb_tx_complete()
1286 netdev_tx_completed_queue(netdev_get_tx_queue(bp->dev, queue_index), in macb_tx_complete()
1289 queue->tx_tail = tail; in macb_tx_complete()
1290 if (__netif_subqueue_stopped(bp->dev, queue_index) && in macb_tx_complete()
1291 CIRC_CNT(queue->tx_head, queue->tx_tail, in macb_tx_complete()
1292 bp->tx_ring_size) <= MACB_TX_WAKEUP_THRESH(bp)) in macb_tx_complete()
1293 netif_wake_subqueue(bp->dev, queue_index); in macb_tx_complete()
1294 spin_unlock(&queue->tx_ptr_lock); in macb_tx_complete()
1304 struct macb *bp = queue->bp; in gem_rx_refill()
1307 while (CIRC_SPACE(queue->rx_prepared_head, queue->rx_tail, in gem_rx_refill()
1308 bp->rx_ring_size) > 0) { in gem_rx_refill()
1309 entry = macb_rx_ring_wrap(bp, queue->rx_prepared_head); in gem_rx_refill()
1316 if (!queue->rx_skbuff[entry]) { in gem_rx_refill()
1318 skb = netdev_alloc_skb(bp->dev, bp->rx_buffer_size); in gem_rx_refill()
1320 netdev_err(bp->dev, in gem_rx_refill()
1326 paddr = dma_map_single(&bp->pdev->dev, skb->data, in gem_rx_refill()
1327 bp->rx_buffer_size, in gem_rx_refill()
1329 if (dma_mapping_error(&bp->pdev->dev, paddr)) { in gem_rx_refill()
1334 queue->rx_skbuff[entry] = skb; in gem_rx_refill()
1336 if (entry == bp->rx_ring_size - 1) in gem_rx_refill()
1338 desc->ctrl = 0; in gem_rx_refill()
1348 desc->ctrl = 0; in gem_rx_refill()
1350 desc->addr &= ~MACB_BIT(RX_USED); in gem_rx_refill()
1352 queue->rx_prepared_head++; in gem_rx_refill()
1358 netdev_vdbg(bp->dev, "rx ring: queue: %p, prepared head %d, tail %d\n", in gem_rx_refill()
1359 queue, queue->rx_prepared_head, queue->rx_tail); in gem_rx_refill()
1371 desc->addr &= ~MACB_BIT(RX_USED); in discard_partial_frame()
1386 struct macb *bp = queue->bp; in gem_rx()
1398 entry = macb_rx_ring_wrap(bp, queue->rx_tail); in gem_rx()
1404 rxused = (desc->addr & MACB_BIT(RX_USED)) ? true : false; in gem_rx()
1410 /* Ensure ctrl is at least as up-to-date as rxused */ in gem_rx()
1413 ctrl = desc->ctrl; in gem_rx()
1415 queue->rx_tail++; in gem_rx()
1419 netdev_err(bp->dev, in gem_rx()
1421 bp->dev->stats.rx_dropped++; in gem_rx()
1422 queue->stats.rx_dropped++; in gem_rx()
1425 skb = queue->rx_skbuff[entry]; in gem_rx()
1427 netdev_err(bp->dev, in gem_rx()
1429 bp->dev->stats.rx_dropped++; in gem_rx()
1430 queue->stats.rx_dropped++; in gem_rx()
1434 queue->rx_skbuff[entry] = NULL; in gem_rx()
1435 len = ctrl & bp->rx_frm_len_mask; in gem_rx()
1437 netdev_vdbg(bp->dev, "gem_rx %u (len %u)\n", entry, len); in gem_rx()
1440 dma_unmap_single(&bp->pdev->dev, addr, in gem_rx()
1441 bp->rx_buffer_size, DMA_FROM_DEVICE); in gem_rx()
1443 skb->protocol = eth_type_trans(skb, bp->dev); in gem_rx()
1445 if (bp->dev->features & NETIF_F_RXCSUM && in gem_rx()
1446 !(bp->dev->flags & IFF_PROMISC) && in gem_rx()
1448 skb->ip_summed = CHECKSUM_UNNECESSARY; in gem_rx()
1450 bp->dev->stats.rx_packets++; in gem_rx()
1451 queue->stats.rx_packets++; in gem_rx()
1452 bp->dev->stats.rx_bytes += skb->len; in gem_rx()
1453 queue->stats.rx_bytes += skb->len; in gem_rx()
1458 netdev_vdbg(bp->dev, "received skb of length %u, csum: %08x\n", in gem_rx()
1459 skb->len, skb->csum); in gem_rx()
1463 skb->data, 32, true); in gem_rx()
1482 struct macb *bp = queue->bp; in macb_rx_frame()
1485 len = desc->ctrl & bp->rx_frm_len_mask; in macb_rx_frame()
1487 netdev_vdbg(bp->dev, "macb_rx_frame frags %u - %u (len %u)\n", in macb_rx_frame()
1493 * payload word-aligned. in macb_rx_frame()
1499 skb = netdev_alloc_skb(bp->dev, len + NET_IP_ALIGN); in macb_rx_frame()
1501 bp->dev->stats.rx_dropped++; in macb_rx_frame()
1504 desc->addr &= ~MACB_BIT(RX_USED); in macb_rx_frame()
1521 unsigned int frag_len = bp->rx_buffer_size; in macb_rx_frame()
1526 return -1; in macb_rx_frame()
1528 frag_len = len - offset; in macb_rx_frame()
1533 offset += bp->rx_buffer_size; in macb_rx_frame()
1535 desc->addr &= ~MACB_BIT(RX_USED); in macb_rx_frame()
1545 skb->protocol = eth_type_trans(skb, bp->dev); in macb_rx_frame()
1547 bp->dev->stats.rx_packets++; in macb_rx_frame()
1548 bp->dev->stats.rx_bytes += skb->len; in macb_rx_frame()
1549 netdev_vdbg(bp->dev, "received skb of length %u, csum: %08x\n", in macb_rx_frame()
1550 skb->len, skb->csum); in macb_rx_frame()
1558 struct macb *bp = queue->bp; in macb_init_rx_ring()
1563 addr = queue->rx_buffers_dma; in macb_init_rx_ring()
1564 for (i = 0; i < bp->rx_ring_size; i++) { in macb_init_rx_ring()
1567 desc->ctrl = 0; in macb_init_rx_ring()
1568 addr += bp->rx_buffer_size; in macb_init_rx_ring()
1570 desc->addr |= MACB_BIT(RX_WRAP); in macb_init_rx_ring()
1571 queue->rx_tail = 0; in macb_init_rx_ring()
1577 struct macb *bp = queue->bp; in macb_rx()
1581 int first_frag = -1; in macb_rx()
1583 for (tail = queue->rx_tail; budget > 0; tail++) { in macb_rx()
1590 if (!(desc->addr & MACB_BIT(RX_USED))) in macb_rx()
1593 /* Ensure ctrl is at least as up-to-date as addr */ in macb_rx()
1596 ctrl = desc->ctrl; in macb_rx()
1599 if (first_frag != -1) in macb_rx()
1607 if (unlikely(first_frag == -1)) { in macb_rx()
1613 first_frag = -1; in macb_rx()
1620 budget--; in macb_rx()
1629 netdev_err(bp->dev, "RX queue corruption: reset it\n"); in macb_rx()
1631 spin_lock_irqsave(&bp->lock, flags); in macb_rx()
1637 queue_writel(queue, RBQP, queue->rx_ring_dma); in macb_rx()
1641 spin_unlock_irqrestore(&bp->lock, flags); in macb_rx()
1645 if (first_frag != -1) in macb_rx()
1646 queue->rx_tail = first_frag; in macb_rx()
1648 queue->rx_tail = tail; in macb_rx()
1655 struct macb *bp = queue->bp; in macb_rx_pending()
1659 entry = macb_rx_ring_wrap(bp, queue->rx_tail); in macb_rx_pending()
1665 return (desc->addr & MACB_BIT(RX_USED)) != 0; in macb_rx_pending()
1671 struct macb *bp = queue->bp; in macb_rx_poll()
1674 work_done = bp->macbgem_ops.mog_rx(queue, napi, budget); in macb_rx_poll()
1676 netdev_vdbg(bp->dev, "RX poll: queue = %u, work_done = %d, budget = %d\n", in macb_rx_poll()
1677 (unsigned int)(queue - bp->queues), work_done, budget); in macb_rx_poll()
1680 queue_writel(queue, IER, bp->rx_intr_mask); in macb_rx_poll()
1686 * interrupts are re-enabled. in macb_rx_poll()
1693 queue_writel(queue, IDR, bp->rx_intr_mask); in macb_rx_poll()
1694 if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) in macb_rx_poll()
1696 netdev_vdbg(bp->dev, "poll: packets pending, reschedule\n"); in macb_rx_poll()
1708 struct macb *bp = queue->bp; in macb_tx_restart()
1711 spin_lock(&queue->tx_ptr_lock); in macb_tx_restart()
1713 if (queue->tx_head == queue->tx_tail) in macb_tx_restart()
1718 head_idx = macb_adj_dma_desc_idx(bp, macb_tx_ring_wrap(bp, queue->tx_head)); in macb_tx_restart()
1723 spin_lock_irq(&bp->lock); in macb_tx_restart()
1725 spin_unlock_irq(&bp->lock); in macb_tx_restart()
1728 spin_unlock(&queue->tx_ptr_lock); in macb_tx_restart()
1735 spin_lock(&queue->tx_ptr_lock); in macb_tx_complete_pending()
1736 if (queue->tx_head != queue->tx_tail) { in macb_tx_complete_pending()
1740 if (macb_tx_desc(queue, queue->tx_tail)->ctrl & MACB_BIT(TX_USED)) in macb_tx_complete_pending()
1743 spin_unlock(&queue->tx_ptr_lock); in macb_tx_complete_pending()
1750 struct macb *bp = queue->bp; in macb_tx_poll()
1756 if (queue->txubr_pending) { in macb_tx_poll()
1757 queue->txubr_pending = false; in macb_tx_poll()
1758 netdev_vdbg(bp->dev, "poll: tx restart\n"); in macb_tx_poll()
1762 netdev_vdbg(bp->dev, "TX poll: queue = %u, work_done = %d, budget = %d\n", in macb_tx_poll()
1763 (unsigned int)(queue - bp->queues), work_done, budget); in macb_tx_poll()
1772 * interrupts are re-enabled. in macb_tx_poll()
1780 if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) in macb_tx_poll()
1782 netdev_vdbg(bp->dev, "TX poll: packets pending, reschedule\n"); in macb_tx_poll()
1793 struct net_device *dev = bp->dev; in macb_hresp_error_task()
1798 for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) { in macb_hresp_error_task()
1799 queue_writel(queue, IDR, bp->rx_intr_mask | in macb_hresp_error_task()
1810 bp->macbgem_ops.mog_init_rings(bp); in macb_hresp_error_task()
1816 for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) in macb_hresp_error_task()
1818 bp->rx_intr_mask | in macb_hresp_error_task()
1832 struct macb *bp = queue->bp; in macb_wol_interrupt()
1840 spin_lock(&bp->lock); in macb_wol_interrupt()
1845 netdev_vdbg(bp->dev, "MACB WoL: queue = %u, isr = 0x%08lx\n", in macb_wol_interrupt()
1846 (unsigned int)(queue - bp->queues), in macb_wol_interrupt()
1848 if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) in macb_wol_interrupt()
1850 pm_wakeup_event(&bp->pdev->dev, 0); in macb_wol_interrupt()
1853 spin_unlock(&bp->lock); in macb_wol_interrupt()
1861 struct macb *bp = queue->bp; in gem_wol_interrupt()
1869 spin_lock(&bp->lock); in gem_wol_interrupt()
1874 netdev_vdbg(bp->dev, "GEM WoL: queue = %u, isr = 0x%08lx\n", in gem_wol_interrupt()
1875 (unsigned int)(queue - bp->queues), in gem_wol_interrupt()
1877 if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) in gem_wol_interrupt()
1879 pm_wakeup_event(&bp->pdev->dev, 0); in gem_wol_interrupt()
1882 spin_unlock(&bp->lock); in gem_wol_interrupt()
1890 struct macb *bp = queue->bp; in macb_interrupt()
1891 struct net_device *dev = bp->dev; in macb_interrupt()
1899 spin_lock(&bp->lock); in macb_interrupt()
1904 queue_writel(queue, IDR, -1); in macb_interrupt()
1905 if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) in macb_interrupt()
1906 queue_writel(queue, ISR, -1); in macb_interrupt()
1910 netdev_vdbg(bp->dev, "queue = %u, isr = 0x%08lx\n", in macb_interrupt()
1911 (unsigned int)(queue - bp->queues), in macb_interrupt()
1914 if (status & bp->rx_intr_mask) { in macb_interrupt()
1921 queue_writel(queue, IDR, bp->rx_intr_mask); in macb_interrupt()
1922 if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) in macb_interrupt()
1925 if (napi_schedule_prep(&queue->napi_rx)) { in macb_interrupt()
1926 netdev_vdbg(bp->dev, "scheduling RX softirq\n"); in macb_interrupt()
1927 __napi_schedule(&queue->napi_rx); in macb_interrupt()
1934 if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) in macb_interrupt()
1939 queue->txubr_pending = true; in macb_interrupt()
1943 if (napi_schedule_prep(&queue->napi_tx)) { in macb_interrupt()
1944 netdev_vdbg(bp->dev, "scheduling TX softirq\n"); in macb_interrupt()
1945 __napi_schedule(&queue->napi_tx); in macb_interrupt()
1951 schedule_work(&queue->tx_error_task); in macb_interrupt()
1953 if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) in macb_interrupt()
1960 * add that if/when we get our hands on a full-blown MII PHY. in macb_interrupt()
1965 * interrupts but it can be cleared by re-enabling RX. See in macb_interrupt()
1976 if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) in macb_interrupt()
1982 spin_lock(&bp->stats_lock); in macb_interrupt()
1984 bp->hw_stats.gem.rx_overruns++; in macb_interrupt()
1986 bp->hw_stats.macb.rx_overruns++; in macb_interrupt()
1987 spin_unlock(&bp->stats_lock); in macb_interrupt()
1989 if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) in macb_interrupt()
1994 queue_work(system_bh_wq, &bp->hresp_err_bh_work); in macb_interrupt()
1997 if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) in macb_interrupt()
2003 spin_unlock(&bp->lock); in macb_interrupt()
2009 /* Polling receive - used by netconsole and other diagnostic tools
2020 for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) in macb_poll_controller()
2021 macb_interrupt(dev->irq, queue); in macb_poll_controller()
2032 unsigned int len, entry, i, tx_head = queue->tx_head; in macb_tx_map()
2036 unsigned int f, nr_frags = skb_shinfo(skb)->nr_frags; in macb_tx_map()
2041 if (skb_shinfo(skb)->gso_size != 0) { in macb_tx_map()
2042 if (ip_hdr(skb)->protocol == IPPROTO_UDP) in macb_tx_map()
2043 /* UDP - UFO */ in macb_tx_map()
2046 /* TCP - TSO */ in macb_tx_map()
2050 /* First, map non-paged data */ in macb_tx_map()
2059 tx_skb = &queue->tx_skb[entry]; in macb_tx_map()
2061 mapping = dma_map_single(&bp->pdev->dev, in macb_tx_map()
2062 skb->data + offset, in macb_tx_map()
2064 if (dma_mapping_error(&bp->pdev->dev, mapping)) in macb_tx_map()
2068 tx_skb->skb = NULL; in macb_tx_map()
2069 tx_skb->mapping = mapping; in macb_tx_map()
2070 tx_skb->size = size; in macb_tx_map()
2071 tx_skb->mapped_as_page = false; in macb_tx_map()
2073 len -= size; in macb_tx_map()
2078 size = min(len, bp->max_tx_length); in macb_tx_map()
2083 const skb_frag_t *frag = &skb_shinfo(skb)->frags[f]; in macb_tx_map()
2088 size = min(len, bp->max_tx_length); in macb_tx_map()
2090 tx_skb = &queue->tx_skb[entry]; in macb_tx_map()
2092 mapping = skb_frag_dma_map(&bp->pdev->dev, frag, in macb_tx_map()
2094 if (dma_mapping_error(&bp->pdev->dev, mapping)) in macb_tx_map()
2098 tx_skb->skb = NULL; in macb_tx_map()
2099 tx_skb->mapping = mapping; in macb_tx_map()
2100 tx_skb->size = size; in macb_tx_map()
2101 tx_skb->mapped_as_page = true; in macb_tx_map()
2103 len -= size; in macb_tx_map()
2112 netdev_err(bp->dev, "BUG! empty skb!\n"); in macb_tx_map()
2117 tx_skb->skb = skb; in macb_tx_map()
2130 desc->ctrl = ctrl; in macb_tx_map()
2135 mss_mfs = skb_shinfo(skb)->gso_size + in macb_tx_map()
2139 mss_mfs = skb_shinfo(skb)->gso_size; in macb_tx_map()
2148 i--; in macb_tx_map()
2150 tx_skb = &queue->tx_skb[entry]; in macb_tx_map()
2153 ctrl = (u32)tx_skb->size; in macb_tx_map()
2158 if (unlikely(entry == (bp->tx_ring_size - 1))) in macb_tx_map()
2162 if (i == queue->tx_head) { in macb_tx_map()
2165 if ((bp->dev->features & NETIF_F_HW_CSUM) && in macb_tx_map()
2166 skb->ip_summed != CHECKSUM_PARTIAL && !lso_ctrl && in macb_tx_map()
2176 macb_set_addr(bp, desc, tx_skb->mapping); in macb_tx_map()
2177 /* desc->addr must be visible to hardware before clearing in macb_tx_map()
2178 * 'TX_USED' bit in desc->ctrl. in macb_tx_map()
2181 desc->ctrl = ctrl; in macb_tx_map()
2182 } while (i != queue->tx_head); in macb_tx_map()
2184 queue->tx_head = tx_head; in macb_tx_map()
2189 netdev_err(bp->dev, "TX DMA map failed\n"); in macb_tx_map()
2191 for (i = queue->tx_head; i != tx_head; i++) { in macb_tx_map()
2210 if (!skb_is_nonlinear(skb) || (ip_hdr(skb)->protocol != IPPROTO_UDP)) in macb_features_check()
2220 if (!IS_ALIGNED(skb_headlen(skb) - hdrlen, MACB_TX_LEN_ALIGN)) in macb_features_check()
2223 nr_frags = skb_shinfo(skb)->nr_frags; in macb_features_check()
2225 nr_frags--; in macb_features_check()
2227 const skb_frag_t *frag = &skb_shinfo(skb)->frags[f]; in macb_features_check()
2238 if (skb->ip_summed != CHECKSUM_PARTIAL) in macb_clear_csum()
2243 return -1; in macb_clear_csum()
2246 * This is required - at least for Zynq, which otherwise calculates in macb_clear_csum()
2249 *(__sum16 *)(skb_checksum_start(skb) + skb->csum_offset) = 0; in macb_clear_csum()
2257 int padlen = ETH_ZLEN - (*skb)->len; in macb_pad_and_fcs()
2262 if (!(ndev->features & NETIF_F_HW_CSUM) || in macb_pad_and_fcs()
2263 !((*skb)->ip_summed != CHECKSUM_PARTIAL) || in macb_pad_and_fcs()
2264 skb_shinfo(*skb)->gso_size || ptp_one_step_sync(*skb)) in macb_pad_and_fcs()
2282 return -ENOMEM; in macb_pad_and_fcs()
2289 skb_put_zero(*skb, padlen - ETH_FCS_LEN); in macb_pad_and_fcs()
2293 fcs = crc32_le(~0, (*skb)->data, (*skb)->len); in macb_pad_and_fcs()
2308 struct macb_queue *queue = &bp->queues[queue_index]; in macb_start_xmit()
2325 if ((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) && in macb_start_xmit()
2326 (bp->hw_dma_cap & HW_DMA_CAP_PTP)) in macb_start_xmit()
2327 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; in macb_start_xmit()
2330 is_lso = (skb_shinfo(skb)->gso_size != 0); in macb_start_xmit()
2334 if (ip_hdr(skb)->protocol == IPPROTO_UDP) in macb_start_xmit()
2340 netdev_err(bp->dev, "Error - LSO headers fragmented!!!\n"); in macb_start_xmit()
2345 hdrlen = min(skb_headlen(skb), bp->max_tx_length); in macb_start_xmit()
2348 netdev_vdbg(bp->dev, in macb_start_xmit()
2350 queue_index, skb->len, skb->head, skb->data, in macb_start_xmit()
2353 skb->data, 16, true); in macb_start_xmit()
2362 desc_cnt = DIV_ROUND_UP((skb_headlen(skb) - hdrlen), bp->max_tx_length) + 1; in macb_start_xmit()
2364 desc_cnt = DIV_ROUND_UP(skb_headlen(skb), bp->max_tx_length); in macb_start_xmit()
2365 nr_frags = skb_shinfo(skb)->nr_frags; in macb_start_xmit()
2367 frag_size = skb_frag_size(&skb_shinfo(skb)->frags[f]); in macb_start_xmit()
2368 desc_cnt += DIV_ROUND_UP(frag_size, bp->max_tx_length); in macb_start_xmit()
2371 spin_lock_bh(&queue->tx_ptr_lock); in macb_start_xmit()
2374 if (CIRC_SPACE(queue->tx_head, queue->tx_tail, in macb_start_xmit()
2375 bp->tx_ring_size) < desc_cnt) { in macb_start_xmit()
2377 netdev_dbg(bp->dev, "tx_head = %u, tx_tail = %u\n", in macb_start_xmit()
2378 queue->tx_head, queue->tx_tail); in macb_start_xmit()
2392 netdev_tx_sent_queue(netdev_get_tx_queue(bp->dev, queue_index), in macb_start_xmit()
2393 skb->len); in macb_start_xmit()
2395 spin_lock_irq(&bp->lock); in macb_start_xmit()
2397 spin_unlock_irq(&bp->lock); in macb_start_xmit()
2399 if (CIRC_SPACE(queue->tx_head, queue->tx_tail, bp->tx_ring_size) < 1) in macb_start_xmit()
2403 spin_unlock_bh(&queue->tx_ptr_lock); in macb_start_xmit()
2411 bp->rx_buffer_size = MACB_RX_BUFFER_SIZE; in macb_init_rx_buffer_size()
2413 bp->rx_buffer_size = size; in macb_init_rx_buffer_size()
2415 if (bp->rx_buffer_size % RX_BUFFER_MULTIPLE) { in macb_init_rx_buffer_size()
2416 netdev_dbg(bp->dev, in macb_init_rx_buffer_size()
2419 bp->rx_buffer_size = in macb_init_rx_buffer_size()
2420 roundup(bp->rx_buffer_size, RX_BUFFER_MULTIPLE); in macb_init_rx_buffer_size()
2424 netdev_dbg(bp->dev, "mtu [%u] rx_buffer_size [%zu]\n", in macb_init_rx_buffer_size()
2425 bp->dev->mtu, bp->rx_buffer_size); in macb_init_rx_buffer_size()
2437 for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) { in gem_free_rx_buffers()
2438 if (!queue->rx_skbuff) in gem_free_rx_buffers()
2441 for (i = 0; i < bp->rx_ring_size; i++) { in gem_free_rx_buffers()
2442 skb = queue->rx_skbuff[i]; in gem_free_rx_buffers()
2450 dma_unmap_single(&bp->pdev->dev, addr, bp->rx_buffer_size, in gem_free_rx_buffers()
2456 kfree(queue->rx_skbuff); in gem_free_rx_buffers()
2457 queue->rx_skbuff = NULL; in gem_free_rx_buffers()
2463 struct macb_queue *queue = &bp->queues[0]; in macb_free_rx_buffers()
2465 if (queue->rx_buffers) { in macb_free_rx_buffers()
2466 dma_free_coherent(&bp->pdev->dev, in macb_free_rx_buffers()
2467 bp->rx_ring_size * bp->rx_buffer_size, in macb_free_rx_buffers()
2468 queue->rx_buffers, queue->rx_buffers_dma); in macb_free_rx_buffers()
2469 queue->rx_buffers = NULL; in macb_free_rx_buffers()
2479 if (bp->rx_ring_tieoff) { in macb_free_consistent()
2480 dma_free_coherent(&bp->pdev->dev, macb_dma_desc_get_size(bp), in macb_free_consistent()
2481 bp->rx_ring_tieoff, bp->rx_ring_tieoff_dma); in macb_free_consistent()
2482 bp->rx_ring_tieoff = NULL; in macb_free_consistent()
2485 bp->macbgem_ops.mog_free_rx_buffers(bp); in macb_free_consistent()
2487 for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) { in macb_free_consistent()
2488 kfree(queue->tx_skb); in macb_free_consistent()
2489 queue->tx_skb = NULL; in macb_free_consistent()
2490 if (queue->tx_ring) { in macb_free_consistent()
2491 size = TX_RING_BYTES(bp) + bp->tx_bd_rd_prefetch; in macb_free_consistent()
2492 dma_free_coherent(&bp->pdev->dev, size, in macb_free_consistent()
2493 queue->tx_ring, queue->tx_ring_dma); in macb_free_consistent()
2494 queue->tx_ring = NULL; in macb_free_consistent()
2496 if (queue->rx_ring) { in macb_free_consistent()
2497 size = RX_RING_BYTES(bp) + bp->rx_bd_rd_prefetch; in macb_free_consistent()
2498 dma_free_coherent(&bp->pdev->dev, size, in macb_free_consistent()
2499 queue->rx_ring, queue->rx_ring_dma); in macb_free_consistent()
2500 queue->rx_ring = NULL; in macb_free_consistent()
2511 for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) { in gem_alloc_rx_buffers()
2512 size = bp->rx_ring_size * sizeof(struct sk_buff *); in gem_alloc_rx_buffers()
2513 queue->rx_skbuff = kzalloc(size, GFP_KERNEL); in gem_alloc_rx_buffers()
2514 if (!queue->rx_skbuff) in gem_alloc_rx_buffers()
2515 return -ENOMEM; in gem_alloc_rx_buffers()
2517 netdev_dbg(bp->dev, in gem_alloc_rx_buffers()
2519 bp->rx_ring_size, queue->rx_skbuff); in gem_alloc_rx_buffers()
2526 struct macb_queue *queue = &bp->queues[0]; in macb_alloc_rx_buffers()
2529 size = bp->rx_ring_size * bp->rx_buffer_size; in macb_alloc_rx_buffers()
2530 queue->rx_buffers = dma_alloc_coherent(&bp->pdev->dev, size, in macb_alloc_rx_buffers()
2531 &queue->rx_buffers_dma, GFP_KERNEL); in macb_alloc_rx_buffers()
2532 if (!queue->rx_buffers) in macb_alloc_rx_buffers()
2533 return -ENOMEM; in macb_alloc_rx_buffers()
2535 netdev_dbg(bp->dev, in macb_alloc_rx_buffers()
2537 size, (unsigned long)queue->rx_buffers_dma, queue->rx_buffers); in macb_alloc_rx_buffers()
2547 for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) { in macb_alloc_consistent()
2548 size = TX_RING_BYTES(bp) + bp->tx_bd_rd_prefetch; in macb_alloc_consistent()
2549 queue->tx_ring = dma_alloc_coherent(&bp->pdev->dev, size, in macb_alloc_consistent()
2550 &queue->tx_ring_dma, in macb_alloc_consistent()
2552 if (!queue->tx_ring) in macb_alloc_consistent()
2554 netdev_dbg(bp->dev, in macb_alloc_consistent()
2556 q, size, (unsigned long)queue->tx_ring_dma, in macb_alloc_consistent()
2557 queue->tx_ring); in macb_alloc_consistent()
2559 size = bp->tx_ring_size * sizeof(struct macb_tx_skb); in macb_alloc_consistent()
2560 queue->tx_skb = kmalloc(size, GFP_KERNEL); in macb_alloc_consistent()
2561 if (!queue->tx_skb) in macb_alloc_consistent()
2564 size = RX_RING_BYTES(bp) + bp->rx_bd_rd_prefetch; in macb_alloc_consistent()
2565 queue->rx_ring = dma_alloc_coherent(&bp->pdev->dev, size, in macb_alloc_consistent()
2566 &queue->rx_ring_dma, GFP_KERNEL); in macb_alloc_consistent()
2567 if (!queue->rx_ring) in macb_alloc_consistent()
2569 netdev_dbg(bp->dev, in macb_alloc_consistent()
2571 size, (unsigned long)queue->rx_ring_dma, queue->rx_ring); in macb_alloc_consistent()
2573 if (bp->macbgem_ops.mog_alloc_rx_buffers(bp)) in macb_alloc_consistent()
2577 if (!(bp->caps & MACB_CAPS_QUEUE_DISABLE)) { in macb_alloc_consistent()
2578 bp->rx_ring_tieoff = dma_alloc_coherent(&bp->pdev->dev, in macb_alloc_consistent()
2580 &bp->rx_ring_tieoff_dma, in macb_alloc_consistent()
2582 if (!bp->rx_ring_tieoff) in macb_alloc_consistent()
2590 return -ENOMEM; in macb_alloc_consistent()
2595 struct macb_dma_desc *desc = bp->rx_ring_tieoff; in macb_init_tieoff()
2597 if (bp->caps & MACB_CAPS_QUEUE_DISABLE) in macb_init_tieoff()
2603 desc->ctrl = 0; in macb_init_tieoff()
2613 for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) { in gem_init_rings()
2614 for (i = 0; i < bp->tx_ring_size; i++) { in gem_init_rings()
2617 desc->ctrl = MACB_BIT(TX_USED); in gem_init_rings()
2619 desc->ctrl |= MACB_BIT(TX_WRAP); in gem_init_rings()
2620 queue->tx_head = 0; in gem_init_rings()
2621 queue->tx_tail = 0; in gem_init_rings()
2623 queue->rx_tail = 0; in gem_init_rings()
2624 queue->rx_prepared_head = 0; in gem_init_rings()
2637 macb_init_rx_ring(&bp->queues[0]); in macb_init_rings()
2639 for (i = 0; i < bp->tx_ring_size; i++) { in macb_init_rings()
2640 desc = macb_tx_desc(&bp->queues[0], i); in macb_init_rings()
2642 desc->ctrl = MACB_BIT(TX_USED); in macb_init_rings()
2644 bp->queues[0].tx_head = 0; in macb_init_rings()
2645 bp->queues[0].tx_tail = 0; in macb_init_rings()
2646 desc->ctrl |= MACB_BIT(TX_WRAP); in macb_init_rings()
2668 macb_writel(bp, TSR, -1); in macb_reset_hw()
2669 macb_writel(bp, RSR, -1); in macb_reset_hw()
2675 for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) { in macb_reset_hw()
2676 queue_writel(queue, IDR, -1); in macb_reset_hw()
2678 if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) in macb_reset_hw()
2679 queue_writel(queue, ISR, -1); in macb_reset_hw()
2686 unsigned long pclk_hz = clk_get_rate(bp->pclk); in gem_mdc_clk_div()
2716 pclk_hz = clk_get_rate(bp->pclk); in macb_mdc_clk_div()
2750 * - use the correct receive buffer size
2751 * - set best burst length for DMA operations
2753 * - set both rx/tx packet buffers to full memory size
2754 * These are configurable parameters for GEM.
2763 buffer_size = bp->rx_buffer_size / RX_BUFFER_MULTIPLE; in macb_configure_dma()
2765 dmacfg = gem_readl(bp, DMACFG) & ~GEM_BF(RXBS, -1L); in macb_configure_dma()
2766 for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) { in macb_configure_dma()
2772 if (bp->dma_burst_length) in macb_configure_dma()
2773 dmacfg = GEM_BFINS(FBLDO, bp->dma_burst_length, dmacfg); in macb_configure_dma()
2774 dmacfg |= GEM_BIT(TXPBMS) | GEM_BF(RXBMS, -1L); in macb_configure_dma()
2777 if (bp->native_io) in macb_configure_dma()
2782 if (bp->dev->features & NETIF_F_HW_CSUM) in macb_configure_dma()
2789 if (bp->hw_dma_cap & HW_DMA_CAP_64B) in macb_configure_dma()
2793 if (bp->hw_dma_cap & HW_DMA_CAP_PTP) in macb_configure_dma()
2796 netdev_dbg(bp->dev, "Cadence configure DMA with 0x%08x\n", in macb_configure_dma()
2812 if (bp->caps & MACB_CAPS_JUMBO) in macb_init_hw()
2816 if (bp->dev->flags & IFF_PROMISC) in macb_init_hw()
2818 else if (macb_is_gem(bp) && bp->dev->features & NETIF_F_RXCSUM) in macb_init_hw()
2820 if (!(bp->dev->flags & IFF_BROADCAST)) in macb_init_hw()
2824 if ((bp->caps & MACB_CAPS_JUMBO) && bp->jumbo_max_len) in macb_init_hw()
2825 gem_writel(bp, JML, bp->jumbo_max_len); in macb_init_hw()
2826 bp->rx_frm_len_mask = MACB_RX_FRMLEN_MASK; in macb_init_hw()
2827 if (bp->caps & MACB_CAPS_JUMBO) in macb_init_hw()
2828 bp->rx_frm_len_mask = MACB_RX_JFRMLEN_MASK; in macb_init_hw()
2833 if (bp->rx_watermark) in macb_init_hw()
2834 gem_writel(bp, PBUFRXCUT, (bp->rx_watermark | GEM_BIT(ENCUTTHRU))); in macb_init_hw()
2893 /* Add multicast addresses to the internal multicast-hash table. */
2905 bitnr = hash_get_index(ha->addr); in macb_sethashtable()
2921 if (dev->flags & IFF_PROMISC) { in macb_set_rx_mode()
2933 if (macb_is_gem(bp) && dev->features & NETIF_F_RXCSUM) in macb_set_rx_mode()
2937 if (dev->flags & IFF_ALLMULTI) { in macb_set_rx_mode()
2939 macb_or_gem_writel(bp, HRB, -1); in macb_set_rx_mode()
2940 macb_or_gem_writel(bp, HRT, -1); in macb_set_rx_mode()
2946 } else if (dev->flags & (~IFF_ALLMULTI)) { in macb_set_rx_mode()
2958 size_t bufsz = dev->mtu + ETH_HLEN + ETH_FCS_LEN + NET_IP_ALIGN; in macb_open()
2964 netdev_dbg(bp->dev, "open\n"); in macb_open()
2966 err = pm_runtime_resume_and_get(&bp->pdev->dev); in macb_open()
2980 for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) { in macb_open()
2981 napi_enable(&queue->napi_rx); in macb_open()
2982 napi_enable(&queue->napi_tx); in macb_open()
2987 err = phy_power_on(bp->sgmii_phy); in macb_open()
2997 if (bp->ptp_info) in macb_open()
2998 bp->ptp_info->ptp_init(dev); in macb_open()
3003 phy_power_off(bp->sgmii_phy); in macb_open()
3007 for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) { in macb_open()
3008 napi_disable(&queue->napi_rx); in macb_open()
3009 napi_disable(&queue->napi_tx); in macb_open()
3013 pm_runtime_put_sync(&bp->pdev->dev); in macb_open()
3026 for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) { in macb_close()
3027 napi_disable(&queue->napi_rx); in macb_close()
3028 napi_disable(&queue->napi_tx); in macb_close()
3032 phylink_stop(bp->phylink); in macb_close()
3033 phylink_disconnect_phy(bp->phylink); in macb_close()
3035 phy_power_off(bp->sgmii_phy); in macb_close()
3037 spin_lock_irqsave(&bp->lock, flags); in macb_close()
3040 spin_unlock_irqrestore(&bp->lock, flags); in macb_close()
3044 if (bp->ptp_info) in macb_close()
3045 bp->ptp_info->ptp_remove(dev); in macb_close()
3047 pm_runtime_put(&bp->pdev->dev); in macb_close()
3055 return -EBUSY; in macb_change_mtu()
3057 WRITE_ONCE(dev->mtu, new_mtu); in macb_change_mtu()
3080 u64 *p = &bp->hw_stats.gem.tx_octets; in gem_update_stats()
3084 u64 val = bp->macb_reg_readl(bp, offset); in gem_update_stats()
3086 bp->ethtool_stats[i] += val; in gem_update_stats()
3091 val = bp->macb_reg_readl(bp, offset + 4); in gem_update_stats()
3092 bp->ethtool_stats[i] += ((u64)val) << 32; in gem_update_stats()
3098 for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) in gem_update_stats()
3099 for (i = 0, stat = &queue->stats.first; i < QUEUE_STATS_LEN; ++i, ++stat) in gem_update_stats()
3100 bp->ethtool_stats[idx++] = *stat; in gem_update_stats()
3105 struct gem_stats *hwstat = &bp->hw_stats.gem; in gem_get_stats()
3107 spin_lock_irq(&bp->stats_lock); in gem_get_stats()
3108 if (netif_running(bp->dev)) in gem_get_stats()
3111 nstat->rx_errors = (hwstat->rx_frame_check_sequence_errors + in gem_get_stats()
3112 hwstat->rx_alignment_errors + in gem_get_stats()
3113 hwstat->rx_resource_errors + in gem_get_stats()
3114 hwstat->rx_overruns + in gem_get_stats()
3115 hwstat->rx_oversize_frames + in gem_get_stats()
3116 hwstat->rx_jabbers + in gem_get_stats()
3117 hwstat->rx_undersized_frames + in gem_get_stats()
3118 hwstat->rx_length_field_frame_errors); in gem_get_stats()
3119 nstat->tx_errors = (hwstat->tx_late_collisions + in gem_get_stats()
3120 hwstat->tx_excessive_collisions + in gem_get_stats()
3121 hwstat->tx_underrun + in gem_get_stats()
3122 hwstat->tx_carrier_sense_errors); in gem_get_stats()
3123 nstat->multicast = hwstat->rx_multicast_frames; in gem_get_stats()
3124 nstat->collisions = (hwstat->tx_single_collision_frames + in gem_get_stats()
3125 hwstat->tx_multiple_collision_frames + in gem_get_stats()
3126 hwstat->tx_excessive_collisions); in gem_get_stats()
3127 nstat->rx_length_errors = (hwstat->rx_oversize_frames + in gem_get_stats()
3128 hwstat->rx_jabbers + in gem_get_stats()
3129 hwstat->rx_undersized_frames + in gem_get_stats()
3130 hwstat->rx_length_field_frame_errors); in gem_get_stats()
3131 nstat->rx_over_errors = hwstat->rx_resource_errors; in gem_get_stats()
3132 nstat->rx_crc_errors = hwstat->rx_frame_check_sequence_errors; in gem_get_stats()
3133 nstat->rx_frame_errors = hwstat->rx_alignment_errors; in gem_get_stats()
3134 nstat->rx_fifo_errors = hwstat->rx_overruns; in gem_get_stats()
3135 nstat->tx_aborted_errors = hwstat->tx_excessive_collisions; in gem_get_stats()
3136 nstat->tx_carrier_errors = hwstat->tx_carrier_sense_errors; in gem_get_stats()
3137 nstat->tx_fifo_errors = hwstat->tx_underrun; in gem_get_stats()
3138 spin_unlock_irq(&bp->stats_lock); in gem_get_stats()
3146 spin_lock_irq(&bp->stats_lock); in gem_get_ethtool_stats()
3148 memcpy(data, &bp->ethtool_stats, sizeof(u64) in gem_get_ethtool_stats()
3150 spin_unlock_irq(&bp->stats_lock); in gem_get_ethtool_stats()
3159 return GEM_STATS_LEN + bp->num_queues * QUEUE_STATS_LEN; in gem_get_sset_count()
3161 return -EOPNOTSUPP; in gem_get_sset_count()
3179 for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) { in gem_get_ethtool_strings()
3194 struct macb_stats *hwstat = &bp->hw_stats.macb; in macb_get_stats()
3196 netdev_stats_to_stats64(nstat, &bp->dev->stats); in macb_get_stats()
3203 spin_lock_irq(&bp->stats_lock); in macb_get_stats()
3207 nstat->rx_errors = (hwstat->rx_fcs_errors + in macb_get_stats()
3208 hwstat->rx_align_errors + in macb_get_stats()
3209 hwstat->rx_resource_errors + in macb_get_stats()
3210 hwstat->rx_overruns + in macb_get_stats()
3211 hwstat->rx_oversize_pkts + in macb_get_stats()
3212 hwstat->rx_jabbers + in macb_get_stats()
3213 hwstat->rx_undersize_pkts + in macb_get_stats()
3214 hwstat->rx_length_mismatch); in macb_get_stats()
3215 nstat->tx_errors = (hwstat->tx_late_cols + in macb_get_stats()
3216 hwstat->tx_excessive_cols + in macb_get_stats()
3217 hwstat->tx_underruns + in macb_get_stats()
3218 hwstat->tx_carrier_errors + in macb_get_stats()
3219 hwstat->sqe_test_errors); in macb_get_stats()
3220 nstat->collisions = (hwstat->tx_single_cols + in macb_get_stats()
3221 hwstat->tx_multiple_cols + in macb_get_stats()
3222 hwstat->tx_excessive_cols); in macb_get_stats()
3223 nstat->rx_length_errors = (hwstat->rx_oversize_pkts + in macb_get_stats()
3224 hwstat->rx_jabbers + in macb_get_stats()
3225 hwstat->rx_undersize_pkts + in macb_get_stats()
3226 hwstat->rx_length_mismatch); in macb_get_stats()
3227 nstat->rx_over_errors = hwstat->rx_resource_errors + in macb_get_stats()
3228 hwstat->rx_overruns; in macb_get_stats()
3229 nstat->rx_crc_errors = hwstat->rx_fcs_errors; in macb_get_stats()
3230 nstat->rx_frame_errors = hwstat->rx_align_errors; in macb_get_stats()
3231 nstat->rx_fifo_errors = hwstat->rx_overruns; in macb_get_stats()
3233 nstat->tx_aborted_errors = hwstat->tx_excessive_cols; in macb_get_stats()
3234 nstat->tx_carrier_errors = hwstat->tx_carrier_errors; in macb_get_stats()
3235 nstat->tx_fifo_errors = hwstat->tx_underruns; in macb_get_stats()
3237 spin_unlock_irq(&bp->stats_lock); in macb_get_stats()
3244 struct macb_stats *hwstat = &bp->hw_stats.macb; in macb_get_pause_stats()
3246 spin_lock_irq(&bp->stats_lock); in macb_get_pause_stats()
3248 pause_stats->tx_pause_frames = hwstat->tx_pause_frames; in macb_get_pause_stats()
3249 pause_stats->rx_pause_frames = hwstat->rx_pause_frames; in macb_get_pause_stats()
3250 spin_unlock_irq(&bp->stats_lock); in macb_get_pause_stats()
3257 struct gem_stats *hwstat = &bp->hw_stats.gem; in gem_get_pause_stats()
3259 spin_lock_irq(&bp->stats_lock); in gem_get_pause_stats()
3261 pause_stats->tx_pause_frames = hwstat->tx_pause_frames; in gem_get_pause_stats()
3262 pause_stats->rx_pause_frames = hwstat->rx_pause_frames; in gem_get_pause_stats()
3263 spin_unlock_irq(&bp->stats_lock); in gem_get_pause_stats()
3270 struct macb_stats *hwstat = &bp->hw_stats.macb; in macb_get_eth_mac_stats()
3272 spin_lock_irq(&bp->stats_lock); in macb_get_eth_mac_stats()
3274 mac_stats->FramesTransmittedOK = hwstat->tx_ok; in macb_get_eth_mac_stats()
3275 mac_stats->SingleCollisionFrames = hwstat->tx_single_cols; in macb_get_eth_mac_stats()
3276 mac_stats->MultipleCollisionFrames = hwstat->tx_multiple_cols; in macb_get_eth_mac_stats()
3277 mac_stats->FramesReceivedOK = hwstat->rx_ok; in macb_get_eth_mac_stats()
3278 mac_stats->FrameCheckSequenceErrors = hwstat->rx_fcs_errors; in macb_get_eth_mac_stats()
3279 mac_stats->AlignmentErrors = hwstat->rx_align_errors; in macb_get_eth_mac_stats()
3280 mac_stats->FramesWithDeferredXmissions = hwstat->tx_deferred; in macb_get_eth_mac_stats()
3281 mac_stats->LateCollisions = hwstat->tx_late_cols; in macb_get_eth_mac_stats()
3282 mac_stats->FramesAbortedDueToXSColls = hwstat->tx_excessive_cols; in macb_get_eth_mac_stats()
3283 mac_stats->FramesLostDueToIntMACXmitError = hwstat->tx_underruns; in macb_get_eth_mac_stats()
3284 mac_stats->CarrierSenseErrors = hwstat->tx_carrier_errors; in macb_get_eth_mac_stats()
3285 mac_stats->FramesLostDueToIntMACRcvError = hwstat->rx_overruns; in macb_get_eth_mac_stats()
3286 mac_stats->InRangeLengthErrors = hwstat->rx_length_mismatch; in macb_get_eth_mac_stats()
3287 mac_stats->FrameTooLongErrors = hwstat->rx_oversize_pkts; in macb_get_eth_mac_stats()
3288 spin_unlock_irq(&bp->stats_lock); in macb_get_eth_mac_stats()
3295 struct gem_stats *hwstat = &bp->hw_stats.gem; in gem_get_eth_mac_stats()
3297 spin_lock_irq(&bp->stats_lock); in gem_get_eth_mac_stats()
3299 mac_stats->FramesTransmittedOK = hwstat->tx_frames; in gem_get_eth_mac_stats()
3300 mac_stats->SingleCollisionFrames = hwstat->tx_single_collision_frames; in gem_get_eth_mac_stats()
3301 mac_stats->MultipleCollisionFrames = in gem_get_eth_mac_stats()
3302 hwstat->tx_multiple_collision_frames; in gem_get_eth_mac_stats()
3303 mac_stats->FramesReceivedOK = hwstat->rx_frames; in gem_get_eth_mac_stats()
3304 mac_stats->FrameCheckSequenceErrors = in gem_get_eth_mac_stats()
3305 hwstat->rx_frame_check_sequence_errors; in gem_get_eth_mac_stats()
3306 mac_stats->AlignmentErrors = hwstat->rx_alignment_errors; in gem_get_eth_mac_stats()
3307 mac_stats->OctetsTransmittedOK = hwstat->tx_octets; in gem_get_eth_mac_stats()
3308 mac_stats->FramesWithDeferredXmissions = hwstat->tx_deferred_frames; in gem_get_eth_mac_stats()
3309 mac_stats->LateCollisions = hwstat->tx_late_collisions; in gem_get_eth_mac_stats()
3310 mac_stats->FramesAbortedDueToXSColls = hwstat->tx_excessive_collisions; in gem_get_eth_mac_stats()
3311 mac_stats->FramesLostDueToIntMACXmitError = hwstat->tx_underrun; in gem_get_eth_mac_stats()
3312 mac_stats->CarrierSenseErrors = hwstat->tx_carrier_sense_errors; in gem_get_eth_mac_stats()
3313 mac_stats->OctetsReceivedOK = hwstat->rx_octets; in gem_get_eth_mac_stats()
3314 mac_stats->MulticastFramesXmittedOK = hwstat->tx_multicast_frames; in gem_get_eth_mac_stats()
3315 mac_stats->BroadcastFramesXmittedOK = hwstat->tx_broadcast_frames; in gem_get_eth_mac_stats()
3316 mac_stats->MulticastFramesReceivedOK = hwstat->rx_multicast_frames; in gem_get_eth_mac_stats()
3317 mac_stats->BroadcastFramesReceivedOK = hwstat->rx_broadcast_frames; in gem_get_eth_mac_stats()
3318 mac_stats->InRangeLengthErrors = hwstat->rx_length_field_frame_errors; in gem_get_eth_mac_stats()
3319 mac_stats->FrameTooLongErrors = hwstat->rx_oversize_frames; in gem_get_eth_mac_stats()
3320 spin_unlock_irq(&bp->stats_lock); in gem_get_eth_mac_stats()
3328 struct macb_stats *hwstat = &bp->hw_stats.macb; in macb_get_eth_phy_stats()
3330 spin_lock_irq(&bp->stats_lock); in macb_get_eth_phy_stats()
3332 phy_stats->SymbolErrorDuringCarrier = hwstat->rx_symbol_errors; in macb_get_eth_phy_stats()
3333 spin_unlock_irq(&bp->stats_lock); in macb_get_eth_phy_stats()
3340 struct gem_stats *hwstat = &bp->hw_stats.gem; in gem_get_eth_phy_stats()
3342 spin_lock_irq(&bp->stats_lock); in gem_get_eth_phy_stats()
3344 phy_stats->SymbolErrorDuringCarrier = hwstat->rx_symbol_errors; in gem_get_eth_phy_stats()
3345 spin_unlock_irq(&bp->stats_lock); in gem_get_eth_phy_stats()
3353 struct macb_stats *hwstat = &bp->hw_stats.macb; in macb_get_rmon_stats()
3355 spin_lock_irq(&bp->stats_lock); in macb_get_rmon_stats()
3357 rmon_stats->undersize_pkts = hwstat->rx_undersize_pkts; in macb_get_rmon_stats()
3358 rmon_stats->oversize_pkts = hwstat->rx_oversize_pkts; in macb_get_rmon_stats()
3359 rmon_stats->jabbers = hwstat->rx_jabbers; in macb_get_rmon_stats()
3360 spin_unlock_irq(&bp->stats_lock); in macb_get_rmon_stats()
3379 struct gem_stats *hwstat = &bp->hw_stats.gem; in gem_get_rmon_stats()
3381 spin_lock_irq(&bp->stats_lock); in gem_get_rmon_stats()
3383 rmon_stats->undersize_pkts = hwstat->rx_undersized_frames; in gem_get_rmon_stats()
3384 rmon_stats->oversize_pkts = hwstat->rx_oversize_frames; in gem_get_rmon_stats()
3385 rmon_stats->jabbers = hwstat->rx_jabbers; in gem_get_rmon_stats()
3386 rmon_stats->hist[0] = hwstat->rx_64_byte_frames; in gem_get_rmon_stats()
3387 rmon_stats->hist[1] = hwstat->rx_65_127_byte_frames; in gem_get_rmon_stats()
3388 rmon_stats->hist[2] = hwstat->rx_128_255_byte_frames; in gem_get_rmon_stats()
3389 rmon_stats->hist[3] = hwstat->rx_256_511_byte_frames; in gem_get_rmon_stats()
3390 rmon_stats->hist[4] = hwstat->rx_512_1023_byte_frames; in gem_get_rmon_stats()
3391 rmon_stats->hist[5] = hwstat->rx_1024_1518_byte_frames; in gem_get_rmon_stats()
3392 rmon_stats->hist[6] = hwstat->rx_greater_than_1518_byte_frames; in gem_get_rmon_stats()
3393 rmon_stats->hist_tx[0] = hwstat->tx_64_byte_frames; in gem_get_rmon_stats()
3394 rmon_stats->hist_tx[1] = hwstat->tx_65_127_byte_frames; in gem_get_rmon_stats()
3395 rmon_stats->hist_tx[2] = hwstat->tx_128_255_byte_frames; in gem_get_rmon_stats()
3396 rmon_stats->hist_tx[3] = hwstat->tx_256_511_byte_frames; in gem_get_rmon_stats()
3397 rmon_stats->hist_tx[4] = hwstat->tx_512_1023_byte_frames; in gem_get_rmon_stats()
3398 rmon_stats->hist_tx[5] = hwstat->tx_1024_1518_byte_frames; in gem_get_rmon_stats()
3399 rmon_stats->hist_tx[6] = hwstat->tx_greater_than_1518_byte_frames; in gem_get_rmon_stats()
3400 spin_unlock_irq(&bp->stats_lock); in gem_get_rmon_stats()
3416 regs->version = (macb_readl(bp, MID) & ((1 << MACB_REV_SIZE) - 1)) in macb_get_regs()
3419 tail = macb_tx_ring_wrap(bp, bp->queues[0].tx_tail); in macb_get_regs()
3420 head = macb_tx_ring_wrap(bp, bp->queues[0].tx_head); in macb_get_regs()
3433 regs_buff[10] = macb_tx_dma(&bp->queues[0], tail); in macb_get_regs()
3434 regs_buff[11] = macb_tx_dma(&bp->queues[0], head); in macb_get_regs()
3436 if (!(bp->caps & MACB_CAPS_USRIO_DISABLED)) in macb_get_regs()
3446 phylink_ethtool_get_wol(bp->phylink, wol); in macb_get_wol()
3447 wol->supported |= (WAKE_MAGIC | WAKE_ARP); in macb_get_wol()
3450 wol->wolopts |= bp->wolopts; in macb_get_wol()
3459 ret = phylink_ethtool_set_wol(bp->phylink, wol); in macb_set_wol()
3461 if (ret && ret != -EOPNOTSUPP) in macb_set_wol()
3464 bp->wolopts = (wol->wolopts & WAKE_MAGIC) ? WAKE_MAGIC : 0; in macb_set_wol()
3465 bp->wolopts |= (wol->wolopts & WAKE_ARP) ? WAKE_ARP : 0; in macb_set_wol()
3466 bp->wol = (wol->wolopts) ? MACB_WOL_ENABLED : 0; in macb_set_wol()
3468 device_set_wakeup_enable(&bp->pdev->dev, bp->wol); in macb_set_wol()
3478 return phylink_ethtool_ksettings_get(bp->phylink, kset); in macb_get_link_ksettings()
3486 return phylink_ethtool_ksettings_set(bp->phylink, kset); in macb_set_link_ksettings()
3496 ring->rx_max_pending = MAX_RX_RING_SIZE; in macb_get_ringparam()
3497 ring->tx_max_pending = MAX_TX_RING_SIZE; in macb_get_ringparam()
3499 ring->rx_pending = bp->rx_ring_size; in macb_get_ringparam()
3500 ring->tx_pending = bp->tx_ring_size; in macb_get_ringparam()
3512 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) in macb_set_ringparam()
3513 return -EINVAL; in macb_set_ringparam()
3515 new_rx_size = clamp_t(u32, ring->rx_pending, in macb_set_ringparam()
3519 new_tx_size = clamp_t(u32, ring->tx_pending, in macb_set_ringparam()
3523 if ((new_tx_size == bp->tx_ring_size) && in macb_set_ringparam()
3524 (new_rx_size == bp->rx_ring_size)) { in macb_set_ringparam()
3529 if (netif_running(bp->dev)) { in macb_set_ringparam()
3531 macb_close(bp->dev); in macb_set_ringparam()
3534 bp->rx_ring_size = new_rx_size; in macb_set_ringparam()
3535 bp->tx_ring_size = new_tx_size; in macb_set_ringparam()
3538 macb_open(bp->dev); in macb_set_ringparam()
3549 tsu_clk = devm_clk_get(&bp->pdev->dev, "tsu_clk"); in gem_get_tsu_rate()
3553 else if (!IS_ERR(bp->pclk)) { in gem_get_tsu_rate()
3554 tsu_clk = bp->pclk; in gem_get_tsu_rate()
3557 return -ENOTSUPP; in gem_get_tsu_rate()
3571 if ((bp->hw_dma_cap & HW_DMA_CAP_PTP) == 0) { in gem_get_ts_info()
3576 info->so_timestamping = in gem_get_ts_info()
3581 info->tx_types = in gem_get_ts_info()
3585 info->rx_filters = in gem_get_ts_info()
3589 if (bp->ptp_clock) in gem_get_ts_info()
3590 info->phc_index = ptp_clock_index(bp->ptp_clock); in gem_get_ts_info()
3611 if (bp->ptp_info) in macb_get_ts_info()
3612 return bp->ptp_info->get_ts_info(netdev, info); in macb_get_ts_info()
3619 struct net_device *netdev = bp->dev; in gem_enable_flow_filters()
3624 if (!(netdev->features & NETIF_F_NTUPLE)) in gem_enable_flow_filters()
3629 list_for_each_entry(item, &bp->rx_fs_list.list, list) { in gem_enable_flow_filters()
3630 struct ethtool_rx_flow_spec *fs = &item->fs; in gem_enable_flow_filters()
3633 if (fs->location >= num_t2_scr) in gem_enable_flow_filters()
3636 t2_scr = gem_readl_n(bp, SCRT2, fs->location); in gem_enable_flow_filters()
3642 tp4sp_m = &(fs->m_u.tcp_ip4_spec); in gem_enable_flow_filters()
3644 if (enable && (tp4sp_m->ip4src == 0xFFFFFFFF)) in gem_enable_flow_filters()
3649 if (enable && (tp4sp_m->ip4dst == 0xFFFFFFFF)) in gem_enable_flow_filters()
3654 if (enable && ((tp4sp_m->psrc == 0xFFFF) || (tp4sp_m->pdst == 0xFFFF))) in gem_enable_flow_filters()
3659 gem_writel_n(bp, SCRT2, fs->location, t2_scr); in gem_enable_flow_filters()
3666 uint16_t index = fs->location; in gem_prog_cmp_regs()
3675 tp4sp_v = &(fs->h_u.tcp_ip4_spec); in gem_prog_cmp_regs()
3676 tp4sp_m = &(fs->m_u.tcp_ip4_spec); in gem_prog_cmp_regs()
3679 if (tp4sp_m->ip4src == 0xFFFFFFFF) { in gem_prog_cmp_regs()
3680 /* 1st compare reg - IP source address */ in gem_prog_cmp_regs()
3683 w0 = tp4sp_v->ip4src; in gem_prog_cmp_regs()
3684 w1 = GEM_BFINS(T2DISMSK, 1, w1); /* 32-bit compare */ in gem_prog_cmp_regs()
3693 if (tp4sp_m->ip4dst == 0xFFFFFFFF) { in gem_prog_cmp_regs()
3694 /* 2nd compare reg - IP destination address */ in gem_prog_cmp_regs()
3697 w0 = tp4sp_v->ip4dst; in gem_prog_cmp_regs()
3698 w1 = GEM_BFINS(T2DISMSK, 1, w1); /* 32-bit compare */ in gem_prog_cmp_regs()
3707 if ((tp4sp_m->psrc == 0xFFFF) || (tp4sp_m->pdst == 0xFFFF)) { in gem_prog_cmp_regs()
3708 /* 3rd compare reg - source port, destination port */ in gem_prog_cmp_regs()
3712 if (tp4sp_m->psrc == tp4sp_m->pdst) { in gem_prog_cmp_regs()
3713 w0 = GEM_BFINS(T2MASK, tp4sp_v->psrc, w0); in gem_prog_cmp_regs()
3714 w0 = GEM_BFINS(T2CMP, tp4sp_v->pdst, w0); in gem_prog_cmp_regs()
3715 w1 = GEM_BFINS(T2DISMSK, 1, w1); /* 32-bit compare */ in gem_prog_cmp_regs()
3719 w1 = GEM_BFINS(T2DISMSK, 0, w1); /* 16-bit compare */ in gem_prog_cmp_regs()
3721 if (tp4sp_m->psrc == 0xFFFF) { /* src port */ in gem_prog_cmp_regs()
3722 w0 = GEM_BFINS(T2CMP, tp4sp_v->psrc, w0); in gem_prog_cmp_regs()
3725 w0 = GEM_BFINS(T2CMP, tp4sp_v->pdst, w0); in gem_prog_cmp_regs()
3735 t2_scr = GEM_BFINS(QUEUE, (fs->ring_cookie) & 0xFF, t2_scr); in gem_prog_cmp_regs()
3750 struct ethtool_rx_flow_spec *fs = &cmd->fs; in gem_add_flow_filter()
3753 int ret = -EINVAL; in gem_add_flow_filter()
3758 return -ENOMEM; in gem_add_flow_filter()
3759 memcpy(&newfs->fs, fs, sizeof(newfs->fs)); in gem_add_flow_filter()
3763 fs->flow_type, (int)fs->ring_cookie, fs->location, in gem_add_flow_filter()
3764 htonl(fs->h_u.tcp_ip4_spec.ip4src), in gem_add_flow_filter()
3765 htonl(fs->h_u.tcp_ip4_spec.ip4dst), in gem_add_flow_filter()
3766 be16_to_cpu(fs->h_u.tcp_ip4_spec.psrc), in gem_add_flow_filter()
3767 be16_to_cpu(fs->h_u.tcp_ip4_spec.pdst)); in gem_add_flow_filter()
3769 spin_lock_irqsave(&bp->rx_fs_lock, flags); in gem_add_flow_filter()
3772 list_for_each_entry(item, &bp->rx_fs_list.list, list) { in gem_add_flow_filter()
3773 if (item->fs.location > newfs->fs.location) { in gem_add_flow_filter()
3774 list_add_tail(&newfs->list, &item->list); in gem_add_flow_filter()
3777 } else if (item->fs.location == fs->location) { in gem_add_flow_filter()
3779 fs->location); in gem_add_flow_filter()
3780 ret = -EBUSY; in gem_add_flow_filter()
3785 list_add_tail(&newfs->list, &bp->rx_fs_list.list); in gem_add_flow_filter()
3788 bp->rx_fs_list.count++; in gem_add_flow_filter()
3792 spin_unlock_irqrestore(&bp->rx_fs_lock, flags); in gem_add_flow_filter()
3796 spin_unlock_irqrestore(&bp->rx_fs_lock, flags); in gem_add_flow_filter()
3809 spin_lock_irqsave(&bp->rx_fs_lock, flags); in gem_del_flow_filter()
3811 list_for_each_entry(item, &bp->rx_fs_list.list, list) { in gem_del_flow_filter()
3812 if (item->fs.location == cmd->fs.location) { in gem_del_flow_filter()
3814 fs = &(item->fs); in gem_del_flow_filter()
3817 fs->flow_type, (int)fs->ring_cookie, fs->location, in gem_del_flow_filter()
3818 htonl(fs->h_u.tcp_ip4_spec.ip4src), in gem_del_flow_filter()
3819 htonl(fs->h_u.tcp_ip4_spec.ip4dst), in gem_del_flow_filter()
3820 be16_to_cpu(fs->h_u.tcp_ip4_spec.psrc), in gem_del_flow_filter()
3821 be16_to_cpu(fs->h_u.tcp_ip4_spec.pdst)); in gem_del_flow_filter()
3823 gem_writel_n(bp, SCRT2, fs->location, 0); in gem_del_flow_filter()
3825 list_del(&item->list); in gem_del_flow_filter()
3826 bp->rx_fs_list.count--; in gem_del_flow_filter()
3827 spin_unlock_irqrestore(&bp->rx_fs_lock, flags); in gem_del_flow_filter()
3833 spin_unlock_irqrestore(&bp->rx_fs_lock, flags); in gem_del_flow_filter()
3834 return -EINVAL; in gem_del_flow_filter()
3843 list_for_each_entry(item, &bp->rx_fs_list.list, list) { in gem_get_flow_entry()
3844 if (item->fs.location == cmd->fs.location) { in gem_get_flow_entry()
3845 memcpy(&cmd->fs, &item->fs, sizeof(cmd->fs)); in gem_get_flow_entry()
3849 return -EINVAL; in gem_get_flow_entry()
3859 list_for_each_entry(item, &bp->rx_fs_list.list, list) { in gem_get_all_flow_entries()
3860 if (cnt == cmd->rule_cnt) in gem_get_all_flow_entries()
3861 return -EMSGSIZE; in gem_get_all_flow_entries()
3862 rule_locs[cnt] = item->fs.location; in gem_get_all_flow_entries()
3865 cmd->data = bp->max_tuples; in gem_get_all_flow_entries()
3866 cmd->rule_cnt = cnt; in gem_get_all_flow_entries()
3877 switch (cmd->cmd) { in gem_get_rxnfc()
3879 cmd->data = bp->num_queues; in gem_get_rxnfc()
3882 cmd->rule_cnt = bp->rx_fs_list.count; in gem_get_rxnfc()
3892 "Command parameter %d is not supported\n", cmd->cmd); in gem_get_rxnfc()
3893 ret = -EOPNOTSUPP; in gem_get_rxnfc()
3904 switch (cmd->cmd) { in gem_set_rxnfc()
3906 if ((cmd->fs.location >= bp->max_tuples) in gem_set_rxnfc()
3907 || (cmd->fs.ring_cookie >= bp->num_queues)) { in gem_set_rxnfc()
3908 ret = -EINVAL; in gem_set_rxnfc()
3918 "Command parameter %d is not supported\n", cmd->cmd); in gem_set_rxnfc()
3919 ret = -EOPNOTSUPP; in gem_set_rxnfc()
3969 return -EINVAL; in macb_ioctl()
3971 return phylink_mii_ioctl(bp->phylink, rq, cmd); in macb_ioctl()
3980 return -EINVAL; in macb_hwtstamp_get()
3982 if (!bp->ptp_info) in macb_hwtstamp_get()
3983 return -EOPNOTSUPP; in macb_hwtstamp_get()
3985 return bp->ptp_info->get_hwtst(dev, cfg); in macb_hwtstamp_get()
3995 return -EINVAL; in macb_hwtstamp_set()
3997 if (!bp->ptp_info) in macb_hwtstamp_set()
3998 return -EOPNOTSUPP; in macb_hwtstamp_set()
4000 return bp->ptp_info->set_hwtst(dev, cfg, extack); in macb_hwtstamp_set()
4023 struct net_device *netdev = bp->dev; in macb_set_rxcsum_feature()
4030 if ((features & NETIF_F_RXCSUM) && !(netdev->flags & IFF_PROMISC)) in macb_set_rxcsum_feature()
4051 netdev_features_t changed = features ^ netdev->features; in macb_set_features()
4070 struct net_device *netdev = bp->dev; in macb_restore_features()
4071 netdev_features_t features = netdev->features; in macb_restore_features()
4081 list_for_each_entry(item, &bp->rx_fs_list.list, list) in macb_restore_features()
4082 gem_prog_cmp_regs(bp, &item->fs); in macb_restore_features()
4115 bp->caps = dt_conf->caps; in macb_configure_caps()
4117 if (hw_is_gem(bp->regs, bp->native_io)) { in macb_configure_caps()
4118 bp->caps |= MACB_CAPS_MACB_IS_GEM; in macb_configure_caps()
4122 bp->caps |= MACB_CAPS_ISR_CLEAR_ON_WRITE; in macb_configure_caps()
4124 bp->caps |= MACB_CAPS_PCS; in macb_configure_caps()
4127 bp->caps |= MACB_CAPS_HIGH_SPEED; in macb_configure_caps()
4130 bp->caps |= MACB_CAPS_FIFO_MODE; in macb_configure_caps()
4133 dev_err(&bp->pdev->dev, in macb_configure_caps()
4134 "GEM doesn't support hardware ptp.\n"); in macb_configure_caps()
4137 bp->hw_dma_cap |= HW_DMA_CAP_PTP; in macb_configure_caps()
4138 bp->ptp_info = &gem_ptp_info; in macb_configure_caps()
4144 dev_dbg(&bp->pdev->dev, "Cadence caps 0x%08x\n", bp->caps); in macb_configure_caps()
4155 /* is it macb or gem ? in macb_probe_queues()
4190 pdata = dev_get_platdata(&pdev->dev); in macb_clk_init()
4192 *pclk = pdata->pclk; in macb_clk_init()
4193 *hclk = pdata->hclk; in macb_clk_init()
4195 *pclk = devm_clk_get(&pdev->dev, "pclk"); in macb_clk_init()
4196 *hclk = devm_clk_get(&pdev->dev, "hclk"); in macb_clk_init()
4200 return dev_err_probe(&pdev->dev, in macb_clk_init()
4201 IS_ERR(*pclk) ? PTR_ERR(*pclk) : -ENODEV, in macb_clk_init()
4205 return dev_err_probe(&pdev->dev, in macb_clk_init()
4206 IS_ERR(*hclk) ? PTR_ERR(*hclk) : -ENODEV, in macb_clk_init()
4209 *tx_clk = devm_clk_get_optional(&pdev->dev, "tx_clk"); in macb_clk_init()
4213 *rx_clk = devm_clk_get_optional(&pdev->dev, "rx_clk"); in macb_clk_init()
4217 *tsu_clk = devm_clk_get_optional(&pdev->dev, "tsu_clk"); in macb_clk_init()
4223 dev_err(&pdev->dev, "failed to enable pclk (%d)\n", err); in macb_clk_init()
4229 dev_err(&pdev->dev, "failed to enable hclk (%d)\n", err); in macb_clk_init()
4235 dev_err(&pdev->dev, "failed to enable tx_clk (%d)\n", err); in macb_clk_init()
4241 dev_err(&pdev->dev, "failed to enable rx_clk (%d)\n", err); in macb_clk_init()
4247 dev_err(&pdev->dev, "failed to enable tsu_clk (%d)\n", err); in macb_clk_init()
4277 bp->tx_ring_size = DEFAULT_TX_RING_SIZE; in macb_init()
4278 bp->rx_ring_size = DEFAULT_RX_RING_SIZE; in macb_init()
4285 if (!(bp->queue_mask & (1 << hw_q))) in macb_init()
4288 queue = &bp->queues[q]; in macb_init()
4289 queue->bp = bp; in macb_init()
4290 spin_lock_init(&queue->tx_ptr_lock); in macb_init()
4291 netif_napi_add(dev, &queue->napi_rx, macb_rx_poll); in macb_init()
4292 netif_napi_add(dev, &queue->napi_tx, macb_tx_poll); in macb_init()
4294 queue->ISR = GEM_ISR(hw_q - 1); in macb_init()
4295 queue->IER = GEM_IER(hw_q - 1); in macb_init()
4296 queue->IDR = GEM_IDR(hw_q - 1); in macb_init()
4297 queue->IMR = GEM_IMR(hw_q - 1); in macb_init()
4298 queue->TBQP = GEM_TBQP(hw_q - 1); in macb_init()
4299 queue->RBQP = GEM_RBQP(hw_q - 1); in macb_init()
4300 queue->RBQS = GEM_RBQS(hw_q - 1); in macb_init()
4302 if (bp->hw_dma_cap & HW_DMA_CAP_64B) { in macb_init()
4303 queue->TBQPH = GEM_TBQPH(hw_q - 1); in macb_init()
4304 queue->RBQPH = GEM_RBQPH(hw_q - 1); in macb_init()
4309 queue->ISR = MACB_ISR; in macb_init()
4310 queue->IER = MACB_IER; in macb_init()
4311 queue->IDR = MACB_IDR; in macb_init()
4312 queue->IMR = MACB_IMR; in macb_init()
4313 queue->TBQP = MACB_TBQP; in macb_init()
4314 queue->RBQP = MACB_RBQP; in macb_init()
4316 if (bp->hw_dma_cap & HW_DMA_CAP_64B) { in macb_init()
4317 queue->TBQPH = MACB_TBQPH; in macb_init()
4318 queue->RBQPH = MACB_RBQPH; in macb_init()
4328 queue->irq = platform_get_irq(pdev, q); in macb_init()
4329 err = devm_request_irq(&pdev->dev, queue->irq, macb_interrupt, in macb_init()
4330 IRQF_SHARED, dev->name, queue); in macb_init()
4332 dev_err(&pdev->dev, in macb_init()
4334 queue->irq, err); in macb_init()
4338 INIT_WORK(&queue->tx_error_task, macb_tx_error_task); in macb_init()
4342 dev->netdev_ops = &macb_netdev_ops; in macb_init()
4346 bp->macbgem_ops.mog_alloc_rx_buffers = gem_alloc_rx_buffers; in macb_init()
4347 bp->macbgem_ops.mog_free_rx_buffers = gem_free_rx_buffers; in macb_init()
4348 bp->macbgem_ops.mog_init_rings = gem_init_rings; in macb_init()
4349 bp->macbgem_ops.mog_rx = gem_rx; in macb_init()
4350 dev->ethtool_ops = &gem_ethtool_ops; in macb_init()
4352 bp->macbgem_ops.mog_alloc_rx_buffers = macb_alloc_rx_buffers; in macb_init()
4353 bp->macbgem_ops.mog_free_rx_buffers = macb_free_rx_buffers; in macb_init()
4354 bp->macbgem_ops.mog_init_rings = macb_init_rings; in macb_init()
4355 bp->macbgem_ops.mog_rx = macb_rx; in macb_init()
4356 dev->ethtool_ops = &macb_ethtool_ops; in macb_init()
4361 dev->priv_flags |= IFF_LIVE_ADDR_CHANGE; in macb_init()
4364 dev->hw_features = NETIF_F_SG; in macb_init()
4368 dev->hw_features |= MACB_NETIF_LSO; in macb_init()
4370 /* Checksum offload is only available on gem with packet buffer */ in macb_init()
4371 if (macb_is_gem(bp) && !(bp->caps & MACB_CAPS_FIFO_MODE)) in macb_init()
4372 dev->hw_features |= NETIF_F_HW_CSUM | NETIF_F_RXCSUM; in macb_init()
4373 if (bp->caps & MACB_CAPS_SG_DISABLED) in macb_init()
4374 dev->hw_features &= ~NETIF_F_SG; in macb_init()
4375 dev->features = dev->hw_features; in macb_init()
4379 * each 4-tuple define requires 1 T2 screener reg + 3 compare regs in macb_init()
4382 bp->max_tuples = min((GEM_BFEXT(SCR2CMP, reg) / 3), in macb_init()
4384 INIT_LIST_HEAD(&bp->rx_fs_list.list); in macb_init()
4385 if (bp->max_tuples > 0) { in macb_init()
4393 dev->hw_features |= NETIF_F_NTUPLE; in macb_init()
4395 bp->rx_fs_list.count = 0; in macb_init()
4396 spin_lock_init(&bp->rx_fs_lock); in macb_init()
4398 bp->max_tuples = 0; in macb_init()
4401 if (!(bp->caps & MACB_CAPS_USRIO_DISABLED)) { in macb_init()
4403 if (phy_interface_mode_is_rgmii(bp->phy_interface)) in macb_init()
4404 val = bp->usrio->rgmii; in macb_init()
4405 else if (bp->phy_interface == PHY_INTERFACE_MODE_RMII && in macb_init()
4406 (bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII)) in macb_init()
4407 val = bp->usrio->rmii; in macb_init()
4408 else if (!(bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII)) in macb_init()
4409 val = bp->usrio->mii; in macb_init()
4411 if (bp->caps & MACB_CAPS_USRIO_HAS_CLKEN) in macb_init()
4412 val |= bp->usrio->refclk; in macb_init()
4420 if (bp->phy_interface == PHY_INTERFACE_MODE_SGMII) in macb_init()
4444 struct macb_queue *q = &lp->queues[0]; in at91ether_alloc_coherent()
4446 q->rx_ring = dma_alloc_coherent(&lp->pdev->dev, in at91ether_alloc_coherent()
4449 &q->rx_ring_dma, GFP_KERNEL); in at91ether_alloc_coherent()
4450 if (!q->rx_ring) in at91ether_alloc_coherent()
4451 return -ENOMEM; in at91ether_alloc_coherent()
4453 q->rx_buffers = dma_alloc_coherent(&lp->pdev->dev, in at91ether_alloc_coherent()
4456 &q->rx_buffers_dma, GFP_KERNEL); in at91ether_alloc_coherent()
4457 if (!q->rx_buffers) { in at91ether_alloc_coherent()
4458 dma_free_coherent(&lp->pdev->dev, in at91ether_alloc_coherent()
4461 q->rx_ring, q->rx_ring_dma); in at91ether_alloc_coherent()
4462 q->rx_ring = NULL; in at91ether_alloc_coherent()
4463 return -ENOMEM; in at91ether_alloc_coherent()
4471 struct macb_queue *q = &lp->queues[0]; in at91ether_free_coherent()
4473 if (q->rx_ring) { in at91ether_free_coherent()
4474 dma_free_coherent(&lp->pdev->dev, in at91ether_free_coherent()
4477 q->rx_ring, q->rx_ring_dma); in at91ether_free_coherent()
4478 q->rx_ring = NULL; in at91ether_free_coherent()
4481 if (q->rx_buffers) { in at91ether_free_coherent()
4482 dma_free_coherent(&lp->pdev->dev, in at91ether_free_coherent()
4485 q->rx_buffers, q->rx_buffers_dma); in at91ether_free_coherent()
4486 q->rx_buffers = NULL; in at91ether_free_coherent()
4493 struct macb_queue *q = &lp->queues[0]; in at91ether_start()
4503 addr = q->rx_buffers_dma; in at91ether_start()
4507 desc->ctrl = 0; in at91ether_start()
4512 desc->addr |= MACB_BIT(RX_WRAP); in at91ether_start()
4515 q->rx_tail = 0; in at91ether_start()
4518 macb_writel(lp, RBQP, q->rx_ring_dma); in at91ether_start()
4564 ret = pm_runtime_resume_and_get(&lp->pdev->dev); in at91ether_open()
4589 pm_runtime_put_sync(&lp->pdev->dev); in at91ether_open()
4600 phylink_stop(lp->phylink); in at91ether_close()
4601 phylink_disconnect_phy(lp->phylink); in at91ether_close()
4605 return pm_runtime_put(&lp->pdev->dev); in at91ether_close()
4620 lp->rm9200_txq[desc].skb = skb; in at91ether_start_xmit()
4621 lp->rm9200_txq[desc].size = skb->len; in at91ether_start_xmit()
4622 lp->rm9200_txq[desc].mapping = dma_map_single(&lp->pdev->dev, skb->data, in at91ether_start_xmit()
4623 skb->len, DMA_TO_DEVICE); in at91ether_start_xmit()
4624 if (dma_mapping_error(&lp->pdev->dev, lp->rm9200_txq[desc].mapping)) { in at91ether_start_xmit()
4626 dev->stats.tx_dropped++; in at91ether_start_xmit()
4632 macb_writel(lp, TAR, lp->rm9200_txq[desc].mapping); in at91ether_start_xmit()
4634 macb_writel(lp, TCR, skb->len); in at91ether_start_xmit()
4650 struct macb_queue *q = &lp->queues[0]; in at91ether_rx()
4656 desc = macb_rx_desc(q, q->rx_tail); in at91ether_rx()
4657 while (desc->addr & MACB_BIT(RX_USED)) { in at91ether_rx()
4658 p_recv = q->rx_buffers + q->rx_tail * AT91ETHER_MAX_RBUFF_SZ; in at91ether_rx()
4659 pktlen = MACB_BF(RX_FRMLEN, desc->ctrl); in at91ether_rx()
4665 skb->protocol = eth_type_trans(skb, dev); in at91ether_rx()
4666 dev->stats.rx_packets++; in at91ether_rx()
4667 dev->stats.rx_bytes += pktlen; in at91ether_rx()
4670 dev->stats.rx_dropped++; in at91ether_rx()
4673 if (desc->ctrl & MACB_BIT(RX_MHASH_MATCH)) in at91ether_rx()
4674 dev->stats.multicast++; in at91ether_rx()
4677 desc->addr &= ~MACB_BIT(RX_USED); in at91ether_rx()
4680 if (q->rx_tail == AT91ETHER_MAX_RX_DESCR - 1) in at91ether_rx()
4681 q->rx_tail = 0; in at91ether_rx()
4683 q->rx_tail++; in at91ether_rx()
4685 desc = macb_rx_desc(q, q->rx_tail); in at91ether_rx()
4710 dev->stats.tx_errors++; in at91ether_interrupt()
4713 if (lp->rm9200_txq[desc].skb) { in at91ether_interrupt()
4714 dev_consume_skb_irq(lp->rm9200_txq[desc].skb); in at91ether_interrupt()
4715 lp->rm9200_txq[desc].skb = NULL; in at91ether_interrupt()
4716 dma_unmap_single(&lp->pdev->dev, lp->rm9200_txq[desc].mapping, in at91ether_interrupt()
4717 lp->rm9200_txq[desc].size, DMA_TO_DEVICE); in at91ether_interrupt()
4718 dev->stats.tx_packets++; in at91ether_interrupt()
4719 dev->stats.tx_bytes += lp->rm9200_txq[desc].size; in at91ether_interrupt()
4724 /* Work-around for EMAC Errata section 41.3.1 */ in at91ether_interrupt()
4744 at91ether_interrupt(dev->irq, dev); in at91ether_poll_controller()
4776 *pclk = devm_clk_get(&pdev->dev, "ether_clk"); in at91ether_clk_init()
4782 dev_err(&pdev->dev, "failed to enable pclk (%d)\n", err); in at91ether_clk_init()
4795 bp->queues[0].bp = bp; in at91ether_init()
4797 dev->netdev_ops = &at91ether_netdev_ops; in at91ether_init()
4798 dev->ethtool_ops = &macb_ethtool_ops; in at91ether_init()
4800 err = devm_request_irq(&pdev->dev, dev->irq, at91ether_interrupt, in at91ether_init()
4801 0, dev->name, dev); in at91ether_init()
4815 return mgmt->rate; in fu540_macb_tx_recalc_rate()
4848 iowrite32(1, mgmt->reg); in fu540_macb_tx_set_rate()
4850 iowrite32(0, mgmt->reg); in fu540_macb_tx_set_rate()
4851 mgmt->rate = rate; in fu540_macb_tx_set_rate()
4873 mgmt = devm_kzalloc(&pdev->dev, sizeof(*mgmt), GFP_KERNEL); in fu540_c000_clk_init()
4875 err = -ENOMEM; in fu540_c000_clk_init()
4879 init.name = "sifive-gemgxl-mgmt"; in fu540_c000_clk_init()
4884 mgmt->rate = 0; in fu540_c000_clk_init()
4885 mgmt->hw.init = &init; in fu540_c000_clk_init()
4887 *tx_clk = devm_clk_register(&pdev->dev, &mgmt->hw); in fu540_c000_clk_init()
4895 dev_err(&pdev->dev, "failed to enable tx_clk (%u)\n", err); in fu540_c000_clk_init()
4899 dev_info(&pdev->dev, "Registered clk switch '%s'\n", init.name); in fu540_c000_clk_init()
4912 mgmt->reg = devm_platform_ioremap_resource(pdev, 1); in fu540_c000_init()
4913 if (IS_ERR(mgmt->reg)) in fu540_c000_init()
4914 return PTR_ERR(mgmt->reg); in fu540_c000_init()
4925 if (bp->phy_interface == PHY_INTERFACE_MODE_SGMII) { in init_reset_optional()
4927 bp->sgmii_phy = devm_phy_optional_get(&pdev->dev, NULL); in init_reset_optional()
4929 if (IS_ERR(bp->sgmii_phy)) in init_reset_optional()
4930 return dev_err_probe(&pdev->dev, PTR_ERR(bp->sgmii_phy), in init_reset_optional()
4933 ret = phy_init(bp->sgmii_phy); in init_reset_optional()
4935 return dev_err_probe(&pdev->dev, ret, in init_reset_optional()
4942 ret = of_property_read_u32_array(pdev->dev.of_node, "power-domains", in init_reset_optional()
4945 dev_err(&pdev->dev, "Failed to read power management information\n"); in init_reset_optional()
4960 ret = device_reset_optional(&pdev->dev); in init_reset_optional()
4962 phy_exit(bp->sgmii_phy); in init_reset_optional()
4963 return dev_err_probe(&pdev->dev, ret, "failed to reset controller"); in init_reset_optional()
4970 phy_exit(bp->sgmii_phy); in init_reset_optional()
5128 { .compatible = "cdns,at91sam9260-macb", .data = &at91sam9260_config },
5130 { .compatible = "cdns,np4-macb", .data = &np4_config },
5131 { .compatible = "cdns,pc302-gem", .data = &pc302gem_config },
5132 { .compatible = "cdns,gem", .data = &pc302gem_config },
5133 { .compatible = "cdns,sam9x60-macb", .data = &at91sam9260_config },
5134 { .compatible = "atmel,sama5d2-gem", .data = &sama5d2_config },
5135 { .compatible = "atmel,sama5d29-gem", .data = &sama5d29_config },
5136 { .compatible = "atmel,sama5d3-gem", .data = &sama5d3_config },
5137 { .compatible = "atmel,sama5d3-macb", .data = &sama5d3macb_config },
5138 { .compatible = "atmel,sama5d4-gem", .data = &sama5d4_config },
5139 { .compatible = "cdns,at91rm9200-emac", .data = &emac_config },
5141 { .compatible = "cdns,zynqmp-gem", .data = &zynqmp_config}, /* deprecated */
5142 { .compatible = "cdns,zynq-gem", .data = &zynq_config }, /* deprecated */
5143 { .compatible = "sifive,fu540-c000-gem", .data = &fu540_c000_config },
5144 { .compatible = "microchip,mpfs-macb", .data = &mpfs_config },
5145 { .compatible = "microchip,sama7g5-gem", .data = &sama7g5_gem_config },
5146 { .compatible = "microchip,sama7g5-emac", .data = &sama7g5_emac_config },
5147 { .compatible = "xlnx,zynqmp-gem", .data = &zynqmp_config},
5148 { .compatible = "xlnx,zynq-gem", .data = &zynq_config },
5149 { .compatible = "xlnx,versal-gem", .data = &versal_config},
5171 struct clk **) = macb_config->clk_init; in macb_probe()
5172 int (*init)(struct platform_device *) = macb_config->init; in macb_probe()
5173 struct device_node *np = pdev->dev.of_node; in macb_probe()
5194 if (match && match->data) { in macb_probe()
5195 macb_config = match->data; in macb_probe()
5196 clk_init = macb_config->clk_init; in macb_probe()
5197 init = macb_config->init; in macb_probe()
5205 pm_runtime_set_autosuspend_delay(&pdev->dev, MACB_PM_TIMEOUT); in macb_probe()
5206 pm_runtime_use_autosuspend(&pdev->dev); in macb_probe()
5207 pm_runtime_get_noresume(&pdev->dev); in macb_probe()
5208 pm_runtime_set_active(&pdev->dev); in macb_probe()
5209 pm_runtime_enable(&pdev->dev); in macb_probe()
5215 err = -ENOMEM; in macb_probe()
5219 dev->base_addr = regs->start; in macb_probe()
5221 SET_NETDEV_DEV(dev, &pdev->dev); in macb_probe()
5224 bp->pdev = pdev; in macb_probe()
5225 bp->dev = dev; in macb_probe()
5226 bp->regs = mem; in macb_probe()
5227 bp->native_io = native_io; in macb_probe()
5229 bp->macb_reg_readl = hw_readl_native; in macb_probe()
5230 bp->macb_reg_writel = hw_writel_native; in macb_probe()
5232 bp->macb_reg_readl = hw_readl; in macb_probe()
5233 bp->macb_reg_writel = hw_writel; in macb_probe()
5235 bp->num_queues = num_queues; in macb_probe()
5236 bp->queue_mask = queue_mask; in macb_probe()
5238 bp->dma_burst_length = macb_config->dma_burst_length; in macb_probe()
5239 bp->pclk = pclk; in macb_probe()
5240 bp->hclk = hclk; in macb_probe()
5241 bp->tx_clk = tx_clk; in macb_probe()
5242 bp->rx_clk = rx_clk; in macb_probe()
5243 bp->tsu_clk = tsu_clk; in macb_probe()
5245 bp->jumbo_max_len = macb_config->jumbo_max_len; in macb_probe()
5247 if (!hw_is_gem(bp->regs, bp->native_io)) in macb_probe()
5248 bp->max_tx_length = MACB_MAX_TX_LEN; in macb_probe()
5249 else if (macb_config->max_tx_length) in macb_probe()
5250 bp->max_tx_length = macb_config->max_tx_length; in macb_probe()
5252 bp->max_tx_length = GEM_MAX_TX_LEN; in macb_probe()
5254 bp->wol = 0; in macb_probe()
5255 device_set_wakeup_capable(&pdev->dev, 1); in macb_probe()
5257 bp->usrio = macb_config->usrio; in macb_probe()
5259 /* By default we set to partial store and forward mode for zynqmp. in macb_probe()
5263 err = of_property_read_u32(bp->pdev->dev.of_node, in macb_probe()
5264 "cdns,rx-watermark", in macb_probe()
5265 &bp->rx_watermark); in macb_probe()
5271 wtrmrk_rst_val = (1 << (GEM_BFEXT(RX_PBUF_ADDR, gem_readl(bp, DCFG2)))) - 1; in macb_probe()
5272 if (bp->rx_watermark > wtrmrk_rst_val || !bp->rx_watermark) { in macb_probe()
5273 dev_info(&bp->pdev->dev, "Invalid watermark value\n"); in macb_probe()
5274 bp->rx_watermark = 0; in macb_probe()
5278 spin_lock_init(&bp->lock); in macb_probe()
5279 spin_lock_init(&bp->stats_lock); in macb_probe()
5286 dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(44)); in macb_probe()
5287 bp->hw_dma_cap |= HW_DMA_CAP_64B; in macb_probe()
5292 dev->irq = platform_get_irq(pdev, 0); in macb_probe()
5293 if (dev->irq < 0) { in macb_probe()
5294 err = dev->irq; in macb_probe()
5298 /* MTU range: 68 - 1518 or 10240 */ in macb_probe()
5299 dev->min_mtu = GEM_MTU_MIN_SIZE; in macb_probe()
5300 if ((bp->caps & MACB_CAPS_JUMBO) && bp->jumbo_max_len) in macb_probe()
5301 dev->max_mtu = bp->jumbo_max_len - ETH_HLEN - ETH_FCS_LEN; in macb_probe()
5303 dev->max_mtu = 1536 - ETH_HLEN - ETH_FCS_LEN; in macb_probe()
5305 if (bp->caps & MACB_CAPS_BD_RD_PREFETCH) { in macb_probe()
5308 bp->rx_bd_rd_prefetch = (2 << (val - 1)) * in macb_probe()
5313 bp->tx_bd_rd_prefetch = (2 << (val - 1)) * in macb_probe()
5317 bp->rx_intr_mask = MACB_RX_INT_FLAGS; in macb_probe()
5318 if (bp->caps & MACB_CAPS_NEEDS_RSTONUBR) in macb_probe()
5319 bp->rx_intr_mask |= MACB_BIT(RXUBR); in macb_probe()
5321 err = of_get_ethdev_address(np, bp->dev); in macb_probe()
5322 if (err == -EPROBE_DEFER) in macb_probe()
5330 bp->phy_interface = PHY_INTERFACE_MODE_MII; in macb_probe()
5332 bp->phy_interface = interface; in macb_probe()
5347 dev_err(&pdev->dev, "Cannot register net device, aborting.\n"); in macb_probe()
5351 INIT_WORK(&bp->hresp_err_bh_work, macb_hresp_error_task); in macb_probe()
5354 macb_is_gem(bp) ? "GEM" : "MACB", macb_readl(bp, MID), in macb_probe()
5355 dev->base_addr, dev->irq, dev->dev_addr); in macb_probe()
5357 pm_runtime_mark_last_busy(&bp->pdev->dev); in macb_probe()
5358 pm_runtime_put_autosuspend(&bp->pdev->dev); in macb_probe()
5363 mdiobus_unregister(bp->mii_bus); in macb_probe()
5364 mdiobus_free(bp->mii_bus); in macb_probe()
5367 phy_exit(bp->sgmii_phy); in macb_probe()
5374 pm_runtime_disable(&pdev->dev); in macb_probe()
5375 pm_runtime_set_suspended(&pdev->dev); in macb_probe()
5376 pm_runtime_dont_use_autosuspend(&pdev->dev); in macb_probe()
5390 phy_exit(bp->sgmii_phy); in macb_remove()
5391 mdiobus_unregister(bp->mii_bus); in macb_remove()
5392 mdiobus_free(bp->mii_bus); in macb_remove()
5395 cancel_work_sync(&bp->hresp_err_bh_work); in macb_remove()
5396 pm_runtime_disable(&pdev->dev); in macb_remove()
5397 pm_runtime_dont_use_autosuspend(&pdev->dev); in macb_remove()
5398 if (!pm_runtime_suspended(&pdev->dev)) { in macb_remove()
5399 macb_clks_disable(bp->pclk, bp->hclk, bp->tx_clk, in macb_remove()
5400 bp->rx_clk, bp->tsu_clk); in macb_remove()
5401 pm_runtime_set_suspended(&pdev->dev); in macb_remove()
5403 phylink_destroy(bp->phylink); in macb_remove()
5420 if (!device_may_wakeup(&bp->dev->dev)) in macb_suspend()
5421 phy_exit(bp->sgmii_phy); in macb_suspend()
5426 if (bp->wol & MACB_WOL_ENABLED) { in macb_suspend()
5428 idev = __in_dev_get_rcu(bp->dev); in macb_suspend()
5430 ifa = rcu_dereference(idev->ifa_list); in macb_suspend()
5431 if ((bp->wolopts & WAKE_ARP) && !ifa) { in macb_suspend()
5433 return -EOPNOTSUPP; in macb_suspend()
5435 spin_lock_irqsave(&bp->lock, flags); in macb_suspend()
5442 for (q = 0, queue = bp->queues; q < bp->num_queues; in macb_suspend()
5445 if (bp->caps & MACB_CAPS_QUEUE_DISABLE) { in macb_suspend()
5450 lower_32_bits(bp->rx_ring_tieoff_dma)); in macb_suspend()
5453 upper_32_bits(bp->rx_ring_tieoff_dma)); in macb_suspend()
5457 queue_writel(queue, IDR, -1); in macb_suspend()
5459 if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) in macb_suspend()
5460 queue_writel(queue, ISR, -1); in macb_suspend()
5465 macb_writel(bp, TSR, -1); in macb_suspend()
5466 macb_writel(bp, RSR, -1); in macb_suspend()
5468 tmp = (bp->wolopts & WAKE_MAGIC) ? MACB_BIT(MAG) : 0; in macb_suspend()
5469 if (bp->wolopts & WAKE_ARP) { in macb_suspend()
5472 tmp |= MACB_BFEXT(IP, be32_to_cpu(ifa->ifa_local)); in macb_suspend()
5478 devm_free_irq(dev, bp->queues[0].irq, bp->queues); in macb_suspend()
5480 err = devm_request_irq(dev, bp->queues[0].irq, gem_wol_interrupt, in macb_suspend()
5481 IRQF_SHARED, netdev->name, bp->queues); in macb_suspend()
5485 bp->queues[0].irq, err); in macb_suspend()
5486 spin_unlock_irqrestore(&bp->lock, flags); in macb_suspend()
5489 queue_writel(bp->queues, IER, GEM_BIT(WOL)); in macb_suspend()
5492 err = devm_request_irq(dev, bp->queues[0].irq, macb_wol_interrupt, in macb_suspend()
5493 IRQF_SHARED, netdev->name, bp->queues); in macb_suspend()
5497 bp->queues[0].irq, err); in macb_suspend()
5498 spin_unlock_irqrestore(&bp->lock, flags); in macb_suspend()
5501 queue_writel(bp->queues, IER, MACB_BIT(WOL)); in macb_suspend()
5504 spin_unlock_irqrestore(&bp->lock, flags); in macb_suspend()
5506 enable_irq_wake(bp->queues[0].irq); in macb_suspend()
5510 for (q = 0, queue = bp->queues; q < bp->num_queues; in macb_suspend()
5512 napi_disable(&queue->napi_rx); in macb_suspend()
5513 napi_disable(&queue->napi_tx); in macb_suspend()
5516 if (!(bp->wol & MACB_WOL_ENABLED)) { in macb_suspend()
5518 phylink_stop(bp->phylink); in macb_suspend()
5520 spin_lock_irqsave(&bp->lock, flags); in macb_suspend()
5522 spin_unlock_irqrestore(&bp->lock, flags); in macb_suspend()
5525 if (!(bp->caps & MACB_CAPS_USRIO_DISABLED)) in macb_suspend()
5526 bp->pm_data.usrio = macb_or_gem_readl(bp, USRIO); in macb_suspend()
5528 if (netdev->hw_features & NETIF_F_NTUPLE) in macb_suspend()
5529 bp->pm_data.scrt2 = gem_readl_n(bp, ETHT, SCRT2_ETHT); in macb_suspend()
5531 if (bp->ptp_info) in macb_suspend()
5532 bp->ptp_info->ptp_remove(netdev); in macb_suspend()
5548 if (!device_may_wakeup(&bp->dev->dev)) in macb_resume()
5549 phy_init(bp->sgmii_phy); in macb_resume()
5557 if (bp->wol & MACB_WOL_ENABLED) { in macb_resume()
5558 spin_lock_irqsave(&bp->lock, flags); in macb_resume()
5561 queue_writel(bp->queues, IDR, GEM_BIT(WOL)); in macb_resume()
5564 queue_writel(bp->queues, IDR, MACB_BIT(WOL)); in macb_resume()
5568 queue_readl(bp->queues, ISR); in macb_resume()
5569 if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) in macb_resume()
5570 queue_writel(bp->queues, ISR, -1); in macb_resume()
5572 devm_free_irq(dev, bp->queues[0].irq, bp->queues); in macb_resume()
5573 err = devm_request_irq(dev, bp->queues[0].irq, macb_interrupt, in macb_resume()
5574 IRQF_SHARED, netdev->name, bp->queues); in macb_resume()
5578 bp->queues[0].irq, err); in macb_resume()
5579 spin_unlock_irqrestore(&bp->lock, flags); in macb_resume()
5582 spin_unlock_irqrestore(&bp->lock, flags); in macb_resume()
5584 disable_irq_wake(bp->queues[0].irq); in macb_resume()
5590 phylink_stop(bp->phylink); in macb_resume()
5594 for (q = 0, queue = bp->queues; q < bp->num_queues; in macb_resume()
5596 napi_enable(&queue->napi_rx); in macb_resume()
5597 napi_enable(&queue->napi_tx); in macb_resume()
5600 if (netdev->hw_features & NETIF_F_NTUPLE) in macb_resume()
5601 gem_writel_n(bp, ETHT, SCRT2_ETHT, bp->pm_data.scrt2); in macb_resume()
5603 if (!(bp->caps & MACB_CAPS_USRIO_DISABLED)) in macb_resume()
5604 macb_or_gem_writel(bp, USRIO, bp->pm_data.usrio); in macb_resume()
5612 phylink_start(bp->phylink); in macb_resume()
5616 if (bp->ptp_info) in macb_resume()
5617 bp->ptp_info->ptp_init(netdev); in macb_resume()
5628 macb_clks_disable(bp->pclk, bp->hclk, bp->tx_clk, bp->rx_clk, bp->tsu_clk); in macb_runtime_suspend()
5629 else if (!(bp->caps & MACB_CAPS_NEED_TSUCLK)) in macb_runtime_suspend()
5630 macb_clks_disable(NULL, NULL, NULL, NULL, bp->tsu_clk); in macb_runtime_suspend()
5641 clk_prepare_enable(bp->pclk); in macb_runtime_resume()
5642 clk_prepare_enable(bp->hclk); in macb_runtime_resume()
5643 clk_prepare_enable(bp->tx_clk); in macb_runtime_resume()
5644 clk_prepare_enable(bp->rx_clk); in macb_runtime_resume()
5645 clk_prepare_enable(bp->tsu_clk); in macb_runtime_resume()
5646 } else if (!(bp->caps & MACB_CAPS_NEED_TSUCLK)) { in macb_runtime_resume()
5647 clk_prepare_enable(bp->tsu_clk); in macb_runtime_resume()
5671 MODULE_DESCRIPTION("Cadence MACB/GEM Ethernet driver");