Lines Matching +full:trim +full:- +full:hs +full:- +full:current
1 /* Broadcom NetXtreme-C/E network driver.
3 * Copyright (c) 2014-2016 Broadcom Corporation
4 * Copyright (c) 2016-2019 Broadcom Limited
25 #include <linux/dma-mapping.h>
60 #include <linux/pci-tph.h>
95 [BCM57301] = { "Broadcom BCM57301 NetXtreme-C 10Gb Ethernet" },
96 [BCM57302] = { "Broadcom BCM57302 NetXtreme-C 10Gb/25Gb Ethernet" },
97 [BCM57304] = { "Broadcom BCM57304 NetXtreme-C 10Gb/25Gb/40Gb/50Gb Ethernet" },
98 [BCM57417_NPAR] = { "Broadcom BCM57417 NetXtreme-E Ethernet Partition" },
100 [BCM57311] = { "Broadcom BCM57311 NetXtreme-C 10Gb Ethernet" },
101 [BCM57312] = { "Broadcom BCM57312 NetXtreme-C 10Gb/25Gb Ethernet" },
102 [BCM57402] = { "Broadcom BCM57402 NetXtreme-E 10Gb Ethernet" },
103 [BCM57404] = { "Broadcom BCM57404 NetXtreme-E 10Gb/25Gb Ethernet" },
104 [BCM57406] = { "Broadcom BCM57406 NetXtreme-E 10GBase-T Ethernet" },
105 [BCM57402_NPAR] = { "Broadcom BCM57402 NetXtreme-E Ethernet Partition" },
106 [BCM57407] = { "Broadcom BCM57407 NetXtreme-E 10GBase-T Ethernet" },
107 [BCM57412] = { "Broadcom BCM57412 NetXtreme-E 10Gb Ethernet" },
108 [BCM57414] = { "Broadcom BCM57414 NetXtreme-E 10Gb/25Gb Ethernet" },
109 [BCM57416] = { "Broadcom BCM57416 NetXtreme-E 10GBase-T Ethernet" },
110 [BCM57417] = { "Broadcom BCM57417 NetXtreme-E 10GBase-T Ethernet" },
111 [BCM57412_NPAR] = { "Broadcom BCM57412 NetXtreme-E Ethernet Partition" },
112 [BCM57314] = { "Broadcom BCM57314 NetXtreme-C 10Gb/25Gb/40Gb/50Gb Ethernet" },
113 [BCM57417_SFP] = { "Broadcom BCM57417 NetXtreme-E 10Gb/25Gb Ethernet" },
114 [BCM57416_SFP] = { "Broadcom BCM57416 NetXtreme-E 10Gb Ethernet" },
115 [BCM57404_NPAR] = { "Broadcom BCM57404 NetXtreme-E Ethernet Partition" },
116 [BCM57406_NPAR] = { "Broadcom BCM57406 NetXtreme-E Ethernet Partition" },
117 [BCM57407_SFP] = { "Broadcom BCM57407 NetXtreme-E 25Gb Ethernet" },
118 [BCM57407_NPAR] = { "Broadcom BCM57407 NetXtreme-E Ethernet Partition" },
119 [BCM57414_NPAR] = { "Broadcom BCM57414 NetXtreme-E Ethernet Partition" },
120 [BCM57416_NPAR] = { "Broadcom BCM57416 NetXtreme-E Ethernet Partition" },
121 [BCM57452] = { "Broadcom BCM57452 NetXtreme-E 10Gb/25Gb/40Gb/50Gb Ethernet" },
122 [BCM57454] = { "Broadcom BCM57454 NetXtreme-E 10Gb/25Gb/40Gb/50Gb/100Gb Ethernet" },
123 [BCM5745x_NPAR] = { "Broadcom BCM5745x NetXtreme-E Ethernet Partition" },
124 [BCM57508] = { "Broadcom BCM57508 NetXtreme-E 10Gb/25Gb/50Gb/100Gb/200Gb Ethernet" },
125 [BCM57504] = { "Broadcom BCM57504 NetXtreme-E 10Gb/25Gb/50Gb/100Gb/200Gb Ethernet" },
126 [BCM57502] = { "Broadcom BCM57502 NetXtreme-E 10Gb/25Gb/50Gb Ethernet" },
127 [BCM57608] = { "Broadcom BCM57608 NetXtreme-E 10Gb/25Gb/50Gb/100Gb/200Gb/400Gb Ethernet" },
128 [BCM57604] = { "Broadcom BCM57604 NetXtreme-E 10Gb/25Gb/50Gb/100Gb/200Gb Ethernet" },
129 [BCM57602] = { "Broadcom BCM57602 NetXtreme-E 10Gb/25Gb/50Gb/100Gb Ethernet" },
130 [BCM57601] = { "Broadcom BCM57601 NetXtreme-E 10Gb/25Gb/50Gb/100Gb/200Gb/400Gb Ethernet" },
131 [BCM57508_NPAR] = { "Broadcom BCM57508 NetXtreme-E Ethernet Partition" },
132 [BCM57504_NPAR] = { "Broadcom BCM57504 NetXtreme-E Ethernet Partition" },
133 [BCM57502_NPAR] = { "Broadcom BCM57502 NetXtreme-E Ethernet Partition" },
134 [BCM58802] = { "Broadcom BCM58802 NetXtreme-S 10Gb/25Gb/40Gb/50Gb Ethernet" },
135 [BCM58804] = { "Broadcom BCM58804 NetXtreme-S 10Gb/25Gb/40Gb/50Gb/100Gb Ethernet" },
136 [BCM58808] = { "Broadcom BCM58808 NetXtreme-S 10Gb/25Gb/40Gb/50Gb/100Gb Ethernet" },
137 [NETXTREME_E_VF] = { "Broadcom NetXtreme-E Ethernet Virtual Function" },
138 [NETXTREME_C_VF] = { "Broadcom NetXtreme-C Ethernet Virtual Function" },
139 [NETXTREME_S_VF] = { "Broadcom NetXtreme-S Ethernet Virtual Function" },
140 [NETXTREME_C_VF_HV] = { "Broadcom NetXtreme-C Virtual Function for Hyper-V" },
141 [NETXTREME_E_VF_HV] = { "Broadcom NetXtreme-E Virtual Function for Hyper-V" },
142 [NETXTREME_E_P5_VF] = { "Broadcom BCM5750X NetXtreme-E Ethernet Virtual Function" },
143 [NETXTREME_E_P5_VF_HV] = { "Broadcom BCM5750X NetXtreme-E Virtual Function for Hyper-V" },
325 writel(DB_CP_FLAGS | DB_RING_IDX(db, idx), (db)->doorbell)
328 bnxt_writeq(bp, (db)->db_key64 | DBR_TYPE_NQ | DB_RING_IDX(db, idx),\
329 (db)->doorbell)
332 bnxt_writeq(bp, (db)->db_key64 | DBR_TYPE_NQ_MASK | \
333 DB_RING_IDX(db, idx), (db)->doorbell)
336 writel(DB_CP_REARM_FLAGS | DB_RING_IDX(db, idx), (db)->doorbell)
339 bnxt_writeq(bp, (db)->db_key64 | DBR_TYPE_NQ_ARM | \
340 DB_RING_IDX(db, idx), (db)->doorbell)
344 if (bp->flags & BNXT_FLAG_CHIP_P7) in bnxt_db_nq()
346 else if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_db_nq()
354 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_db_nq_arm()
362 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_db_cq()
363 bnxt_writeq(bp, db->db_key64 | DBR_TYPE_CQ_ARMALL | in bnxt_db_cq()
364 DB_RING_IDX(db, idx), db->doorbell); in bnxt_db_cq()
371 if (!(test_bit(BNXT_STATE_IN_FW_RESET, &bp->state))) in bnxt_queue_fw_reset_work()
375 queue_delayed_work(bnxt_pf_wq, &bp->fw_reset_task, delay); in bnxt_queue_fw_reset_work()
377 schedule_delayed_work(&bp->fw_reset_task, delay); in bnxt_queue_fw_reset_work()
383 queue_work(bnxt_pf_wq, &bp->sp_task); in __bnxt_queue_sp_work()
385 schedule_work(&bp->sp_task); in __bnxt_queue_sp_work()
390 set_bit(event, &bp->sp_event); in bnxt_queue_sp_work()
396 if (!rxr->bnapi->in_reset) { in bnxt_sched_reset_rxr()
397 rxr->bnapi->in_reset = true; in bnxt_sched_reset_rxr()
398 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_sched_reset_rxr()
399 set_bit(BNXT_RESET_TASK_SP_EVENT, &bp->sp_event); in bnxt_sched_reset_rxr()
401 set_bit(BNXT_RST_RING_SP_EVENT, &bp->sp_event); in bnxt_sched_reset_rxr()
404 rxr->rx_next_cons = 0xffff; in bnxt_sched_reset_rxr()
410 struct bnxt_napi *bnapi = txr->bnapi; in bnxt_sched_reset_txr()
412 if (bnapi->tx_fault) in bnxt_sched_reset_txr()
415 netdev_err(bp->dev, "Invalid Tx completion (ring:%d tx_hw_cons:%u cons:%u prod:%u curr:%u)", in bnxt_sched_reset_txr()
416 txr->txq_index, txr->tx_hw_cons, in bnxt_sched_reset_txr()
417 txr->tx_cons, txr->tx_prod, curr); in bnxt_sched_reset_txr()
419 bnapi->tx_fault = 1; in bnxt_sched_reset_txr()
449 if (!md_dst || md_dst->type != METADATA_HW_PORT_MUX) in bnxt_xmit_get_cfa_action()
452 return md_dst->u.port_info.port_id; in bnxt_xmit_get_cfa_action()
460 bnxt_db_write(bp, &txr->tx_db, prod); in bnxt_txr_db_kick()
461 txr->kick_pending = 0; in bnxt_txr_db_kick()
474 struct bnxt_ptp_cfg *ptp = bp->ptp_cfg; in bnxt_start_xmit()
475 struct pci_dev *pdev = bp->pdev; in bnxt_start_xmit()
482 if (unlikely(i >= bp->tx_nr_rings)) { in bnxt_start_xmit()
489 txr = &bp->tx_ring[bp->tx_ring_map[i]]; in bnxt_start_xmit()
490 prod = txr->tx_prod; in bnxt_start_xmit()
493 if (skb_shinfo(skb)->nr_frags > TX_MAX_FRAGS) { in bnxt_start_xmit()
495 skb_shinfo(skb)->nr_frags, TX_MAX_FRAGS); in bnxt_start_xmit()
504 if (unlikely(free_size < skb_shinfo(skb)->nr_frags + 2)) { in bnxt_start_xmit()
506 if (net_ratelimit() && txr->kick_pending) in bnxt_start_xmit()
510 bp->tx_wake_thresh)) in bnxt_start_xmit()
517 length = skb->len; in bnxt_start_xmit()
519 last_frag = skb_shinfo(skb)->nr_frags; in bnxt_start_xmit()
521 txbd = &txr->tx_desc_ring[TX_RING(bp, prod)][TX_IDX(prod)]; in bnxt_start_xmit()
523 tx_buf = &txr->tx_buf_ring[RING_TX(bp, prod)]; in bnxt_start_xmit()
524 tx_buf->skb = skb; in bnxt_start_xmit()
525 tx_buf->nr_frags = last_frag; in bnxt_start_xmit()
535 if (skb->vlan_proto == htons(ETH_P_8021Q)) in bnxt_start_xmit()
539 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) && ptp && in bnxt_start_xmit()
540 ptp->tx_tstamp_en) { in bnxt_start_xmit()
541 if (bp->fw_cap & BNXT_FW_CAP_TX_TS_CMP) { in bnxt_start_xmit()
543 tx_buf->is_ts_pkt = 1; in bnxt_start_xmit()
544 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; in bnxt_start_xmit()
553 tx_buf->is_ts_pkt = 1; in bnxt_start_xmit()
554 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; in bnxt_start_xmit()
556 ptp->txts_req[txts_prod].tx_seqid = seq_id; in bnxt_start_xmit()
557 ptp->txts_req[txts_prod].tx_hdr_off = hdr_off; in bnxt_start_xmit()
558 tx_buf->txts_prod = txts_prod; in bnxt_start_xmit()
562 if (unlikely(skb->no_fcs)) in bnxt_start_xmit()
565 if (free_size == bp->tx_ring_size && length <= bp->tx_push_thresh && in bnxt_start_xmit()
567 struct tx_push_buffer *tx_push_buf = txr->tx_push; in bnxt_start_xmit()
568 struct tx_push_bd *tx_push = &tx_push_buf->push_bd; in bnxt_start_xmit()
569 struct tx_bd_ext *tx_push1 = &tx_push->txbd2; in bnxt_start_xmit()
570 void __iomem *db = txr->tx_db.doorbell; in bnxt_start_xmit()
571 void *pdata = tx_push_buf->data; in bnxt_start_xmit()
576 tx_push->tx_bd_len_flags_type = in bnxt_start_xmit()
584 if (skb->ip_summed == CHECKSUM_PARTIAL) in bnxt_start_xmit()
585 tx_push1->tx_bd_hsize_lflags = in bnxt_start_xmit()
588 tx_push1->tx_bd_hsize_lflags = 0; in bnxt_start_xmit()
590 tx_push1->tx_bd_cfa_meta = cpu_to_le32(vlan_tag_flags); in bnxt_start_xmit()
591 tx_push1->tx_bd_cfa_action = in bnxt_start_xmit()
595 end = PTR_ALIGN(end, 8) - 1; in bnxt_start_xmit()
601 skb_frag_t *frag = &skb_shinfo(skb)->frags[j]; in bnxt_start_xmit()
612 txbd->tx_bd_len_flags_type = tx_push->tx_bd_len_flags_type; in bnxt_start_xmit()
613 txbd->tx_bd_haddr = txr->data_mapping; in bnxt_start_xmit()
614 txbd->tx_bd_opaque = SET_TX_OPAQUE(bp, txr, prod, 2); in bnxt_start_xmit()
616 tx_push->tx_bd_opaque = txbd->tx_bd_opaque; in bnxt_start_xmit()
617 txbd = &txr->tx_desc_ring[TX_RING(bp, prod)][TX_IDX(prod)]; in bnxt_start_xmit()
620 tx_push->doorbell = in bnxt_start_xmit()
622 DB_RING_IDX(&txr->tx_db, prod)); in bnxt_start_xmit()
623 WRITE_ONCE(txr->tx_prod, prod); in bnxt_start_xmit()
625 tx_buf->is_push = 1; in bnxt_start_xmit()
626 netdev_tx_sent_queue(txq, skb->len); in bnxt_start_xmit()
633 (push_len - 16) << 1); in bnxt_start_xmit()
643 pad = BNXT_MIN_PKT_SIZE - length; in bnxt_start_xmit()
650 mapping = dma_map_single(&pdev->dev, skb->data, len, DMA_TO_DEVICE); in bnxt_start_xmit()
652 if (unlikely(dma_mapping_error(&pdev->dev, mapping))) in bnxt_start_xmit()
659 txbd->tx_bd_haddr = cpu_to_le64(mapping); in bnxt_start_xmit()
660 txbd->tx_bd_opaque = SET_TX_OPAQUE(bp, txr, prod, 2 + last_frag); in bnxt_start_xmit()
664 &txr->tx_desc_ring[TX_RING(bp, prod)][TX_IDX(prod)]; in bnxt_start_xmit()
666 txbd1->tx_bd_hsize_lflags = lflags; in bnxt_start_xmit()
668 bool udp_gso = !!(skb_shinfo(skb)->gso_type & SKB_GSO_UDP_L4); in bnxt_start_xmit()
671 if (skb->encapsulation) { in bnxt_start_xmit()
684 txbd1->tx_bd_hsize_lflags |= cpu_to_le32(TX_BD_FLAGS_LSO | in bnxt_start_xmit()
686 (hdr_len << (TX_BD_HSIZE_SHIFT - 1))); in bnxt_start_xmit()
687 length = skb_shinfo(skb)->gso_size; in bnxt_start_xmit()
688 txbd1->tx_bd_mss = cpu_to_le32(length); in bnxt_start_xmit()
690 } else if (skb->ip_summed == CHECKSUM_PARTIAL) { in bnxt_start_xmit()
691 txbd1->tx_bd_hsize_lflags |= in bnxt_start_xmit()
693 txbd1->tx_bd_mss = 0; in bnxt_start_xmit()
698 dev_warn_ratelimited(&pdev->dev, "Dropped oversize %d bytes TX packet.\n", in bnxt_start_xmit()
699 skb->len); in bnxt_start_xmit()
704 txbd->tx_bd_len_flags_type = cpu_to_le32(flags); in bnxt_start_xmit()
706 txbd1->tx_bd_cfa_meta = cpu_to_le32(vlan_tag_flags); in bnxt_start_xmit()
707 txbd1->tx_bd_cfa_action = in bnxt_start_xmit()
711 skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; in bnxt_start_xmit()
714 txbd = &txr->tx_desc_ring[TX_RING(bp, prod)][TX_IDX(prod)]; in bnxt_start_xmit()
717 mapping = skb_frag_dma_map(&pdev->dev, frag, 0, len, in bnxt_start_xmit()
720 if (unlikely(dma_mapping_error(&pdev->dev, mapping))) in bnxt_start_xmit()
723 tx_buf = &txr->tx_buf_ring[RING_TX(bp, prod)]; in bnxt_start_xmit()
726 txbd->tx_bd_haddr = cpu_to_le64(mapping); in bnxt_start_xmit()
729 txbd->tx_bd_len_flags_type = cpu_to_le32(flags); in bnxt_start_xmit()
733 txbd->tx_bd_len_flags_type = in bnxt_start_xmit()
737 netdev_tx_sent_queue(txq, skb->len); in bnxt_start_xmit()
742 WRITE_ONCE(txr->tx_prod, prod); in bnxt_start_xmit()
747 if (free_size >= bp->tx_wake_thresh) in bnxt_start_xmit()
748 txbd0->tx_bd_len_flags_type |= in bnxt_start_xmit()
750 txr->kick_pending = 1; in bnxt_start_xmit()
756 if (netdev_xmit_more() && !tx_buf->is_push) { in bnxt_start_xmit()
757 txbd0->tx_bd_len_flags_type &= in bnxt_start_xmit()
763 bp->tx_wake_thresh); in bnxt_start_xmit()
771 prod = txr->tx_prod; in bnxt_start_xmit()
772 tx_buf = &txr->tx_buf_ring[RING_TX(bp, prod)]; in bnxt_start_xmit()
773 dma_unmap_single(&pdev->dev, dma_unmap_addr(tx_buf, mapping), in bnxt_start_xmit()
780 tx_buf = &txr->tx_buf_ring[RING_TX(bp, prod)]; in bnxt_start_xmit()
781 dma_unmap_page(&pdev->dev, dma_unmap_addr(tx_buf, mapping), in bnxt_start_xmit()
782 skb_frag_size(&skb_shinfo(skb)->frags[i]), in bnxt_start_xmit()
790 txr->tx_buf_ring[RING_TX(bp, txr->tx_prod)].is_ts_pkt = 0; in bnxt_start_xmit()
791 atomic64_inc(&bp->ptp_cfg->stats.ts_err); in bnxt_start_xmit()
792 if (!(bp->fw_cap & BNXT_FW_CAP_TX_TS_CMP)) in bnxt_start_xmit()
794 ptp->txts_req[txts_prod].tx_skb = ERR_PTR(-EIO); in bnxt_start_xmit()
796 if (txr->kick_pending) in bnxt_start_xmit()
797 bnxt_txr_db_kick(bp, txr, txr->tx_prod); in bnxt_start_xmit()
798 txr->tx_buf_ring[RING_TX(bp, txr->tx_prod)].skb = NULL; in bnxt_start_xmit()
807 struct netdev_queue *txq = netdev_get_tx_queue(bp->dev, txr->txq_index); in __bnxt_tx_int()
808 struct pci_dev *pdev = bp->pdev; in __bnxt_tx_int()
809 u16 hw_cons = txr->tx_hw_cons; in __bnxt_tx_int()
811 u16 cons = txr->tx_cons; in __bnxt_tx_int()
821 tx_buf = &txr->tx_buf_ring[RING_TX(bp, cons)]; in __bnxt_tx_int()
822 skb = tx_buf->skb; in __bnxt_tx_int()
829 is_ts_pkt = tx_buf->is_ts_pkt; in __bnxt_tx_int()
830 if (is_ts_pkt && (bp->fw_cap & BNXT_FW_CAP_TX_TS_CMP)) { in __bnxt_tx_int()
837 tx_bytes += skb->len; in __bnxt_tx_int()
838 tx_buf->skb = NULL; in __bnxt_tx_int()
839 tx_buf->is_ts_pkt = 0; in __bnxt_tx_int()
841 if (tx_buf->is_push) { in __bnxt_tx_int()
842 tx_buf->is_push = 0; in __bnxt_tx_int()
846 dma_unmap_single(&pdev->dev, dma_unmap_addr(tx_buf, mapping), in __bnxt_tx_int()
848 last = tx_buf->nr_frags; in __bnxt_tx_int()
852 tx_buf = &txr->tx_buf_ring[RING_TX(bp, cons)]; in __bnxt_tx_int()
854 &pdev->dev, in __bnxt_tx_int()
856 skb_frag_size(&skb_shinfo(skb)->frags[j]), in __bnxt_tx_int()
862 bnxt_get_tx_ts_p5(bp, skb, tx_buf->txts_prod); in __bnxt_tx_int()
873 WRITE_ONCE(txr->tx_cons, cons); in __bnxt_tx_int()
876 bnxt_tx_avail(bp, txr), bp->tx_wake_thresh, in __bnxt_tx_int()
877 READ_ONCE(txr->dev_state) == BNXT_DEV_STATE_CLOSING); in __bnxt_tx_int()
889 if (txr->tx_hw_cons != RING_TX(bp, txr->tx_cons)) in bnxt_tx_int()
893 bnapi->events &= ~BNXT_TX_CMP_EVENT; in bnxt_tx_int()
909 page = page_pool_dev_alloc_frag(rxr->page_pool, offset, in __bnxt_alloc_rx_page()
912 page = page_pool_dev_alloc_pages(rxr->page_pool); in __bnxt_alloc_rx_page()
929 page = page_pool_alloc_frag(rxr->head_pool, &offset, in __bnxt_alloc_rx_frag()
930 bp->rx_buf_size, gfp); in __bnxt_alloc_rx_frag()
934 *mapping = page_pool_get_dma_addr(page) + bp->rx_dma_offset + offset; in __bnxt_alloc_rx_frag()
941 struct rx_bd *rxbd = &rxr->rx_desc_ring[RX_RING(bp, prod)][RX_IDX(prod)]; in bnxt_alloc_rx_data()
942 struct bnxt_sw_rx_bd *rx_buf = &rxr->rx_buf_ring[RING_RX(bp, prod)]; in bnxt_alloc_rx_data()
951 return -ENOMEM; in bnxt_alloc_rx_data()
953 mapping += bp->rx_dma_offset; in bnxt_alloc_rx_data()
954 rx_buf->data = page; in bnxt_alloc_rx_data()
955 rx_buf->data_ptr = page_address(page) + offset + bp->rx_offset; in bnxt_alloc_rx_data()
960 return -ENOMEM; in bnxt_alloc_rx_data()
962 rx_buf->data = data; in bnxt_alloc_rx_data()
963 rx_buf->data_ptr = data + bp->rx_offset; in bnxt_alloc_rx_data()
965 rx_buf->mapping = mapping; in bnxt_alloc_rx_data()
967 rxbd->rx_bd_haddr = cpu_to_le64(mapping); in bnxt_alloc_rx_data()
973 u16 prod = rxr->rx_prod; in bnxt_reuse_rx_data()
975 struct bnxt *bp = rxr->bnapi->bp; in bnxt_reuse_rx_data()
978 prod_rx_buf = &rxr->rx_buf_ring[RING_RX(bp, prod)]; in bnxt_reuse_rx_data()
979 cons_rx_buf = &rxr->rx_buf_ring[cons]; in bnxt_reuse_rx_data()
981 prod_rx_buf->data = data; in bnxt_reuse_rx_data()
982 prod_rx_buf->data_ptr = cons_rx_buf->data_ptr; in bnxt_reuse_rx_data()
984 prod_rx_buf->mapping = cons_rx_buf->mapping; in bnxt_reuse_rx_data()
986 prod_bd = &rxr->rx_desc_ring[RX_RING(bp, prod)][RX_IDX(prod)]; in bnxt_reuse_rx_data()
987 cons_bd = &rxr->rx_desc_ring[RX_RING(bp, cons)][RX_IDX(cons)]; in bnxt_reuse_rx_data()
989 prod_bd->rx_bd_haddr = cons_bd->rx_bd_haddr; in bnxt_reuse_rx_data()
994 u16 next, max = rxr->rx_agg_bmap_size; in bnxt_find_next_agg_idx()
996 next = find_next_zero_bit(rxr->rx_agg_bmap, max, idx); in bnxt_find_next_agg_idx()
998 next = find_first_zero_bit(rxr->rx_agg_bmap, max); in bnxt_find_next_agg_idx()
1007 &rxr->rx_agg_desc_ring[RX_AGG_RING(bp, prod)][RX_IDX(prod)]; in bnxt_alloc_rx_page()
1011 u16 sw_prod = rxr->rx_sw_agg_prod; in bnxt_alloc_rx_page()
1017 return -ENOMEM; in bnxt_alloc_rx_page()
1019 if (unlikely(test_bit(sw_prod, rxr->rx_agg_bmap))) in bnxt_alloc_rx_page()
1022 __set_bit(sw_prod, rxr->rx_agg_bmap); in bnxt_alloc_rx_page()
1023 rx_agg_buf = &rxr->rx_agg_ring[sw_prod]; in bnxt_alloc_rx_page()
1024 rxr->rx_sw_agg_prod = RING_RX_AGG(bp, NEXT_RX_AGG(sw_prod)); in bnxt_alloc_rx_page()
1026 rx_agg_buf->page = page; in bnxt_alloc_rx_page()
1027 rx_agg_buf->offset = offset; in bnxt_alloc_rx_page()
1028 rx_agg_buf->mapping = mapping; in bnxt_alloc_rx_page()
1029 rxbd->rx_bd_haddr = cpu_to_le64(mapping); in bnxt_alloc_rx_page()
1030 rxbd->rx_bd_opaque = sw_prod; in bnxt_alloc_rx_page()
1042 &cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)]; in bnxt_get_agg()
1050 struct bnxt_tpa_info *tpa_info = &rxr->rx_tpa[agg_id]; in bnxt_get_tpa_agg_p5()
1052 return &tpa_info->agg_arr[curr]; in bnxt_get_tpa_agg_p5()
1058 struct bnxt_napi *bnapi = cpr->bnapi; in bnxt_reuse_rx_agg_bufs()
1059 struct bnxt *bp = bnapi->bp; in bnxt_reuse_rx_agg_bufs()
1060 struct bnxt_rx_ring_info *rxr = bnapi->rx_ring; in bnxt_reuse_rx_agg_bufs()
1061 u16 prod = rxr->rx_agg_prod; in bnxt_reuse_rx_agg_bufs()
1062 u16 sw_prod = rxr->rx_sw_agg_prod; in bnxt_reuse_rx_agg_bufs()
1066 if ((bp->flags & BNXT_FLAG_CHIP_P5_PLUS) && tpa) in bnxt_reuse_rx_agg_bufs()
1080 cons = agg->rx_agg_cmp_opaque; in bnxt_reuse_rx_agg_bufs()
1081 __clear_bit(cons, rxr->rx_agg_bmap); in bnxt_reuse_rx_agg_bufs()
1083 if (unlikely(test_bit(sw_prod, rxr->rx_agg_bmap))) in bnxt_reuse_rx_agg_bufs()
1086 __set_bit(sw_prod, rxr->rx_agg_bmap); in bnxt_reuse_rx_agg_bufs()
1087 prod_rx_buf = &rxr->rx_agg_ring[sw_prod]; in bnxt_reuse_rx_agg_bufs()
1088 cons_rx_buf = &rxr->rx_agg_ring[cons]; in bnxt_reuse_rx_agg_bufs()
1091 * set cons_rx_buf->page to NULL first. in bnxt_reuse_rx_agg_bufs()
1093 page = cons_rx_buf->page; in bnxt_reuse_rx_agg_bufs()
1094 cons_rx_buf->page = NULL; in bnxt_reuse_rx_agg_bufs()
1095 prod_rx_buf->page = page; in bnxt_reuse_rx_agg_bufs()
1096 prod_rx_buf->offset = cons_rx_buf->offset; in bnxt_reuse_rx_agg_bufs()
1098 prod_rx_buf->mapping = cons_rx_buf->mapping; in bnxt_reuse_rx_agg_bufs()
1100 prod_bd = &rxr->rx_agg_desc_ring[RX_AGG_RING(bp, prod)][RX_IDX(prod)]; in bnxt_reuse_rx_agg_bufs()
1102 prod_bd->rx_bd_haddr = cpu_to_le64(cons_rx_buf->mapping); in bnxt_reuse_rx_agg_bufs()
1103 prod_bd->rx_bd_opaque = sw_prod; in bnxt_reuse_rx_agg_bufs()
1108 rxr->rx_agg_prod = prod; in bnxt_reuse_rx_agg_bufs()
1109 rxr->rx_sw_agg_prod = sw_prod; in bnxt_reuse_rx_agg_bufs()
1120 u16 prod = rxr->rx_prod; in bnxt_rx_multi_page_skb()
1129 dma_addr -= bp->rx_dma_offset; in bnxt_rx_multi_page_skb()
1130 dma_sync_single_for_cpu(&bp->pdev->dev, dma_addr, BNXT_RX_PAGE_SIZE, in bnxt_rx_multi_page_skb()
1131 bp->rx_dir); in bnxt_rx_multi_page_skb()
1132 skb = napi_build_skb(data_ptr - bp->rx_offset, BNXT_RX_PAGE_SIZE); in bnxt_rx_multi_page_skb()
1134 page_pool_recycle_direct(rxr->page_pool, page); in bnxt_rx_multi_page_skb()
1138 skb_reserve(skb, bp->rx_offset); in bnxt_rx_multi_page_skb()
1154 u16 prod = rxr->rx_prod; in bnxt_rx_page_skb()
1163 dma_addr -= bp->rx_dma_offset; in bnxt_rx_page_skb()
1164 dma_sync_single_for_cpu(&bp->pdev->dev, dma_addr, BNXT_RX_PAGE_SIZE, in bnxt_rx_page_skb()
1165 bp->rx_dir); in bnxt_rx_page_skb()
1168 payload = eth_get_headlen(bp->dev, data_ptr, len); in bnxt_rx_page_skb()
1170 skb = napi_alloc_skb(&rxr->bnapi->napi, payload); in bnxt_rx_page_skb()
1172 page_pool_recycle_direct(rxr->page_pool, page); in bnxt_rx_page_skb()
1177 off = (void *)data_ptr - page_address(page); in bnxt_rx_page_skb()
1179 memcpy(skb->data - NET_IP_ALIGN, data_ptr - NET_IP_ALIGN, in bnxt_rx_page_skb()
1182 frag = &skb_shinfo(skb)->frags[0]; in bnxt_rx_page_skb()
1185 skb->data_len -= payload; in bnxt_rx_page_skb()
1186 skb->tail += payload; in bnxt_rx_page_skb()
1197 u16 prod = rxr->rx_prod; in bnxt_rx_skb()
1207 skb = napi_build_skb(data, bp->rx_buf_size); in bnxt_rx_skb()
1208 dma_sync_single_for_cpu(&bp->pdev->dev, dma_addr, bp->rx_buf_use_size, in bnxt_rx_skb()
1209 bp->rx_dir); in bnxt_rx_skb()
1211 page_pool_free_va(rxr->head_pool, data, true); in bnxt_rx_skb()
1216 skb_reserve(skb, bp->rx_offset); in bnxt_rx_skb()
1227 struct bnxt_napi *bnapi = cpr->bnapi; in __bnxt_rx_agg_pages()
1228 struct pci_dev *pdev = bp->pdev; in __bnxt_rx_agg_pages()
1229 struct bnxt_rx_ring_info *rxr = bnapi->rx_ring; in __bnxt_rx_agg_pages()
1230 u16 prod = rxr->rx_agg_prod; in __bnxt_rx_agg_pages()
1234 if ((bp->flags & BNXT_FLAG_CHIP_P5_PLUS) && tpa) in __bnxt_rx_agg_pages()
1238 skb_frag_t *frag = &shinfo->frags[i]; in __bnxt_rx_agg_pages()
1249 cons = agg->rx_agg_cmp_opaque; in __bnxt_rx_agg_pages()
1250 frag_len = (le32_to_cpu(agg->rx_agg_cmp_len_flags_type) & in __bnxt_rx_agg_pages()
1253 cons_rx_buf = &rxr->rx_agg_ring[cons]; in __bnxt_rx_agg_pages()
1254 skb_frag_fill_page_desc(frag, cons_rx_buf->page, in __bnxt_rx_agg_pages()
1255 cons_rx_buf->offset, frag_len); in __bnxt_rx_agg_pages()
1256 shinfo->nr_frags = i + 1; in __bnxt_rx_agg_pages()
1257 __clear_bit(cons, rxr->rx_agg_bmap); in __bnxt_rx_agg_pages()
1263 mapping = cons_rx_buf->mapping; in __bnxt_rx_agg_pages()
1264 page = cons_rx_buf->page; in __bnxt_rx_agg_pages()
1265 cons_rx_buf->page = NULL; in __bnxt_rx_agg_pages()
1271 --shinfo->nr_frags; in __bnxt_rx_agg_pages()
1272 cons_rx_buf->page = page; in __bnxt_rx_agg_pages()
1277 rxr->rx_agg_prod = prod; in __bnxt_rx_agg_pages()
1278 bnxt_reuse_rx_agg_bufs(cpr, idx, i, agg_bufs - i, tpa); in __bnxt_rx_agg_pages()
1282 dma_sync_single_for_cpu(&pdev->dev, mapping, BNXT_RX_PAGE_SIZE, in __bnxt_rx_agg_pages()
1283 bp->rx_dir); in __bnxt_rx_agg_pages()
1288 rxr->rx_agg_prod = prod; in __bnxt_rx_agg_pages()
1308 skb->data_len += total_frag_len; in bnxt_rx_agg_pages_skb()
1309 skb->len += total_frag_len; in bnxt_rx_agg_pages_skb()
1310 skb->truesize += BNXT_RX_PAGE_SIZE * agg_bufs; in bnxt_rx_agg_pages_skb()
1323 shinfo->nr_frags = 0; in bnxt_rx_agg_pages_xdp()
1329 shinfo->nr_frags = agg_bufs; in bnxt_rx_agg_pages_xdp()
1330 shinfo->xdp_frags_size = total_frag_len; in bnxt_rx_agg_pages_xdp()
1344 &cpr->cp_desc_ring[CP_RING(last)][CP_IDX(last)]; in bnxt_agg_bufs_valid()
1352 struct bnxt *bp = bnapi->bp; in bnxt_copy_data()
1353 struct pci_dev *pdev = bp->pdev; in bnxt_copy_data()
1356 skb = napi_alloc_skb(&bnapi->napi, len); in bnxt_copy_data()
1360 dma_sync_single_for_cpu(&pdev->dev, mapping, bp->rx_copybreak, in bnxt_copy_data()
1361 bp->rx_dir); in bnxt_copy_data()
1363 memcpy(skb->data - NET_IP_ALIGN, data - NET_IP_ALIGN, in bnxt_copy_data()
1366 dma_sync_single_for_device(&pdev->dev, mapping, bp->rx_copybreak, in bnxt_copy_data()
1367 bp->rx_dir); in bnxt_copy_data()
1387 u8 *data = xdp->data; in bnxt_copy_xdp()
1390 len = xdp->data_end - xdp->data_meta; in bnxt_copy_xdp()
1391 metasize = xdp->data - xdp->data_meta; in bnxt_copy_xdp()
1392 data = xdp->data_meta; in bnxt_copy_xdp()
1416 agg_bufs = (le32_to_cpu(rxcmp->rx_cmp_misc_v1) & in bnxt_discard_rx()
1422 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_discard_rx()
1430 return -EBUSY; in bnxt_discard_rx()
1438 struct bnxt_tpa_idx_map *map = rxr->rx_tpa_idx_map; in bnxt_alloc_agg_idx()
1441 if (test_bit(idx, map->agg_idx_bmap)) in bnxt_alloc_agg_idx()
1442 idx = find_first_zero_bit(map->agg_idx_bmap, in bnxt_alloc_agg_idx()
1444 __set_bit(idx, map->agg_idx_bmap); in bnxt_alloc_agg_idx()
1445 map->agg_id_tbl[agg_id] = idx; in bnxt_alloc_agg_idx()
1451 struct bnxt_tpa_idx_map *map = rxr->rx_tpa_idx_map; in bnxt_free_agg_idx()
1453 __clear_bit(idx, map->agg_idx_bmap); in bnxt_free_agg_idx()
1458 struct bnxt_tpa_idx_map *map = rxr->rx_tpa_idx_map; in bnxt_lookup_agg_idx()
1460 return map->agg_id_tbl[agg_id]; in bnxt_lookup_agg_idx()
1467 tpa_info->cfa_code_valid = 1; in bnxt_tpa_metadata()
1468 tpa_info->cfa_code = TPA_START_CFA_CODE(tpa_start1); in bnxt_tpa_metadata()
1469 tpa_info->vlan_valid = 0; in bnxt_tpa_metadata()
1470 if (tpa_info->flags2 & RX_CMP_FLAGS2_META_FORMAT_VLAN) { in bnxt_tpa_metadata()
1471 tpa_info->vlan_valid = 1; in bnxt_tpa_metadata()
1472 tpa_info->metadata = in bnxt_tpa_metadata()
1473 le32_to_cpu(tpa_start1->rx_tpa_start_cmp_metadata); in bnxt_tpa_metadata()
1481 tpa_info->vlan_valid = 0; in bnxt_tpa_metadata_v2()
1486 tpa_info->vlan_valid = 1; in bnxt_tpa_metadata_v2()
1489 tpa_info->metadata = vlan_proto << 16 | in bnxt_tpa_metadata_v2()
1504 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in bnxt_tpa_start()
1510 cons = tpa_start->rx_tpa_start_cmp_opaque; in bnxt_tpa_start()
1511 prod = rxr->rx_prod; in bnxt_tpa_start()
1512 cons_rx_buf = &rxr->rx_buf_ring[cons]; in bnxt_tpa_start()
1513 prod_rx_buf = &rxr->rx_buf_ring[RING_RX(bp, prod)]; in bnxt_tpa_start()
1514 tpa_info = &rxr->rx_tpa[agg_id]; in bnxt_tpa_start()
1516 if (unlikely(cons != rxr->rx_next_cons || in bnxt_tpa_start()
1518 netdev_warn(bp->dev, "TPA cons %x, expected cons %x, error code %x\n", in bnxt_tpa_start()
1519 cons, rxr->rx_next_cons, in bnxt_tpa_start()
1524 prod_rx_buf->data = tpa_info->data; in bnxt_tpa_start()
1525 prod_rx_buf->data_ptr = tpa_info->data_ptr; in bnxt_tpa_start()
1527 mapping = tpa_info->mapping; in bnxt_tpa_start()
1528 prod_rx_buf->mapping = mapping; in bnxt_tpa_start()
1530 prod_bd = &rxr->rx_desc_ring[RX_RING(bp, prod)][RX_IDX(prod)]; in bnxt_tpa_start()
1532 prod_bd->rx_bd_haddr = cpu_to_le64(mapping); in bnxt_tpa_start()
1534 tpa_info->data = cons_rx_buf->data; in bnxt_tpa_start()
1535 tpa_info->data_ptr = cons_rx_buf->data_ptr; in bnxt_tpa_start()
1536 cons_rx_buf->data = NULL; in bnxt_tpa_start()
1537 tpa_info->mapping = cons_rx_buf->mapping; in bnxt_tpa_start()
1539 tpa_info->len = in bnxt_tpa_start()
1540 le32_to_cpu(tpa_start->rx_tpa_start_cmp_len_flags_type) >> in bnxt_tpa_start()
1543 tpa_info->hash_type = PKT_HASH_TYPE_L4; in bnxt_tpa_start()
1544 tpa_info->gso_type = SKB_GSO_TCPV4; in bnxt_tpa_start()
1546 tpa_info->gso_type = SKB_GSO_TCPV6; in bnxt_tpa_start()
1547 /* RSS profiles 1 and 3 with extract code 0 for inner 4-tuple */ in bnxt_tpa_start()
1550 tpa_info->gso_type = SKB_GSO_TCPV6; in bnxt_tpa_start()
1551 tpa_info->rss_hash = in bnxt_tpa_start()
1552 le32_to_cpu(tpa_start->rx_tpa_start_cmp_rss_hash); in bnxt_tpa_start()
1554 tpa_info->hash_type = PKT_HASH_TYPE_NONE; in bnxt_tpa_start()
1555 tpa_info->gso_type = 0; in bnxt_tpa_start()
1556 netif_warn(bp, rx_err, bp->dev, "TPA packet without valid hash\n"); in bnxt_tpa_start()
1558 tpa_info->flags2 = le32_to_cpu(tpa_start1->rx_tpa_start_cmp_flags2); in bnxt_tpa_start()
1559 tpa_info->hdr_info = le32_to_cpu(tpa_start1->rx_tpa_start_cmp_hdr_info); in bnxt_tpa_start()
1564 tpa_info->agg_count = 0; in bnxt_tpa_start()
1566 rxr->rx_prod = NEXT_RX(prod); in bnxt_tpa_start()
1568 rxr->rx_next_cons = RING_RX(bp, NEXT_RX(cons)); in bnxt_tpa_start()
1569 cons_rx_buf = &rxr->rx_buf_ring[cons]; in bnxt_tpa_start()
1571 bnxt_reuse_rx_data(rxr, cons, cons_rx_buf->data); in bnxt_tpa_start()
1572 rxr->rx_prod = NEXT_RX(rxr->rx_prod); in bnxt_tpa_start()
1573 cons_rx_buf->data = NULL; in bnxt_tpa_start()
1588 struct iphdr *iph = (struct iphdr *)skb->data; in bnxt_gro_tunnel()
1590 if (iph->protocol == IPPROTO_UDP) in bnxt_gro_tunnel()
1593 struct ipv6hdr *iph = (struct ipv6hdr *)skb->data; in bnxt_gro_tunnel()
1595 if (iph->nexthdr == IPPROTO_UDP) in bnxt_gro_tunnel()
1599 if (uh->check) in bnxt_gro_tunnel()
1600 skb_shinfo(skb)->gso_type |= SKB_GSO_UDP_TUNNEL_CSUM; in bnxt_gro_tunnel()
1602 skb_shinfo(skb)->gso_type |= SKB_GSO_UDP_TUNNEL; in bnxt_gro_tunnel()
1615 u32 hdr_info = tpa_info->hdr_info; in bnxt_gro_func_5731x()
1628 __be16 proto = *((__be16 *)(skb->data + inner_ip_off - in bnxt_gro_func_5731x()
1629 ETH_HLEN - 2)); in bnxt_gro_func_5731x()
1640 inner_ip_off -= 4; in bnxt_gro_func_5731x()
1641 inner_mac_off -= 4; in bnxt_gro_func_5731x()
1642 outer_ip_off -= 4; in bnxt_gro_func_5731x()
1645 nw_off = inner_ip_off - ETH_HLEN; in bnxt_gro_func_5731x()
1647 if (tpa_info->flags2 & RX_TPA_START_CMP_FLAGS2_IP_TYPE) { in bnxt_gro_func_5731x()
1651 len = skb->len - skb_transport_offset(skb); in bnxt_gro_func_5731x()
1653 th->check = ~tcp_v6_check(len, &iph->saddr, &iph->daddr, 0); in bnxt_gro_func_5731x()
1658 len = skb->len - skb_transport_offset(skb); in bnxt_gro_func_5731x()
1660 th->check = ~tcp_v4_check(len, iph->saddr, iph->daddr, 0); in bnxt_gro_func_5731x()
1664 __be16 proto = *((__be16 *)(skb->data + outer_ip_off - in bnxt_gro_func_5731x()
1665 ETH_HLEN - 2)); in bnxt_gro_func_5731x()
1679 u32 hdr_info = tpa_info->hdr_info; in bnxt_gro_func_5750x()
1686 nw_off = inner_ip_off - ETH_HLEN; in bnxt_gro_func_5750x()
1688 iphdr_len = (tpa_info->flags2 & RX_TPA_START_CMP_FLAGS2_IP_TYPE) ? in bnxt_gro_func_5750x()
1693 __be16 proto = *((__be16 *)(skb->data + outer_ip_off - in bnxt_gro_func_5750x()
1694 ETH_HLEN - 2)); in bnxt_gro_func_5750x()
1716 if (tpa_info->gso_type == SKB_GSO_TCPV4) { in bnxt_gro_func_5730x()
1719 nw_off = payload_off - BNXT_IPV4_HDR_SIZE - tcp_opt_len - in bnxt_gro_func_5730x()
1724 len = skb->len - skb_transport_offset(skb); in bnxt_gro_func_5730x()
1726 th->check = ~tcp_v4_check(len, iph->saddr, iph->daddr, 0); in bnxt_gro_func_5730x()
1727 } else if (tpa_info->gso_type == SKB_GSO_TCPV6) { in bnxt_gro_func_5730x()
1730 nw_off = payload_off - BNXT_IPV6_HDR_SIZE - tcp_opt_len - in bnxt_gro_func_5730x()
1735 len = skb->len - skb_transport_offset(skb); in bnxt_gro_func_5730x()
1737 th->check = ~tcp_v6_check(len, &iph->saddr, &iph->daddr, 0); in bnxt_gro_func_5730x()
1744 bnxt_gro_tunnel(skb, skb->protocol); in bnxt_gro_func_5730x()
1763 NAPI_GRO_CB(skb)->count = segs; in bnxt_gro_skb()
1764 skb_shinfo(skb)->gso_size = in bnxt_gro_skb()
1765 le32_to_cpu(tpa_end1->rx_tpa_end_cmp_seg_len); in bnxt_gro_skb()
1766 skb_shinfo(skb)->gso_type = tpa_info->gso_type; in bnxt_gro_skb()
1767 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_gro_skb()
1771 skb = bp->gro_func(tpa_info, payload_off, TPA_END_GRO_TS(tpa_end), skb); in bnxt_gro_skb()
1779 * netdev (vf-rep or PF) the packet is destined to.
1785 /* if vf-rep dev is NULL, the must belongs to the PF */ in bnxt_get_pkt_dev()
1786 return dev ? dev : bp->dev; in bnxt_get_pkt_dev()
1796 struct bnxt_napi *bnapi = cpr->bnapi; in bnxt_tpa_end()
1797 struct bnxt_rx_ring_info *rxr = bnapi->rx_ring; in bnxt_tpa_end()
1798 struct net_device *dev = bp->dev; in bnxt_tpa_end()
1808 if (unlikely(bnapi->in_reset)) { in bnxt_tpa_end()
1812 return ERR_PTR(-EBUSY); in bnxt_tpa_end()
1816 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in bnxt_tpa_end()
1820 tpa_info = &rxr->rx_tpa[agg_id]; in bnxt_tpa_end()
1821 if (unlikely(agg_bufs != tpa_info->agg_count)) { in bnxt_tpa_end()
1822 netdev_warn(bp->dev, "TPA end agg_buf %d != expected agg_bufs %d\n", in bnxt_tpa_end()
1823 agg_bufs, tpa_info->agg_count); in bnxt_tpa_end()
1824 agg_bufs = tpa_info->agg_count; in bnxt_tpa_end()
1826 tpa_info->agg_count = 0; in bnxt_tpa_end()
1830 gro = !!(bp->flags & BNXT_FLAG_GRO); in bnxt_tpa_end()
1834 tpa_info = &rxr->rx_tpa[agg_id]; in bnxt_tpa_end()
1838 return ERR_PTR(-EBUSY); in bnxt_tpa_end()
1845 data = tpa_info->data; in bnxt_tpa_end()
1846 data_ptr = tpa_info->data_ptr; in bnxt_tpa_end()
1848 len = tpa_info->len; in bnxt_tpa_end()
1849 mapping = tpa_info->mapping; in bnxt_tpa_end()
1854 netdev_warn(bp->dev, "TPA frags %d exceeded MAX_SKB_FRAGS %d\n", in bnxt_tpa_end()
1859 if (len <= bp->rx_copybreak) { in bnxt_tpa_end()
1863 cpr->sw_stats->rx.rx_oom_discards += 1; in bnxt_tpa_end()
1874 cpr->sw_stats->rx.rx_oom_discards += 1; in bnxt_tpa_end()
1878 tpa_info->data = new_data; in bnxt_tpa_end()
1879 tpa_info->data_ptr = new_data + bp->rx_offset; in bnxt_tpa_end()
1880 tpa_info->mapping = new_mapping; in bnxt_tpa_end()
1882 skb = napi_build_skb(data, bp->rx_buf_size); in bnxt_tpa_end()
1883 dma_sync_single_for_cpu(&bp->pdev->dev, mapping, in bnxt_tpa_end()
1884 bp->rx_buf_use_size, bp->rx_dir); in bnxt_tpa_end()
1887 page_pool_free_va(rxr->head_pool, data, true); in bnxt_tpa_end()
1889 cpr->sw_stats->rx.rx_oom_discards += 1; in bnxt_tpa_end()
1893 skb_reserve(skb, bp->rx_offset); in bnxt_tpa_end()
1901 cpr->sw_stats->rx.rx_oom_discards += 1; in bnxt_tpa_end()
1906 if (tpa_info->cfa_code_valid) in bnxt_tpa_end()
1907 dev = bnxt_get_pkt_dev(bp, tpa_info->cfa_code); in bnxt_tpa_end()
1908 skb->protocol = eth_type_trans(skb, dev); in bnxt_tpa_end()
1910 if (tpa_info->hash_type != PKT_HASH_TYPE_NONE) in bnxt_tpa_end()
1911 skb_set_hash(skb, tpa_info->rss_hash, tpa_info->hash_type); in bnxt_tpa_end()
1913 if (tpa_info->vlan_valid && in bnxt_tpa_end()
1914 (dev->features & BNXT_HW_FEATURE_VLAN_ALL_RX)) { in bnxt_tpa_end()
1915 __be16 vlan_proto = htons(tpa_info->metadata >> in bnxt_tpa_end()
1917 u16 vtag = tpa_info->metadata & RX_CMP_FLAGS2_METADATA_TCI_MASK; in bnxt_tpa_end()
1928 if (likely(tpa_info->flags2 & RX_TPA_START_CMP_FLAGS2_L4_CS_CALC)) { in bnxt_tpa_end()
1929 skb->ip_summed = CHECKSUM_UNNECESSARY; in bnxt_tpa_end()
1930 skb->csum_level = in bnxt_tpa_end()
1931 (tpa_info->flags2 & RX_CMP_FLAGS2_T_L4_CS_CALC) >> 3; in bnxt_tpa_end()
1947 tpa_info = &rxr->rx_tpa[agg_id]; in bnxt_tpa_agg()
1948 BUG_ON(tpa_info->agg_count >= MAX_SKB_FRAGS); in bnxt_tpa_agg()
1949 tpa_info->agg_arr[tpa_info->agg_count++] = *rx_agg; in bnxt_tpa_agg()
1957 if (skb->dev != bp->dev) { in bnxt_deliver_skb()
1958 /* this packet belongs to a vf-rep */ in bnxt_deliver_skb()
1962 skb_record_rx_queue(skb, bnapi->index); in bnxt_deliver_skb()
1963 napi_gro_receive(&bnapi->napi, skb); in bnxt_deliver_skb()
1969 u32 ts = le32_to_cpu(rxcmp1->rx_cmp_timestamp); in bnxt_rx_ts_valid()
1973 if (!bp->ptp_all_rx_tstamp || !ts || !BNXT_ALL_RX_TS_VALID(flags)) in bnxt_rx_ts_valid()
1989 __le32 flags2 = rxcmp1->rx_cmp_flags2; in bnxt_rx_vlan()
1995 meta_data = le32_to_cpu(rxcmp1->rx_cmp_meta_data); in bnxt_rx_vlan()
2041 * 1 - 1 packet successfully received
2042 * 0 - successful TPA_START, packet not completed yet
2043 * -EBUSY - completion ring does not have all the agg buffers yet
2044 * -ENOMEM - packet aborted due to out of memory
2045 * -EIO - packet aborted due to hw error indicated in BD
2050 struct bnxt_napi *bnapi = cpr->bnapi; in bnxt_rx_pkt()
2051 struct bnxt_rx_ring_info *rxr = bnapi->rx_ring; in bnxt_rx_pkt()
2052 struct net_device *dev = bp->dev; in bnxt_rx_pkt()
2071 &cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)]; in bnxt_rx_pkt()
2083 &cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)]; in bnxt_rx_pkt()
2086 return -EBUSY; in bnxt_rx_pkt()
2092 prod = rxr->rx_prod; in bnxt_rx_pkt()
2109 return -EBUSY; in bnxt_rx_pkt()
2111 rc = -ENOMEM; in bnxt_rx_pkt()
2120 cons = rxcmp->rx_cmp_opaque; in bnxt_rx_pkt()
2121 if (unlikely(cons != rxr->rx_next_cons)) { in bnxt_rx_pkt()
2125 if (rxr->rx_next_cons != 0xffff) in bnxt_rx_pkt()
2126 netdev_warn(bp->dev, "RX cons %x != expected cons %x\n", in bnxt_rx_pkt()
2127 cons, rxr->rx_next_cons); in bnxt_rx_pkt()
2133 rx_buf = &rxr->rx_buf_ring[cons]; in bnxt_rx_pkt()
2134 data = rx_buf->data; in bnxt_rx_pkt()
2135 data_ptr = rx_buf->data_ptr; in bnxt_rx_pkt()
2138 misc = le32_to_cpu(rxcmp->rx_cmp_misc_v1); in bnxt_rx_pkt()
2143 return -EBUSY; in bnxt_rx_pkt()
2150 rx_buf->data = NULL; in bnxt_rx_pkt()
2151 if (rxcmp1->rx_cmp_cfa_code_errors_v2 & RX_CMP_L2_ERRORS) { in bnxt_rx_pkt()
2152 u32 rx_err = le32_to_cpu(rxcmp1->rx_cmp_cfa_code_errors_v2); in bnxt_rx_pkt()
2159 rc = -EIO; in bnxt_rx_pkt()
2161 bnapi->cp_ring.sw_stats->rx.rx_buf_errors++; in bnxt_rx_pkt()
2162 if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS) && in bnxt_rx_pkt()
2163 !(bp->fw_cap & BNXT_FW_CAP_RING_MONITOR)) { in bnxt_rx_pkt()
2164 netdev_warn_once(bp->dev, "RX buffer error %x\n", in bnxt_rx_pkt()
2172 flags = le32_to_cpu(rxcmp->rx_cmp_len_flags_type); in bnxt_rx_pkt()
2174 dma_addr = rx_buf->mapping; in bnxt_rx_pkt()
2196 agg_bufs = sinfo->nr_frags; in bnxt_rx_pkt()
2202 if (len <= bp->rx_copybreak) { in bnxt_rx_pkt()
2221 if (rx_buf->data_ptr == data_ptr) in bnxt_rx_pkt()
2225 skb = bp->rx_skb_func(bp, rxr, cons, data, data_ptr, dma_addr, in bnxt_rx_pkt()
2238 rxr->page_pool, &xdp); in bnxt_rx_pkt()
2261 skb_set_hash(skb, le32_to_cpu(rxcmp->rx_cmp_rss_hash), type); in bnxt_rx_pkt()
2266 skb->protocol = eth_type_trans(skb, dev); in bnxt_rx_pkt()
2268 if (skb->dev->features & BNXT_HW_FEATURE_VLAN_ALL_RX) { in bnxt_rx_pkt()
2276 if (dev->features & NETIF_F_RXCSUM) { in bnxt_rx_pkt()
2277 skb->ip_summed = CHECKSUM_UNNECESSARY; in bnxt_rx_pkt()
2278 skb->csum_level = RX_CMP_ENCAP(rxcmp1); in bnxt_rx_pkt()
2281 if (rxcmp1->rx_cmp_cfa_code_errors_v2 & RX_CMP_L4_CS_ERR_BITS) { in bnxt_rx_pkt()
2282 if (dev->features & NETIF_F_RXCSUM) in bnxt_rx_pkt()
2283 bnapi->cp_ring.sw_stats->rx.rx_l4_csum_errors++; in bnxt_rx_pkt()
2288 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in bnxt_rx_pkt()
2292 struct bnxt_ptp_cfg *ptp = bp->ptp_cfg; in bnxt_rx_pkt()
2297 skb_hwtstamps(skb)->hwtstamp = ns_to_ktime(ns); in bnxt_rx_pkt()
2305 cpr->rx_packets += 1; in bnxt_rx_pkt()
2306 cpr->rx_bytes += len; in bnxt_rx_pkt()
2309 rxr->rx_prod = NEXT_RX(prod); in bnxt_rx_pkt()
2310 rxr->rx_next_cons = RING_RX(bp, NEXT_RX(cons)); in bnxt_rx_pkt()
2318 cpr->sw_stats->rx.rx_oom_discards += 1; in bnxt_rx_pkt()
2319 rc = -ENOMEM; in bnxt_rx_pkt()
2339 &cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)]; in bnxt_force_rx_discard()
2344 &cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)]; in bnxt_force_rx_discard()
2347 return -EBUSY; in bnxt_force_rx_discard()
2356 rxcmp1->rx_cmp_cfa_code_errors_v2 |= in bnxt_force_rx_discard()
2362 tpa_end1->rx_tpa_end_cmp_errors_v2 |= in bnxt_force_rx_discard()
2366 if (rc && rc != -EBUSY) in bnxt_force_rx_discard()
2367 cpr->sw_stats->rx.rx_netpoll_discards += 1; in bnxt_force_rx_discard()
2373 struct bnxt_fw_health *fw_health = bp->fw_health; in bnxt_fw_health_readl()
2374 u32 reg = fw_health->regs[reg_idx]; in bnxt_fw_health_readl()
2381 pci_read_config_dword(bp->pdev, reg_off, &val); in bnxt_fw_health_readl()
2384 reg_off = fw_health->mapped_regs[reg_idx]; in bnxt_fw_health_readl()
2387 val = readl(bp->bar0 + reg_off); in bnxt_fw_health_readl()
2390 val = readl(bp->bar1 + reg_off); in bnxt_fw_health_readl()
2394 val &= fw_health->fw_reset_inprog_reg_mask; in bnxt_fw_health_readl()
2402 for (i = 0; i < bp->rx_nr_rings; i++) { in bnxt_agg_ring_id_to_grp_idx()
2403 u16 grp_idx = bp->rx_ring[i].bnapi->index; in bnxt_agg_ring_id_to_grp_idx()
2406 grp_info = &bp->grp_info[grp_idx]; in bnxt_agg_ring_id_to_grp_idx()
2407 if (grp_info->agg_fw_ring_id == ring_id) in bnxt_agg_ring_id_to_grp_idx()
2417 if (bp->phy_flags & BNXT_PHY_FL_SPEEDS2) in bnxt_get_force_speed()
2418 return link_info->force_link_speed2; in bnxt_get_force_speed()
2419 if (link_info->req_signal_mode == BNXT_SIG_MODE_PAM4) in bnxt_get_force_speed()
2420 return link_info->force_pam4_link_speed; in bnxt_get_force_speed()
2421 return link_info->force_link_speed; in bnxt_get_force_speed()
2428 if (bp->phy_flags & BNXT_PHY_FL_SPEEDS2) { in bnxt_set_force_speed()
2429 link_info->req_link_speed = link_info->force_link_speed2; in bnxt_set_force_speed()
2430 link_info->req_signal_mode = BNXT_SIG_MODE_NRZ; in bnxt_set_force_speed()
2431 switch (link_info->req_link_speed) { in bnxt_set_force_speed()
2436 link_info->req_signal_mode = BNXT_SIG_MODE_PAM4; in bnxt_set_force_speed()
2441 link_info->req_signal_mode = BNXT_SIG_MODE_PAM4_112; in bnxt_set_force_speed()
2444 link_info->req_signal_mode = BNXT_SIG_MODE_NRZ; in bnxt_set_force_speed()
2448 link_info->req_link_speed = link_info->force_link_speed; in bnxt_set_force_speed()
2449 link_info->req_signal_mode = BNXT_SIG_MODE_NRZ; in bnxt_set_force_speed()
2450 if (link_info->force_pam4_link_speed) { in bnxt_set_force_speed()
2451 link_info->req_link_speed = link_info->force_pam4_link_speed; in bnxt_set_force_speed()
2452 link_info->req_signal_mode = BNXT_SIG_MODE_PAM4; in bnxt_set_force_speed()
2460 if (bp->phy_flags & BNXT_PHY_FL_SPEEDS2) { in bnxt_set_auto_speed()
2461 link_info->advertising = link_info->auto_link_speeds2; in bnxt_set_auto_speed()
2464 link_info->advertising = link_info->auto_link_speeds; in bnxt_set_auto_speed()
2465 link_info->advertising_pam4 = link_info->auto_pam4_link_speeds; in bnxt_set_auto_speed()
2472 if (bp->phy_flags & BNXT_PHY_FL_SPEEDS2) { in bnxt_force_speed_updated()
2473 if (link_info->req_link_speed != link_info->force_link_speed2) in bnxt_force_speed_updated()
2477 if (link_info->req_signal_mode == BNXT_SIG_MODE_NRZ && in bnxt_force_speed_updated()
2478 link_info->req_link_speed != link_info->force_link_speed) in bnxt_force_speed_updated()
2480 if (link_info->req_signal_mode == BNXT_SIG_MODE_PAM4 && in bnxt_force_speed_updated()
2481 link_info->req_link_speed != link_info->force_pam4_link_speed) in bnxt_force_speed_updated()
2490 if (bp->phy_flags & BNXT_PHY_FL_SPEEDS2) { in bnxt_auto_speed_updated()
2491 if (link_info->advertising != link_info->auto_link_speeds2) in bnxt_auto_speed_updated()
2495 if (link_info->advertising != link_info->auto_link_speeds || in bnxt_auto_speed_updated()
2496 link_info->advertising_pam4 != link_info->auto_pam4_link_speeds) in bnxt_auto_speed_updated()
2503 u32 flags = bp->ctx->ctx_arr[type].flags; in bnxt_bs_trace_avail()
2513 u16 trace_type = bnxt_bstore_to_trace[ctxm->type]; in bnxt_bs_trace_init()
2514 struct bnxt_ctx_pg_info *ctx_pg = ctxm->pg_info; in bnxt_bs_trace_init()
2519 if (ctxm->instance_bmap && ctxm->instance_bmap > 1) in bnxt_bs_trace_init()
2522 mem_size = ctxm->max_entries * ctxm->entry_size; in bnxt_bs_trace_init()
2526 last_pg = (pages - 1) & (MAX_CTX_PAGES - 1); in bnxt_bs_trace_init()
2527 magic_byte_offset = (rem_bytes ? rem_bytes : BNXT_PAGE_SIZE) - 1; in bnxt_bs_trace_init()
2530 bs_trace = &bp->bs_trace[trace_type]; in bnxt_bs_trace_init()
2531 bs_trace->ctx_type = ctxm->type; in bnxt_bs_trace_init()
2532 bs_trace->trace_type = trace_type; in bnxt_bs_trace_init()
2534 int last_pg_dir = rmem->nr_pages - 1; in bnxt_bs_trace_init()
2536 rmem_pg_tbl = &ctx_pg[0].ctx_pg_tbl[last_pg_dir]->ring_mem; in bnxt_bs_trace_init()
2537 bs_trace->magic_byte = rmem_pg_tbl->pg_arr[last_pg]; in bnxt_bs_trace_init()
2539 bs_trace->magic_byte = rmem->pg_arr[last_pg]; in bnxt_bs_trace_init()
2541 bs_trace->magic_byte += magic_byte_offset; in bnxt_bs_trace_init()
2542 *bs_trace->magic_byte = BNXT_TRACE_BUF_MAGIC_BYTE; in bnxt_bs_trace_init()
2579 …netdev_err(bp->dev, "1PPS: Received invalid signal on pin%lu from the external source. Please fix … in bnxt_event_error_report()
2583 netdev_warn(bp->dev, "Pause Storm detected!\n"); in bnxt_event_error_report()
2586 netdev_warn(bp->dev, "One or more MMIO doorbells dropped by the device!\n"); in bnxt_event_error_report()
2608 netdev_err(bp->dev, "Unknown Thermal threshold type event\n"); in bnxt_event_error_report()
2617 netdev_warn(bp->dev, "Chip temperature has gone %s the %s thermal threshold!\n", in bnxt_event_error_report()
2619 netdev_warn(bp->dev, "Temperature (In Celsius), Current: %lu, threshold: %lu\n", in bnxt_event_error_report()
2623 bp->thermal_threshold_type = type; in bnxt_event_error_report()
2624 set_bit(BNXT_THERMAL_THRESHOLD_SP_EVENT, &bp->sp_event); in bnxt_event_error_report()
2630 netdev_warn(bp->dev, "Speed change not supported with dual rate transceivers on this board\n"); in bnxt_event_error_report()
2633 netdev_err(bp->dev, "FW reported unknown error type %u\n", in bnxt_event_error_report()
2665 u16 event_id = le16_to_cpu(cmpl->event_id); in bnxt_async_event_process()
2666 u32 data1 = le32_to_cpu(cmpl->event_data1); in bnxt_async_event_process()
2667 u32 data2 = le32_to_cpu(cmpl->event_data2); in bnxt_async_event_process()
2669 netdev_dbg(bp->dev, "hwrm event 0x%x {0x%x, 0x%x}\n", in bnxt_async_event_process()
2675 struct bnxt_link_info *link_info = &bp->link_info; in bnxt_async_event_process()
2681 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED) && in bnxt_async_event_process()
2687 netdev_warn(bp->dev, "Link speed %d no longer supported\n", in bnxt_async_event_process()
2690 set_bit(BNXT_LINK_SPEED_CHNG_SP_EVENT, &bp->sp_event); in bnxt_async_event_process()
2695 set_bit(BNXT_LINK_CFG_CHANGE_SP_EVENT, &bp->sp_event); in bnxt_async_event_process()
2698 set_bit(BNXT_LINK_CHNG_SP_EVENT, &bp->sp_event); in bnxt_async_event_process()
2701 set_bit(BNXT_HWRM_PF_UNLOAD_SP_EVENT, &bp->sp_event); in bnxt_async_event_process()
2709 if (bp->pf.port_id != port_id) in bnxt_async_event_process()
2712 set_bit(BNXT_HWRM_PORT_MODULE_SP_EVENT, &bp->sp_event); in bnxt_async_event_process()
2718 set_bit(BNXT_RESET_TASK_SILENT_SP_EVENT, &bp->sp_event); in bnxt_async_event_process()
2723 if (!bp->fw_health) in bnxt_async_event_process()
2726 bp->fw_reset_timestamp = jiffies; in bnxt_async_event_process()
2727 bp->fw_reset_min_dsecs = cmpl->timestamp_lo; in bnxt_async_event_process()
2728 if (!bp->fw_reset_min_dsecs) in bnxt_async_event_process()
2729 bp->fw_reset_min_dsecs = BNXT_DFLT_FW_RST_MIN_DSECS; in bnxt_async_event_process()
2730 bp->fw_reset_max_dsecs = le16_to_cpu(cmpl->timestamp_hi); in bnxt_async_event_process()
2731 if (!bp->fw_reset_max_dsecs) in bnxt_async_event_process()
2732 bp->fw_reset_max_dsecs = BNXT_DFLT_FW_RST_MAX_DSECS; in bnxt_async_event_process()
2734 set_bit(BNXT_STATE_FW_ACTIVATE_RESET, &bp->state); in bnxt_async_event_process()
2737 bp->fw_health->fatalities++; in bnxt_async_event_process()
2738 set_bit(BNXT_STATE_FW_FATAL_COND, &bp->state); in bnxt_async_event_process()
2741 type_str = "Non-fatal"; in bnxt_async_event_process()
2742 bp->fw_health->survivals++; in bnxt_async_event_process()
2743 set_bit(BNXT_STATE_FW_NON_FATAL_COND, &bp->state); in bnxt_async_event_process()
2745 netif_warn(bp, hw, bp->dev, in bnxt_async_event_process()
2748 bp->fw_reset_min_dsecs * 100, in bnxt_async_event_process()
2749 bp->fw_reset_max_dsecs * 100); in bnxt_async_event_process()
2750 set_bit(BNXT_FW_RESET_NOTIFY_SP_EVENT, &bp->sp_event); in bnxt_async_event_process()
2754 struct bnxt_fw_health *fw_health = bp->fw_health; in bnxt_async_event_process()
2762 fw_health->enabled = false; in bnxt_async_event_process()
2763 netif_info(bp, drv, bp->dev, "Driver recovery watchdog is disabled\n"); in bnxt_async_event_process()
2766 fw_health->primary = EVENT_DATA1_RECOVERY_MASTER_FUNC(data1); in bnxt_async_event_process()
2767 fw_health->tmr_multiplier = in bnxt_async_event_process()
2768 DIV_ROUND_UP(fw_health->polling_dsecs * HZ, in bnxt_async_event_process()
2769 bp->current_interval * 10); in bnxt_async_event_process()
2770 fw_health->tmr_counter = fw_health->tmr_multiplier; in bnxt_async_event_process()
2771 if (!fw_health->enabled) in bnxt_async_event_process()
2772 fw_health->last_fw_heartbeat = in bnxt_async_event_process()
2774 fw_health->last_fw_reset_cnt = in bnxt_async_event_process()
2779 netif_info(bp, drv, bp->dev, in bnxt_async_event_process()
2781 fw_health->primary ? "primary" : "backup", status, in bnxt_async_event_process()
2782 status_desc, fw_health->last_fw_reset_cnt); in bnxt_async_event_process()
2783 if (!fw_health->enabled) { in bnxt_async_event_process()
2788 fw_health->enabled = true; in bnxt_async_event_process()
2793 netif_notice(bp, hw, bp->dev, in bnxt_async_event_process()
2801 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_async_event_process()
2804 netdev_warn(bp->dev, "Ring monitor event, ring type %lu id 0x%x\n", in bnxt_async_event_process()
2811 netdev_warn(bp->dev, "Unknown RX agg ring id 0x%x\n", in bnxt_async_event_process()
2815 rxr = bp->bnapi[grp_idx]->rx_ring; in bnxt_async_event_process()
2820 struct bnxt_fw_health *fw_health = bp->fw_health; in bnxt_async_event_process()
2822 netif_notice(bp, hw, bp->dev, in bnxt_async_event_process()
2826 fw_health->echo_req_data1 = data1; in bnxt_async_event_process()
2827 fw_health->echo_req_data2 = data2; in bnxt_async_event_process()
2828 set_bit(BNXT_FW_ECHO_REQUEST_SP_EVENT, &bp->sp_event); in bnxt_async_event_process()
2846 struct bnxt_ptp_cfg *ptp = bp->ptp_cfg; in bnxt_async_event_process()
2855 BNXT_PHC_BITS) | ptp->current_time); in bnxt_async_event_process()
2856 write_seqlock_irqsave(&ptp->ptp_lock, flags); in bnxt_async_event_process()
2858 write_sequnlock_irqrestore(&ptp->ptp_lock, flags); in bnxt_async_event_process()
2865 u16 seq_id = le32_to_cpu(cmpl->event_data2) & 0xffff; in bnxt_async_event_process()
2874 bnxt_bs_trace_check_wrap(&bp->bs_trace[type], offset); in bnxt_async_event_process()
2895 seq_id = le16_to_cpu(h_cmpl->sequence_id); in bnxt_hwrm_handler()
2900 vf_id = le16_to_cpu(fwd_req_cmpl->source_id); in bnxt_hwrm_handler()
2902 if ((vf_id < bp->pf.first_vf_id) || in bnxt_hwrm_handler()
2903 (vf_id >= bp->pf.first_vf_id + bp->pf.active_vfs)) { in bnxt_hwrm_handler()
2904 netdev_err(bp->dev, "Msg contains invalid VF id %x\n", in bnxt_hwrm_handler()
2906 return -EINVAL; in bnxt_hwrm_handler()
2909 set_bit(vf_id - bp->pf.first_vf_id, bp->pf.vf_event_bmap); in bnxt_hwrm_handler()
2927 struct bnxt_vnic_info *vnic = &bp->vnic_info[0]; in bnxt_vnic_is_active()
2929 return vnic->fw_vnic_id != INVALID_HW_RING_ID && vnic->mru > 0; in bnxt_vnic_is_active()
2935 struct bnxt *bp = bnapi->bp; in bnxt_msix()
2936 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; in bnxt_msix()
2937 u32 cons = RING_CMP(cpr->cp_raw_cons); in bnxt_msix()
2939 cpr->event_ctr++; in bnxt_msix()
2940 prefetch(&cpr->cp_desc_ring[CP_RING(cons)][CP_IDX(cons)]); in bnxt_msix()
2941 napi_schedule(&bnapi->napi); in bnxt_msix()
2947 u32 raw_cons = cpr->cp_raw_cons; in bnxt_has_work()
2951 txcmp = &cpr->cp_desc_ring[CP_RING(cons)][CP_IDX(cons)]; in bnxt_has_work()
2959 struct bnxt_napi *bnapi = cpr->bnapi; in __bnxt_poll_work()
2960 u32 raw_cons = cpr->cp_raw_cons; in __bnxt_poll_work()
2966 cpr->has_more_work = 0; in __bnxt_poll_work()
2967 cpr->had_work_done = 1; in __bnxt_poll_work()
2973 txcmp = &cpr->cp_desc_ring[CP_RING(cons)][CP_IDX(cons)]; in __bnxt_poll_work()
2985 u32 opaque = txcmp->tx_cmp_opaque; in __bnxt_poll_work()
2989 txr = bnapi->tx_ring[TX_OPAQUE_RING(opaque)]; in __bnxt_poll_work()
2992 txr->tx_hw_cons = TX_CMP_SQ_CONS_IDX(txcmp); in __bnxt_poll_work()
2994 txr->tx_hw_cons = TX_OPAQUE_PROD(bp, opaque); in __bnxt_poll_work()
2995 tx_freed = (txr->tx_hw_cons - txr->tx_cons) & in __bnxt_poll_work()
2996 bp->tx_ring_mask; in __bnxt_poll_work()
2998 if (unlikely(tx_freed >= bp->tx_wake_thresh)) { in __bnxt_poll_work()
3002 cpr->has_more_work = 1; in __bnxt_poll_work()
3016 /* Increment rx_pkts when rc is -ENOMEM to count towards in __bnxt_poll_work()
3021 else if (rc == -ENOMEM && budget) in __bnxt_poll_work()
3023 else if (rc == -EBUSY) /* partial completion */ in __bnxt_poll_work()
3033 cpr->has_more_work = 1; in __bnxt_poll_work()
3044 struct bnxt_tx_ring_info *txr = bnapi->tx_ring[0]; in __bnxt_poll_work()
3045 u16 prod = txr->tx_prod; in __bnxt_poll_work()
3050 bnxt_db_write_relaxed(bp, &txr->tx_db, prod); in __bnxt_poll_work()
3054 cpr->cp_raw_cons = raw_cons; in __bnxt_poll_work()
3055 bnapi->events |= event; in __bnxt_poll_work()
3062 if ((bnapi->events & BNXT_TX_CMP_EVENT) && !bnapi->tx_fault) in __bnxt_poll_work_done()
3063 bnapi->tx_int(bp, bnapi, budget); in __bnxt_poll_work_done()
3065 if ((bnapi->events & BNXT_RX_EVENT) && !(bnapi->in_reset)) { in __bnxt_poll_work_done()
3066 struct bnxt_rx_ring_info *rxr = bnapi->rx_ring; in __bnxt_poll_work_done()
3068 bnxt_db_write(bp, &rxr->rx_db, rxr->rx_prod); in __bnxt_poll_work_done()
3069 bnapi->events &= ~BNXT_RX_EVENT; in __bnxt_poll_work_done()
3071 if (bnapi->events & BNXT_AGG_EVENT) { in __bnxt_poll_work_done()
3072 struct bnxt_rx_ring_info *rxr = bnapi->rx_ring; in __bnxt_poll_work_done()
3074 bnxt_db_write(bp, &rxr->rx_agg_db, rxr->rx_agg_prod); in __bnxt_poll_work_done()
3075 bnapi->events &= ~BNXT_AGG_EVENT; in __bnxt_poll_work_done()
3082 struct bnxt_napi *bnapi = cpr->bnapi; in bnxt_poll_work()
3091 bnxt_db_cq(bp, &cpr->cp_db, cpr->cp_raw_cons); in bnxt_poll_work()
3100 struct bnxt *bp = bnapi->bp; in bnxt_poll_nitroa0()
3101 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; in bnxt_poll_nitroa0()
3102 struct bnxt_rx_ring_info *rxr = bnapi->rx_ring; in bnxt_poll_nitroa0()
3106 u32 raw_cons = cpr->cp_raw_cons; in bnxt_poll_nitroa0()
3115 txcmp = &cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)]; in bnxt_poll_nitroa0()
3128 &cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)]; in bnxt_poll_nitroa0()
3134 rxcmp1->rx_cmp_cfa_code_errors_v2 |= in bnxt_poll_nitroa0()
3138 if (likely(rc == -EIO) && budget) in bnxt_poll_nitroa0()
3140 else if (rc == -EBUSY) /* partial completion */ in bnxt_poll_nitroa0()
3148 netdev_err(bp->dev, in bnxt_poll_nitroa0()
3157 cpr->cp_raw_cons = raw_cons; in bnxt_poll_nitroa0()
3158 BNXT_DB_CQ(&cpr->cp_db, cpr->cp_raw_cons); in bnxt_poll_nitroa0()
3159 bnxt_db_write(bp, &rxr->rx_db, rxr->rx_prod); in bnxt_poll_nitroa0()
3162 bnxt_db_write(bp, &rxr->rx_agg_db, rxr->rx_agg_prod); in bnxt_poll_nitroa0()
3168 BNXT_DB_CQ_ARM(&cpr->cp_db, cpr->cp_raw_cons); in bnxt_poll_nitroa0()
3176 struct bnxt *bp = bnapi->bp; in bnxt_poll()
3177 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; in bnxt_poll()
3180 if (unlikely(test_bit(BNXT_STATE_FW_FATAL_COND, &bp->state))) { in bnxt_poll()
3185 work_done += bnxt_poll_work(bp, cpr, budget - work_done); in bnxt_poll()
3189 BNXT_DB_CQ_ARM(&cpr->cp_db, cpr->cp_raw_cons); in bnxt_poll()
3195 BNXT_DB_CQ_ARM(&cpr->cp_db, cpr->cp_raw_cons); in bnxt_poll()
3199 if ((bp->flags & BNXT_FLAG_DIM) && bnxt_vnic_is_active(bp)) { in bnxt_poll()
3202 dim_update_sample(cpr->event_ctr, in bnxt_poll()
3203 cpr->rx_packets, in bnxt_poll()
3204 cpr->rx_bytes, in bnxt_poll()
3206 net_dim(&cpr->dim, &dim_sample); in bnxt_poll()
3213 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; in __bnxt_poll_cqs()
3216 for (i = 0; i < cpr->cp_ring_count; i++) { in __bnxt_poll_cqs()
3217 struct bnxt_cp_ring_info *cpr2 = &cpr->cp_ring_arr[i]; in __bnxt_poll_cqs()
3219 if (cpr2->had_nqe_notify) { in __bnxt_poll_cqs()
3221 budget - work_done); in __bnxt_poll_cqs()
3222 cpr->has_more_work |= cpr2->has_more_work; in __bnxt_poll_cqs()
3231 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; in __bnxt_poll_cqs_done()
3234 for (i = 0; i < cpr->cp_ring_count; i++) { in __bnxt_poll_cqs_done()
3235 struct bnxt_cp_ring_info *cpr2 = &cpr->cp_ring_arr[i]; in __bnxt_poll_cqs_done()
3238 if (cpr2->had_work_done) { in __bnxt_poll_cqs_done()
3242 cpr2->had_nqe_notify = 0; in __bnxt_poll_cqs_done()
3243 tgl = cpr2->toggle; in __bnxt_poll_cqs_done()
3245 db = &cpr2->cp_db; in __bnxt_poll_cqs_done()
3247 db->db_key64 | dbr_type | DB_TOGGLE(tgl) | in __bnxt_poll_cqs_done()
3248 DB_RING_IDX(db, cpr2->cp_raw_cons), in __bnxt_poll_cqs_done()
3249 db->doorbell); in __bnxt_poll_cqs_done()
3250 cpr2->had_work_done = 0; in __bnxt_poll_cqs_done()
3259 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; in bnxt_poll_p5()
3261 u32 raw_cons = cpr->cp_raw_cons; in bnxt_poll_p5()
3262 struct bnxt *bp = bnapi->bp; in bnxt_poll_p5()
3267 if (unlikely(test_bit(BNXT_STATE_FW_FATAL_COND, &bp->state))) { in bnxt_poll_p5()
3271 if (cpr->has_more_work) { in bnxt_poll_p5()
3272 cpr->has_more_work = 0; in bnxt_poll_p5()
3279 nqcmp = &cpr->nq_desc_ring[CP_RING(cons)][CP_IDX(cons)]; in bnxt_poll_p5()
3282 if (cpr->has_more_work) in bnxt_poll_p5()
3287 cpr->cp_raw_cons = raw_cons; in bnxt_poll_p5()
3289 BNXT_DB_NQ_ARM_P5(&cpr->cp_db, in bnxt_poll_p5()
3290 cpr->cp_raw_cons); in bnxt_poll_p5()
3299 type = le16_to_cpu(nqcmp->type); in bnxt_poll_p5()
3301 u32 idx = le32_to_cpu(nqcmp->cq_handle_low); in bnxt_poll_p5()
3311 cpr2 = &cpr->cp_ring_arr[idx]; in bnxt_poll_p5()
3312 cpr2->had_nqe_notify = 1; in bnxt_poll_p5()
3313 cpr2->toggle = NQE_CN_TOGGLE(type); in bnxt_poll_p5()
3315 budget - work_done); in bnxt_poll_p5()
3316 cpr->has_more_work |= cpr2->has_more_work; in bnxt_poll_p5()
3323 if (raw_cons != cpr->cp_raw_cons) { in bnxt_poll_p5()
3324 cpr->cp_raw_cons = raw_cons; in bnxt_poll_p5()
3325 BNXT_DB_NQ_P5(&cpr->cp_db, raw_cons); in bnxt_poll_p5()
3328 cpr_rx = &cpr->cp_ring_arr[0]; in bnxt_poll_p5()
3329 if (cpr_rx->cp_ring_type == BNXT_NQ_HDL_TYPE_RX && in bnxt_poll_p5()
3330 (bp->flags & BNXT_FLAG_DIM) && bnxt_vnic_is_active(bp)) { in bnxt_poll_p5()
3333 dim_update_sample(cpr->event_ctr, in bnxt_poll_p5()
3334 cpr_rx->rx_packets, in bnxt_poll_p5()
3335 cpr_rx->rx_bytes, in bnxt_poll_p5()
3337 net_dim(&cpr->dim, &dim_sample); in bnxt_poll_p5()
3346 struct pci_dev *pdev = bp->pdev; in bnxt_free_one_tx_ring_skbs()
3348 max_idx = bp->tx_nr_pages * TX_DESC_CNT; in bnxt_free_one_tx_ring_skbs()
3351 struct bnxt_sw_tx_bd *tx_buf = &txr->tx_buf_ring[i]; in bnxt_free_one_tx_ring_skbs()
3355 if (idx < bp->tx_nr_rings_xdp && in bnxt_free_one_tx_ring_skbs()
3356 tx_buf->action == XDP_REDIRECT) { in bnxt_free_one_tx_ring_skbs()
3357 dma_unmap_single(&pdev->dev, in bnxt_free_one_tx_ring_skbs()
3361 xdp_return_frame(tx_buf->xdpf); in bnxt_free_one_tx_ring_skbs()
3362 tx_buf->action = 0; in bnxt_free_one_tx_ring_skbs()
3363 tx_buf->xdpf = NULL; in bnxt_free_one_tx_ring_skbs()
3368 skb = tx_buf->skb; in bnxt_free_one_tx_ring_skbs()
3374 tx_buf->skb = NULL; in bnxt_free_one_tx_ring_skbs()
3376 if (tx_buf->is_push) { in bnxt_free_one_tx_ring_skbs()
3382 dma_unmap_single(&pdev->dev, in bnxt_free_one_tx_ring_skbs()
3387 last = tx_buf->nr_frags; in bnxt_free_one_tx_ring_skbs()
3390 int ring_idx = i & bp->tx_ring_mask; in bnxt_free_one_tx_ring_skbs()
3391 skb_frag_t *frag = &skb_shinfo(skb)->frags[j]; in bnxt_free_one_tx_ring_skbs()
3393 tx_buf = &txr->tx_buf_ring[ring_idx]; in bnxt_free_one_tx_ring_skbs()
3394 dma_unmap_page(&pdev->dev, in bnxt_free_one_tx_ring_skbs()
3400 netdev_tx_reset_queue(netdev_get_tx_queue(bp->dev, idx)); in bnxt_free_one_tx_ring_skbs()
3407 if (!bp->tx_ring) in bnxt_free_tx_skbs()
3410 for (i = 0; i < bp->tx_nr_rings; i++) { in bnxt_free_tx_skbs()
3411 struct bnxt_tx_ring_info *txr = &bp->tx_ring[i]; in bnxt_free_tx_skbs()
3413 if (!txr->tx_buf_ring) in bnxt_free_tx_skbs()
3419 if (bp->ptp_cfg && !(bp->fw_cap & BNXT_FW_CAP_TX_TS_CMP)) in bnxt_free_tx_skbs()
3420 bnxt_ptp_free_txts_skbs(bp->ptp_cfg); in bnxt_free_tx_skbs()
3427 max_idx = bp->rx_nr_pages * RX_DESC_CNT; in bnxt_free_one_rx_ring()
3430 struct bnxt_sw_rx_bd *rx_buf = &rxr->rx_buf_ring[i]; in bnxt_free_one_rx_ring()
3431 void *data = rx_buf->data; in bnxt_free_one_rx_ring()
3436 rx_buf->data = NULL; in bnxt_free_one_rx_ring()
3438 page_pool_recycle_direct(rxr->page_pool, data); in bnxt_free_one_rx_ring()
3440 page_pool_free_va(rxr->head_pool, data, true); in bnxt_free_one_rx_ring()
3448 max_idx = bp->rx_agg_nr_pages * RX_DESC_CNT; in bnxt_free_one_rx_agg_ring()
3451 struct bnxt_sw_rx_agg_bd *rx_agg_buf = &rxr->rx_agg_ring[i]; in bnxt_free_one_rx_agg_ring()
3452 struct page *page = rx_agg_buf->page; in bnxt_free_one_rx_agg_ring()
3457 rx_agg_buf->page = NULL; in bnxt_free_one_rx_agg_ring()
3458 __clear_bit(i, rxr->rx_agg_bmap); in bnxt_free_one_rx_agg_ring()
3460 page_pool_recycle_direct(rxr->page_pool, page); in bnxt_free_one_rx_agg_ring()
3469 for (i = 0; i < bp->max_tpa; i++) { in bnxt_free_one_tpa_info_data()
3470 struct bnxt_tpa_info *tpa_info = &rxr->rx_tpa[i]; in bnxt_free_one_tpa_info_data()
3471 u8 *data = tpa_info->data; in bnxt_free_one_tpa_info_data()
3476 tpa_info->data = NULL; in bnxt_free_one_tpa_info_data()
3477 page_pool_free_va(rxr->head_pool, data, false); in bnxt_free_one_tpa_info_data()
3486 if (!rxr->rx_tpa) in bnxt_free_one_rx_ring_skbs()
3492 if (!rxr->rx_buf_ring) in bnxt_free_one_rx_ring_skbs()
3498 if (!rxr->rx_agg_ring) in bnxt_free_one_rx_ring_skbs()
3504 map = rxr->rx_tpa_idx_map; in bnxt_free_one_rx_ring_skbs()
3506 memset(map->agg_idx_bmap, 0, sizeof(map->agg_idx_bmap)); in bnxt_free_one_rx_ring_skbs()
3513 if (!bp->rx_ring) in bnxt_free_rx_skbs()
3516 for (i = 0; i < bp->rx_nr_rings; i++) in bnxt_free_rx_skbs()
3517 bnxt_free_one_rx_ring_skbs(bp, &bp->rx_ring[i]); in bnxt_free_rx_skbs()
3528 u8 init_val = ctxm->init_value; in bnxt_init_ctx_mem()
3529 u16 offset = ctxm->init_offset; in bnxt_init_ctx_mem()
3539 for (i = 0; i < len; i += ctxm->entry_size) in bnxt_init_ctx_mem()
3550 head_page = head / rmem->page_size; in __bnxt_copy_ring()
3551 source_offset = head % rmem->page_size; in __bnxt_copy_ring()
3552 total_len = (tail - head) & MAX_CTX_BYTES_MASK; in __bnxt_copy_ring()
3556 max_bytes = (rmem->nr_pages - start_idx) * rmem->page_size - in __bnxt_copy_ring()
3562 len = min((size_t)(rmem->page_size - source_offset), rem_len); in __bnxt_copy_ring()
3564 memcpy(buf + offset, rmem->pg_arr[i] + source_offset, in __bnxt_copy_ring()
3567 rem_len -= len; in __bnxt_copy_ring()
3574 struct pci_dev *pdev = bp->pdev; in bnxt_free_ring()
3577 if (!rmem->pg_arr) in bnxt_free_ring()
3580 for (i = 0; i < rmem->nr_pages; i++) { in bnxt_free_ring()
3581 if (!rmem->pg_arr[i]) in bnxt_free_ring()
3584 dma_free_coherent(&pdev->dev, rmem->page_size, in bnxt_free_ring()
3585 rmem->pg_arr[i], rmem->dma_arr[i]); in bnxt_free_ring()
3587 rmem->pg_arr[i] = NULL; in bnxt_free_ring()
3590 if (rmem->pg_tbl) { in bnxt_free_ring()
3591 size_t pg_tbl_size = rmem->nr_pages * 8; in bnxt_free_ring()
3593 if (rmem->flags & BNXT_RMEM_USE_FULL_PAGE_FLAG) in bnxt_free_ring()
3594 pg_tbl_size = rmem->page_size; in bnxt_free_ring()
3595 dma_free_coherent(&pdev->dev, pg_tbl_size, in bnxt_free_ring()
3596 rmem->pg_tbl, rmem->pg_tbl_map); in bnxt_free_ring()
3597 rmem->pg_tbl = NULL; in bnxt_free_ring()
3599 if (rmem->vmem_size && *rmem->vmem) { in bnxt_free_ring()
3600 vfree(*rmem->vmem); in bnxt_free_ring()
3601 *rmem->vmem = NULL; in bnxt_free_ring()
3607 struct pci_dev *pdev = bp->pdev; in bnxt_alloc_ring()
3611 if (rmem->flags & (BNXT_RMEM_VALID_PTE_FLAG | BNXT_RMEM_RING_PTE_FLAG)) in bnxt_alloc_ring()
3613 if ((rmem->nr_pages > 1 || rmem->depth > 0) && !rmem->pg_tbl) { in bnxt_alloc_ring()
3614 size_t pg_tbl_size = rmem->nr_pages * 8; in bnxt_alloc_ring()
3616 if (rmem->flags & BNXT_RMEM_USE_FULL_PAGE_FLAG) in bnxt_alloc_ring()
3617 pg_tbl_size = rmem->page_size; in bnxt_alloc_ring()
3618 rmem->pg_tbl = dma_alloc_coherent(&pdev->dev, pg_tbl_size, in bnxt_alloc_ring()
3619 &rmem->pg_tbl_map, in bnxt_alloc_ring()
3621 if (!rmem->pg_tbl) in bnxt_alloc_ring()
3622 return -ENOMEM; in bnxt_alloc_ring()
3625 for (i = 0; i < rmem->nr_pages; i++) { in bnxt_alloc_ring()
3628 rmem->pg_arr[i] = dma_alloc_coherent(&pdev->dev, in bnxt_alloc_ring()
3629 rmem->page_size, in bnxt_alloc_ring()
3630 &rmem->dma_arr[i], in bnxt_alloc_ring()
3632 if (!rmem->pg_arr[i]) in bnxt_alloc_ring()
3633 return -ENOMEM; in bnxt_alloc_ring()
3635 if (rmem->ctx_mem) in bnxt_alloc_ring()
3636 bnxt_init_ctx_mem(rmem->ctx_mem, rmem->pg_arr[i], in bnxt_alloc_ring()
3637 rmem->page_size); in bnxt_alloc_ring()
3638 if (rmem->nr_pages > 1 || rmem->depth > 0) { in bnxt_alloc_ring()
3639 if (i == rmem->nr_pages - 2 && in bnxt_alloc_ring()
3640 (rmem->flags & BNXT_RMEM_RING_PTE_FLAG)) in bnxt_alloc_ring()
3642 else if (i == rmem->nr_pages - 1 && in bnxt_alloc_ring()
3643 (rmem->flags & BNXT_RMEM_RING_PTE_FLAG)) in bnxt_alloc_ring()
3645 rmem->pg_tbl[i] = in bnxt_alloc_ring()
3646 cpu_to_le64(rmem->dma_arr[i] | extra_bits); in bnxt_alloc_ring()
3650 if (rmem->vmem_size) { in bnxt_alloc_ring()
3651 *rmem->vmem = vzalloc(rmem->vmem_size); in bnxt_alloc_ring()
3652 if (!(*rmem->vmem)) in bnxt_alloc_ring()
3653 return -ENOMEM; in bnxt_alloc_ring()
3663 kfree(rxr->rx_tpa_idx_map); in bnxt_free_one_tpa_info()
3664 rxr->rx_tpa_idx_map = NULL; in bnxt_free_one_tpa_info()
3665 if (rxr->rx_tpa) { in bnxt_free_one_tpa_info()
3666 for (i = 0; i < bp->max_tpa; i++) { in bnxt_free_one_tpa_info()
3667 kfree(rxr->rx_tpa[i].agg_arr); in bnxt_free_one_tpa_info()
3668 rxr->rx_tpa[i].agg_arr = NULL; in bnxt_free_one_tpa_info()
3671 kfree(rxr->rx_tpa); in bnxt_free_one_tpa_info()
3672 rxr->rx_tpa = NULL; in bnxt_free_one_tpa_info()
3679 for (i = 0; i < bp->rx_nr_rings; i++) { in bnxt_free_tpa_info()
3680 struct bnxt_rx_ring_info *rxr = &bp->rx_ring[i]; in bnxt_free_tpa_info()
3692 rxr->rx_tpa = kcalloc(bp->max_tpa, sizeof(struct bnxt_tpa_info), in bnxt_alloc_one_tpa_info()
3694 if (!rxr->rx_tpa) in bnxt_alloc_one_tpa_info()
3695 return -ENOMEM; in bnxt_alloc_one_tpa_info()
3697 if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS)) in bnxt_alloc_one_tpa_info()
3699 for (i = 0; i < bp->max_tpa; i++) { in bnxt_alloc_one_tpa_info()
3702 return -ENOMEM; in bnxt_alloc_one_tpa_info()
3703 rxr->rx_tpa[i].agg_arr = agg; in bnxt_alloc_one_tpa_info()
3705 rxr->rx_tpa_idx_map = kzalloc(sizeof(*rxr->rx_tpa_idx_map), in bnxt_alloc_one_tpa_info()
3707 if (!rxr->rx_tpa_idx_map) in bnxt_alloc_one_tpa_info()
3708 return -ENOMEM; in bnxt_alloc_one_tpa_info()
3717 bp->max_tpa = MAX_TPA; in bnxt_alloc_tpa_info()
3718 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in bnxt_alloc_tpa_info()
3719 if (!bp->max_tpa_v2) in bnxt_alloc_tpa_info()
3721 bp->max_tpa = max_t(u16, bp->max_tpa_v2, MAX_TPA_P5); in bnxt_alloc_tpa_info()
3724 for (i = 0; i < bp->rx_nr_rings; i++) { in bnxt_alloc_tpa_info()
3725 struct bnxt_rx_ring_info *rxr = &bp->rx_ring[i]; in bnxt_alloc_tpa_info()
3738 if (!bp->rx_ring) in bnxt_free_rx_rings()
3742 for (i = 0; i < bp->rx_nr_rings; i++) { in bnxt_free_rx_rings()
3743 struct bnxt_rx_ring_info *rxr = &bp->rx_ring[i]; in bnxt_free_rx_rings()
3746 if (rxr->xdp_prog) in bnxt_free_rx_rings()
3747 bpf_prog_put(rxr->xdp_prog); in bnxt_free_rx_rings()
3749 if (xdp_rxq_info_is_reg(&rxr->xdp_rxq)) in bnxt_free_rx_rings()
3750 xdp_rxq_info_unreg(&rxr->xdp_rxq); in bnxt_free_rx_rings()
3752 page_pool_destroy(rxr->page_pool); in bnxt_free_rx_rings()
3754 page_pool_destroy(rxr->head_pool); in bnxt_free_rx_rings()
3755 rxr->page_pool = rxr->head_pool = NULL; in bnxt_free_rx_rings()
3757 kfree(rxr->rx_agg_bmap); in bnxt_free_rx_rings()
3758 rxr->rx_agg_bmap = NULL; in bnxt_free_rx_rings()
3760 ring = &rxr->rx_ring_struct; in bnxt_free_rx_rings()
3761 bnxt_free_ring(bp, &ring->ring_mem); in bnxt_free_rx_rings()
3763 ring = &rxr->rx_agg_ring_struct; in bnxt_free_rx_rings()
3764 bnxt_free_ring(bp, &ring->ring_mem); in bnxt_free_rx_rings()
3775 pp.pool_size = bp->rx_agg_ring_size; in bnxt_alloc_rx_page_pool()
3777 pp.pool_size += bp->rx_ring_size; in bnxt_alloc_rx_page_pool()
3779 pp.napi = &rxr->bnapi->napi; in bnxt_alloc_rx_page_pool()
3780 pp.netdev = bp->dev; in bnxt_alloc_rx_page_pool()
3781 pp.dev = &bp->pdev->dev; in bnxt_alloc_rx_page_pool()
3782 pp.dma_dir = bp->rx_dir; in bnxt_alloc_rx_page_pool()
3789 rxr->page_pool = pool; in bnxt_alloc_rx_page_pool()
3792 pp.pool_size = max(bp->rx_ring_size, 1024); in bnxt_alloc_rx_page_pool()
3797 rxr->head_pool = pool; in bnxt_alloc_rx_page_pool()
3802 page_pool_destroy(rxr->page_pool); in bnxt_alloc_rx_page_pool()
3803 rxr->page_pool = NULL; in bnxt_alloc_rx_page_pool()
3811 rxr->rx_agg_bmap_size = bp->rx_agg_ring_mask + 1; in bnxt_alloc_rx_agg_bmap()
3812 mem_size = rxr->rx_agg_bmap_size / 8; in bnxt_alloc_rx_agg_bmap()
3813 rxr->rx_agg_bmap = kzalloc(mem_size, GFP_KERNEL); in bnxt_alloc_rx_agg_bmap()
3814 if (!rxr->rx_agg_bmap) in bnxt_alloc_rx_agg_bmap()
3815 return -ENOMEM; in bnxt_alloc_rx_agg_bmap()
3822 int numa_node = dev_to_node(&bp->pdev->dev); in bnxt_alloc_rx_rings()
3825 if (!bp->rx_ring) in bnxt_alloc_rx_rings()
3826 return -ENOMEM; in bnxt_alloc_rx_rings()
3828 if (bp->flags & BNXT_FLAG_AGG_RINGS) in bnxt_alloc_rx_rings()
3831 for (i = 0; i < bp->rx_nr_rings; i++) { in bnxt_alloc_rx_rings()
3832 struct bnxt_rx_ring_info *rxr = &bp->rx_ring[i]; in bnxt_alloc_rx_rings()
3836 ring = &rxr->rx_ring_struct; in bnxt_alloc_rx_rings()
3840 netdev_dbg(bp->dev, "Allocating page pool for rx_ring[%d] on numa_node: %d\n", in bnxt_alloc_rx_rings()
3846 rc = xdp_rxq_info_reg(&rxr->xdp_rxq, bp->dev, i, 0); in bnxt_alloc_rx_rings()
3850 rc = xdp_rxq_info_reg_mem_model(&rxr->xdp_rxq, in bnxt_alloc_rx_rings()
3852 rxr->page_pool); in bnxt_alloc_rx_rings()
3854 xdp_rxq_info_unreg(&rxr->xdp_rxq); in bnxt_alloc_rx_rings()
3858 rc = bnxt_alloc_ring(bp, &ring->ring_mem); in bnxt_alloc_rx_rings()
3862 ring->grp_idx = i; in bnxt_alloc_rx_rings()
3864 ring = &rxr->rx_agg_ring_struct; in bnxt_alloc_rx_rings()
3865 rc = bnxt_alloc_ring(bp, &ring->ring_mem); in bnxt_alloc_rx_rings()
3869 ring->grp_idx = i; in bnxt_alloc_rx_rings()
3875 if (bp->flags & BNXT_FLAG_TPA) in bnxt_alloc_rx_rings()
3883 struct pci_dev *pdev = bp->pdev; in bnxt_free_tx_rings()
3885 if (!bp->tx_ring) in bnxt_free_tx_rings()
3888 for (i = 0; i < bp->tx_nr_rings; i++) { in bnxt_free_tx_rings()
3889 struct bnxt_tx_ring_info *txr = &bp->tx_ring[i]; in bnxt_free_tx_rings()
3892 if (txr->tx_push) { in bnxt_free_tx_rings()
3893 dma_free_coherent(&pdev->dev, bp->tx_push_size, in bnxt_free_tx_rings()
3894 txr->tx_push, txr->tx_push_mapping); in bnxt_free_tx_rings()
3895 txr->tx_push = NULL; in bnxt_free_tx_rings()
3898 ring = &txr->tx_ring_struct; in bnxt_free_tx_rings()
3900 bnxt_free_ring(bp, &ring->ring_mem); in bnxt_free_tx_rings()
3905 ((tc) * (bp)->tx_nr_rings_per_tc)
3908 ((tx) % (bp)->tx_nr_rings_per_tc)
3911 ((tx) / (bp)->tx_nr_rings_per_tc)
3916 struct pci_dev *pdev = bp->pdev; in bnxt_alloc_tx_rings()
3918 bp->tx_push_size = 0; in bnxt_alloc_tx_rings()
3919 if (bp->tx_push_thresh) { in bnxt_alloc_tx_rings()
3923 bp->tx_push_thresh); in bnxt_alloc_tx_rings()
3927 bp->tx_push_thresh = 0; in bnxt_alloc_tx_rings()
3930 bp->tx_push_size = push_size; in bnxt_alloc_tx_rings()
3933 for (i = 0, j = 0; i < bp->tx_nr_rings; i++) { in bnxt_alloc_tx_rings()
3934 struct bnxt_tx_ring_info *txr = &bp->tx_ring[i]; in bnxt_alloc_tx_rings()
3938 ring = &txr->tx_ring_struct; in bnxt_alloc_tx_rings()
3940 rc = bnxt_alloc_ring(bp, &ring->ring_mem); in bnxt_alloc_tx_rings()
3944 ring->grp_idx = txr->bnapi->index; in bnxt_alloc_tx_rings()
3945 if (bp->tx_push_size) { in bnxt_alloc_tx_rings()
3948 /* One pre-allocated DMA buffer to backup in bnxt_alloc_tx_rings()
3951 txr->tx_push = dma_alloc_coherent(&pdev->dev, in bnxt_alloc_tx_rings()
3952 bp->tx_push_size, in bnxt_alloc_tx_rings()
3953 &txr->tx_push_mapping, in bnxt_alloc_tx_rings()
3956 if (!txr->tx_push) in bnxt_alloc_tx_rings()
3957 return -ENOMEM; in bnxt_alloc_tx_rings()
3959 mapping = txr->tx_push_mapping + in bnxt_alloc_tx_rings()
3961 txr->data_mapping = cpu_to_le64(mapping); in bnxt_alloc_tx_rings()
3963 qidx = bp->tc_to_qidx[j]; in bnxt_alloc_tx_rings()
3964 ring->queue_id = bp->q_info[qidx].queue_id; in bnxt_alloc_tx_rings()
3965 spin_lock_init(&txr->xdp_tx_lock); in bnxt_alloc_tx_rings()
3966 if (i < bp->tx_nr_rings_xdp) in bnxt_alloc_tx_rings()
3968 if (BNXT_RING_TO_TC_OFF(bp, i) == (bp->tx_nr_rings_per_tc - 1)) in bnxt_alloc_tx_rings()
3976 struct bnxt_ring_struct *ring = &cpr->cp_ring_struct; in bnxt_free_cp_arrays()
3978 kfree(cpr->cp_desc_ring); in bnxt_free_cp_arrays()
3979 cpr->cp_desc_ring = NULL; in bnxt_free_cp_arrays()
3980 ring->ring_mem.pg_arr = NULL; in bnxt_free_cp_arrays()
3981 kfree(cpr->cp_desc_mapping); in bnxt_free_cp_arrays()
3982 cpr->cp_desc_mapping = NULL; in bnxt_free_cp_arrays()
3983 ring->ring_mem.dma_arr = NULL; in bnxt_free_cp_arrays()
3988 cpr->cp_desc_ring = kcalloc(n, sizeof(*cpr->cp_desc_ring), GFP_KERNEL); in bnxt_alloc_cp_arrays()
3989 if (!cpr->cp_desc_ring) in bnxt_alloc_cp_arrays()
3990 return -ENOMEM; in bnxt_alloc_cp_arrays()
3991 cpr->cp_desc_mapping = kcalloc(n, sizeof(*cpr->cp_desc_mapping), in bnxt_alloc_cp_arrays()
3993 if (!cpr->cp_desc_mapping) in bnxt_alloc_cp_arrays()
3994 return -ENOMEM; in bnxt_alloc_cp_arrays()
4002 if (!bp->bnapi) in bnxt_free_all_cp_arrays()
4004 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_free_all_cp_arrays()
4005 struct bnxt_napi *bnapi = bp->bnapi[i]; in bnxt_free_all_cp_arrays()
4009 bnxt_free_cp_arrays(&bnapi->cp_ring); in bnxt_free_all_cp_arrays()
4015 int i, n = bp->cp_nr_pages; in bnxt_alloc_all_cp_arrays()
4017 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_alloc_all_cp_arrays()
4018 struct bnxt_napi *bnapi = bp->bnapi[i]; in bnxt_alloc_all_cp_arrays()
4023 rc = bnxt_alloc_cp_arrays(&bnapi->cp_ring, n); in bnxt_alloc_all_cp_arrays()
4034 if (!bp->bnapi) in bnxt_free_cp_rings()
4037 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_free_cp_rings()
4038 struct bnxt_napi *bnapi = bp->bnapi[i]; in bnxt_free_cp_rings()
4046 cpr = &bnapi->cp_ring; in bnxt_free_cp_rings()
4047 ring = &cpr->cp_ring_struct; in bnxt_free_cp_rings()
4049 bnxt_free_ring(bp, &ring->ring_mem); in bnxt_free_cp_rings()
4051 if (!cpr->cp_ring_arr) in bnxt_free_cp_rings()
4054 for (j = 0; j < cpr->cp_ring_count; j++) { in bnxt_free_cp_rings()
4055 struct bnxt_cp_ring_info *cpr2 = &cpr->cp_ring_arr[j]; in bnxt_free_cp_rings()
4057 ring = &cpr2->cp_ring_struct; in bnxt_free_cp_rings()
4058 bnxt_free_ring(bp, &ring->ring_mem); in bnxt_free_cp_rings()
4061 kfree(cpr->cp_ring_arr); in bnxt_free_cp_rings()
4062 cpr->cp_ring_arr = NULL; in bnxt_free_cp_rings()
4063 cpr->cp_ring_count = 0; in bnxt_free_cp_rings()
4074 rc = bnxt_alloc_cp_arrays(cpr, bp->cp_nr_pages); in bnxt_alloc_cp_sub_ring()
4077 return -ENOMEM; in bnxt_alloc_cp_sub_ring()
4079 ring = &cpr->cp_ring_struct; in bnxt_alloc_cp_sub_ring()
4080 rmem = &ring->ring_mem; in bnxt_alloc_cp_sub_ring()
4081 rmem->nr_pages = bp->cp_nr_pages; in bnxt_alloc_cp_sub_ring()
4082 rmem->page_size = HW_CMPD_RING_SIZE; in bnxt_alloc_cp_sub_ring()
4083 rmem->pg_arr = (void **)cpr->cp_desc_ring; in bnxt_alloc_cp_sub_ring()
4084 rmem->dma_arr = cpr->cp_desc_mapping; in bnxt_alloc_cp_sub_ring()
4085 rmem->flags = BNXT_RMEM_RING_PTE_FLAG; in bnxt_alloc_cp_sub_ring()
4096 bool sh = !!(bp->flags & BNXT_FLAG_SHARED_RINGS); in bnxt_alloc_cp_rings()
4098 int tcs = bp->num_tc; in bnxt_alloc_cp_rings()
4103 for (i = 0, j = 0; i < bp->cp_nr_rings; i++) { in bnxt_alloc_cp_rings()
4104 struct bnxt_napi *bnapi = bp->bnapi[i]; in bnxt_alloc_cp_rings()
4113 cpr = &bnapi->cp_ring; in bnxt_alloc_cp_rings()
4114 cpr->bnapi = bnapi; in bnxt_alloc_cp_rings()
4115 ring = &cpr->cp_ring_struct; in bnxt_alloc_cp_rings()
4117 rc = bnxt_alloc_ring(bp, &ring->ring_mem); in bnxt_alloc_cp_rings()
4121 ring->map_idx = ulp_msix + i; in bnxt_alloc_cp_rings()
4123 if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS)) in bnxt_alloc_cp_rings()
4126 if (i < bp->rx_nr_rings) { in bnxt_alloc_cp_rings()
4130 if (i < bp->tx_nr_rings_xdp) { in bnxt_alloc_cp_rings()
4133 } else if ((sh && i < bp->tx_nr_rings) || in bnxt_alloc_cp_rings()
4134 (!sh && i >= bp->rx_nr_rings)) { in bnxt_alloc_cp_rings()
4139 cpr->cp_ring_arr = kcalloc(cp_count, sizeof(*cpr), in bnxt_alloc_cp_rings()
4141 if (!cpr->cp_ring_arr) in bnxt_alloc_cp_rings()
4142 return -ENOMEM; in bnxt_alloc_cp_rings()
4143 cpr->cp_ring_count = cp_count; in bnxt_alloc_cp_rings()
4146 cpr2 = &cpr->cp_ring_arr[k]; in bnxt_alloc_cp_rings()
4150 cpr2->bnapi = bnapi; in bnxt_alloc_cp_rings()
4151 cpr2->sw_stats = cpr->sw_stats; in bnxt_alloc_cp_rings()
4152 cpr2->cp_idx = k; in bnxt_alloc_cp_rings()
4154 bp->rx_ring[i].rx_cpr = cpr2; in bnxt_alloc_cp_rings()
4155 cpr2->cp_ring_type = BNXT_NQ_HDL_TYPE_RX; in bnxt_alloc_cp_rings()
4157 int n, tc = k - rx; in bnxt_alloc_cp_rings()
4160 bp->tx_ring[n].tx_cpr = cpr2; in bnxt_alloc_cp_rings()
4161 cpr2->cp_ring_type = BNXT_NQ_HDL_TYPE_TX; in bnxt_alloc_cp_rings()
4176 ring = &rxr->rx_ring_struct; in bnxt_init_rx_ring_struct()
4177 rmem = &ring->ring_mem; in bnxt_init_rx_ring_struct()
4178 rmem->nr_pages = bp->rx_nr_pages; in bnxt_init_rx_ring_struct()
4179 rmem->page_size = HW_RXBD_RING_SIZE; in bnxt_init_rx_ring_struct()
4180 rmem->pg_arr = (void **)rxr->rx_desc_ring; in bnxt_init_rx_ring_struct()
4181 rmem->dma_arr = rxr->rx_desc_mapping; in bnxt_init_rx_ring_struct()
4182 rmem->vmem_size = SW_RXBD_RING_SIZE * bp->rx_nr_pages; in bnxt_init_rx_ring_struct()
4183 rmem->vmem = (void **)&rxr->rx_buf_ring; in bnxt_init_rx_ring_struct()
4185 ring = &rxr->rx_agg_ring_struct; in bnxt_init_rx_ring_struct()
4186 rmem = &ring->ring_mem; in bnxt_init_rx_ring_struct()
4187 rmem->nr_pages = bp->rx_agg_nr_pages; in bnxt_init_rx_ring_struct()
4188 rmem->page_size = HW_RXBD_RING_SIZE; in bnxt_init_rx_ring_struct()
4189 rmem->pg_arr = (void **)rxr->rx_agg_desc_ring; in bnxt_init_rx_ring_struct()
4190 rmem->dma_arr = rxr->rx_agg_desc_mapping; in bnxt_init_rx_ring_struct()
4191 rmem->vmem_size = SW_RXBD_AGG_RING_SIZE * bp->rx_agg_nr_pages; in bnxt_init_rx_ring_struct()
4192 rmem->vmem = (void **)&rxr->rx_agg_ring; in bnxt_init_rx_ring_struct()
4202 rxr->page_pool->p.napi = NULL; in bnxt_reset_rx_ring_struct()
4203 rxr->page_pool = NULL; in bnxt_reset_rx_ring_struct()
4204 memset(&rxr->xdp_rxq, 0, sizeof(struct xdp_rxq_info)); in bnxt_reset_rx_ring_struct()
4206 ring = &rxr->rx_ring_struct; in bnxt_reset_rx_ring_struct()
4207 rmem = &ring->ring_mem; in bnxt_reset_rx_ring_struct()
4208 rmem->pg_tbl = NULL; in bnxt_reset_rx_ring_struct()
4209 rmem->pg_tbl_map = 0; in bnxt_reset_rx_ring_struct()
4210 for (i = 0; i < rmem->nr_pages; i++) { in bnxt_reset_rx_ring_struct()
4211 rmem->pg_arr[i] = NULL; in bnxt_reset_rx_ring_struct()
4212 rmem->dma_arr[i] = 0; in bnxt_reset_rx_ring_struct()
4214 *rmem->vmem = NULL; in bnxt_reset_rx_ring_struct()
4216 ring = &rxr->rx_agg_ring_struct; in bnxt_reset_rx_ring_struct()
4217 rmem = &ring->ring_mem; in bnxt_reset_rx_ring_struct()
4218 rmem->pg_tbl = NULL; in bnxt_reset_rx_ring_struct()
4219 rmem->pg_tbl_map = 0; in bnxt_reset_rx_ring_struct()
4220 for (i = 0; i < rmem->nr_pages; i++) { in bnxt_reset_rx_ring_struct()
4221 rmem->pg_arr[i] = NULL; in bnxt_reset_rx_ring_struct()
4222 rmem->dma_arr[i] = 0; in bnxt_reset_rx_ring_struct()
4224 *rmem->vmem = NULL; in bnxt_reset_rx_ring_struct()
4231 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_init_ring_struct()
4232 struct bnxt_napi *bnapi = bp->bnapi[i]; in bnxt_init_ring_struct()
4242 cpr = &bnapi->cp_ring; in bnxt_init_ring_struct()
4243 ring = &cpr->cp_ring_struct; in bnxt_init_ring_struct()
4244 rmem = &ring->ring_mem; in bnxt_init_ring_struct()
4245 rmem->nr_pages = bp->cp_nr_pages; in bnxt_init_ring_struct()
4246 rmem->page_size = HW_CMPD_RING_SIZE; in bnxt_init_ring_struct()
4247 rmem->pg_arr = (void **)cpr->cp_desc_ring; in bnxt_init_ring_struct()
4248 rmem->dma_arr = cpr->cp_desc_mapping; in bnxt_init_ring_struct()
4249 rmem->vmem_size = 0; in bnxt_init_ring_struct()
4251 rxr = bnapi->rx_ring; in bnxt_init_ring_struct()
4255 ring = &rxr->rx_ring_struct; in bnxt_init_ring_struct()
4256 rmem = &ring->ring_mem; in bnxt_init_ring_struct()
4257 rmem->nr_pages = bp->rx_nr_pages; in bnxt_init_ring_struct()
4258 rmem->page_size = HW_RXBD_RING_SIZE; in bnxt_init_ring_struct()
4259 rmem->pg_arr = (void **)rxr->rx_desc_ring; in bnxt_init_ring_struct()
4260 rmem->dma_arr = rxr->rx_desc_mapping; in bnxt_init_ring_struct()
4261 rmem->vmem_size = SW_RXBD_RING_SIZE * bp->rx_nr_pages; in bnxt_init_ring_struct()
4262 rmem->vmem = (void **)&rxr->rx_buf_ring; in bnxt_init_ring_struct()
4264 ring = &rxr->rx_agg_ring_struct; in bnxt_init_ring_struct()
4265 rmem = &ring->ring_mem; in bnxt_init_ring_struct()
4266 rmem->nr_pages = bp->rx_agg_nr_pages; in bnxt_init_ring_struct()
4267 rmem->page_size = HW_RXBD_RING_SIZE; in bnxt_init_ring_struct()
4268 rmem->pg_arr = (void **)rxr->rx_agg_desc_ring; in bnxt_init_ring_struct()
4269 rmem->dma_arr = rxr->rx_agg_desc_mapping; in bnxt_init_ring_struct()
4270 rmem->vmem_size = SW_RXBD_AGG_RING_SIZE * bp->rx_agg_nr_pages; in bnxt_init_ring_struct()
4271 rmem->vmem = (void **)&rxr->rx_agg_ring; in bnxt_init_ring_struct()
4275 ring = &txr->tx_ring_struct; in bnxt_init_ring_struct()
4276 rmem = &ring->ring_mem; in bnxt_init_ring_struct()
4277 rmem->nr_pages = bp->tx_nr_pages; in bnxt_init_ring_struct()
4278 rmem->page_size = HW_TXBD_RING_SIZE; in bnxt_init_ring_struct()
4279 rmem->pg_arr = (void **)txr->tx_desc_ring; in bnxt_init_ring_struct()
4280 rmem->dma_arr = txr->tx_desc_mapping; in bnxt_init_ring_struct()
4281 rmem->vmem_size = SW_TXBD_RING_SIZE * bp->tx_nr_pages; in bnxt_init_ring_struct()
4282 rmem->vmem = (void **)&txr->tx_buf_ring; in bnxt_init_ring_struct()
4293 rx_buf_ring = (struct rx_bd **)ring->ring_mem.pg_arr; in bnxt_init_rxbd_pages()
4294 for (i = 0, prod = 0; i < ring->ring_mem.nr_pages; i++) { in bnxt_init_rxbd_pages()
4303 rxbd->rx_bd_len_flags_type = cpu_to_le32(type); in bnxt_init_rxbd_pages()
4304 rxbd->rx_bd_opaque = prod; in bnxt_init_rxbd_pages()
4316 prod = rxr->rx_prod; in bnxt_alloc_one_rx_ring_skb()
4317 for (i = 0; i < bp->rx_ring_size; i++) { in bnxt_alloc_one_rx_ring_skb()
4319 netdev_warn(bp->dev, "init'ed rx ring %d with %d/%d skbs only\n", in bnxt_alloc_one_rx_ring_skb()
4320 ring_nr, i, bp->rx_ring_size); in bnxt_alloc_one_rx_ring_skb()
4325 rxr->rx_prod = prod; in bnxt_alloc_one_rx_ring_skb()
4335 prod = rxr->rx_agg_prod; in bnxt_alloc_one_rx_ring_page()
4336 for (i = 0; i < bp->rx_agg_ring_size; i++) { in bnxt_alloc_one_rx_ring_page()
4338 netdev_warn(bp->dev, "init'ed rx ring %d with %d/%d pages only\n", in bnxt_alloc_one_rx_ring_page()
4339 ring_nr, i, bp->rx_ring_size); in bnxt_alloc_one_rx_ring_page()
4344 rxr->rx_agg_prod = prod; in bnxt_alloc_one_rx_ring_page()
4354 for (i = 0; i < bp->max_tpa; i++) { in bnxt_alloc_one_tpa_info_data()
4358 return -ENOMEM; in bnxt_alloc_one_tpa_info_data()
4360 rxr->rx_tpa[i].data = data; in bnxt_alloc_one_tpa_info_data()
4361 rxr->rx_tpa[i].data_ptr = data + bp->rx_offset; in bnxt_alloc_one_tpa_info_data()
4362 rxr->rx_tpa[i].mapping = mapping; in bnxt_alloc_one_tpa_info_data()
4370 struct bnxt_rx_ring_info *rxr = &bp->rx_ring[ring_nr]; in bnxt_alloc_one_rx_ring()
4375 if (!(bp->flags & BNXT_FLAG_AGG_RINGS)) in bnxt_alloc_one_rx_ring()
4380 if (rxr->rx_tpa) { in bnxt_alloc_one_rx_ring()
4394 type = (bp->rx_buf_use_size << RX_BD_LEN_SHIFT) | in bnxt_init_one_rx_ring_rxbd()
4400 ring = &rxr->rx_ring_struct; in bnxt_init_one_rx_ring_rxbd()
4402 ring->fw_ring_id = INVALID_HW_RING_ID; in bnxt_init_one_rx_ring_rxbd()
4411 ring = &rxr->rx_agg_ring_struct; in bnxt_init_one_rx_agg_ring_rxbd()
4412 ring->fw_ring_id = INVALID_HW_RING_ID; in bnxt_init_one_rx_agg_ring_rxbd()
4413 if ((bp->flags & BNXT_FLAG_AGG_RINGS)) { in bnxt_init_one_rx_agg_ring_rxbd()
4425 rxr = &bp->rx_ring[ring_nr]; in bnxt_init_one_rx_ring()
4428 netif_queue_set_napi(bp->dev, ring_nr, NETDEV_QUEUE_TYPE_RX, in bnxt_init_one_rx_ring()
4429 &rxr->bnapi->napi); in bnxt_init_one_rx_ring()
4431 if (BNXT_RX_PAGE_MODE(bp) && bp->xdp_prog) { in bnxt_init_one_rx_ring()
4432 bpf_prog_add(bp->xdp_prog, 1); in bnxt_init_one_rx_ring()
4433 rxr->xdp_prog = bp->xdp_prog; in bnxt_init_one_rx_ring()
4445 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_init_cp_rings()
4446 struct bnxt_cp_ring_info *cpr = &bp->bnapi[i]->cp_ring; in bnxt_init_cp_rings()
4447 struct bnxt_ring_struct *ring = &cpr->cp_ring_struct; in bnxt_init_cp_rings()
4449 ring->fw_ring_id = INVALID_HW_RING_ID; in bnxt_init_cp_rings()
4450 cpr->rx_ring_coal.coal_ticks = bp->rx_coal.coal_ticks; in bnxt_init_cp_rings()
4451 cpr->rx_ring_coal.coal_bufs = bp->rx_coal.coal_bufs; in bnxt_init_cp_rings()
4452 if (!cpr->cp_ring_arr) in bnxt_init_cp_rings()
4454 for (j = 0; j < cpr->cp_ring_count; j++) { in bnxt_init_cp_rings()
4455 struct bnxt_cp_ring_info *cpr2 = &cpr->cp_ring_arr[j]; in bnxt_init_cp_rings()
4457 ring = &cpr2->cp_ring_struct; in bnxt_init_cp_rings()
4458 ring->fw_ring_id = INVALID_HW_RING_ID; in bnxt_init_cp_rings()
4459 cpr2->rx_ring_coal.coal_ticks = bp->rx_coal.coal_ticks; in bnxt_init_cp_rings()
4460 cpr2->rx_ring_coal.coal_bufs = bp->rx_coal.coal_bufs; in bnxt_init_cp_rings()
4470 bp->rx_offset = NET_IP_ALIGN + XDP_PACKET_HEADROOM; in bnxt_init_rx_rings()
4471 bp->rx_dma_offset = XDP_PACKET_HEADROOM; in bnxt_init_rx_rings()
4473 bp->rx_offset = BNXT_RX_OFFSET; in bnxt_init_rx_rings()
4474 bp->rx_dma_offset = BNXT_RX_DMA_OFFSET; in bnxt_init_rx_rings()
4477 for (i = 0; i < bp->rx_nr_rings; i++) { in bnxt_init_rx_rings()
4490 bp->tx_wake_thresh = max_t(int, bp->tx_ring_size / 2, in bnxt_init_tx_rings()
4493 for (i = 0; i < bp->tx_nr_rings; i++) { in bnxt_init_tx_rings()
4494 struct bnxt_tx_ring_info *txr = &bp->tx_ring[i]; in bnxt_init_tx_rings()
4495 struct bnxt_ring_struct *ring = &txr->tx_ring_struct; in bnxt_init_tx_rings()
4497 ring->fw_ring_id = INVALID_HW_RING_ID; in bnxt_init_tx_rings()
4499 if (i >= bp->tx_nr_rings_xdp) in bnxt_init_tx_rings()
4500 netif_queue_set_napi(bp->dev, i - bp->tx_nr_rings_xdp, in bnxt_init_tx_rings()
4502 &txr->bnapi->napi); in bnxt_init_tx_rings()
4510 kfree(bp->grp_info); in bnxt_free_ring_grps()
4511 bp->grp_info = NULL; in bnxt_free_ring_grps()
4519 bp->grp_info = kcalloc(bp->cp_nr_rings, in bnxt_init_ring_grps()
4522 if (!bp->grp_info) in bnxt_init_ring_grps()
4523 return -ENOMEM; in bnxt_init_ring_grps()
4525 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_init_ring_grps()
4527 bp->grp_info[i].fw_stats_ctx = INVALID_HW_RING_ID; in bnxt_init_ring_grps()
4528 bp->grp_info[i].fw_grp_id = INVALID_HW_RING_ID; in bnxt_init_ring_grps()
4529 bp->grp_info[i].rx_fw_ring_id = INVALID_HW_RING_ID; in bnxt_init_ring_grps()
4530 bp->grp_info[i].agg_fw_ring_id = INVALID_HW_RING_ID; in bnxt_init_ring_grps()
4531 bp->grp_info[i].cp_fw_ring_id = INVALID_HW_RING_ID; in bnxt_init_ring_grps()
4538 kfree(bp->vnic_info); in bnxt_free_vnics()
4539 bp->vnic_info = NULL; in bnxt_free_vnics()
4540 bp->nr_vnics = 0; in bnxt_free_vnics()
4548 if (bp->flags & BNXT_FLAG_RFS) { in bnxt_alloc_vnics()
4551 else if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS)) in bnxt_alloc_vnics()
4552 num_vnics += bp->rx_nr_rings; in bnxt_alloc_vnics()
4559 bp->vnic_info = kcalloc(num_vnics, sizeof(struct bnxt_vnic_info), in bnxt_alloc_vnics()
4561 if (!bp->vnic_info) in bnxt_alloc_vnics()
4562 return -ENOMEM; in bnxt_alloc_vnics()
4564 bp->nr_vnics = num_vnics; in bnxt_alloc_vnics()
4570 struct bnxt_vnic_info *vnic0 = &bp->vnic_info[BNXT_VNIC_DEFAULT]; in bnxt_init_vnics()
4573 for (i = 0; i < bp->nr_vnics; i++) { in bnxt_init_vnics()
4574 struct bnxt_vnic_info *vnic = &bp->vnic_info[i]; in bnxt_init_vnics()
4577 vnic->fw_vnic_id = INVALID_HW_RING_ID; in bnxt_init_vnics()
4578 vnic->vnic_id = i; in bnxt_init_vnics()
4580 vnic->fw_rss_cos_lb_ctx[j] = INVALID_HW_RING_ID; in bnxt_init_vnics()
4582 vnic->fw_l2_ctx_id = INVALID_HW_RING_ID; in bnxt_init_vnics()
4584 if (bp->vnic_info[i].rss_hash_key) { in bnxt_init_vnics()
4586 u8 *key = (void *)vnic->rss_hash_key; in bnxt_init_vnics()
4589 if (!bp->rss_hash_key_valid && in bnxt_init_vnics()
4590 !bp->rss_hash_key_updated) { in bnxt_init_vnics()
4591 get_random_bytes(bp->rss_hash_key, in bnxt_init_vnics()
4593 bp->rss_hash_key_updated = true; in bnxt_init_vnics()
4596 memcpy(vnic->rss_hash_key, bp->rss_hash_key, in bnxt_init_vnics()
4599 if (!bp->rss_hash_key_updated) in bnxt_init_vnics()
4602 bp->rss_hash_key_updated = false; in bnxt_init_vnics()
4603 bp->rss_hash_key_valid = true; in bnxt_init_vnics()
4605 bp->toeplitz_prefix = 0; in bnxt_init_vnics()
4607 bp->toeplitz_prefix <<= 8; in bnxt_init_vnics()
4608 bp->toeplitz_prefix |= key[k]; in bnxt_init_vnics()
4611 memcpy(vnic->rss_hash_key, vnic0->rss_hash_key, in bnxt_init_vnics()
4629 while (pages & (pages - 1)) in bnxt_calc_nr_ring_pages()
4637 bp->flags &= ~BNXT_FLAG_TPA; in bnxt_set_tpa_flags()
4638 if (bp->flags & BNXT_FLAG_NO_AGG_RINGS) in bnxt_set_tpa_flags()
4640 if (bp->dev->features & NETIF_F_LRO) in bnxt_set_tpa_flags()
4641 bp->flags |= BNXT_FLAG_LRO; in bnxt_set_tpa_flags()
4642 else if (bp->dev->features & NETIF_F_GRO_HW) in bnxt_set_tpa_flags()
4643 bp->flags |= BNXT_FLAG_GRO; in bnxt_set_tpa_flags()
4650 bp->rx_copybreak = BNXT_DEFAULT_RX_COPYBREAK; in bnxt_init_ring_params()
4652 rx_size = SZ_1K - in bnxt_init_ring_params()
4653 NET_SKB_PAD - SKB_DATA_ALIGN(sizeof(struct skb_shared_info)); in bnxt_init_ring_params()
4654 bp->dev->cfg->hds_thresh = max(BNXT_DEFAULT_RX_COPYBREAK, rx_size); in bnxt_init_ring_params()
4657 /* bp->rx_ring_size, bp->tx_ring_size, dev->mtu, BNXT_FLAG_{G|L}RO flags must
4666 rx_size = SKB_DATA_ALIGN(bp->dev->mtu + ETH_HLEN + NET_IP_ALIGN + 8); in bnxt_set_ring_params()
4671 ring_size = bp->rx_ring_size; in bnxt_set_ring_params()
4672 bp->rx_agg_ring_size = 0; in bnxt_set_ring_params()
4673 bp->rx_agg_nr_pages = 0; in bnxt_set_ring_params()
4675 if (bp->flags & BNXT_FLAG_TPA || bp->flags & BNXT_FLAG_HDS) in bnxt_set_ring_params()
4678 bp->flags &= ~BNXT_FLAG_JUMBO; in bnxt_set_ring_params()
4679 if (rx_space > PAGE_SIZE && !(bp->flags & BNXT_FLAG_NO_AGG_RINGS)) { in bnxt_set_ring_params()
4682 bp->flags |= BNXT_FLAG_JUMBO; in bnxt_set_ring_params()
4683 jumbo_factor = PAGE_ALIGN(bp->dev->mtu - 40) >> PAGE_SHIFT; in bnxt_set_ring_params()
4690 … netdev_warn(bp->dev, "RX ring size reduced from %d to %d because the jumbo ring is now enabled\n", in bnxt_set_ring_params()
4691 bp->rx_ring_size, ring_size); in bnxt_set_ring_params()
4692 bp->rx_ring_size = ring_size; in bnxt_set_ring_params()
4696 bp->rx_agg_nr_pages = bnxt_calc_nr_ring_pages(agg_ring_size, in bnxt_set_ring_params()
4698 if (bp->rx_agg_nr_pages > MAX_RX_AGG_PAGES) { in bnxt_set_ring_params()
4701 bp->rx_agg_nr_pages = MAX_RX_AGG_PAGES; in bnxt_set_ring_params()
4702 agg_ring_size = MAX_RX_AGG_PAGES * RX_DESC_CNT - 1; in bnxt_set_ring_params()
4703 netdev_warn(bp->dev, "rx agg ring size %d reduced to %d.\n", in bnxt_set_ring_params()
4706 bp->rx_agg_ring_size = agg_ring_size; in bnxt_set_ring_params()
4707 bp->rx_agg_ring_mask = (bp->rx_agg_nr_pages * RX_DESC_CNT) - 1; in bnxt_set_ring_params()
4711 rx_size = PAGE_SIZE - in bnxt_set_ring_params()
4712 ALIGN(max(NET_SKB_PAD, XDP_PACKET_HEADROOM), 8) - in bnxt_set_ring_params()
4716 bp->rx_copybreak, in bnxt_set_ring_params()
4717 bp->dev->cfg_pending->hds_thresh); in bnxt_set_ring_params()
4724 bp->rx_buf_use_size = rx_size; in bnxt_set_ring_params()
4725 bp->rx_buf_size = rx_space; in bnxt_set_ring_params()
4727 bp->rx_nr_pages = bnxt_calc_nr_ring_pages(ring_size, RX_DESC_CNT); in bnxt_set_ring_params()
4728 bp->rx_ring_mask = (bp->rx_nr_pages * RX_DESC_CNT) - 1; in bnxt_set_ring_params()
4730 ring_size = bp->tx_ring_size; in bnxt_set_ring_params()
4731 bp->tx_nr_pages = bnxt_calc_nr_ring_pages(ring_size, TX_DESC_CNT); in bnxt_set_ring_params()
4732 bp->tx_ring_mask = (bp->tx_nr_pages * TX_DESC_CNT) - 1; in bnxt_set_ring_params()
4734 max_rx_cmpl = bp->rx_ring_size; in bnxt_set_ring_params()
4739 if (bp->flags & BNXT_FLAG_TPA) in bnxt_set_ring_params()
4740 max_rx_cmpl += bp->max_tpa; in bnxt_set_ring_params()
4741 /* RX and TPA completions are 32-byte, all others are 16-byte */ in bnxt_set_ring_params()
4742 ring_size = max_rx_cmpl * 2 + agg_ring_size + bp->tx_ring_size; in bnxt_set_ring_params()
4743 bp->cp_ring_size = ring_size; in bnxt_set_ring_params()
4745 bp->cp_nr_pages = bnxt_calc_nr_ring_pages(ring_size, CP_DESC_CNT); in bnxt_set_ring_params()
4746 if (bp->cp_nr_pages > MAX_CP_PAGES) { in bnxt_set_ring_params()
4747 bp->cp_nr_pages = MAX_CP_PAGES; in bnxt_set_ring_params()
4748 bp->cp_ring_size = MAX_CP_PAGES * CP_DESC_CNT - 1; in bnxt_set_ring_params()
4749 netdev_warn(bp->dev, "completion ring size %d reduced to %d.\n", in bnxt_set_ring_params()
4750 ring_size, bp->cp_ring_size); in bnxt_set_ring_params()
4752 bp->cp_bit = bp->cp_nr_pages * CP_DESC_CNT; in bnxt_set_ring_params()
4753 bp->cp_ring_mask = bp->cp_bit - 1; in bnxt_set_ring_params()
4761 struct net_device *dev = bp->dev; in __bnxt_set_rx_skb_mode()
4764 bp->flags &= ~(BNXT_FLAG_AGG_RINGS | BNXT_FLAG_NO_AGG_RINGS); in __bnxt_set_rx_skb_mode()
4765 bp->flags |= BNXT_FLAG_RX_PAGE_MODE; in __bnxt_set_rx_skb_mode()
4767 if (bp->xdp_prog->aux->xdp_has_frags) in __bnxt_set_rx_skb_mode()
4768 dev->max_mtu = min_t(u16, bp->max_mtu, BNXT_MAX_MTU); in __bnxt_set_rx_skb_mode()
4770 dev->max_mtu = in __bnxt_set_rx_skb_mode()
4771 min_t(u16, bp->max_mtu, BNXT_MAX_PAGE_MODE_MTU); in __bnxt_set_rx_skb_mode()
4772 if (dev->mtu > BNXT_MAX_PAGE_MODE_MTU) { in __bnxt_set_rx_skb_mode()
4773 bp->flags |= BNXT_FLAG_JUMBO; in __bnxt_set_rx_skb_mode()
4774 bp->rx_skb_func = bnxt_rx_multi_page_skb; in __bnxt_set_rx_skb_mode()
4776 bp->flags |= BNXT_FLAG_NO_AGG_RINGS; in __bnxt_set_rx_skb_mode()
4777 bp->rx_skb_func = bnxt_rx_page_skb; in __bnxt_set_rx_skb_mode()
4779 bp->rx_dir = DMA_BIDIRECTIONAL; in __bnxt_set_rx_skb_mode()
4781 dev->max_mtu = bp->max_mtu; in __bnxt_set_rx_skb_mode()
4782 bp->flags &= ~BNXT_FLAG_RX_PAGE_MODE; in __bnxt_set_rx_skb_mode()
4783 bp->rx_dir = DMA_FROM_DEVICE; in __bnxt_set_rx_skb_mode()
4784 bp->rx_skb_func = bnxt_rx_skb; in __bnxt_set_rx_skb_mode()
4797 bp->flags &= ~BNXT_FLAG_NO_AGG_RINGS; in bnxt_set_rx_skb_mode()
4798 bp->dev->hw_features |= NETIF_F_LRO; in bnxt_set_rx_skb_mode()
4803 netdev_update_features(bp->dev); in bnxt_set_rx_skb_mode()
4810 struct pci_dev *pdev = bp->pdev; in bnxt_free_vnic_attributes()
4812 if (!bp->vnic_info) in bnxt_free_vnic_attributes()
4815 for (i = 0; i < bp->nr_vnics; i++) { in bnxt_free_vnic_attributes()
4816 vnic = &bp->vnic_info[i]; in bnxt_free_vnic_attributes()
4818 kfree(vnic->fw_grp_ids); in bnxt_free_vnic_attributes()
4819 vnic->fw_grp_ids = NULL; in bnxt_free_vnic_attributes()
4821 kfree(vnic->uc_list); in bnxt_free_vnic_attributes()
4822 vnic->uc_list = NULL; in bnxt_free_vnic_attributes()
4824 if (vnic->mc_list) { in bnxt_free_vnic_attributes()
4825 dma_free_coherent(&pdev->dev, vnic->mc_list_size, in bnxt_free_vnic_attributes()
4826 vnic->mc_list, vnic->mc_list_mapping); in bnxt_free_vnic_attributes()
4827 vnic->mc_list = NULL; in bnxt_free_vnic_attributes()
4830 if (vnic->rss_table) { in bnxt_free_vnic_attributes()
4831 dma_free_coherent(&pdev->dev, vnic->rss_table_size, in bnxt_free_vnic_attributes()
4832 vnic->rss_table, in bnxt_free_vnic_attributes()
4833 vnic->rss_table_dma_addr); in bnxt_free_vnic_attributes()
4834 vnic->rss_table = NULL; in bnxt_free_vnic_attributes()
4837 vnic->rss_hash_key = NULL; in bnxt_free_vnic_attributes()
4838 vnic->flags = 0; in bnxt_free_vnic_attributes()
4846 struct pci_dev *pdev = bp->pdev; in bnxt_alloc_vnic_attributes()
4849 for (i = 0; i < bp->nr_vnics; i++) { in bnxt_alloc_vnic_attributes()
4850 vnic = &bp->vnic_info[i]; in bnxt_alloc_vnic_attributes()
4852 if (vnic->flags & BNXT_VNIC_UCAST_FLAG) { in bnxt_alloc_vnic_attributes()
4853 int mem_size = (BNXT_MAX_UC_ADDRS - 1) * ETH_ALEN; in bnxt_alloc_vnic_attributes()
4856 vnic->uc_list = kmalloc(mem_size, GFP_KERNEL); in bnxt_alloc_vnic_attributes()
4857 if (!vnic->uc_list) { in bnxt_alloc_vnic_attributes()
4858 rc = -ENOMEM; in bnxt_alloc_vnic_attributes()
4864 if (vnic->flags & BNXT_VNIC_MCAST_FLAG) { in bnxt_alloc_vnic_attributes()
4865 vnic->mc_list_size = BNXT_MAX_MC_ADDRS * ETH_ALEN; in bnxt_alloc_vnic_attributes()
4866 vnic->mc_list = in bnxt_alloc_vnic_attributes()
4867 dma_alloc_coherent(&pdev->dev, in bnxt_alloc_vnic_attributes()
4868 vnic->mc_list_size, in bnxt_alloc_vnic_attributes()
4869 &vnic->mc_list_mapping, in bnxt_alloc_vnic_attributes()
4871 if (!vnic->mc_list) { in bnxt_alloc_vnic_attributes()
4872 rc = -ENOMEM; in bnxt_alloc_vnic_attributes()
4877 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_alloc_vnic_attributes()
4880 if (vnic->flags & BNXT_VNIC_RSS_FLAG) in bnxt_alloc_vnic_attributes()
4881 max_rings = bp->rx_nr_rings; in bnxt_alloc_vnic_attributes()
4885 vnic->fw_grp_ids = kcalloc(max_rings, sizeof(u16), GFP_KERNEL); in bnxt_alloc_vnic_attributes()
4886 if (!vnic->fw_grp_ids) { in bnxt_alloc_vnic_attributes()
4887 rc = -ENOMEM; in bnxt_alloc_vnic_attributes()
4891 if ((bp->rss_cap & BNXT_RSS_CAP_NEW_RSS_CAP) && in bnxt_alloc_vnic_attributes()
4892 !(vnic->flags & BNXT_VNIC_RSS_FLAG)) in bnxt_alloc_vnic_attributes()
4897 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_alloc_vnic_attributes()
4900 vnic->rss_table_size = size + HW_HASH_KEY_SIZE; in bnxt_alloc_vnic_attributes()
4901 vnic->rss_table = dma_alloc_coherent(&pdev->dev, in bnxt_alloc_vnic_attributes()
4902 vnic->rss_table_size, in bnxt_alloc_vnic_attributes()
4903 &vnic->rss_table_dma_addr, in bnxt_alloc_vnic_attributes()
4905 if (!vnic->rss_table) { in bnxt_alloc_vnic_attributes()
4906 rc = -ENOMEM; in bnxt_alloc_vnic_attributes()
4910 vnic->rss_hash_key = ((void *)vnic->rss_table) + size; in bnxt_alloc_vnic_attributes()
4911 vnic->rss_hash_key_dma_addr = vnic->rss_table_dma_addr + size; in bnxt_alloc_vnic_attributes()
4923 dma_pool_destroy(bp->hwrm_dma_pool); in bnxt_free_hwrm_resources()
4924 bp->hwrm_dma_pool = NULL; in bnxt_free_hwrm_resources()
4927 hlist_for_each_entry_rcu(token, &bp->hwrm_pending_list, node) in bnxt_free_hwrm_resources()
4928 WRITE_ONCE(token->state, BNXT_HWRM_CANCELLED); in bnxt_free_hwrm_resources()
4934 bp->hwrm_dma_pool = dma_pool_create("bnxt_hwrm", &bp->pdev->dev, in bnxt_alloc_hwrm_resources()
4937 if (!bp->hwrm_dma_pool) in bnxt_alloc_hwrm_resources()
4938 return -ENOMEM; in bnxt_alloc_hwrm_resources()
4940 INIT_HLIST_HEAD(&bp->hwrm_pending_list); in bnxt_alloc_hwrm_resources()
4947 kfree(stats->hw_masks); in bnxt_free_stats_mem()
4948 stats->hw_masks = NULL; in bnxt_free_stats_mem()
4949 kfree(stats->sw_stats); in bnxt_free_stats_mem()
4950 stats->sw_stats = NULL; in bnxt_free_stats_mem()
4951 if (stats->hw_stats) { in bnxt_free_stats_mem()
4952 dma_free_coherent(&bp->pdev->dev, stats->len, stats->hw_stats, in bnxt_free_stats_mem()
4953 stats->hw_stats_map); in bnxt_free_stats_mem()
4954 stats->hw_stats = NULL; in bnxt_free_stats_mem()
4961 stats->hw_stats = dma_alloc_coherent(&bp->pdev->dev, stats->len, in bnxt_alloc_stats_mem()
4962 &stats->hw_stats_map, GFP_KERNEL); in bnxt_alloc_stats_mem()
4963 if (!stats->hw_stats) in bnxt_alloc_stats_mem()
4964 return -ENOMEM; in bnxt_alloc_stats_mem()
4966 stats->sw_stats = kzalloc(stats->len, GFP_KERNEL); in bnxt_alloc_stats_mem()
4967 if (!stats->sw_stats) in bnxt_alloc_stats_mem()
4971 stats->hw_masks = kzalloc(stats->len, GFP_KERNEL); in bnxt_alloc_stats_mem()
4972 if (!stats->hw_masks) in bnxt_alloc_stats_mem()
4979 return -ENOMEM; in bnxt_alloc_stats_mem()
5006 if (!(bp->fw_cap & BNXT_FW_CAP_EXT_HW_STATS_SUPPORTED) || in bnxt_hwrm_func_qstat_ext()
5007 !(bp->flags & BNXT_FLAG_CHIP_P5_PLUS)) in bnxt_hwrm_func_qstat_ext()
5008 return -EOPNOTSUPP; in bnxt_hwrm_func_qstat_ext()
5014 req->fid = cpu_to_le16(0xffff); in bnxt_hwrm_func_qstat_ext()
5015 req->flags = FUNC_QSTATS_EXT_REQ_FLAGS_COUNTER_MASK; in bnxt_hwrm_func_qstat_ext()
5020 hw_masks = &resp->rx_ucast_pkts; in bnxt_hwrm_func_qstat_ext()
5021 bnxt_copy_hw_masks(stats->hw_masks, hw_masks, stats->len / 8); in bnxt_hwrm_func_qstat_ext()
5032 struct bnxt_napi *bnapi = bp->bnapi[0]; in bnxt_init_stats()
5041 cpr = &bnapi->cp_ring; in bnxt_init_stats()
5042 stats = &cpr->stats; in bnxt_init_stats()
5045 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_init_stats()
5046 mask = (1ULL << 48) - 1; in bnxt_init_stats()
5048 mask = -1ULL; in bnxt_init_stats()
5049 bnxt_fill_masks(stats->hw_masks, mask, stats->len / 8); in bnxt_init_stats()
5051 if (bp->flags & BNXT_FLAG_PORT_STATS) { in bnxt_init_stats()
5052 stats = &bp->port_stats; in bnxt_init_stats()
5053 rx_stats = stats->hw_stats; in bnxt_init_stats()
5054 rx_masks = stats->hw_masks; in bnxt_init_stats()
5063 mask = (1ULL << 40) - 1; in bnxt_init_stats()
5073 if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) { in bnxt_init_stats()
5074 stats = &bp->rx_port_stats_ext; in bnxt_init_stats()
5075 rx_stats = stats->hw_stats; in bnxt_init_stats()
5076 rx_masks = stats->hw_masks; in bnxt_init_stats()
5078 stats = &bp->tx_port_stats_ext; in bnxt_init_stats()
5079 tx_stats = stats->hw_stats; in bnxt_init_stats()
5080 tx_masks = stats->hw_masks; in bnxt_init_stats()
5086 mask = (1ULL << 40) - 1; in bnxt_init_stats()
5103 bp->flags &= ~BNXT_FLAG_PORT_STATS; in bnxt_free_port_stats()
5104 bp->flags &= ~BNXT_FLAG_PORT_STATS_EXT; in bnxt_free_port_stats()
5106 bnxt_free_stats_mem(bp, &bp->port_stats); in bnxt_free_port_stats()
5107 bnxt_free_stats_mem(bp, &bp->rx_port_stats_ext); in bnxt_free_port_stats()
5108 bnxt_free_stats_mem(bp, &bp->tx_port_stats_ext); in bnxt_free_port_stats()
5115 if (!bp->bnapi) in bnxt_free_ring_stats()
5118 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_free_ring_stats()
5119 struct bnxt_napi *bnapi = bp->bnapi[i]; in bnxt_free_ring_stats()
5120 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; in bnxt_free_ring_stats()
5122 bnxt_free_stats_mem(bp, &cpr->stats); in bnxt_free_ring_stats()
5124 kfree(cpr->sw_stats); in bnxt_free_ring_stats()
5125 cpr->sw_stats = NULL; in bnxt_free_ring_stats()
5134 size = bp->hw_ring_stats_size; in bnxt_alloc_stats()
5136 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_alloc_stats()
5137 struct bnxt_napi *bnapi = bp->bnapi[i]; in bnxt_alloc_stats()
5138 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; in bnxt_alloc_stats()
5140 cpr->sw_stats = kzalloc(sizeof(*cpr->sw_stats), GFP_KERNEL); in bnxt_alloc_stats()
5141 if (!cpr->sw_stats) in bnxt_alloc_stats()
5142 return -ENOMEM; in bnxt_alloc_stats()
5144 cpr->stats.len = size; in bnxt_alloc_stats()
5145 rc = bnxt_alloc_stats_mem(bp, &cpr->stats, !i); in bnxt_alloc_stats()
5149 cpr->hw_stats_ctx_id = INVALID_STATS_CTX_ID; in bnxt_alloc_stats()
5152 if (BNXT_VF(bp) || bp->chip_num == CHIP_NUM_58700) in bnxt_alloc_stats()
5155 if (bp->port_stats.hw_stats) in bnxt_alloc_stats()
5158 bp->port_stats.len = BNXT_PORT_STATS_SIZE; in bnxt_alloc_stats()
5159 rc = bnxt_alloc_stats_mem(bp, &bp->port_stats, true); in bnxt_alloc_stats()
5163 bp->flags |= BNXT_FLAG_PORT_STATS; in bnxt_alloc_stats()
5167 if (bp->hwrm_spec_code < 0x10804 || bp->hwrm_spec_code == 0x10900) in bnxt_alloc_stats()
5168 if (!(bp->fw_cap & BNXT_FW_CAP_EXT_STATS_SUPPORTED)) in bnxt_alloc_stats()
5171 if (bp->rx_port_stats_ext.hw_stats) in bnxt_alloc_stats()
5174 bp->rx_port_stats_ext.len = sizeof(struct rx_port_stats_ext); in bnxt_alloc_stats()
5175 rc = bnxt_alloc_stats_mem(bp, &bp->rx_port_stats_ext, true); in bnxt_alloc_stats()
5181 if (bp->tx_port_stats_ext.hw_stats) in bnxt_alloc_stats()
5184 if (bp->hwrm_spec_code >= 0x10902 || in bnxt_alloc_stats()
5185 (bp->fw_cap & BNXT_FW_CAP_EXT_STATS_SUPPORTED)) { in bnxt_alloc_stats()
5186 bp->tx_port_stats_ext.len = sizeof(struct tx_port_stats_ext); in bnxt_alloc_stats()
5187 rc = bnxt_alloc_stats_mem(bp, &bp->tx_port_stats_ext, true); in bnxt_alloc_stats()
5192 bp->flags |= BNXT_FLAG_PORT_STATS_EXT; in bnxt_alloc_stats()
5200 if (!bp->bnapi) in bnxt_clear_ring_indices()
5203 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_clear_ring_indices()
5204 struct bnxt_napi *bnapi = bp->bnapi[i]; in bnxt_clear_ring_indices()
5212 cpr = &bnapi->cp_ring; in bnxt_clear_ring_indices()
5213 cpr->cp_raw_cons = 0; in bnxt_clear_ring_indices()
5216 txr->tx_prod = 0; in bnxt_clear_ring_indices()
5217 txr->tx_cons = 0; in bnxt_clear_ring_indices()
5218 txr->tx_hw_cons = 0; in bnxt_clear_ring_indices()
5221 rxr = bnapi->rx_ring; in bnxt_clear_ring_indices()
5223 rxr->rx_prod = 0; in bnxt_clear_ring_indices()
5224 rxr->rx_agg_prod = 0; in bnxt_clear_ring_indices()
5225 rxr->rx_sw_agg_prod = 0; in bnxt_clear_ring_indices()
5226 rxr->rx_next_cons = 0; in bnxt_clear_ring_indices()
5228 bnapi->events = 0; in bnxt_clear_ring_indices()
5234 u8 type = fltr->type, flags = fltr->flags; in bnxt_insert_usr_fltr()
5236 INIT_LIST_HEAD(&fltr->list); in bnxt_insert_usr_fltr()
5239 list_add_tail(&fltr->list, &bp->usr_fltr_list); in bnxt_insert_usr_fltr()
5244 if (!list_empty(&fltr->list)) in bnxt_del_one_usr_fltr()
5245 list_del_init(&fltr->list); in bnxt_del_one_usr_fltr()
5252 list_for_each_entry_safe(usr_fltr, tmp, &bp->usr_fltr_list, list) { in bnxt_clear_usr_fltrs()
5253 if (!all && usr_fltr->type == BNXT_FLTR_TYPE_L2) in bnxt_clear_usr_fltrs()
5261 hlist_del(&fltr->hash); in bnxt_del_fltr()
5263 if (fltr->flags) { in bnxt_del_fltr()
5264 clear_bit(fltr->sw_id, bp->ntp_fltr_bmap); in bnxt_del_fltr()
5265 bp->ntp_fltr_count--; in bnxt_del_fltr()
5274 netdev_assert_locked(bp->dev); in bnxt_free_ntp_fltrs()
5284 head = &bp->ntp_fltr_hash_tbl[i]; in bnxt_free_ntp_fltrs()
5286 bnxt_del_l2_filter(bp, fltr->l2_fltr); in bnxt_free_ntp_fltrs()
5287 if (!all && ((fltr->base.flags & BNXT_ACT_FUNC_DST) || in bnxt_free_ntp_fltrs()
5288 !list_empty(&fltr->base.list))) in bnxt_free_ntp_fltrs()
5290 bnxt_del_fltr(bp, &fltr->base); in bnxt_free_ntp_fltrs()
5296 bitmap_free(bp->ntp_fltr_bmap); in bnxt_free_ntp_fltrs()
5297 bp->ntp_fltr_bmap = NULL; in bnxt_free_ntp_fltrs()
5298 bp->ntp_fltr_count = 0; in bnxt_free_ntp_fltrs()
5305 if (!(bp->flags & BNXT_FLAG_RFS) || bp->ntp_fltr_bmap) in bnxt_alloc_ntp_fltrs()
5309 INIT_HLIST_HEAD(&bp->ntp_fltr_hash_tbl[i]); in bnxt_alloc_ntp_fltrs()
5311 bp->ntp_fltr_count = 0; in bnxt_alloc_ntp_fltrs()
5312 bp->ntp_fltr_bmap = bitmap_zalloc(bp->max_fltr, GFP_KERNEL); in bnxt_alloc_ntp_fltrs()
5314 if (!bp->ntp_fltr_bmap) in bnxt_alloc_ntp_fltrs()
5315 rc = -ENOMEM; in bnxt_alloc_ntp_fltrs()
5329 head = &bp->l2_fltr_hash_tbl[i]; in bnxt_free_l2_filters()
5331 if (!all && ((fltr->base.flags & BNXT_ACT_FUNC_DST) || in bnxt_free_l2_filters()
5332 !list_empty(&fltr->base.list))) in bnxt_free_l2_filters()
5334 bnxt_del_fltr(bp, &fltr->base); in bnxt_free_l2_filters()
5344 INIT_HLIST_HEAD(&bp->l2_fltr_hash_tbl[i]); in bnxt_init_l2_fltr_tbl()
5345 get_random_bytes(&bp->hash_seed, sizeof(bp->hash_seed)); in bnxt_init_l2_fltr_tbl()
5359 if (!(bp->phy_flags & BNXT_PHY_FL_PORT_STATS_NO_RESET) || in bnxt_free_mem()
5360 test_bit(BNXT_STATE_IN_FW_RESET, &bp->state)) in bnxt_free_mem()
5364 kfree(bp->tx_ring_map); in bnxt_free_mem()
5365 bp->tx_ring_map = NULL; in bnxt_free_mem()
5366 kfree(bp->tx_ring); in bnxt_free_mem()
5367 bp->tx_ring = NULL; in bnxt_free_mem()
5368 kfree(bp->rx_ring); in bnxt_free_mem()
5369 bp->rx_ring = NULL; in bnxt_free_mem()
5370 kfree(bp->bnapi); in bnxt_free_mem()
5371 bp->bnapi = NULL; in bnxt_free_mem()
5387 bp->cp_nr_rings); in bnxt_alloc_mem()
5389 bnapi = kzalloc(arr_size + size * bp->cp_nr_rings, GFP_KERNEL); in bnxt_alloc_mem()
5391 return -ENOMEM; in bnxt_alloc_mem()
5393 bp->bnapi = bnapi; in bnxt_alloc_mem()
5395 for (i = 0; i < bp->cp_nr_rings; i++, bnapi += size) { in bnxt_alloc_mem()
5396 bp->bnapi[i] = bnapi; in bnxt_alloc_mem()
5397 bp->bnapi[i]->index = i; in bnxt_alloc_mem()
5398 bp->bnapi[i]->bp = bp; in bnxt_alloc_mem()
5399 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in bnxt_alloc_mem()
5401 &bp->bnapi[i]->cp_ring; in bnxt_alloc_mem()
5403 cpr->cp_ring_struct.ring_mem.flags = in bnxt_alloc_mem()
5408 bp->rx_ring = kcalloc(bp->rx_nr_rings, in bnxt_alloc_mem()
5411 if (!bp->rx_ring) in bnxt_alloc_mem()
5412 return -ENOMEM; in bnxt_alloc_mem()
5414 for (i = 0; i < bp->rx_nr_rings; i++) { in bnxt_alloc_mem()
5415 struct bnxt_rx_ring_info *rxr = &bp->rx_ring[i]; in bnxt_alloc_mem()
5417 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in bnxt_alloc_mem()
5418 rxr->rx_ring_struct.ring_mem.flags = in bnxt_alloc_mem()
5420 rxr->rx_agg_ring_struct.ring_mem.flags = in bnxt_alloc_mem()
5423 rxr->rx_cpr = &bp->bnapi[i]->cp_ring; in bnxt_alloc_mem()
5425 rxr->bnapi = bp->bnapi[i]; in bnxt_alloc_mem()
5426 bp->bnapi[i]->rx_ring = &bp->rx_ring[i]; in bnxt_alloc_mem()
5429 bp->tx_ring = kcalloc(bp->tx_nr_rings, in bnxt_alloc_mem()
5432 if (!bp->tx_ring) in bnxt_alloc_mem()
5433 return -ENOMEM; in bnxt_alloc_mem()
5435 bp->tx_ring_map = kcalloc(bp->tx_nr_rings, sizeof(u16), in bnxt_alloc_mem()
5438 if (!bp->tx_ring_map) in bnxt_alloc_mem()
5439 return -ENOMEM; in bnxt_alloc_mem()
5441 if (bp->flags & BNXT_FLAG_SHARED_RINGS) in bnxt_alloc_mem()
5444 j = bp->rx_nr_rings; in bnxt_alloc_mem()
5446 for (i = 0; i < bp->tx_nr_rings; i++) { in bnxt_alloc_mem()
5447 struct bnxt_tx_ring_info *txr = &bp->tx_ring[i]; in bnxt_alloc_mem()
5450 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_alloc_mem()
5451 txr->tx_ring_struct.ring_mem.flags = in bnxt_alloc_mem()
5453 bp->tx_ring_map[i] = bp->tx_nr_rings_xdp + i; in bnxt_alloc_mem()
5454 if (i >= bp->tx_nr_rings_xdp) { in bnxt_alloc_mem()
5457 bnapi2 = bp->bnapi[k]; in bnxt_alloc_mem()
5458 txr->txq_index = i - bp->tx_nr_rings_xdp; in bnxt_alloc_mem()
5459 txr->tx_napi_idx = in bnxt_alloc_mem()
5460 BNXT_RING_TO_TC(bp, txr->txq_index); in bnxt_alloc_mem()
5461 bnapi2->tx_ring[txr->tx_napi_idx] = txr; in bnxt_alloc_mem()
5462 bnapi2->tx_int = bnxt_tx_int; in bnxt_alloc_mem()
5464 bnapi2 = bp->bnapi[j]; in bnxt_alloc_mem()
5465 bnapi2->flags |= BNXT_NAPI_FLAG_XDP; in bnxt_alloc_mem()
5466 bnapi2->tx_ring[0] = txr; in bnxt_alloc_mem()
5467 bnapi2->tx_int = bnxt_tx_int_xdp; in bnxt_alloc_mem()
5470 txr->bnapi = bnapi2; in bnxt_alloc_mem()
5471 if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS)) in bnxt_alloc_mem()
5472 txr->tx_cpr = &bnapi2->cp_ring; in bnxt_alloc_mem()
5507 bp->vnic_info[BNXT_VNIC_DEFAULT].flags |= BNXT_VNIC_RSS_FLAG | in bnxt_alloc_mem()
5510 if (BNXT_SUPPORTS_NTUPLE_VNIC(bp) && (bp->flags & BNXT_FLAG_RFS)) in bnxt_alloc_mem()
5511 bp->vnic_info[BNXT_VNIC_NTUPLE].flags |= in bnxt_alloc_mem()
5528 if (!bp->bnapi) in bnxt_disable_int()
5531 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_disable_int()
5532 struct bnxt_napi *bnapi = bp->bnapi[i]; in bnxt_disable_int()
5533 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; in bnxt_disable_int()
5534 struct bnxt_ring_struct *ring = &cpr->cp_ring_struct; in bnxt_disable_int()
5536 if (ring->fw_ring_id != INVALID_HW_RING_ID) in bnxt_disable_int()
5537 bnxt_db_nq(bp, &cpr->cp_db, cpr->cp_raw_cons); in bnxt_disable_int()
5543 struct bnxt_napi *bnapi = bp->bnapi[n]; in bnxt_cp_num_to_irq_num()
5546 cpr = &bnapi->cp_ring; in bnxt_cp_num_to_irq_num()
5547 return cpr->cp_ring_struct.map_idx; in bnxt_cp_num_to_irq_num()
5554 if (!bp->irq_tbl) in bnxt_disable_int_sync()
5557 atomic_inc(&bp->intr_sem); in bnxt_disable_int_sync()
5560 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_disable_int_sync()
5563 synchronize_irq(bp->irq_tbl[map_idx].vector); in bnxt_disable_int_sync()
5571 atomic_set(&bp->intr_sem, 0); in bnxt_enable_int()
5572 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_enable_int()
5573 struct bnxt_napi *bnapi = bp->bnapi[i]; in bnxt_enable_int()
5574 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; in bnxt_enable_int()
5576 bnxt_db_nq_arm(bp, &cpr->cp_db, cpr->cp_raw_cons); in bnxt_enable_int()
5594 req->enables = cpu_to_le32(FUNC_DRV_RGTR_REQ_ENABLES_OS_TYPE | in bnxt_hwrm_func_drv_rgtr()
5598 req->os_type = cpu_to_le16(FUNC_DRV_RGTR_REQ_OS_TYPE_LINUX); in bnxt_hwrm_func_drv_rgtr()
5600 if (bp->fw_cap & BNXT_FW_CAP_HOT_RESET) in bnxt_hwrm_func_drv_rgtr()
5602 if (bp->fw_cap & BNXT_FW_CAP_ERROR_RECOVERY) in bnxt_hwrm_func_drv_rgtr()
5605 if (bp->fw_cap & BNXT_FW_CAP_NPAR_1_2) in bnxt_hwrm_func_drv_rgtr()
5607 req->flags = cpu_to_le32(flags); in bnxt_hwrm_func_drv_rgtr()
5608 req->ver_maj_8b = DRV_VER_MAJ; in bnxt_hwrm_func_drv_rgtr()
5609 req->ver_min_8b = DRV_VER_MIN; in bnxt_hwrm_func_drv_rgtr()
5610 req->ver_upd_8b = DRV_VER_UPD; in bnxt_hwrm_func_drv_rgtr()
5611 req->ver_maj = cpu_to_le16(DRV_VER_MAJ); in bnxt_hwrm_func_drv_rgtr()
5612 req->ver_min = cpu_to_le16(DRV_VER_MIN); in bnxt_hwrm_func_drv_rgtr()
5613 req->ver_upd = cpu_to_le16(DRV_VER_UPD); in bnxt_hwrm_func_drv_rgtr()
5630 req->vf_req_fwd[i] = cpu_to_le32(data[i]); in bnxt_hwrm_func_drv_rgtr()
5632 req->enables |= in bnxt_hwrm_func_drv_rgtr()
5636 if (bp->fw_cap & BNXT_FW_CAP_OVS_64BIT_HANDLE) in bnxt_hwrm_func_drv_rgtr()
5637 req->flags |= cpu_to_le32( in bnxt_hwrm_func_drv_rgtr()
5645 !(bp->fw_cap & BNXT_FW_CAP_ERROR_RECOVERY)) in bnxt_hwrm_func_drv_rgtr()
5648 !bp->ptp_cfg) in bnxt_hwrm_func_drv_rgtr()
5659 req->async_event_fwd[i] |= cpu_to_le32(events[i]); in bnxt_hwrm_func_drv_rgtr()
5662 req->enables = in bnxt_hwrm_func_drv_rgtr()
5668 set_bit(BNXT_STATE_DRV_REGISTERED, &bp->state); in bnxt_hwrm_func_drv_rgtr()
5669 if (resp->flags & in bnxt_hwrm_func_drv_rgtr()
5671 bp->fw_cap |= BNXT_FW_CAP_IF_CHANGE; in bnxt_hwrm_func_drv_rgtr()
5682 if (!test_and_clear_bit(BNXT_STATE_DRV_REGISTERED, &bp->state)) in bnxt_hwrm_func_drv_unrgtr()
5699 bp->vxlan_fw_dst_port_id == INVALID_HW_RING_ID) in bnxt_hwrm_tunnel_dst_port_free()
5702 bp->nge_fw_dst_port_id == INVALID_HW_RING_ID) in bnxt_hwrm_tunnel_dst_port_free()
5709 req->tunnel_type = tunnel_type; in bnxt_hwrm_tunnel_dst_port_free()
5713 req->tunnel_dst_port_id = cpu_to_le16(bp->vxlan_fw_dst_port_id); in bnxt_hwrm_tunnel_dst_port_free()
5714 bp->vxlan_port = 0; in bnxt_hwrm_tunnel_dst_port_free()
5715 bp->vxlan_fw_dst_port_id = INVALID_HW_RING_ID; in bnxt_hwrm_tunnel_dst_port_free()
5718 req->tunnel_dst_port_id = cpu_to_le16(bp->nge_fw_dst_port_id); in bnxt_hwrm_tunnel_dst_port_free()
5719 bp->nge_port = 0; in bnxt_hwrm_tunnel_dst_port_free()
5720 bp->nge_fw_dst_port_id = INVALID_HW_RING_ID; in bnxt_hwrm_tunnel_dst_port_free()
5723 req->tunnel_dst_port_id = cpu_to_le16(bp->vxlan_gpe_fw_dst_port_id); in bnxt_hwrm_tunnel_dst_port_free()
5724 bp->vxlan_gpe_port = 0; in bnxt_hwrm_tunnel_dst_port_free()
5725 bp->vxlan_gpe_fw_dst_port_id = INVALID_HW_RING_ID; in bnxt_hwrm_tunnel_dst_port_free()
5733 netdev_err(bp->dev, "hwrm_tunnel_dst_port_free failed. rc:%d\n", in bnxt_hwrm_tunnel_dst_port_free()
5735 if (bp->flags & BNXT_FLAG_TPA) in bnxt_hwrm_tunnel_dst_port_free()
5751 req->tunnel_type = tunnel_type; in bnxt_hwrm_tunnel_dst_port_alloc()
5752 req->tunnel_dst_port_val = port; in bnxt_hwrm_tunnel_dst_port_alloc()
5757 netdev_err(bp->dev, "hwrm_tunnel_dst_port_alloc failed. rc:%d\n", in bnxt_hwrm_tunnel_dst_port_alloc()
5764 bp->vxlan_port = port; in bnxt_hwrm_tunnel_dst_port_alloc()
5765 bp->vxlan_fw_dst_port_id = in bnxt_hwrm_tunnel_dst_port_alloc()
5766 le16_to_cpu(resp->tunnel_dst_port_id); in bnxt_hwrm_tunnel_dst_port_alloc()
5769 bp->nge_port = port; in bnxt_hwrm_tunnel_dst_port_alloc()
5770 bp->nge_fw_dst_port_id = le16_to_cpu(resp->tunnel_dst_port_id); in bnxt_hwrm_tunnel_dst_port_alloc()
5773 bp->vxlan_gpe_port = port; in bnxt_hwrm_tunnel_dst_port_alloc()
5774 bp->vxlan_gpe_fw_dst_port_id = in bnxt_hwrm_tunnel_dst_port_alloc()
5775 le16_to_cpu(resp->tunnel_dst_port_id); in bnxt_hwrm_tunnel_dst_port_alloc()
5780 if (bp->flags & BNXT_FLAG_TPA) in bnxt_hwrm_tunnel_dst_port_alloc()
5791 struct bnxt_vnic_info *vnic = &bp->vnic_info[vnic_id]; in bnxt_hwrm_cfa_l2_set_rx_mask()
5798 req->vnic_id = cpu_to_le32(vnic->fw_vnic_id); in bnxt_hwrm_cfa_l2_set_rx_mask()
5799 if (vnic->rx_mask & CFA_L2_SET_RX_MASK_REQ_MASK_MCAST) { in bnxt_hwrm_cfa_l2_set_rx_mask()
5800 req->num_mc_entries = cpu_to_le32(vnic->mc_list_count); in bnxt_hwrm_cfa_l2_set_rx_mask()
5801 req->mc_tbl_addr = cpu_to_le64(vnic->mc_list_mapping); in bnxt_hwrm_cfa_l2_set_rx_mask()
5803 req->mask = cpu_to_le32(vnic->rx_mask); in bnxt_hwrm_cfa_l2_set_rx_mask()
5809 if (!atomic_dec_and_test(&fltr->refcnt)) in bnxt_del_l2_filter()
5811 spin_lock_bh(&bp->ntp_fltr_lock); in bnxt_del_l2_filter()
5812 if (!test_and_clear_bit(BNXT_FLTR_INSERTED, &fltr->base.state)) { in bnxt_del_l2_filter()
5813 spin_unlock_bh(&bp->ntp_fltr_lock); in bnxt_del_l2_filter()
5816 hlist_del_rcu(&fltr->base.hash); in bnxt_del_l2_filter()
5817 bnxt_del_one_usr_fltr(bp, &fltr->base); in bnxt_del_l2_filter()
5818 if (fltr->base.flags) { in bnxt_del_l2_filter()
5819 clear_bit(fltr->base.sw_id, bp->ntp_fltr_bmap); in bnxt_del_l2_filter()
5820 bp->ntp_fltr_count--; in bnxt_del_l2_filter()
5822 spin_unlock_bh(&bp->ntp_fltr_lock); in bnxt_del_l2_filter()
5830 struct hlist_head *head = &bp->l2_fltr_hash_tbl[idx]; in __bnxt_lookup_l2_filter()
5834 struct bnxt_l2_key *l2_key = &fltr->l2_key; in __bnxt_lookup_l2_filter()
5836 if (ether_addr_equal(l2_key->dst_mac_addr, key->dst_mac_addr) && in __bnxt_lookup_l2_filter()
5837 l2_key->vlan == key->vlan) in __bnxt_lookup_l2_filter()
5852 atomic_inc(&fltr->refcnt); in bnxt_lookup_l2_filter()
5858 (((fkeys)->basic.ip_proto == IPPROTO_TCP && \
5859 (bp)->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4) || \
5860 ((fkeys)->basic.ip_proto == IPPROTO_UDP && \
5861 (bp)->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4))
5864 (((fkeys)->basic.ip_proto == IPPROTO_TCP && \
5865 (bp)->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6) || \
5866 ((fkeys)->basic.ip_proto == IPPROTO_UDP && \
5867 (bp)->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6))
5871 if (fkeys->basic.n_proto == htons(ETH_P_IP)) { in bnxt_get_rss_flow_tuple_len()
5873 return sizeof(fkeys->addrs.v4addrs) + in bnxt_get_rss_flow_tuple_len()
5874 sizeof(fkeys->ports); in bnxt_get_rss_flow_tuple_len()
5876 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4) in bnxt_get_rss_flow_tuple_len()
5877 return sizeof(fkeys->addrs.v4addrs); in bnxt_get_rss_flow_tuple_len()
5880 if (fkeys->basic.n_proto == htons(ETH_P_IPV6)) { in bnxt_get_rss_flow_tuple_len()
5882 return sizeof(fkeys->addrs.v6addrs) + in bnxt_get_rss_flow_tuple_len()
5883 sizeof(fkeys->ports); in bnxt_get_rss_flow_tuple_len()
5885 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6) in bnxt_get_rss_flow_tuple_len()
5886 return sizeof(fkeys->addrs.v6addrs); in bnxt_get_rss_flow_tuple_len()
5895 u64 prefix = bp->toeplitz_prefix, hash = 0; in bnxt_toeplitz()
5905 if (fkeys->basic.n_proto == htons(ETH_P_IP)) { in bnxt_toeplitz()
5906 tuple4.v4addrs = fkeys->addrs.v4addrs; in bnxt_toeplitz()
5907 tuple4.ports = fkeys->ports; in bnxt_toeplitz()
5910 tuple6.v6addrs = fkeys->addrs.v6addrs; in bnxt_toeplitz()
5911 tuple6.ports = fkeys->ports; in bnxt_toeplitz()
5937 idx = jhash2(&key->filter_key, BNXT_L2_KEY_SIZE, bp->hash_seed) & in bnxt_lookup_l2_filter_from_key()
5949 ether_addr_copy(fltr->l2_key.dst_mac_addr, key->dst_mac_addr); in bnxt_init_l2_filter()
5950 fltr->l2_key.vlan = key->vlan; in bnxt_init_l2_filter()
5951 fltr->base.type = BNXT_FLTR_TYPE_L2; in bnxt_init_l2_filter()
5952 if (fltr->base.flags) { in bnxt_init_l2_filter()
5955 bit_id = bitmap_find_free_region(bp->ntp_fltr_bmap, in bnxt_init_l2_filter()
5956 bp->max_fltr, 0); in bnxt_init_l2_filter()
5958 return -ENOMEM; in bnxt_init_l2_filter()
5959 fltr->base.sw_id = (u16)bit_id; in bnxt_init_l2_filter()
5960 bp->ntp_fltr_count++; in bnxt_init_l2_filter()
5962 head = &bp->l2_fltr_hash_tbl[idx]; in bnxt_init_l2_filter()
5963 hlist_add_head_rcu(&fltr->base.hash, head); in bnxt_init_l2_filter()
5964 bnxt_insert_usr_fltr(bp, &fltr->base); in bnxt_init_l2_filter()
5965 set_bit(BNXT_FLTR_INSERTED, &fltr->base.state); in bnxt_init_l2_filter()
5966 atomic_set(&fltr->refcnt, 1); in bnxt_init_l2_filter()
5978 idx = jhash2(&key->filter_key, BNXT_L2_KEY_SIZE, bp->hash_seed) & in bnxt_alloc_l2_filter()
5986 return ERR_PTR(-ENOMEM); in bnxt_alloc_l2_filter()
5987 spin_lock_bh(&bp->ntp_fltr_lock); in bnxt_alloc_l2_filter()
5989 spin_unlock_bh(&bp->ntp_fltr_lock); in bnxt_alloc_l2_filter()
6005 idx = jhash2(&key->filter_key, BNXT_L2_KEY_SIZE, bp->hash_seed) & in bnxt_alloc_new_l2_filter()
6007 spin_lock_bh(&bp->ntp_fltr_lock); in bnxt_alloc_new_l2_filter()
6010 fltr = ERR_PTR(-EEXIST); in bnxt_alloc_new_l2_filter()
6015 fltr = ERR_PTR(-ENOMEM); in bnxt_alloc_new_l2_filter()
6018 fltr->base.flags = flags; in bnxt_alloc_new_l2_filter()
6021 spin_unlock_bh(&bp->ntp_fltr_lock); in bnxt_alloc_new_l2_filter()
6027 spin_unlock_bh(&bp->ntp_fltr_lock); in bnxt_alloc_new_l2_filter()
6034 struct bnxt_vf_info *vf = &pf->vf[vf_idx]; in bnxt_vf_target_id()
6036 return vf->fw_fid; in bnxt_vf_target_id()
6048 if (fltr->base.flags & BNXT_ACT_FUNC_DST) { in bnxt_hwrm_l2_filter_free()
6049 struct bnxt_pf_info *pf = &bp->pf; in bnxt_hwrm_l2_filter_free()
6051 if (fltr->base.vf_idx >= pf->active_vfs) in bnxt_hwrm_l2_filter_free()
6052 return -EINVAL; in bnxt_hwrm_l2_filter_free()
6054 target_id = bnxt_vf_target_id(pf, fltr->base.vf_idx); in bnxt_hwrm_l2_filter_free()
6056 return -EINVAL; in bnxt_hwrm_l2_filter_free()
6063 req->target_id = cpu_to_le16(target_id); in bnxt_hwrm_l2_filter_free()
6064 req->l2_filter_id = fltr->base.filter_id; in bnxt_hwrm_l2_filter_free()
6075 if (fltr->base.flags & BNXT_ACT_FUNC_DST) { in bnxt_hwrm_l2_filter_alloc()
6076 struct bnxt_pf_info *pf = &bp->pf; in bnxt_hwrm_l2_filter_alloc()
6078 if (fltr->base.vf_idx >= pf->active_vfs) in bnxt_hwrm_l2_filter_alloc()
6079 return -EINVAL; in bnxt_hwrm_l2_filter_alloc()
6081 target_id = bnxt_vf_target_id(pf, fltr->base.vf_idx); in bnxt_hwrm_l2_filter_alloc()
6087 req->target_id = cpu_to_le16(target_id); in bnxt_hwrm_l2_filter_alloc()
6088 req->flags = cpu_to_le32(CFA_L2_FILTER_ALLOC_REQ_FLAGS_PATH_RX); in bnxt_hwrm_l2_filter_alloc()
6091 req->flags |= in bnxt_hwrm_l2_filter_alloc()
6093 req->dst_id = cpu_to_le16(fltr->base.fw_vnic_id); in bnxt_hwrm_l2_filter_alloc()
6094 req->enables = in bnxt_hwrm_l2_filter_alloc()
6098 ether_addr_copy(req->l2_addr, fltr->l2_key.dst_mac_addr); in bnxt_hwrm_l2_filter_alloc()
6099 eth_broadcast_addr(req->l2_addr_mask); in bnxt_hwrm_l2_filter_alloc()
6101 if (fltr->l2_key.vlan) { in bnxt_hwrm_l2_filter_alloc()
6102 req->enables |= in bnxt_hwrm_l2_filter_alloc()
6106 req->num_vlans = 1; in bnxt_hwrm_l2_filter_alloc()
6107 req->l2_ivlan = cpu_to_le16(fltr->l2_key.vlan); in bnxt_hwrm_l2_filter_alloc()
6108 req->l2_ivlan_mask = cpu_to_le16(0xfff); in bnxt_hwrm_l2_filter_alloc()
6114 fltr->base.filter_id = resp->l2_filter_id; in bnxt_hwrm_l2_filter_alloc()
6115 set_bit(BNXT_FLTR_VALID, &fltr->base.state); in bnxt_hwrm_l2_filter_alloc()
6127 set_bit(BNXT_FLTR_FW_DELETED, &fltr->base.state); in bnxt_hwrm_cfa_ntuple_filter_free()
6132 req->ntuple_filter_id = fltr->base.filter_id; in bnxt_hwrm_cfa_ntuple_filter_free()
6167 u16 rxq = fltr->base.rxq; in bnxt_cfg_rfs_ring_tbl_idx()
6169 if (fltr->base.flags & BNXT_ACT_RSS_CTX) { in bnxt_cfg_rfs_ring_tbl_idx()
6174 ctx = xa_load(&bp->dev->ethtool->rss_ctx, in bnxt_cfg_rfs_ring_tbl_idx()
6175 fltr->base.fw_vnic_id); in bnxt_cfg_rfs_ring_tbl_idx()
6178 vnic = &rss_ctx->vnic; in bnxt_cfg_rfs_ring_tbl_idx()
6180 req->dst_id = cpu_to_le16(vnic->fw_vnic_id); in bnxt_cfg_rfs_ring_tbl_idx()
6188 vnic = &bp->vnic_info[BNXT_VNIC_NTUPLE]; in bnxt_cfg_rfs_ring_tbl_idx()
6189 req->dst_id = cpu_to_le16(vnic->fw_vnic_id); in bnxt_cfg_rfs_ring_tbl_idx()
6191 req->enables |= cpu_to_le32(enables); in bnxt_cfg_rfs_ring_tbl_idx()
6192 req->rfs_ring_tbl_idx = cpu_to_le16(rxq); in bnxt_cfg_rfs_ring_tbl_idx()
6197 req->flags |= cpu_to_le32(flags); in bnxt_cfg_rfs_ring_tbl_idx()
6198 req->dst_id = cpu_to_le16(rxq); in bnxt_cfg_rfs_ring_tbl_idx()
6207 struct bnxt_flow_masks *masks = &fltr->fmasks; in bnxt_hwrm_cfa_ntuple_filter_alloc()
6208 struct flow_keys *keys = &fltr->fkeys; in bnxt_hwrm_cfa_ntuple_filter_alloc()
6217 l2_fltr = fltr->l2_fltr; in bnxt_hwrm_cfa_ntuple_filter_alloc()
6218 req->l2_filter_id = l2_fltr->base.filter_id; in bnxt_hwrm_cfa_ntuple_filter_alloc()
6220 if (fltr->base.flags & BNXT_ACT_DROP) { in bnxt_hwrm_cfa_ntuple_filter_alloc()
6221 req->flags = in bnxt_hwrm_cfa_ntuple_filter_alloc()
6223 } else if (bp->fw_cap & BNXT_FW_CAP_CFA_RFS_RING_TBL_IDX_V2) { in bnxt_hwrm_cfa_ntuple_filter_alloc()
6226 vnic = &bp->vnic_info[fltr->base.rxq + 1]; in bnxt_hwrm_cfa_ntuple_filter_alloc()
6227 req->dst_id = cpu_to_le16(vnic->fw_vnic_id); in bnxt_hwrm_cfa_ntuple_filter_alloc()
6229 req->enables |= cpu_to_le32(BNXT_NTP_FLTR_FLAGS); in bnxt_hwrm_cfa_ntuple_filter_alloc()
6231 req->ethertype = htons(ETH_P_IP); in bnxt_hwrm_cfa_ntuple_filter_alloc()
6232 req->ip_addr_type = CFA_NTUPLE_FILTER_ALLOC_REQ_IP_ADDR_TYPE_IPV4; in bnxt_hwrm_cfa_ntuple_filter_alloc()
6233 req->ip_protocol = keys->basic.ip_proto; in bnxt_hwrm_cfa_ntuple_filter_alloc()
6235 if (keys->basic.n_proto == htons(ETH_P_IPV6)) { in bnxt_hwrm_cfa_ntuple_filter_alloc()
6236 req->ethertype = htons(ETH_P_IPV6); in bnxt_hwrm_cfa_ntuple_filter_alloc()
6237 req->ip_addr_type = in bnxt_hwrm_cfa_ntuple_filter_alloc()
6239 *(struct in6_addr *)&req->src_ipaddr[0] = keys->addrs.v6addrs.src; in bnxt_hwrm_cfa_ntuple_filter_alloc()
6240 *(struct in6_addr *)&req->src_ipaddr_mask[0] = masks->addrs.v6addrs.src; in bnxt_hwrm_cfa_ntuple_filter_alloc()
6241 *(struct in6_addr *)&req->dst_ipaddr[0] = keys->addrs.v6addrs.dst; in bnxt_hwrm_cfa_ntuple_filter_alloc()
6242 *(struct in6_addr *)&req->dst_ipaddr_mask[0] = masks->addrs.v6addrs.dst; in bnxt_hwrm_cfa_ntuple_filter_alloc()
6244 req->src_ipaddr[0] = keys->addrs.v4addrs.src; in bnxt_hwrm_cfa_ntuple_filter_alloc()
6245 req->src_ipaddr_mask[0] = masks->addrs.v4addrs.src; in bnxt_hwrm_cfa_ntuple_filter_alloc()
6246 req->dst_ipaddr[0] = keys->addrs.v4addrs.dst; in bnxt_hwrm_cfa_ntuple_filter_alloc()
6247 req->dst_ipaddr_mask[0] = masks->addrs.v4addrs.dst; in bnxt_hwrm_cfa_ntuple_filter_alloc()
6249 if (keys->control.flags & FLOW_DIS_ENCAPSULATION) { in bnxt_hwrm_cfa_ntuple_filter_alloc()
6250 req->enables |= cpu_to_le32(BNXT_NTP_TUNNEL_FLTR_FLAG); in bnxt_hwrm_cfa_ntuple_filter_alloc()
6251 req->tunnel_type = in bnxt_hwrm_cfa_ntuple_filter_alloc()
6255 req->src_port = keys->ports.src; in bnxt_hwrm_cfa_ntuple_filter_alloc()
6256 req->src_port_mask = masks->ports.src; in bnxt_hwrm_cfa_ntuple_filter_alloc()
6257 req->dst_port = keys->ports.dst; in bnxt_hwrm_cfa_ntuple_filter_alloc()
6258 req->dst_port_mask = masks->ports.dst; in bnxt_hwrm_cfa_ntuple_filter_alloc()
6263 fltr->base.filter_id = resp->ntuple_filter_id; in bnxt_hwrm_cfa_ntuple_filter_alloc()
6281 fltr->base.fw_vnic_id = bp->vnic_info[vnic_id].fw_vnic_id; in bnxt_hwrm_set_vnic_filter()
6286 bp->vnic_info[vnic_id].l2_filters[idx] = fltr; in bnxt_hwrm_set_vnic_filter()
6296 struct bnxt_vnic_info *vnic = &bp->vnic_info[i]; in bnxt_hwrm_clear_vnic_filter()
6298 for (j = 0; j < vnic->uc_filter_count; j++) { in bnxt_hwrm_clear_vnic_filter()
6299 struct bnxt_l2_filter *fltr = vnic->l2_filters[j]; in bnxt_hwrm_clear_vnic_filter()
6304 vnic->uc_filter_count = 0; in bnxt_hwrm_clear_vnic_filter()
6318 if (!(bp->fw_cap & BNXT_FW_CAP_VNIC_TUNNEL_TPA)) in bnxt_hwrm_vnic_update_tunl_tpa()
6321 if (bp->vxlan_port) in bnxt_hwrm_vnic_update_tunl_tpa()
6323 if (bp->vxlan_gpe_port) in bnxt_hwrm_vnic_update_tunl_tpa()
6325 if (bp->nge_port) in bnxt_hwrm_vnic_update_tunl_tpa()
6328 req->enables |= cpu_to_le32(VNIC_TPA_CFG_REQ_ENABLES_TNL_TPA_EN); in bnxt_hwrm_vnic_update_tunl_tpa()
6329 req->tnl_tpa_en_bitmap = cpu_to_le32(tunl_tpa_bmap); in bnxt_hwrm_vnic_update_tunl_tpa()
6339 if (vnic->fw_vnic_id == INVALID_HW_RING_ID) in bnxt_hwrm_vnic_set_tpa()
6347 u16 mss = bp->dev->mtu - 40; in bnxt_hwrm_vnic_set_tpa()
6358 req->flags = cpu_to_le32(flags); in bnxt_hwrm_vnic_set_tpa()
6360 req->enables = in bnxt_hwrm_vnic_set_tpa()
6370 nsegs = (MAX_SKB_FRAGS - 1) * n; in bnxt_hwrm_vnic_set_tpa()
6373 if (mss & (BNXT_RX_PAGE_SIZE - 1)) in bnxt_hwrm_vnic_set_tpa()
6375 nsegs = (MAX_SKB_FRAGS - n) / n; in bnxt_hwrm_vnic_set_tpa()
6378 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in bnxt_hwrm_vnic_set_tpa()
6380 max_aggs = bp->max_tpa; in bnxt_hwrm_vnic_set_tpa()
6384 req->max_agg_segs = cpu_to_le16(segs); in bnxt_hwrm_vnic_set_tpa()
6385 req->max_aggs = cpu_to_le16(max_aggs); in bnxt_hwrm_vnic_set_tpa()
6387 req->min_agg_len = cpu_to_le32(512); in bnxt_hwrm_vnic_set_tpa()
6390 req->vnic_id = cpu_to_le16(vnic->fw_vnic_id); in bnxt_hwrm_vnic_set_tpa()
6399 grp_info = &bp->grp_info[ring->grp_idx]; in bnxt_cp_ring_from_grp()
6400 return grp_info->cp_fw_ring_id; in bnxt_cp_ring_from_grp()
6405 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_cp_ring_for_rx()
6406 return rxr->rx_cpr->cp_ring_struct.fw_ring_id; in bnxt_cp_ring_for_rx()
6408 return bnxt_cp_ring_from_grp(bp, &rxr->rx_ring_struct); in bnxt_cp_ring_for_rx()
6413 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_cp_ring_for_tx()
6414 return txr->tx_cpr->cp_ring_struct.fw_ring_id; in bnxt_cp_ring_for_tx()
6416 return bnxt_cp_ring_from_grp(bp, &txr->tx_ring_struct); in bnxt_cp_ring_for_tx()
6423 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_alloc_rss_indir_tbl()
6428 bp->rss_indir_tbl_entries = entries; in bnxt_alloc_rss_indir_tbl()
6429 bp->rss_indir_tbl = in bnxt_alloc_rss_indir_tbl()
6430 kmalloc_array(entries, sizeof(*bp->rss_indir_tbl), GFP_KERNEL); in bnxt_alloc_rss_indir_tbl()
6431 if (!bp->rss_indir_tbl) in bnxt_alloc_rss_indir_tbl()
6432 return -ENOMEM; in bnxt_alloc_rss_indir_tbl()
6443 if (!bp->rx_nr_rings) in bnxt_set_dflt_rss_indir_tbl()
6447 max_rings = bp->rx_nr_rings - 1; in bnxt_set_dflt_rss_indir_tbl()
6449 max_rings = bp->rx_nr_rings; in bnxt_set_dflt_rss_indir_tbl()
6451 max_entries = bnxt_get_rxfh_indir_size(bp->dev); in bnxt_set_dflt_rss_indir_tbl()
6455 rss_indir_tbl = &bp->rss_indir_tbl[0]; in bnxt_set_dflt_rss_indir_tbl()
6460 pad = bp->rss_indir_tbl_entries - max_entries; in bnxt_set_dflt_rss_indir_tbl()
6469 if (!bp->rss_indir_tbl) in bnxt_get_max_rss_ring()
6472 tbl_size = bnxt_get_rxfh_indir_size(bp->dev); in bnxt_get_max_rss_ring()
6474 max_ring = max(max_ring, bp->rss_indir_tbl[i]); in bnxt_get_max_rss_ring()
6480 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in bnxt_get_nr_rss_ctxs()
6483 return bnxt_calc_nr_ring_pages(rx_rings - 1, in bnxt_get_nr_rss_ctxs()
6493 bool no_rss = !(vnic->flags & BNXT_VNIC_RSS_FLAG); in bnxt_fill_hw_rss_tbl()
6499 j = bp->rss_indir_tbl[i]; in bnxt_fill_hw_rss_tbl()
6500 vnic->rss_table[i] = cpu_to_le16(vnic->fw_grp_ids[j]); in bnxt_fill_hw_rss_tbl()
6507 __le16 *ring_tbl = vnic->rss_table; in bnxt_fill_hw_rss_tbl_p5()
6511 tbl_size = bnxt_get_rxfh_indir_size(bp->dev); in bnxt_fill_hw_rss_tbl_p5()
6516 if (vnic->flags & BNXT_VNIC_NTUPLE_FLAG) in bnxt_fill_hw_rss_tbl_p5()
6517 j = ethtool_rxfh_indir_default(i, bp->rx_nr_rings); in bnxt_fill_hw_rss_tbl_p5()
6518 else if (vnic->flags & BNXT_VNIC_RSSCTX_FLAG) in bnxt_fill_hw_rss_tbl_p5()
6519 j = ethtool_rxfh_context_indir(vnic->rss_ctx)[i]; in bnxt_fill_hw_rss_tbl_p5()
6521 j = bp->rss_indir_tbl[i]; in bnxt_fill_hw_rss_tbl_p5()
6522 rxr = &bp->rx_ring[j]; in bnxt_fill_hw_rss_tbl_p5()
6524 ring_id = rxr->rx_ring_struct.fw_ring_id; in bnxt_fill_hw_rss_tbl_p5()
6535 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in __bnxt_hwrm_vnic_set_rss()
6537 if (bp->flags & BNXT_FLAG_CHIP_P7) in __bnxt_hwrm_vnic_set_rss()
6538 req->flags |= VNIC_RSS_CFG_REQ_FLAGS_IPSEC_HASH_TYPE_CFG_SUPPORT; in __bnxt_hwrm_vnic_set_rss()
6543 if (bp->rss_hash_delta) { in __bnxt_hwrm_vnic_set_rss()
6544 req->hash_type = cpu_to_le32(bp->rss_hash_delta); in __bnxt_hwrm_vnic_set_rss()
6545 if (bp->rss_hash_cfg & bp->rss_hash_delta) in __bnxt_hwrm_vnic_set_rss()
6546 req->flags |= VNIC_RSS_CFG_REQ_FLAGS_HASH_TYPE_INCLUDE; in __bnxt_hwrm_vnic_set_rss()
6548 req->flags |= VNIC_RSS_CFG_REQ_FLAGS_HASH_TYPE_EXCLUDE; in __bnxt_hwrm_vnic_set_rss()
6550 req->hash_type = cpu_to_le32(bp->rss_hash_cfg); in __bnxt_hwrm_vnic_set_rss()
6552 req->hash_mode_flags = VNIC_RSS_CFG_REQ_HASH_MODE_FLAGS_DEFAULT; in __bnxt_hwrm_vnic_set_rss()
6553 req->ring_grp_tbl_addr = cpu_to_le64(vnic->rss_table_dma_addr); in __bnxt_hwrm_vnic_set_rss()
6554 req->hash_key_tbl_addr = cpu_to_le64(vnic->rss_hash_key_dma_addr); in __bnxt_hwrm_vnic_set_rss()
6563 if ((bp->flags & BNXT_FLAG_CHIP_P5_PLUS) || in bnxt_hwrm_vnic_set_rss()
6564 vnic->fw_rss_cos_lb_ctx[0] == INVALID_HW_RING_ID) in bnxt_hwrm_vnic_set_rss()
6573 req->rss_ctx_idx = cpu_to_le16(vnic->fw_rss_cos_lb_ctx[0]); in bnxt_hwrm_vnic_set_rss()
6589 req->vnic_id = cpu_to_le16(vnic->fw_vnic_id); in bnxt_hwrm_vnic_set_rss_p5()
6594 ring_tbl_map = vnic->rss_table_dma_addr; in bnxt_hwrm_vnic_set_rss_p5()
6595 nr_ctxs = bnxt_get_nr_rss_ctxs(bp, bp->rx_nr_rings); in bnxt_hwrm_vnic_set_rss_p5()
6599 req->ring_grp_tbl_addr = cpu_to_le64(ring_tbl_map); in bnxt_hwrm_vnic_set_rss_p5()
6600 req->ring_table_pair_index = i; in bnxt_hwrm_vnic_set_rss_p5()
6601 req->rss_ctx_idx = cpu_to_le16(vnic->fw_rss_cos_lb_ctx[i]); in bnxt_hwrm_vnic_set_rss_p5()
6614 struct bnxt_vnic_info *vnic = &bp->vnic_info[BNXT_VNIC_DEFAULT]; in bnxt_hwrm_update_rss_hash_cfg()
6621 req->vnic_id = cpu_to_le16(vnic->fw_vnic_id); in bnxt_hwrm_update_rss_hash_cfg()
6623 req->rss_ctx_idx = cpu_to_le16(vnic->fw_rss_cos_lb_ctx[0]); in bnxt_hwrm_update_rss_hash_cfg()
6626 bp->rss_hash_cfg = le32_to_cpu(resp->hash_type) ?: bp->rss_hash_cfg; in bnxt_hwrm_update_rss_hash_cfg()
6627 bp->rss_hash_delta = 0; in bnxt_hwrm_update_rss_hash_cfg()
6634 u16 hds_thresh = (u16)bp->dev->cfg_pending->hds_thresh; in bnxt_hwrm_vnic_set_hds()
6642 req->flags = cpu_to_le32(VNIC_PLCMODES_CFG_REQ_FLAGS_JUMBO_PLACEMENT); in bnxt_hwrm_vnic_set_hds()
6643 req->enables = cpu_to_le32(VNIC_PLCMODES_CFG_REQ_ENABLES_JUMBO_THRESH_VALID); in bnxt_hwrm_vnic_set_hds()
6644 req->jumbo_thresh = cpu_to_le16(bp->rx_buf_use_size); in bnxt_hwrm_vnic_set_hds()
6646 if (!BNXT_RX_PAGE_MODE(bp) && (bp->flags & BNXT_FLAG_AGG_RINGS)) { in bnxt_hwrm_vnic_set_hds()
6647 req->flags |= cpu_to_le32(VNIC_PLCMODES_CFG_REQ_FLAGS_HDS_IPV4 | in bnxt_hwrm_vnic_set_hds()
6649 req->enables |= in bnxt_hwrm_vnic_set_hds()
6651 req->hds_threshold = cpu_to_le16(hds_thresh); in bnxt_hwrm_vnic_set_hds()
6653 req->vnic_id = cpu_to_le32(vnic->fw_vnic_id); in bnxt_hwrm_vnic_set_hds()
6666 req->rss_cos_lb_ctx_id = in bnxt_hwrm_vnic_ctx_free_one()
6667 cpu_to_le16(vnic->fw_rss_cos_lb_ctx[ctx_idx]); in bnxt_hwrm_vnic_ctx_free_one()
6670 vnic->fw_rss_cos_lb_ctx[ctx_idx] = INVALID_HW_RING_ID; in bnxt_hwrm_vnic_ctx_free_one()
6677 for (i = 0; i < bp->nr_vnics; i++) { in bnxt_hwrm_vnic_ctx_free()
6678 struct bnxt_vnic_info *vnic = &bp->vnic_info[i]; in bnxt_hwrm_vnic_ctx_free()
6681 if (vnic->fw_rss_cos_lb_ctx[j] != INVALID_HW_RING_ID) in bnxt_hwrm_vnic_ctx_free()
6685 bp->rsscos_nr_ctxs = 0; in bnxt_hwrm_vnic_ctx_free()
6702 vnic->fw_rss_cos_lb_ctx[ctx_idx] = in bnxt_hwrm_vnic_ctx_alloc()
6703 le16_to_cpu(resp->rss_cos_lb_ctx_id); in bnxt_hwrm_vnic_ctx_alloc()
6711 if (bp->flags & BNXT_FLAG_ROCE_MIRROR_CAP) in bnxt_get_roce_vnic_mode()
6718 struct bnxt_vnic_info *vnic0 = &bp->vnic_info[BNXT_VNIC_DEFAULT]; in bnxt_hwrm_vnic_cfg()
6728 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in bnxt_hwrm_vnic_cfg()
6729 struct bnxt_rx_ring_info *rxr = &bp->rx_ring[0]; in bnxt_hwrm_vnic_cfg()
6731 req->default_rx_ring_id = in bnxt_hwrm_vnic_cfg()
6732 cpu_to_le16(rxr->rx_ring_struct.fw_ring_id); in bnxt_hwrm_vnic_cfg()
6733 req->default_cmpl_ring_id = in bnxt_hwrm_vnic_cfg()
6735 req->enables = in bnxt_hwrm_vnic_cfg()
6740 req->enables = cpu_to_le32(VNIC_CFG_REQ_ENABLES_DFLT_RING_GRP); in bnxt_hwrm_vnic_cfg()
6742 if (vnic->fw_rss_cos_lb_ctx[0] != INVALID_HW_RING_ID) { in bnxt_hwrm_vnic_cfg()
6743 req->rss_rule = cpu_to_le16(vnic->fw_rss_cos_lb_ctx[0]); in bnxt_hwrm_vnic_cfg()
6744 req->enables |= cpu_to_le32(VNIC_CFG_REQ_ENABLES_RSS_RULE | in bnxt_hwrm_vnic_cfg()
6746 } else if (vnic->flags & BNXT_VNIC_RFS_NEW_RSS_FLAG) { in bnxt_hwrm_vnic_cfg()
6747 req->rss_rule = cpu_to_le16(vnic0->fw_rss_cos_lb_ctx[0]); in bnxt_hwrm_vnic_cfg()
6748 req->enables |= cpu_to_le32(VNIC_CFG_REQ_ENABLES_RSS_RULE | in bnxt_hwrm_vnic_cfg()
6750 req->flags |= cpu_to_le32(VNIC_CFG_REQ_FLAGS_RSS_DFLT_CR_MODE); in bnxt_hwrm_vnic_cfg()
6752 req->rss_rule = cpu_to_le16(0xffff); in bnxt_hwrm_vnic_cfg()
6756 (vnic->fw_rss_cos_lb_ctx[0] != INVALID_HW_RING_ID)) { in bnxt_hwrm_vnic_cfg()
6757 req->cos_rule = cpu_to_le16(vnic->fw_rss_cos_lb_ctx[1]); in bnxt_hwrm_vnic_cfg()
6758 req->enables |= cpu_to_le32(VNIC_CFG_REQ_ENABLES_COS_RULE); in bnxt_hwrm_vnic_cfg()
6760 req->cos_rule = cpu_to_le16(0xffff); in bnxt_hwrm_vnic_cfg()
6763 if (vnic->flags & BNXT_VNIC_RSS_FLAG) in bnxt_hwrm_vnic_cfg()
6765 else if (vnic->flags & BNXT_VNIC_RFS_FLAG) in bnxt_hwrm_vnic_cfg()
6766 ring = vnic->vnic_id - 1; in bnxt_hwrm_vnic_cfg()
6767 else if ((vnic->vnic_id == 1) && BNXT_CHIP_TYPE_NITRO_A0(bp)) in bnxt_hwrm_vnic_cfg()
6768 ring = bp->rx_nr_rings - 1; in bnxt_hwrm_vnic_cfg()
6770 grp_idx = bp->rx_ring[ring].bnapi->index; in bnxt_hwrm_vnic_cfg()
6771 req->dflt_ring_grp = cpu_to_le16(bp->grp_info[grp_idx].fw_grp_id); in bnxt_hwrm_vnic_cfg()
6772 req->lb_rule = cpu_to_le16(0xffff); in bnxt_hwrm_vnic_cfg()
6774 vnic->mru = bp->dev->mtu + ETH_HLEN + VLAN_HLEN; in bnxt_hwrm_vnic_cfg()
6775 req->mru = cpu_to_le16(vnic->mru); in bnxt_hwrm_vnic_cfg()
6777 req->vnic_id = cpu_to_le16(vnic->fw_vnic_id); in bnxt_hwrm_vnic_cfg()
6780 def_vlan = bp->vf.vlan; in bnxt_hwrm_vnic_cfg()
6782 if ((bp->flags & BNXT_FLAG_STRIP_VLAN) || def_vlan) in bnxt_hwrm_vnic_cfg()
6783 req->flags |= cpu_to_le32(VNIC_CFG_REQ_FLAGS_VLAN_STRIP_MODE); in bnxt_hwrm_vnic_cfg()
6784 if (vnic->vnic_id == BNXT_VNIC_DEFAULT && bnxt_ulp_registered(bp->edev)) in bnxt_hwrm_vnic_cfg()
6785 req->flags |= cpu_to_le32(bnxt_get_roce_vnic_mode(bp)); in bnxt_hwrm_vnic_cfg()
6793 if (vnic->fw_vnic_id != INVALID_HW_RING_ID) { in bnxt_hwrm_vnic_free_one()
6799 req->vnic_id = cpu_to_le32(vnic->fw_vnic_id); in bnxt_hwrm_vnic_free_one()
6802 vnic->fw_vnic_id = INVALID_HW_RING_ID; in bnxt_hwrm_vnic_free_one()
6810 for (i = 0; i < bp->nr_vnics; i++) in bnxt_hwrm_vnic_free()
6811 bnxt_hwrm_vnic_free_one(bp, &bp->vnic_info[i]); in bnxt_hwrm_vnic_free()
6827 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_hwrm_vnic_alloc()
6832 grp_idx = bp->rx_ring[i].bnapi->index; in bnxt_hwrm_vnic_alloc()
6833 if (bp->grp_info[grp_idx].fw_grp_id == INVALID_HW_RING_ID) { in bnxt_hwrm_vnic_alloc()
6834 netdev_err(bp->dev, "Not enough ring groups avail:%x req:%x\n", in bnxt_hwrm_vnic_alloc()
6838 vnic->fw_grp_ids[j] = bp->grp_info[grp_idx].fw_grp_id; in bnxt_hwrm_vnic_alloc()
6843 vnic->fw_rss_cos_lb_ctx[i] = INVALID_HW_RING_ID; in bnxt_hwrm_vnic_alloc()
6844 if (vnic->vnic_id == BNXT_VNIC_DEFAULT) in bnxt_hwrm_vnic_alloc()
6845 req->flags = cpu_to_le32(VNIC_ALLOC_REQ_FLAGS_DEFAULT); in bnxt_hwrm_vnic_alloc()
6850 vnic->fw_vnic_id = le32_to_cpu(resp->vnic_id); in bnxt_hwrm_vnic_alloc()
6861 bp->hw_ring_stats_size = sizeof(struct ctx_hw_stats); in bnxt_hwrm_vnic_qcaps()
6862 bp->flags &= ~BNXT_FLAG_ROCE_MIRROR_CAP; in bnxt_hwrm_vnic_qcaps()
6863 bp->rss_cap &= ~BNXT_RSS_CAP_NEW_RSS_CAP; in bnxt_hwrm_vnic_qcaps()
6864 if (bp->hwrm_spec_code < 0x10600) in bnxt_hwrm_vnic_qcaps()
6874 u32 flags = le32_to_cpu(resp->flags); in bnxt_hwrm_vnic_qcaps()
6876 if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS) && in bnxt_hwrm_vnic_qcaps()
6878 bp->rss_cap |= BNXT_RSS_CAP_NEW_RSS_CAP; in bnxt_hwrm_vnic_qcaps()
6881 bp->flags |= BNXT_FLAG_ROCE_MIRROR_CAP; in bnxt_hwrm_vnic_qcaps()
6888 !(bp->fw_cap & BNXT_FW_CAP_EXT_HW_STATS_SUPPORTED))) in bnxt_hwrm_vnic_qcaps()
6889 bp->fw_cap |= BNXT_FW_CAP_VLAN_RX_STRIP; in bnxt_hwrm_vnic_qcaps()
6891 bp->rss_cap |= BNXT_RSS_CAP_RSS_HASH_TYPE_DELTA; in bnxt_hwrm_vnic_qcaps()
6893 bp->rss_cap |= BNXT_RSS_CAP_RSS_TCAM; in bnxt_hwrm_vnic_qcaps()
6894 bp->max_tpa_v2 = le16_to_cpu(resp->max_aggs_supported); in bnxt_hwrm_vnic_qcaps()
6895 if (bp->max_tpa_v2) { in bnxt_hwrm_vnic_qcaps()
6897 bp->hw_ring_stats_size = BNXT_RING_STATS_SIZE_P5; in bnxt_hwrm_vnic_qcaps()
6899 bp->hw_ring_stats_size = BNXT_RING_STATS_SIZE_P7; in bnxt_hwrm_vnic_qcaps()
6902 bp->fw_cap |= BNXT_FW_CAP_VNIC_TUNNEL_TPA; in bnxt_hwrm_vnic_qcaps()
6904 bp->rss_cap |= BNXT_RSS_CAP_AH_V4_RSS_CAP; in bnxt_hwrm_vnic_qcaps()
6906 bp->rss_cap |= BNXT_RSS_CAP_AH_V6_RSS_CAP; in bnxt_hwrm_vnic_qcaps()
6908 bp->rss_cap |= BNXT_RSS_CAP_ESP_V4_RSS_CAP; in bnxt_hwrm_vnic_qcaps()
6910 bp->rss_cap |= BNXT_RSS_CAP_ESP_V6_RSS_CAP; in bnxt_hwrm_vnic_qcaps()
6912 bp->fw_cap |= BNXT_FW_CAP_VNIC_RE_FLUSH; in bnxt_hwrm_vnic_qcaps()
6925 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_hwrm_ring_grp_alloc()
6933 for (i = 0; i < bp->rx_nr_rings; i++) { in bnxt_hwrm_ring_grp_alloc()
6934 unsigned int grp_idx = bp->rx_ring[i].bnapi->index; in bnxt_hwrm_ring_grp_alloc()
6936 req->cr = cpu_to_le16(bp->grp_info[grp_idx].cp_fw_ring_id); in bnxt_hwrm_ring_grp_alloc()
6937 req->rr = cpu_to_le16(bp->grp_info[grp_idx].rx_fw_ring_id); in bnxt_hwrm_ring_grp_alloc()
6938 req->ar = cpu_to_le16(bp->grp_info[grp_idx].agg_fw_ring_id); in bnxt_hwrm_ring_grp_alloc()
6939 req->sc = cpu_to_le16(bp->grp_info[grp_idx].fw_stats_ctx); in bnxt_hwrm_ring_grp_alloc()
6946 bp->grp_info[grp_idx].fw_grp_id = in bnxt_hwrm_ring_grp_alloc()
6947 le32_to_cpu(resp->ring_group_id); in bnxt_hwrm_ring_grp_alloc()
6958 if (!bp->grp_info || (bp->flags & BNXT_FLAG_CHIP_P5_PLUS)) in bnxt_hwrm_ring_grp_free()
6965 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_hwrm_ring_grp_free()
6966 if (bp->grp_info[i].fw_grp_id == INVALID_HW_RING_ID) in bnxt_hwrm_ring_grp_free()
6968 req->ring_group_id = in bnxt_hwrm_ring_grp_free()
6969 cpu_to_le32(bp->grp_info[i].fw_grp_id); in bnxt_hwrm_ring_grp_free()
6972 bp->grp_info[i].fw_grp_id = INVALID_HW_RING_ID; in bnxt_hwrm_ring_grp_free()
6981 struct bnxt_ring_grp_info *grp_info = &bp->grp_info[ring->grp_idx]; in bnxt_set_rx_ring_params_p5()
6986 req->ring_type = RING_ALLOC_REQ_RING_TYPE_RX_AGG; in bnxt_set_rx_ring_params_p5()
6987 req->rx_ring_id = cpu_to_le16(grp_info->rx_fw_ring_id); in bnxt_set_rx_ring_params_p5()
6988 req->rx_buf_size = cpu_to_le16(BNXT_RX_PAGE_SIZE); in bnxt_set_rx_ring_params_p5()
6991 req->rx_buf_size = cpu_to_le16(bp->rx_buf_use_size); in bnxt_set_rx_ring_params_p5()
6993 req->flags = in bnxt_set_rx_ring_params_p5()
6996 req->stat_ctx_id = cpu_to_le32(grp_info->fw_stats_ctx); in bnxt_set_rx_ring_params_p5()
6997 req->nq_ring_id = cpu_to_le16(grp_info->cp_fw_ring_id); in bnxt_set_rx_ring_params_p5()
6998 req->enables |= cpu_to_le32(enables); in bnxt_set_rx_ring_params_p5()
7007 struct bnxt_ring_mem_info *rmem = &ring->ring_mem; in hwrm_ring_alloc_send_msg()
7016 req->enables = 0; in hwrm_ring_alloc_send_msg()
7017 if (rmem->nr_pages > 1) { in hwrm_ring_alloc_send_msg()
7018 req->page_tbl_addr = cpu_to_le64(rmem->pg_tbl_map); in hwrm_ring_alloc_send_msg()
7020 req->page_size = BNXT_PAGE_SHIFT; in hwrm_ring_alloc_send_msg()
7021 req->page_tbl_depth = 1; in hwrm_ring_alloc_send_msg()
7023 req->page_tbl_addr = cpu_to_le64(rmem->dma_arr[0]); in hwrm_ring_alloc_send_msg()
7025 req->fbo = 0; in hwrm_ring_alloc_send_msg()
7027 req->logical_id = cpu_to_le16(map_index); in hwrm_ring_alloc_send_msg()
7036 req->ring_type = RING_ALLOC_REQ_RING_TYPE_TX; in hwrm_ring_alloc_send_msg()
7038 grp_info = &bp->grp_info[ring->grp_idx]; in hwrm_ring_alloc_send_msg()
7039 req->cmpl_ring_id = cpu_to_le16(bnxt_cp_ring_for_tx(bp, txr)); in hwrm_ring_alloc_send_msg()
7040 req->length = cpu_to_le32(bp->tx_ring_mask + 1); in hwrm_ring_alloc_send_msg()
7041 req->stat_ctx_id = cpu_to_le32(grp_info->fw_stats_ctx); in hwrm_ring_alloc_send_msg()
7042 req->queue_id = cpu_to_le16(ring->queue_id); in hwrm_ring_alloc_send_msg()
7043 if (bp->flags & BNXT_FLAG_TX_COAL_CMPL) in hwrm_ring_alloc_send_msg()
7044 req->cmpl_coal_cnt = in hwrm_ring_alloc_send_msg()
7046 if ((bp->fw_cap & BNXT_FW_CAP_TX_TS_CMP) && bp->ptp_cfg) in hwrm_ring_alloc_send_msg()
7048 req->flags = cpu_to_le16(flags); in hwrm_ring_alloc_send_msg()
7053 req->ring_type = RING_ALLOC_REQ_RING_TYPE_RX; in hwrm_ring_alloc_send_msg()
7054 req->length = (ring_type == HWRM_RING_ALLOC_RX) ? in hwrm_ring_alloc_send_msg()
7055 cpu_to_le32(bp->rx_ring_mask + 1) : in hwrm_ring_alloc_send_msg()
7056 cpu_to_le32(bp->rx_agg_ring_mask + 1); in hwrm_ring_alloc_send_msg()
7057 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in hwrm_ring_alloc_send_msg()
7061 req->ring_type = RING_ALLOC_REQ_RING_TYPE_L2_CMPL; in hwrm_ring_alloc_send_msg()
7062 req->length = cpu_to_le32(bp->cp_ring_mask + 1); in hwrm_ring_alloc_send_msg()
7063 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in hwrm_ring_alloc_send_msg()
7065 grp_info = &bp->grp_info[map_index]; in hwrm_ring_alloc_send_msg()
7066 req->nq_ring_id = cpu_to_le16(grp_info->cp_fw_ring_id); in hwrm_ring_alloc_send_msg()
7067 req->cq_handle = cpu_to_le64(ring->handle); in hwrm_ring_alloc_send_msg()
7068 req->enables |= cpu_to_le32( in hwrm_ring_alloc_send_msg()
7071 req->int_mode = RING_ALLOC_REQ_INT_MODE_MSIX; in hwrm_ring_alloc_send_msg()
7075 req->ring_type = RING_ALLOC_REQ_RING_TYPE_NQ; in hwrm_ring_alloc_send_msg()
7076 req->length = cpu_to_le32(bp->cp_ring_mask + 1); in hwrm_ring_alloc_send_msg()
7077 req->int_mode = RING_ALLOC_REQ_INT_MODE_MSIX; in hwrm_ring_alloc_send_msg()
7080 netdev_err(bp->dev, "hwrm alloc invalid ring type %d\n", in hwrm_ring_alloc_send_msg()
7082 return -1; in hwrm_ring_alloc_send_msg()
7087 err = le16_to_cpu(resp->error_code); in hwrm_ring_alloc_send_msg()
7088 ring_id = le16_to_cpu(resp->ring_id); in hwrm_ring_alloc_send_msg()
7093 netdev_err(bp->dev, "hwrm_ring_alloc type %d failed. rc:%x err:%x\n", in hwrm_ring_alloc_send_msg()
7095 return -EIO; in hwrm_ring_alloc_send_msg()
7097 ring->fw_ring_id = ring_id; in hwrm_ring_alloc_send_msg()
7112 req->fid = cpu_to_le16(0xffff); in bnxt_hwrm_set_async_event_cr()
7113 req->enables = cpu_to_le32(FUNC_CFG_REQ_ENABLES_ASYNC_EVENT_CR); in bnxt_hwrm_set_async_event_cr()
7114 req->async_event_cr = cpu_to_le16(idx); in bnxt_hwrm_set_async_event_cr()
7123 req->enables = in bnxt_hwrm_set_async_event_cr()
7125 req->async_event_cr = cpu_to_le16(idx); in bnxt_hwrm_set_async_event_cr()
7135 db->db_ring_mask = bp->tx_ring_mask; in bnxt_set_db_mask()
7138 db->db_ring_mask = bp->rx_ring_mask; in bnxt_set_db_mask()
7141 db->db_ring_mask = bp->rx_agg_ring_mask; in bnxt_set_db_mask()
7145 db->db_ring_mask = bp->cp_ring_mask; in bnxt_set_db_mask()
7148 if (bp->flags & BNXT_FLAG_CHIP_P7) { in bnxt_set_db_mask()
7149 db->db_epoch_mask = db->db_ring_mask + 1; in bnxt_set_db_mask()
7150 db->db_epoch_shift = DBR_EPOCH_SFT - ilog2(db->db_epoch_mask); in bnxt_set_db_mask()
7157 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in bnxt_set_db()
7160 db->db_key64 = DBR_PATH_L2 | DBR_TYPE_SQ; in bnxt_set_db()
7164 db->db_key64 = DBR_PATH_L2 | DBR_TYPE_SRQ; in bnxt_set_db()
7167 db->db_key64 = DBR_PATH_L2; in bnxt_set_db()
7170 db->db_key64 = DBR_PATH_L2; in bnxt_set_db()
7173 db->db_key64 |= (u64)xid << DBR_XID_SFT; in bnxt_set_db()
7175 if (bp->flags & BNXT_FLAG_CHIP_P7) in bnxt_set_db()
7176 db->db_key64 |= DBR_VALID; in bnxt_set_db()
7178 db->doorbell = bp->bar1 + bp->db_offset; in bnxt_set_db()
7180 db->doorbell = bp->bar1 + map_idx * 0x80; in bnxt_set_db()
7183 db->db_key32 = DB_KEY_TX; in bnxt_set_db()
7187 db->db_key32 = DB_KEY_RX; in bnxt_set_db()
7190 db->db_key32 = DB_KEY_CP; in bnxt_set_db()
7200 struct bnxt_ring_struct *ring = &rxr->rx_ring_struct; in bnxt_hwrm_rx_ring_alloc()
7201 struct bnxt_napi *bnapi = rxr->bnapi; in bnxt_hwrm_rx_ring_alloc()
7203 u32 map_idx = bnapi->index; in bnxt_hwrm_rx_ring_alloc()
7210 bnxt_set_db(bp, &rxr->rx_db, type, map_idx, ring->fw_ring_id); in bnxt_hwrm_rx_ring_alloc()
7211 bp->grp_info[map_idx].rx_fw_ring_id = ring->fw_ring_id; in bnxt_hwrm_rx_ring_alloc()
7219 struct bnxt_ring_struct *ring = &rxr->rx_agg_ring_struct; in bnxt_hwrm_rx_agg_ring_alloc()
7221 u32 grp_idx = ring->grp_idx; in bnxt_hwrm_rx_agg_ring_alloc()
7225 map_idx = grp_idx + bp->rx_nr_rings; in bnxt_hwrm_rx_agg_ring_alloc()
7230 bnxt_set_db(bp, &rxr->rx_agg_db, type, map_idx, in bnxt_hwrm_rx_agg_ring_alloc()
7231 ring->fw_ring_id); in bnxt_hwrm_rx_agg_ring_alloc()
7232 bnxt_db_write(bp, &rxr->rx_agg_db, rxr->rx_agg_prod); in bnxt_hwrm_rx_agg_ring_alloc()
7233 bnxt_db_write(bp, &rxr->rx_db, rxr->rx_prod); in bnxt_hwrm_rx_agg_ring_alloc()
7234 bp->grp_info[grp_idx].agg_fw_ring_id = ring->fw_ring_id; in bnxt_hwrm_rx_agg_ring_alloc()
7243 struct bnxt_napi *bnapi = cpr->bnapi; in bnxt_hwrm_cp_ring_alloc_p5()
7245 u32 map_idx = bnapi->index; in bnxt_hwrm_cp_ring_alloc_p5()
7248 ring = &cpr->cp_ring_struct; in bnxt_hwrm_cp_ring_alloc_p5()
7249 ring->handle = BNXT_SET_NQ_HDL(cpr); in bnxt_hwrm_cp_ring_alloc_p5()
7253 bnxt_set_db(bp, &cpr->cp_db, type, map_idx, ring->fw_ring_id); in bnxt_hwrm_cp_ring_alloc_p5()
7254 bnxt_db_cq(bp, &cpr->cp_db, cpr->cp_raw_cons); in bnxt_hwrm_cp_ring_alloc_p5()
7261 struct bnxt_ring_struct *ring = &txr->tx_ring_struct; in bnxt_hwrm_tx_ring_alloc()
7268 bnxt_set_db(bp, &txr->tx_db, type, tx_idx, ring->fw_ring_id); in bnxt_hwrm_tx_ring_alloc()
7274 bool agg_rings = !!(bp->flags & BNXT_FLAG_AGG_RINGS); in bnxt_hwrm_ring_alloc()
7278 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_hwrm_ring_alloc()
7282 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_hwrm_ring_alloc()
7283 struct bnxt_napi *bnapi = bp->bnapi[i]; in bnxt_hwrm_ring_alloc()
7284 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; in bnxt_hwrm_ring_alloc()
7285 struct bnxt_ring_struct *ring = &cpr->cp_ring_struct; in bnxt_hwrm_ring_alloc()
7286 u32 map_idx = ring->map_idx; in bnxt_hwrm_ring_alloc()
7289 vector = bp->irq_tbl[map_idx].vector; in bnxt_hwrm_ring_alloc()
7296 bnxt_set_db(bp, &cpr->cp_db, type, map_idx, ring->fw_ring_id); in bnxt_hwrm_ring_alloc()
7297 bnxt_db_nq(bp, &cpr->cp_db, cpr->cp_raw_cons); in bnxt_hwrm_ring_alloc()
7299 bp->grp_info[i].cp_fw_ring_id = ring->fw_ring_id; in bnxt_hwrm_ring_alloc()
7302 rc = bnxt_hwrm_set_async_event_cr(bp, ring->fw_ring_id); in bnxt_hwrm_ring_alloc()
7304 netdev_warn(bp->dev, "Failed to set async event completion ring.\n"); in bnxt_hwrm_ring_alloc()
7308 for (i = 0; i < bp->tx_nr_rings; i++) { in bnxt_hwrm_ring_alloc()
7309 struct bnxt_tx_ring_info *txr = &bp->tx_ring[i]; in bnxt_hwrm_ring_alloc()
7311 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in bnxt_hwrm_ring_alloc()
7312 rc = bnxt_hwrm_cp_ring_alloc_p5(bp, txr->tx_cpr); in bnxt_hwrm_ring_alloc()
7321 for (i = 0; i < bp->rx_nr_rings; i++) { in bnxt_hwrm_ring_alloc()
7322 struct bnxt_rx_ring_info *rxr = &bp->rx_ring[i]; in bnxt_hwrm_ring_alloc()
7329 bnxt_db_write(bp, &rxr->rx_db, rxr->rx_prod); in bnxt_hwrm_ring_alloc()
7330 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in bnxt_hwrm_ring_alloc()
7331 rc = bnxt_hwrm_cp_ring_alloc_p5(bp, rxr->rx_cpr); in bnxt_hwrm_ring_alloc()
7338 for (i = 0; i < bp->rx_nr_rings; i++) { in bnxt_hwrm_ring_alloc()
7339 rc = bnxt_hwrm_rx_agg_ring_alloc(bp, &bp->rx_ring[i]); in bnxt_hwrm_ring_alloc()
7355 if (!bp->bnapi || test_bit(BNXT_STATE_NAPI_DISABLED, &bp->state)) in bnxt_cancel_dim()
7360 for (i = 0; i < bp->rx_nr_rings; i++) { in bnxt_cancel_dim()
7361 struct bnxt_rx_ring_info *rxr = &bp->rx_ring[i]; in bnxt_cancel_dim()
7362 struct bnxt_napi *bnapi = rxr->bnapi; in bnxt_cancel_dim()
7364 cancel_work_sync(&bnapi->cp_ring.dim.work); in bnxt_cancel_dim()
7384 req->cmpl_ring = cpu_to_le16(cmpl_ring_id); in hwrm_ring_free_send_msg()
7385 req->ring_type = ring_type; in hwrm_ring_free_send_msg()
7386 req->ring_id = cpu_to_le16(ring->fw_ring_id); in hwrm_ring_free_send_msg()
7390 error_code = le16_to_cpu(resp->error_code); in hwrm_ring_free_send_msg()
7394 netdev_err(bp->dev, "hwrm_ring_free type %d failed. rc:%x err:%x\n", in hwrm_ring_free_send_msg()
7396 return -EIO; in hwrm_ring_free_send_msg()
7405 struct bnxt_ring_struct *ring = &txr->tx_ring_struct; in bnxt_hwrm_tx_ring_free()
7408 if (ring->fw_ring_id == INVALID_HW_RING_ID) in bnxt_hwrm_tx_ring_free()
7415 ring->fw_ring_id = INVALID_HW_RING_ID; in bnxt_hwrm_tx_ring_free()
7422 struct bnxt_ring_struct *ring = &rxr->rx_ring_struct; in bnxt_hwrm_rx_ring_free()
7423 u32 grp_idx = rxr->bnapi->index; in bnxt_hwrm_rx_ring_free()
7426 if (ring->fw_ring_id == INVALID_HW_RING_ID) in bnxt_hwrm_rx_ring_free()
7434 ring->fw_ring_id = INVALID_HW_RING_ID; in bnxt_hwrm_rx_ring_free()
7435 bp->grp_info[grp_idx].rx_fw_ring_id = INVALID_HW_RING_ID; in bnxt_hwrm_rx_ring_free()
7442 struct bnxt_ring_struct *ring = &rxr->rx_agg_ring_struct; in bnxt_hwrm_rx_agg_ring_free()
7443 u32 grp_idx = rxr->bnapi->index; in bnxt_hwrm_rx_agg_ring_free()
7446 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_hwrm_rx_agg_ring_free()
7451 if (ring->fw_ring_id == INVALID_HW_RING_ID) in bnxt_hwrm_rx_agg_ring_free()
7458 ring->fw_ring_id = INVALID_HW_RING_ID; in bnxt_hwrm_rx_agg_ring_free()
7459 bp->grp_info[grp_idx].agg_fw_ring_id = INVALID_HW_RING_ID; in bnxt_hwrm_rx_agg_ring_free()
7467 ring = &cpr->cp_ring_struct; in bnxt_hwrm_cp_ring_free()
7468 if (ring->fw_ring_id == INVALID_HW_RING_ID) in bnxt_hwrm_cp_ring_free()
7473 ring->fw_ring_id = INVALID_HW_RING_ID; in bnxt_hwrm_cp_ring_free()
7478 struct bnxt_ring_struct *ring = &cpr->cp_ring_struct; in bnxt_clear_one_cp_ring()
7479 int i, size = ring->ring_mem.page_size; in bnxt_clear_one_cp_ring()
7481 cpr->cp_raw_cons = 0; in bnxt_clear_one_cp_ring()
7482 cpr->toggle = 0; in bnxt_clear_one_cp_ring()
7484 for (i = 0; i < bp->cp_nr_pages; i++) in bnxt_clear_one_cp_ring()
7485 if (cpr->cp_desc_ring[i]) in bnxt_clear_one_cp_ring()
7486 memset(cpr->cp_desc_ring[i], 0, size); in bnxt_clear_one_cp_ring()
7494 if (!bp->bnapi) in bnxt_hwrm_ring_free()
7497 for (i = 0; i < bp->tx_nr_rings; i++) in bnxt_hwrm_ring_free()
7498 bnxt_hwrm_tx_ring_free(bp, &bp->tx_ring[i], close_path); in bnxt_hwrm_ring_free()
7501 for (i = 0; i < bp->rx_nr_rings; i++) { in bnxt_hwrm_ring_free()
7502 bnxt_hwrm_rx_ring_free(bp, &bp->rx_ring[i], close_path); in bnxt_hwrm_ring_free()
7503 bnxt_hwrm_rx_agg_ring_free(bp, &bp->rx_ring[i], close_path); in bnxt_hwrm_ring_free()
7512 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_hwrm_ring_free()
7516 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_hwrm_ring_free()
7517 struct bnxt_napi *bnapi = bp->bnapi[i]; in bnxt_hwrm_ring_free()
7518 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; in bnxt_hwrm_ring_free()
7522 for (j = 0; j < cpr->cp_ring_count && cpr->cp_ring_arr; j++) in bnxt_hwrm_ring_free()
7523 bnxt_hwrm_cp_ring_free(bp, &cpr->cp_ring_arr[j]); in bnxt_hwrm_ring_free()
7525 ring = &cpr->cp_ring_struct; in bnxt_hwrm_ring_free()
7526 if (ring->fw_ring_id != INVALID_HW_RING_ID) { in bnxt_hwrm_ring_free()
7529 ring->fw_ring_id = INVALID_HW_RING_ID; in bnxt_hwrm_ring_free()
7530 bp->grp_info[i].cp_fw_ring_id = INVALID_HW_RING_ID; in bnxt_hwrm_ring_free()
7542 struct bnxt_hw_resc *hw_resc = &bp->hw_resc; in bnxt_hwrm_get_rings()
7547 if (bp->hwrm_spec_code < 0x10601) in bnxt_hwrm_get_rings()
7554 req->fid = cpu_to_le16(0xffff); in bnxt_hwrm_get_rings()
7562 hw_resc->resv_tx_rings = le16_to_cpu(resp->alloc_tx_rings); in bnxt_hwrm_get_rings()
7566 hw_resc->resv_rx_rings = le16_to_cpu(resp->alloc_rx_rings); in bnxt_hwrm_get_rings()
7567 hw_resc->resv_hw_ring_grps = in bnxt_hwrm_get_rings()
7568 le32_to_cpu(resp->alloc_hw_ring_grps); in bnxt_hwrm_get_rings()
7569 hw_resc->resv_vnics = le16_to_cpu(resp->alloc_vnics); in bnxt_hwrm_get_rings()
7570 hw_resc->resv_rsscos_ctxs = le16_to_cpu(resp->alloc_rsscos_ctx); in bnxt_hwrm_get_rings()
7571 cp = le16_to_cpu(resp->alloc_cmpl_rings); in bnxt_hwrm_get_rings()
7572 stats = le16_to_cpu(resp->alloc_stat_ctx); in bnxt_hwrm_get_rings()
7573 hw_resc->resv_irqs = cp; in bnxt_hwrm_get_rings()
7574 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in bnxt_hwrm_get_rings()
7575 int rx = hw_resc->resv_rx_rings; in bnxt_hwrm_get_rings()
7576 int tx = hw_resc->resv_tx_rings; in bnxt_hwrm_get_rings()
7578 if (bp->flags & BNXT_FLAG_AGG_RINGS) in bnxt_hwrm_get_rings()
7584 if (bp->flags & BNXT_FLAG_AGG_RINGS) in bnxt_hwrm_get_rings()
7586 hw_resc->resv_rx_rings = rx; in bnxt_hwrm_get_rings()
7587 hw_resc->resv_tx_rings = tx; in bnxt_hwrm_get_rings()
7589 hw_resc->resv_irqs = le16_to_cpu(resp->alloc_msix); in bnxt_hwrm_get_rings()
7590 hw_resc->resv_hw_ring_grps = rx; in bnxt_hwrm_get_rings()
7592 hw_resc->resv_cp_rings = cp; in bnxt_hwrm_get_rings()
7593 hw_resc->resv_stat_ctxs = stats; in bnxt_hwrm_get_rings()
7606 if (bp->hwrm_spec_code < 0x10601) in __bnxt_hwrm_get_tx_rings()
7613 req->fid = cpu_to_le16(fid); in __bnxt_hwrm_get_tx_rings()
7617 *tx_rings = le16_to_cpu(resp->alloc_tx_rings); in __bnxt_hwrm_get_tx_rings()
7634 req->fid = cpu_to_le16(0xffff); in __bnxt_hwrm_reserve_pf_rings()
7635 enables |= hwr->tx ? FUNC_CFG_REQ_ENABLES_NUM_TX_RINGS : 0; in __bnxt_hwrm_reserve_pf_rings()
7636 req->num_tx_rings = cpu_to_le16(hwr->tx); in __bnxt_hwrm_reserve_pf_rings()
7638 enables |= hwr->rx ? FUNC_CFG_REQ_ENABLES_NUM_RX_RINGS : 0; in __bnxt_hwrm_reserve_pf_rings()
7639 enables |= hwr->stat ? FUNC_CFG_REQ_ENABLES_NUM_STAT_CTXS : 0; in __bnxt_hwrm_reserve_pf_rings()
7640 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in __bnxt_hwrm_reserve_pf_rings()
7641 enables |= hwr->cp ? FUNC_CFG_REQ_ENABLES_NUM_MSIX : 0; in __bnxt_hwrm_reserve_pf_rings()
7642 enables |= hwr->cp_p5 ? in __bnxt_hwrm_reserve_pf_rings()
7645 enables |= hwr->cp ? in __bnxt_hwrm_reserve_pf_rings()
7647 enables |= hwr->grp ? in __bnxt_hwrm_reserve_pf_rings()
7650 enables |= hwr->vnic ? FUNC_CFG_REQ_ENABLES_NUM_VNICS : 0; in __bnxt_hwrm_reserve_pf_rings()
7651 enables |= hwr->rss_ctx ? FUNC_CFG_REQ_ENABLES_NUM_RSSCOS_CTXS : in __bnxt_hwrm_reserve_pf_rings()
7653 req->num_rx_rings = cpu_to_le16(hwr->rx); in __bnxt_hwrm_reserve_pf_rings()
7654 req->num_rsscos_ctxs = cpu_to_le16(hwr->rss_ctx); in __bnxt_hwrm_reserve_pf_rings()
7655 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in __bnxt_hwrm_reserve_pf_rings()
7656 req->num_cmpl_rings = cpu_to_le16(hwr->cp_p5); in __bnxt_hwrm_reserve_pf_rings()
7657 req->num_msix = cpu_to_le16(hwr->cp); in __bnxt_hwrm_reserve_pf_rings()
7659 req->num_cmpl_rings = cpu_to_le16(hwr->cp); in __bnxt_hwrm_reserve_pf_rings()
7660 req->num_hw_ring_grps = cpu_to_le16(hwr->grp); in __bnxt_hwrm_reserve_pf_rings()
7662 req->num_stat_ctxs = cpu_to_le16(hwr->stat); in __bnxt_hwrm_reserve_pf_rings()
7663 req->num_vnics = cpu_to_le16(hwr->vnic); in __bnxt_hwrm_reserve_pf_rings()
7665 req->enables = cpu_to_le32(enables); in __bnxt_hwrm_reserve_pf_rings()
7678 enables |= hwr->tx ? FUNC_VF_CFG_REQ_ENABLES_NUM_TX_RINGS : 0; in __bnxt_hwrm_reserve_vf_rings()
7679 enables |= hwr->rx ? FUNC_VF_CFG_REQ_ENABLES_NUM_RX_RINGS | in __bnxt_hwrm_reserve_vf_rings()
7681 enables |= hwr->stat ? FUNC_VF_CFG_REQ_ENABLES_NUM_STAT_CTXS : 0; in __bnxt_hwrm_reserve_vf_rings()
7682 enables |= hwr->rss_ctx ? FUNC_VF_CFG_REQ_ENABLES_NUM_RSSCOS_CTXS : 0; in __bnxt_hwrm_reserve_vf_rings()
7683 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in __bnxt_hwrm_reserve_vf_rings()
7684 enables |= hwr->cp_p5 ? in __bnxt_hwrm_reserve_vf_rings()
7687 enables |= hwr->cp ? FUNC_VF_CFG_REQ_ENABLES_NUM_CMPL_RINGS : 0; in __bnxt_hwrm_reserve_vf_rings()
7688 enables |= hwr->grp ? in __bnxt_hwrm_reserve_vf_rings()
7691 enables |= hwr->vnic ? FUNC_VF_CFG_REQ_ENABLES_NUM_VNICS : 0; in __bnxt_hwrm_reserve_vf_rings()
7694 req->num_l2_ctxs = cpu_to_le16(BNXT_VF_MAX_L2_CTX); in __bnxt_hwrm_reserve_vf_rings()
7695 req->num_tx_rings = cpu_to_le16(hwr->tx); in __bnxt_hwrm_reserve_vf_rings()
7696 req->num_rx_rings = cpu_to_le16(hwr->rx); in __bnxt_hwrm_reserve_vf_rings()
7697 req->num_rsscos_ctxs = cpu_to_le16(hwr->rss_ctx); in __bnxt_hwrm_reserve_vf_rings()
7698 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in __bnxt_hwrm_reserve_vf_rings()
7699 req->num_cmpl_rings = cpu_to_le16(hwr->cp_p5); in __bnxt_hwrm_reserve_vf_rings()
7701 req->num_cmpl_rings = cpu_to_le16(hwr->cp); in __bnxt_hwrm_reserve_vf_rings()
7702 req->num_hw_ring_grps = cpu_to_le16(hwr->grp); in __bnxt_hwrm_reserve_vf_rings()
7704 req->num_stat_ctxs = cpu_to_le16(hwr->stat); in __bnxt_hwrm_reserve_vf_rings()
7705 req->num_vnics = cpu_to_le16(hwr->vnic); in __bnxt_hwrm_reserve_vf_rings()
7707 req->enables = cpu_to_le32(enables); in __bnxt_hwrm_reserve_vf_rings()
7719 return -ENOMEM; in bnxt_hwrm_reserve_pf_rings()
7721 if (!req->enables) { in bnxt_hwrm_reserve_pf_rings()
7730 if (bp->hwrm_spec_code < 0x10601) in bnxt_hwrm_reserve_pf_rings()
7731 bp->hw_resc.resv_tx_rings = hwr->tx; in bnxt_hwrm_reserve_pf_rings()
7743 bp->hw_resc.resv_tx_rings = hwr->tx; in bnxt_hwrm_reserve_vf_rings()
7749 return -ENOMEM; in bnxt_hwrm_reserve_vf_rings()
7768 return bp->cp_nr_rings + bnxt_get_ulp_msix_num(bp); in bnxt_nq_rings_in_use()
7775 if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS)) in bnxt_cp_rings_in_use()
7778 cp = bp->tx_nr_rings + bp->rx_nr_rings; in bnxt_cp_rings_in_use()
7784 return bp->cp_nr_rings + bnxt_get_ulp_stat_ctxs(bp); in bnxt_get_func_stat_ctxs()
7789 if (!hwr->grp) in bnxt_get_total_rss_ctxs()
7791 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in bnxt_get_total_rss_ctxs()
7792 int rss_ctx = bnxt_get_nr_rss_ctxs(bp, hwr->grp); in bnxt_get_total_rss_ctxs()
7795 rss_ctx *= hwr->vnic; in bnxt_get_total_rss_ctxs()
7800 if (!(bp->rss_cap & BNXT_RSS_CAP_NEW_RSS_CAP) && bnxt_rfs_supported(bp)) in bnxt_get_total_rss_ctxs()
7801 return hwr->grp + 1; in bnxt_get_total_rss_ctxs()
7810 struct bnxt_hw_resc *hw_resc = &bp->hw_resc; in bnxt_check_rss_tbl_no_rmgr()
7813 if (hw_resc->resv_rx_rings != bp->rx_nr_rings) { in bnxt_check_rss_tbl_no_rmgr()
7814 hw_resc->resv_rx_rings = bp->rx_nr_rings; in bnxt_check_rss_tbl_no_rmgr()
7815 if (!netif_is_rxfh_configured(bp->dev)) in bnxt_check_rss_tbl_no_rmgr()
7822 if (bp->flags & BNXT_FLAG_RFS) { in bnxt_get_total_vnics()
7824 return 2 + bp->num_rss_ctx; in bnxt_get_total_vnics()
7825 if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS)) in bnxt_get_total_vnics()
7833 struct bnxt_hw_resc *hw_resc = &bp->hw_resc; in bnxt_need_reserve_rings()
7836 int rx = bp->rx_nr_rings, stat; in bnxt_need_reserve_rings()
7847 if (hw_resc->resv_tx_rings != bp->tx_nr_rings && in bnxt_need_reserve_rings()
7848 bp->hwrm_spec_code >= 0x10601) in bnxt_need_reserve_rings()
7856 if (bp->flags & BNXT_FLAG_AGG_RINGS) in bnxt_need_reserve_rings()
7859 if (hw_resc->resv_rx_rings != rx || hw_resc->resv_cp_rings != cp || in bnxt_need_reserve_rings()
7860 hw_resc->resv_vnics != vnic || hw_resc->resv_stat_ctxs != stat || in bnxt_need_reserve_rings()
7861 (hw_resc->resv_hw_ring_grps != grp && in bnxt_need_reserve_rings()
7862 !(bp->flags & BNXT_FLAG_CHIP_P5_PLUS))) in bnxt_need_reserve_rings()
7864 if ((bp->flags & BNXT_FLAG_CHIP_P5_PLUS) && BNXT_PF(bp) && in bnxt_need_reserve_rings()
7865 hw_resc->resv_irqs != nq) in bnxt_need_reserve_rings()
7872 struct bnxt_hw_resc *hw_resc = &bp->hw_resc; in bnxt_copy_reserved_rings()
7874 hwr->tx = hw_resc->resv_tx_rings; in bnxt_copy_reserved_rings()
7876 hwr->rx = hw_resc->resv_rx_rings; in bnxt_copy_reserved_rings()
7877 hwr->cp = hw_resc->resv_irqs; in bnxt_copy_reserved_rings()
7878 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_copy_reserved_rings()
7879 hwr->cp_p5 = hw_resc->resv_cp_rings; in bnxt_copy_reserved_rings()
7880 hwr->grp = hw_resc->resv_hw_ring_grps; in bnxt_copy_reserved_rings()
7881 hwr->vnic = hw_resc->resv_vnics; in bnxt_copy_reserved_rings()
7882 hwr->stat = hw_resc->resv_stat_ctxs; in bnxt_copy_reserved_rings()
7883 hwr->rss_ctx = hw_resc->resv_rsscos_ctxs; in bnxt_copy_reserved_rings()
7889 return hwr->tx && hwr->rx && hwr->cp && hwr->grp && hwr->vnic && in bnxt_rings_ok()
7890 hwr->stat && (hwr->cp_p5 || !(bp->flags & BNXT_FLAG_CHIP_P5_PLUS)); in bnxt_rings_ok()
7899 int cp = bp->cp_nr_rings; in __bnxt_reserve_rings()
7907 if (BNXT_NEW_RM(bp) && !bnxt_ulp_registered(bp->edev)) { in __bnxt_reserve_rings()
7908 ulp_msix = bnxt_get_avail_msix(bp, bp->ulp_num_msix_want); in __bnxt_reserve_rings()
7912 if (ulp_msix > bp->ulp_num_msix_want) in __bnxt_reserve_rings()
7913 ulp_msix = bp->ulp_num_msix_want; in __bnxt_reserve_rings()
7919 hwr.tx = bp->tx_nr_rings; in __bnxt_reserve_rings()
7920 hwr.rx = bp->rx_nr_rings; in __bnxt_reserve_rings()
7921 if (bp->flags & BNXT_FLAG_SHARED_RINGS) in __bnxt_reserve_rings()
7923 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in __bnxt_reserve_rings()
7928 if (bp->flags & BNXT_FLAG_AGG_RINGS) in __bnxt_reserve_rings()
7930 hwr.grp = bp->rx_nr_rings; in __bnxt_reserve_rings()
7933 old_rx_rings = bp->hw_resc.resv_rx_rings; in __bnxt_reserve_rings()
7942 if (bp->flags & BNXT_FLAG_AGG_RINGS) { in __bnxt_reserve_rings()
7946 if (netif_running(bp->dev)) in __bnxt_reserve_rings()
7947 return -ENOMEM; in __bnxt_reserve_rings()
7949 bp->flags &= ~BNXT_FLAG_AGG_RINGS; in __bnxt_reserve_rings()
7950 bp->flags |= BNXT_FLAG_NO_AGG_RINGS; in __bnxt_reserve_rings()
7951 bp->dev->hw_features &= ~NETIF_F_LRO; in __bnxt_reserve_rings()
7952 bp->dev->features &= ~NETIF_F_LRO; in __bnxt_reserve_rings()
7957 hwr.cp = min_t(int, hwr.cp, bp->cp_nr_rings); in __bnxt_reserve_rings()
7959 hwr.stat -= bnxt_get_ulp_stat_ctxs(bp); in __bnxt_reserve_rings()
7962 if (bp->flags & BNXT_FLAG_AGG_RINGS) in __bnxt_reserve_rings()
7966 bp->tx_nr_rings = hwr.tx; in __bnxt_reserve_rings()
7971 if (rx_rings != bp->rx_nr_rings) { in __bnxt_reserve_rings()
7972 netdev_warn(bp->dev, "Able to reserve only %d out of %d requested RX rings\n", in __bnxt_reserve_rings()
7973 rx_rings, bp->rx_nr_rings); in __bnxt_reserve_rings()
7974 if (netif_is_rxfh_configured(bp->dev) && in __bnxt_reserve_rings()
7975 (bnxt_get_nr_rss_ctxs(bp, bp->rx_nr_rings) != in __bnxt_reserve_rings()
7978 netdev_warn(bp->dev, "RSS table entries reverting to default\n"); in __bnxt_reserve_rings()
7979 bp->dev->priv_flags &= ~IFF_RXFH_CONFIGURED; in __bnxt_reserve_rings()
7982 bp->rx_nr_rings = rx_rings; in __bnxt_reserve_rings()
7983 bp->cp_nr_rings = hwr.cp; in __bnxt_reserve_rings()
7986 return -ENOMEM; in __bnxt_reserve_rings()
7988 if (old_rx_rings != bp->hw_resc.resv_rx_rings && in __bnxt_reserve_rings()
7989 !netif_is_rxfh_configured(bp->dev)) in __bnxt_reserve_rings()
7992 if (!bnxt_ulp_registered(bp->edev) && BNXT_NEW_RM(bp)) { in __bnxt_reserve_rings()
7996 hw_resc = &bp->hw_resc; in __bnxt_reserve_rings()
7997 resv_msix = hw_resc->resv_irqs - bp->cp_nr_rings; in __bnxt_reserve_rings()
8000 resv_ctx = hw_resc->resv_stat_ctxs - bp->cp_nr_rings; in __bnxt_reserve_rings()
8023 if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS)) in bnxt_hwrm_check_vf_rings()
8026 req->flags = cpu_to_le32(flags); in bnxt_hwrm_check_vf_rings()
8042 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_hwrm_check_pf_rings()
8049 req->flags = cpu_to_le32(flags); in bnxt_hwrm_check_pf_rings()
8055 if (bp->hwrm_spec_code < 0x10801) in bnxt_hwrm_check_rings()
8066 struct bnxt_coal_cap *coal_cap = &bp->coal_cap; in bnxt_hwrm_coal_params_qcaps()
8071 coal_cap->cmpl_params = BNXT_LEGACY_COAL_CMPL_PARAMS; in bnxt_hwrm_coal_params_qcaps()
8072 coal_cap->num_cmpl_dma_aggr_max = 63; in bnxt_hwrm_coal_params_qcaps()
8073 coal_cap->num_cmpl_dma_aggr_during_int_max = 63; in bnxt_hwrm_coal_params_qcaps()
8074 coal_cap->cmpl_aggr_dma_tmr_max = 65535; in bnxt_hwrm_coal_params_qcaps()
8075 coal_cap->cmpl_aggr_dma_tmr_during_int_max = 65535; in bnxt_hwrm_coal_params_qcaps()
8076 coal_cap->int_lat_tmr_min_max = 65535; in bnxt_hwrm_coal_params_qcaps()
8077 coal_cap->int_lat_tmr_max_max = 65535; in bnxt_hwrm_coal_params_qcaps()
8078 coal_cap->num_cmpl_aggr_int_max = 65535; in bnxt_hwrm_coal_params_qcaps()
8079 coal_cap->timer_units = 80; in bnxt_hwrm_coal_params_qcaps()
8081 if (bp->hwrm_spec_code < 0x10902) in bnxt_hwrm_coal_params_qcaps()
8090 coal_cap->cmpl_params = le32_to_cpu(resp->cmpl_params); in bnxt_hwrm_coal_params_qcaps()
8091 coal_cap->nq_params = le32_to_cpu(resp->nq_params); in bnxt_hwrm_coal_params_qcaps()
8092 coal_cap->num_cmpl_dma_aggr_max = in bnxt_hwrm_coal_params_qcaps()
8093 le16_to_cpu(resp->num_cmpl_dma_aggr_max); in bnxt_hwrm_coal_params_qcaps()
8094 coal_cap->num_cmpl_dma_aggr_during_int_max = in bnxt_hwrm_coal_params_qcaps()
8095 le16_to_cpu(resp->num_cmpl_dma_aggr_during_int_max); in bnxt_hwrm_coal_params_qcaps()
8096 coal_cap->cmpl_aggr_dma_tmr_max = in bnxt_hwrm_coal_params_qcaps()
8097 le16_to_cpu(resp->cmpl_aggr_dma_tmr_max); in bnxt_hwrm_coal_params_qcaps()
8098 coal_cap->cmpl_aggr_dma_tmr_during_int_max = in bnxt_hwrm_coal_params_qcaps()
8099 le16_to_cpu(resp->cmpl_aggr_dma_tmr_during_int_max); in bnxt_hwrm_coal_params_qcaps()
8100 coal_cap->int_lat_tmr_min_max = in bnxt_hwrm_coal_params_qcaps()
8101 le16_to_cpu(resp->int_lat_tmr_min_max); in bnxt_hwrm_coal_params_qcaps()
8102 coal_cap->int_lat_tmr_max_max = in bnxt_hwrm_coal_params_qcaps()
8103 le16_to_cpu(resp->int_lat_tmr_max_max); in bnxt_hwrm_coal_params_qcaps()
8104 coal_cap->num_cmpl_aggr_int_max = in bnxt_hwrm_coal_params_qcaps()
8105 le16_to_cpu(resp->num_cmpl_aggr_int_max); in bnxt_hwrm_coal_params_qcaps()
8106 coal_cap->timer_units = le16_to_cpu(resp->timer_units); in bnxt_hwrm_coal_params_qcaps()
8113 struct bnxt_coal_cap *coal_cap = &bp->coal_cap; in bnxt_usec_to_coal_tmr()
8115 return usec * 1000 / coal_cap->timer_units; in bnxt_usec_to_coal_tmr()
8122 struct bnxt_coal_cap *coal_cap = &bp->coal_cap; in bnxt_hwrm_set_coal_params()
8123 u16 val, tmr, max, flags = hw_coal->flags; in bnxt_hwrm_set_coal_params()
8124 u32 cmpl_params = coal_cap->cmpl_params; in bnxt_hwrm_set_coal_params()
8126 max = hw_coal->bufs_per_record * 128; in bnxt_hwrm_set_coal_params()
8127 if (hw_coal->budget) in bnxt_hwrm_set_coal_params()
8128 max = hw_coal->bufs_per_record * hw_coal->budget; in bnxt_hwrm_set_coal_params()
8129 max = min_t(u16, max, coal_cap->num_cmpl_aggr_int_max); in bnxt_hwrm_set_coal_params()
8131 val = clamp_t(u16, hw_coal->coal_bufs, 1, max); in bnxt_hwrm_set_coal_params()
8132 req->num_cmpl_aggr_int = cpu_to_le16(val); in bnxt_hwrm_set_coal_params()
8134 val = min_t(u16, val, coal_cap->num_cmpl_dma_aggr_max); in bnxt_hwrm_set_coal_params()
8135 req->num_cmpl_dma_aggr = cpu_to_le16(val); in bnxt_hwrm_set_coal_params()
8137 val = clamp_t(u16, hw_coal->coal_bufs_irq, 1, in bnxt_hwrm_set_coal_params()
8138 coal_cap->num_cmpl_dma_aggr_during_int_max); in bnxt_hwrm_set_coal_params()
8139 req->num_cmpl_dma_aggr_during_int = cpu_to_le16(val); in bnxt_hwrm_set_coal_params()
8141 tmr = bnxt_usec_to_coal_tmr(bp, hw_coal->coal_ticks); in bnxt_hwrm_set_coal_params()
8142 tmr = clamp_t(u16, tmr, 1, coal_cap->int_lat_tmr_max_max); in bnxt_hwrm_set_coal_params()
8143 req->int_lat_tmr_max = cpu_to_le16(tmr); in bnxt_hwrm_set_coal_params()
8148 val = clamp_t(u16, val, 1, coal_cap->int_lat_tmr_min_max); in bnxt_hwrm_set_coal_params()
8149 req->int_lat_tmr_min = cpu_to_le16(val); in bnxt_hwrm_set_coal_params()
8150 req->enables |= cpu_to_le16(BNXT_COAL_CMPL_MIN_TMR_ENABLE); in bnxt_hwrm_set_coal_params()
8154 val = clamp_t(u16, tmr / 4, 1, coal_cap->cmpl_aggr_dma_tmr_max); in bnxt_hwrm_set_coal_params()
8155 req->cmpl_aggr_dma_tmr = cpu_to_le16(val); in bnxt_hwrm_set_coal_params()
8159 tmr = bnxt_usec_to_coal_tmr(bp, hw_coal->coal_ticks_irq); in bnxt_hwrm_set_coal_params()
8161 coal_cap->cmpl_aggr_dma_tmr_during_int_max); in bnxt_hwrm_set_coal_params()
8162 req->cmpl_aggr_dma_tmr_during_int = cpu_to_le16(val); in bnxt_hwrm_set_coal_params()
8163 req->enables |= in bnxt_hwrm_set_coal_params()
8168 hw_coal->idle_thresh && hw_coal->coal_ticks < hw_coal->idle_thresh) in bnxt_hwrm_set_coal_params()
8170 req->flags = cpu_to_le16(flags); in bnxt_hwrm_set_coal_params()
8171 req->enables |= cpu_to_le16(BNXT_COAL_CMPL_ENABLES); in bnxt_hwrm_set_coal_params()
8178 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; in __bnxt_hwrm_set_coal_nq()
8179 struct bnxt_coal_cap *coal_cap = &bp->coal_cap; in __bnxt_hwrm_set_coal_nq()
8180 u32 nq_params = coal_cap->nq_params; in __bnxt_hwrm_set_coal_nq()
8191 req->ring_id = cpu_to_le16(cpr->cp_ring_struct.fw_ring_id); in __bnxt_hwrm_set_coal_nq()
8192 req->flags = in __bnxt_hwrm_set_coal_nq()
8195 tmr = bnxt_usec_to_coal_tmr(bp, hw_coal->coal_ticks) / 2; in __bnxt_hwrm_set_coal_nq()
8196 tmr = clamp_t(u16, tmr, 1, coal_cap->int_lat_tmr_min_max); in __bnxt_hwrm_set_coal_nq()
8197 req->int_lat_tmr_min = cpu_to_le16(tmr); in __bnxt_hwrm_set_coal_nq()
8198 req->enables |= cpu_to_le16(BNXT_COAL_CMPL_MIN_TMR_ENABLE); in __bnxt_hwrm_set_coal_nq()
8205 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; in bnxt_hwrm_set_ring_coal()
8212 memcpy(&coal, &bp->rx_coal, sizeof(struct bnxt_coal)); in bnxt_hwrm_set_ring_coal()
8214 coal.coal_ticks = cpr->rx_ring_coal.coal_ticks; in bnxt_hwrm_set_ring_coal()
8215 coal.coal_bufs = cpr->rx_ring_coal.coal_bufs; in bnxt_hwrm_set_ring_coal()
8217 if (!bnapi->rx_ring) in bnxt_hwrm_set_ring_coal()
8218 return -ENODEV; in bnxt_hwrm_set_ring_coal()
8226 req_rx->ring_id = cpu_to_le16(bnxt_cp_ring_for_rx(bp, bnapi->rx_ring)); in bnxt_hwrm_set_ring_coal()
8235 u16 ring_id = bnxt_cp_ring_for_rx(bp, bnapi->rx_ring); in bnxt_hwrm_set_rx_coal()
8237 req->ring_id = cpu_to_le16(ring_id); in bnxt_hwrm_set_rx_coal()
8252 req->ring_id = cpu_to_le16(ring_id); in bnxt_hwrm_set_tx_coal()
8256 if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS)) in bnxt_hwrm_set_tx_coal()
8277 bnxt_hwrm_set_coal_params(bp, &bp->rx_coal, req_rx); in bnxt_hwrm_set_coal()
8278 bnxt_hwrm_set_coal_params(bp, &bp->tx_coal, req_tx); in bnxt_hwrm_set_coal()
8282 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_hwrm_set_coal()
8283 struct bnxt_napi *bnapi = bp->bnapi[i]; in bnxt_hwrm_set_coal()
8286 if (!bnapi->rx_ring) in bnxt_hwrm_set_coal()
8293 if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS)) in bnxt_hwrm_set_coal()
8296 if (bnapi->rx_ring && bnapi->tx_ring[0]) { in bnxt_hwrm_set_coal()
8301 if (bnapi->rx_ring) in bnxt_hwrm_set_coal()
8302 hw_coal = &bp->rx_coal; in bnxt_hwrm_set_coal()
8304 hw_coal = &bp->tx_coal; in bnxt_hwrm_set_coal()
8318 if (!bp->bnapi) in bnxt_hwrm_stat_ctx_free()
8334 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_hwrm_stat_ctx_free()
8335 struct bnxt_napi *bnapi = bp->bnapi[i]; in bnxt_hwrm_stat_ctx_free()
8336 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; in bnxt_hwrm_stat_ctx_free()
8338 if (cpr->hw_stats_ctx_id != INVALID_STATS_CTX_ID) { in bnxt_hwrm_stat_ctx_free()
8339 req->stat_ctx_id = cpu_to_le32(cpr->hw_stats_ctx_id); in bnxt_hwrm_stat_ctx_free()
8341 req0->stat_ctx_id = req->stat_ctx_id; in bnxt_hwrm_stat_ctx_free()
8346 cpr->hw_stats_ctx_id = INVALID_STATS_CTX_ID; in bnxt_hwrm_stat_ctx_free()
8367 req->stats_dma_length = cpu_to_le16(bp->hw_ring_stats_size); in bnxt_hwrm_stat_ctx_alloc()
8368 req->update_period_ms = cpu_to_le32(bp->stats_coal_ticks / 1000); in bnxt_hwrm_stat_ctx_alloc()
8371 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_hwrm_stat_ctx_alloc()
8372 struct bnxt_napi *bnapi = bp->bnapi[i]; in bnxt_hwrm_stat_ctx_alloc()
8373 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; in bnxt_hwrm_stat_ctx_alloc()
8375 req->stats_dma_addr = cpu_to_le64(cpr->stats.hw_stats_map); in bnxt_hwrm_stat_ctx_alloc()
8381 cpr->hw_stats_ctx_id = le32_to_cpu(resp->stat_ctx_id); in bnxt_hwrm_stat_ctx_alloc()
8383 bp->grp_info[i].fw_stats_ctx = cpr->hw_stats_ctx_id; in bnxt_hwrm_stat_ctx_alloc()
8400 req->fid = cpu_to_le16(0xffff); in bnxt_hwrm_func_qcfg()
8406 flags = le16_to_cpu(resp->flags); in bnxt_hwrm_func_qcfg()
8409 struct bnxt_vf_info *vf = &bp->vf; in bnxt_hwrm_func_qcfg()
8411 vf->vlan = le16_to_cpu(resp->vlan) & VLAN_VID_MASK; in bnxt_hwrm_func_qcfg()
8413 vf->flags |= BNXT_VF_TRUST; in bnxt_hwrm_func_qcfg()
8415 vf->flags &= ~BNXT_VF_TRUST; in bnxt_hwrm_func_qcfg()
8417 bp->pf.registered_vfs = le16_to_cpu(resp->registered_vfs); in bnxt_hwrm_func_qcfg()
8422 bp->fw_cap |= BNXT_FW_CAP_LLDP_AGENT; in bnxt_hwrm_func_qcfg()
8424 bp->fw_cap |= BNXT_FW_CAP_DCBX_AGENT; in bnxt_hwrm_func_qcfg()
8427 bp->flags |= BNXT_FLAG_MULTI_HOST; in bnxt_hwrm_func_qcfg()
8430 bp->fw_cap |= BNXT_FW_CAP_RING_MONITOR; in bnxt_hwrm_func_qcfg()
8433 bp->fw_cap |= BNXT_FW_CAP_ENABLE_RDMA_SRIOV; in bnxt_hwrm_func_qcfg()
8435 switch (resp->port_partition_type) { in bnxt_hwrm_func_qcfg()
8440 bp->port_partition_type = resp->port_partition_type; in bnxt_hwrm_func_qcfg()
8443 if (bp->hwrm_spec_code < 0x10707 || in bnxt_hwrm_func_qcfg()
8444 resp->evb_mode == FUNC_QCFG_RESP_EVB_MODE_VEB) in bnxt_hwrm_func_qcfg()
8445 bp->br_mode = BRIDGE_MODE_VEB; in bnxt_hwrm_func_qcfg()
8446 else if (resp->evb_mode == FUNC_QCFG_RESP_EVB_MODE_VEPA) in bnxt_hwrm_func_qcfg()
8447 bp->br_mode = BRIDGE_MODE_VEPA; in bnxt_hwrm_func_qcfg()
8449 bp->br_mode = BRIDGE_MODE_UNDEF; in bnxt_hwrm_func_qcfg()
8451 bp->max_mtu = le16_to_cpu(resp->max_mtu_configured); in bnxt_hwrm_func_qcfg()
8452 if (!bp->max_mtu) in bnxt_hwrm_func_qcfg()
8453 bp->max_mtu = BNXT_MAX_MTU; in bnxt_hwrm_func_qcfg()
8455 if (bp->db_size) in bnxt_hwrm_func_qcfg()
8458 bp->db_offset = le16_to_cpu(resp->legacy_l2_db_size_kb) * 1024; in bnxt_hwrm_func_qcfg()
8461 bp->db_offset = DB_PF_OFFSET_P5; in bnxt_hwrm_func_qcfg()
8463 bp->db_offset = DB_VF_OFFSET_P5; in bnxt_hwrm_func_qcfg()
8465 bp->db_size = PAGE_ALIGN(le16_to_cpu(resp->l2_doorbell_bar_size_kb) * in bnxt_hwrm_func_qcfg()
8467 if (!bp->db_size || bp->db_size > pci_resource_len(bp->pdev, 2) || in bnxt_hwrm_func_qcfg()
8468 bp->db_size <= bp->db_offset) in bnxt_hwrm_func_qcfg()
8469 bp->db_size = pci_resource_len(bp->pdev, 2); in bnxt_hwrm_func_qcfg()
8480 ctxm->init_value = init_val; in bnxt_init_ctx_initializer()
8481 ctxm->init_offset = BNXT_CTX_INIT_INVALID_OFFSET; in bnxt_init_ctx_initializer()
8483 ctxm->init_offset = init_offset * 4; in bnxt_init_ctx_initializer()
8485 ctxm->init_value = 0; in bnxt_init_ctx_initializer()
8490 struct bnxt_ctx_mem_info *ctx = bp->ctx; in bnxt_alloc_all_ctx_pg_info()
8494 struct bnxt_ctx_mem_type *ctxm = &ctx->ctx_arr[type]; in bnxt_alloc_all_ctx_pg_info()
8497 if (!ctxm->max_entries || ctxm->pg_info) in bnxt_alloc_all_ctx_pg_info()
8500 if (ctxm->instance_bmap) in bnxt_alloc_all_ctx_pg_info()
8501 n = hweight32(ctxm->instance_bmap); in bnxt_alloc_all_ctx_pg_info()
8502 ctxm->pg_info = kcalloc(n, sizeof(*ctxm->pg_info), GFP_KERNEL); in bnxt_alloc_all_ctx_pg_info()
8503 if (!ctxm->pg_info) in bnxt_alloc_all_ctx_pg_info()
8504 return -ENOMEM; in bnxt_alloc_all_ctx_pg_info()
8520 struct bnxt_ctx_mem_info *ctx = bp->ctx; in bnxt_hwrm_func_backing_store_qcaps_v2()
8531 return -ENOMEM; in bnxt_hwrm_func_backing_store_qcaps_v2()
8532 bp->ctx = ctx; in bnxt_hwrm_func_backing_store_qcaps_v2()
8538 struct bnxt_ctx_mem_type *ctxm = &ctx->ctx_arr[type]; in bnxt_hwrm_func_backing_store_qcaps_v2()
8545 req->type = cpu_to_le16(type); in bnxt_hwrm_func_backing_store_qcaps_v2()
8549 flags = le32_to_cpu(resp->flags); in bnxt_hwrm_func_backing_store_qcaps_v2()
8550 type = le16_to_cpu(resp->next_valid_type); in bnxt_hwrm_func_backing_store_qcaps_v2()
8555 entry_size = le16_to_cpu(resp->entry_size); in bnxt_hwrm_func_backing_store_qcaps_v2()
8556 max_entries = le32_to_cpu(resp->max_num_entries); in bnxt_hwrm_func_backing_store_qcaps_v2()
8557 if (ctxm->mem_valid) { in bnxt_hwrm_func_backing_store_qcaps_v2()
8559 ctxm->entry_size != entry_size || in bnxt_hwrm_func_backing_store_qcaps_v2()
8560 ctxm->max_entries != max_entries) in bnxt_hwrm_func_backing_store_qcaps_v2()
8565 ctxm->type = le16_to_cpu(resp->type); in bnxt_hwrm_func_backing_store_qcaps_v2()
8566 ctxm->entry_size = entry_size; in bnxt_hwrm_func_backing_store_qcaps_v2()
8567 ctxm->flags = flags; in bnxt_hwrm_func_backing_store_qcaps_v2()
8568 ctxm->instance_bmap = le32_to_cpu(resp->instance_bit_map); in bnxt_hwrm_func_backing_store_qcaps_v2()
8569 ctxm->entry_multiple = resp->entry_multiple; in bnxt_hwrm_func_backing_store_qcaps_v2()
8570 ctxm->max_entries = max_entries; in bnxt_hwrm_func_backing_store_qcaps_v2()
8571 ctxm->min_entries = le32_to_cpu(resp->min_num_entries); in bnxt_hwrm_func_backing_store_qcaps_v2()
8572 init_val = resp->ctx_init_value; in bnxt_hwrm_func_backing_store_qcaps_v2()
8573 init_off = resp->ctx_init_offset; in bnxt_hwrm_func_backing_store_qcaps_v2()
8576 ctxm->split_entry_cnt = min_t(u8, resp->subtype_valid_cnt, in bnxt_hwrm_func_backing_store_qcaps_v2()
8578 for (i = 0, p = &resp->split_entry_0; i < ctxm->split_entry_cnt; in bnxt_hwrm_func_backing_store_qcaps_v2()
8580 ctxm->split[i] = le32_to_cpu(*p); in bnxt_hwrm_func_backing_store_qcaps_v2()
8595 if (bp->hwrm_spec_code < 0x10902 || BNXT_VF(bp) || in bnxt_hwrm_func_backing_store_qcaps()
8596 (bp->ctx && bp->ctx->flags & BNXT_CTX_FLAG_INITED)) in bnxt_hwrm_func_backing_store_qcaps()
8599 if (bp->fw_cap & BNXT_FW_CAP_BACKING_STORE_V2) in bnxt_hwrm_func_backing_store_qcaps()
8614 ctx = bp->ctx; in bnxt_hwrm_func_backing_store_qcaps()
8618 rc = -ENOMEM; in bnxt_hwrm_func_backing_store_qcaps()
8621 bp->ctx = ctx; in bnxt_hwrm_func_backing_store_qcaps()
8623 init_val = resp->ctx_kind_initializer; in bnxt_hwrm_func_backing_store_qcaps()
8624 init_mask = le16_to_cpu(resp->ctx_init_mask); in bnxt_hwrm_func_backing_store_qcaps()
8626 ctxm = &ctx->ctx_arr[BNXT_CTX_QP]; in bnxt_hwrm_func_backing_store_qcaps()
8627 ctxm->max_entries = le32_to_cpu(resp->qp_max_entries); in bnxt_hwrm_func_backing_store_qcaps()
8628 ctxm->qp_qp1_entries = le16_to_cpu(resp->qp_min_qp1_entries); in bnxt_hwrm_func_backing_store_qcaps()
8629 ctxm->qp_l2_entries = le16_to_cpu(resp->qp_max_l2_entries); in bnxt_hwrm_func_backing_store_qcaps()
8630 ctxm->qp_fast_qpmd_entries = le16_to_cpu(resp->fast_qpmd_qp_num_entries); in bnxt_hwrm_func_backing_store_qcaps()
8631 ctxm->entry_size = le16_to_cpu(resp->qp_entry_size); in bnxt_hwrm_func_backing_store_qcaps()
8632 bnxt_init_ctx_initializer(ctxm, init_val, resp->qp_init_offset, in bnxt_hwrm_func_backing_store_qcaps()
8635 ctxm = &ctx->ctx_arr[BNXT_CTX_SRQ]; in bnxt_hwrm_func_backing_store_qcaps()
8636 ctxm->srq_l2_entries = le16_to_cpu(resp->srq_max_l2_entries); in bnxt_hwrm_func_backing_store_qcaps()
8637 ctxm->max_entries = le32_to_cpu(resp->srq_max_entries); in bnxt_hwrm_func_backing_store_qcaps()
8638 ctxm->entry_size = le16_to_cpu(resp->srq_entry_size); in bnxt_hwrm_func_backing_store_qcaps()
8639 bnxt_init_ctx_initializer(ctxm, init_val, resp->srq_init_offset, in bnxt_hwrm_func_backing_store_qcaps()
8642 ctxm = &ctx->ctx_arr[BNXT_CTX_CQ]; in bnxt_hwrm_func_backing_store_qcaps()
8643 ctxm->cq_l2_entries = le16_to_cpu(resp->cq_max_l2_entries); in bnxt_hwrm_func_backing_store_qcaps()
8644 ctxm->max_entries = le32_to_cpu(resp->cq_max_entries); in bnxt_hwrm_func_backing_store_qcaps()
8645 ctxm->entry_size = le16_to_cpu(resp->cq_entry_size); in bnxt_hwrm_func_backing_store_qcaps()
8646 bnxt_init_ctx_initializer(ctxm, init_val, resp->cq_init_offset, in bnxt_hwrm_func_backing_store_qcaps()
8649 ctxm = &ctx->ctx_arr[BNXT_CTX_VNIC]; in bnxt_hwrm_func_backing_store_qcaps()
8650 ctxm->vnic_entries = le16_to_cpu(resp->vnic_max_vnic_entries); in bnxt_hwrm_func_backing_store_qcaps()
8651 ctxm->max_entries = ctxm->vnic_entries + in bnxt_hwrm_func_backing_store_qcaps()
8652 le16_to_cpu(resp->vnic_max_ring_table_entries); in bnxt_hwrm_func_backing_store_qcaps()
8653 ctxm->entry_size = le16_to_cpu(resp->vnic_entry_size); in bnxt_hwrm_func_backing_store_qcaps()
8655 resp->vnic_init_offset, in bnxt_hwrm_func_backing_store_qcaps()
8658 ctxm = &ctx->ctx_arr[BNXT_CTX_STAT]; in bnxt_hwrm_func_backing_store_qcaps()
8659 ctxm->max_entries = le32_to_cpu(resp->stat_max_entries); in bnxt_hwrm_func_backing_store_qcaps()
8660 ctxm->entry_size = le16_to_cpu(resp->stat_entry_size); in bnxt_hwrm_func_backing_store_qcaps()
8662 resp->stat_init_offset, in bnxt_hwrm_func_backing_store_qcaps()
8665 ctxm = &ctx->ctx_arr[BNXT_CTX_STQM]; in bnxt_hwrm_func_backing_store_qcaps()
8666 ctxm->entry_size = le16_to_cpu(resp->tqm_entry_size); in bnxt_hwrm_func_backing_store_qcaps()
8667 ctxm->min_entries = le32_to_cpu(resp->tqm_min_entries_per_ring); in bnxt_hwrm_func_backing_store_qcaps()
8668 ctxm->max_entries = le32_to_cpu(resp->tqm_max_entries_per_ring); in bnxt_hwrm_func_backing_store_qcaps()
8669 ctxm->entry_multiple = resp->tqm_entries_multiple; in bnxt_hwrm_func_backing_store_qcaps()
8670 if (!ctxm->entry_multiple) in bnxt_hwrm_func_backing_store_qcaps()
8671 ctxm->entry_multiple = 1; in bnxt_hwrm_func_backing_store_qcaps()
8673 memcpy(&ctx->ctx_arr[BNXT_CTX_FTQM], ctxm, sizeof(*ctxm)); in bnxt_hwrm_func_backing_store_qcaps()
8675 ctxm = &ctx->ctx_arr[BNXT_CTX_MRAV]; in bnxt_hwrm_func_backing_store_qcaps()
8676 ctxm->max_entries = le32_to_cpu(resp->mrav_max_entries); in bnxt_hwrm_func_backing_store_qcaps()
8677 ctxm->entry_size = le16_to_cpu(resp->mrav_entry_size); in bnxt_hwrm_func_backing_store_qcaps()
8678 ctxm->mrav_num_entries_units = in bnxt_hwrm_func_backing_store_qcaps()
8679 le16_to_cpu(resp->mrav_num_entries_units); in bnxt_hwrm_func_backing_store_qcaps()
8681 resp->mrav_init_offset, in bnxt_hwrm_func_backing_store_qcaps()
8684 ctxm = &ctx->ctx_arr[BNXT_CTX_TIM]; in bnxt_hwrm_func_backing_store_qcaps()
8685 ctxm->entry_size = le16_to_cpu(resp->tim_entry_size); in bnxt_hwrm_func_backing_store_qcaps()
8686 ctxm->max_entries = le32_to_cpu(resp->tim_max_entries); in bnxt_hwrm_func_backing_store_qcaps()
8688 ctx->tqm_fp_rings_count = resp->tqm_fp_rings_count; in bnxt_hwrm_func_backing_store_qcaps()
8689 if (!ctx->tqm_fp_rings_count) in bnxt_hwrm_func_backing_store_qcaps()
8690 ctx->tqm_fp_rings_count = bp->max_q; in bnxt_hwrm_func_backing_store_qcaps()
8691 else if (ctx->tqm_fp_rings_count > BNXT_MAX_TQM_FP_RINGS) in bnxt_hwrm_func_backing_store_qcaps()
8692 ctx->tqm_fp_rings_count = BNXT_MAX_TQM_FP_RINGS; in bnxt_hwrm_func_backing_store_qcaps()
8694 ctxm = &ctx->ctx_arr[BNXT_CTX_FTQM]; in bnxt_hwrm_func_backing_store_qcaps()
8695 memcpy(ctxm, &ctx->ctx_arr[BNXT_CTX_STQM], sizeof(*ctxm)); in bnxt_hwrm_func_backing_store_qcaps()
8696 ctxm->instance_bmap = (1 << ctx->tqm_fp_rings_count) - 1; in bnxt_hwrm_func_backing_store_qcaps()
8710 if (!rmem->nr_pages) in bnxt_hwrm_set_pg_attr()
8714 if (rmem->depth >= 1) { in bnxt_hwrm_set_pg_attr()
8715 if (rmem->depth == 2) in bnxt_hwrm_set_pg_attr()
8719 *pg_dir = cpu_to_le64(rmem->pg_tbl_map); in bnxt_hwrm_set_pg_attr()
8721 *pg_dir = cpu_to_le64(rmem->dma_arr[0]); in bnxt_hwrm_set_pg_attr()
8735 struct bnxt_ctx_mem_info *ctx = bp->ctx; in bnxt_hwrm_func_backing_store_cfg()
8751 if (req_len > bp->hwrm_max_ext_req_len) in bnxt_hwrm_func_backing_store_cfg()
8757 req->enables = cpu_to_le32(enables); in bnxt_hwrm_func_backing_store_cfg()
8759 ctxm = &ctx->ctx_arr[BNXT_CTX_QP]; in bnxt_hwrm_func_backing_store_cfg()
8760 ctx_pg = ctxm->pg_info; in bnxt_hwrm_func_backing_store_cfg()
8761 req->qp_num_entries = cpu_to_le32(ctx_pg->entries); in bnxt_hwrm_func_backing_store_cfg()
8762 req->qp_num_qp1_entries = cpu_to_le16(ctxm->qp_qp1_entries); in bnxt_hwrm_func_backing_store_cfg()
8763 req->qp_num_l2_entries = cpu_to_le16(ctxm->qp_l2_entries); in bnxt_hwrm_func_backing_store_cfg()
8764 req->qp_entry_size = cpu_to_le16(ctxm->entry_size); in bnxt_hwrm_func_backing_store_cfg()
8765 bnxt_hwrm_set_pg_attr(&ctx_pg->ring_mem, in bnxt_hwrm_func_backing_store_cfg()
8766 &req->qpc_pg_size_qpc_lvl, in bnxt_hwrm_func_backing_store_cfg()
8767 &req->qpc_page_dir); in bnxt_hwrm_func_backing_store_cfg()
8770 req->qp_num_fast_qpmd_entries = cpu_to_le16(ctxm->qp_fast_qpmd_entries); in bnxt_hwrm_func_backing_store_cfg()
8773 ctxm = &ctx->ctx_arr[BNXT_CTX_SRQ]; in bnxt_hwrm_func_backing_store_cfg()
8774 ctx_pg = ctxm->pg_info; in bnxt_hwrm_func_backing_store_cfg()
8775 req->srq_num_entries = cpu_to_le32(ctx_pg->entries); in bnxt_hwrm_func_backing_store_cfg()
8776 req->srq_num_l2_entries = cpu_to_le16(ctxm->srq_l2_entries); in bnxt_hwrm_func_backing_store_cfg()
8777 req->srq_entry_size = cpu_to_le16(ctxm->entry_size); in bnxt_hwrm_func_backing_store_cfg()
8778 bnxt_hwrm_set_pg_attr(&ctx_pg->ring_mem, in bnxt_hwrm_func_backing_store_cfg()
8779 &req->srq_pg_size_srq_lvl, in bnxt_hwrm_func_backing_store_cfg()
8780 &req->srq_page_dir); in bnxt_hwrm_func_backing_store_cfg()
8783 ctxm = &ctx->ctx_arr[BNXT_CTX_CQ]; in bnxt_hwrm_func_backing_store_cfg()
8784 ctx_pg = ctxm->pg_info; in bnxt_hwrm_func_backing_store_cfg()
8785 req->cq_num_entries = cpu_to_le32(ctx_pg->entries); in bnxt_hwrm_func_backing_store_cfg()
8786 req->cq_num_l2_entries = cpu_to_le16(ctxm->cq_l2_entries); in bnxt_hwrm_func_backing_store_cfg()
8787 req->cq_entry_size = cpu_to_le16(ctxm->entry_size); in bnxt_hwrm_func_backing_store_cfg()
8788 bnxt_hwrm_set_pg_attr(&ctx_pg->ring_mem, in bnxt_hwrm_func_backing_store_cfg()
8789 &req->cq_pg_size_cq_lvl, in bnxt_hwrm_func_backing_store_cfg()
8790 &req->cq_page_dir); in bnxt_hwrm_func_backing_store_cfg()
8793 ctxm = &ctx->ctx_arr[BNXT_CTX_VNIC]; in bnxt_hwrm_func_backing_store_cfg()
8794 ctx_pg = ctxm->pg_info; in bnxt_hwrm_func_backing_store_cfg()
8795 req->vnic_num_vnic_entries = cpu_to_le16(ctxm->vnic_entries); in bnxt_hwrm_func_backing_store_cfg()
8796 req->vnic_num_ring_table_entries = in bnxt_hwrm_func_backing_store_cfg()
8797 cpu_to_le16(ctxm->max_entries - ctxm->vnic_entries); in bnxt_hwrm_func_backing_store_cfg()
8798 req->vnic_entry_size = cpu_to_le16(ctxm->entry_size); in bnxt_hwrm_func_backing_store_cfg()
8799 bnxt_hwrm_set_pg_attr(&ctx_pg->ring_mem, in bnxt_hwrm_func_backing_store_cfg()
8800 &req->vnic_pg_size_vnic_lvl, in bnxt_hwrm_func_backing_store_cfg()
8801 &req->vnic_page_dir); in bnxt_hwrm_func_backing_store_cfg()
8804 ctxm = &ctx->ctx_arr[BNXT_CTX_STAT]; in bnxt_hwrm_func_backing_store_cfg()
8805 ctx_pg = ctxm->pg_info; in bnxt_hwrm_func_backing_store_cfg()
8806 req->stat_num_entries = cpu_to_le32(ctxm->max_entries); in bnxt_hwrm_func_backing_store_cfg()
8807 req->stat_entry_size = cpu_to_le16(ctxm->entry_size); in bnxt_hwrm_func_backing_store_cfg()
8808 bnxt_hwrm_set_pg_attr(&ctx_pg->ring_mem, in bnxt_hwrm_func_backing_store_cfg()
8809 &req->stat_pg_size_stat_lvl, in bnxt_hwrm_func_backing_store_cfg()
8810 &req->stat_page_dir); in bnxt_hwrm_func_backing_store_cfg()
8815 ctxm = &ctx->ctx_arr[BNXT_CTX_MRAV]; in bnxt_hwrm_func_backing_store_cfg()
8816 ctx_pg = ctxm->pg_info; in bnxt_hwrm_func_backing_store_cfg()
8817 req->mrav_num_entries = cpu_to_le32(ctx_pg->entries); in bnxt_hwrm_func_backing_store_cfg()
8818 units = ctxm->mrav_num_entries_units; in bnxt_hwrm_func_backing_store_cfg()
8820 u32 num_mr, num_ah = ctxm->mrav_av_entries; in bnxt_hwrm_func_backing_store_cfg()
8823 num_mr = ctx_pg->entries - num_ah; in bnxt_hwrm_func_backing_store_cfg()
8825 req->mrav_num_entries = cpu_to_le32(entries); in bnxt_hwrm_func_backing_store_cfg()
8828 req->mrav_entry_size = cpu_to_le16(ctxm->entry_size); in bnxt_hwrm_func_backing_store_cfg()
8829 bnxt_hwrm_set_pg_attr(&ctx_pg->ring_mem, in bnxt_hwrm_func_backing_store_cfg()
8830 &req->mrav_pg_size_mrav_lvl, in bnxt_hwrm_func_backing_store_cfg()
8831 &req->mrav_page_dir); in bnxt_hwrm_func_backing_store_cfg()
8834 ctxm = &ctx->ctx_arr[BNXT_CTX_TIM]; in bnxt_hwrm_func_backing_store_cfg()
8835 ctx_pg = ctxm->pg_info; in bnxt_hwrm_func_backing_store_cfg()
8836 req->tim_num_entries = cpu_to_le32(ctx_pg->entries); in bnxt_hwrm_func_backing_store_cfg()
8837 req->tim_entry_size = cpu_to_le16(ctxm->entry_size); in bnxt_hwrm_func_backing_store_cfg()
8838 bnxt_hwrm_set_pg_attr(&ctx_pg->ring_mem, in bnxt_hwrm_func_backing_store_cfg()
8839 &req->tim_pg_size_tim_lvl, in bnxt_hwrm_func_backing_store_cfg()
8840 &req->tim_page_dir); in bnxt_hwrm_func_backing_store_cfg()
8842 ctxm = &ctx->ctx_arr[BNXT_CTX_STQM]; in bnxt_hwrm_func_backing_store_cfg()
8843 for (i = 0, num_entries = &req->tqm_sp_num_entries, in bnxt_hwrm_func_backing_store_cfg()
8844 pg_attr = &req->tqm_sp_pg_size_tqm_sp_lvl, in bnxt_hwrm_func_backing_store_cfg()
8845 pg_dir = &req->tqm_sp_page_dir, in bnxt_hwrm_func_backing_store_cfg()
8847 ctx_pg = ctxm->pg_info; in bnxt_hwrm_func_backing_store_cfg()
8849 ctx_pg = &ctx->ctx_arr[BNXT_CTX_FTQM].pg_info[i], in bnxt_hwrm_func_backing_store_cfg()
8854 req->tqm_entry_size = cpu_to_le16(ctxm->entry_size); in bnxt_hwrm_func_backing_store_cfg()
8855 *num_entries = cpu_to_le32(ctx_pg->entries); in bnxt_hwrm_func_backing_store_cfg()
8856 bnxt_hwrm_set_pg_attr(&ctx_pg->ring_mem, pg_attr, pg_dir); in bnxt_hwrm_func_backing_store_cfg()
8858 req->flags = cpu_to_le32(flags); in bnxt_hwrm_func_backing_store_cfg()
8865 struct bnxt_ring_mem_info *rmem = &ctx_pg->ring_mem; in bnxt_alloc_ctx_mem_blk()
8867 rmem->page_size = BNXT_PAGE_SIZE; in bnxt_alloc_ctx_mem_blk()
8868 rmem->pg_arr = ctx_pg->ctx_pg_arr; in bnxt_alloc_ctx_mem_blk()
8869 rmem->dma_arr = ctx_pg->ctx_dma_arr; in bnxt_alloc_ctx_mem_blk()
8870 rmem->flags = BNXT_RMEM_VALID_PTE_FLAG; in bnxt_alloc_ctx_mem_blk()
8871 if (rmem->depth >= 1) in bnxt_alloc_ctx_mem_blk()
8872 rmem->flags |= BNXT_RMEM_USE_FULL_PAGE_FLAG; in bnxt_alloc_ctx_mem_blk()
8880 struct bnxt_ring_mem_info *rmem = &ctx_pg->ring_mem; in bnxt_alloc_ctx_pg_tbls()
8884 return -EINVAL; in bnxt_alloc_ctx_pg_tbls()
8886 ctx_pg->nr_pages = DIV_ROUND_UP(mem_size, BNXT_PAGE_SIZE); in bnxt_alloc_ctx_pg_tbls()
8887 if (ctx_pg->nr_pages > MAX_CTX_TOTAL_PAGES) { in bnxt_alloc_ctx_pg_tbls()
8888 ctx_pg->nr_pages = 0; in bnxt_alloc_ctx_pg_tbls()
8889 return -EINVAL; in bnxt_alloc_ctx_pg_tbls()
8891 if (ctx_pg->nr_pages > MAX_CTX_PAGES || depth > 1) { in bnxt_alloc_ctx_pg_tbls()
8894 rmem->depth = 2; in bnxt_alloc_ctx_pg_tbls()
8895 ctx_pg->ctx_pg_tbl = kcalloc(MAX_CTX_PAGES, sizeof(ctx_pg), in bnxt_alloc_ctx_pg_tbls()
8897 if (!ctx_pg->ctx_pg_tbl) in bnxt_alloc_ctx_pg_tbls()
8898 return -ENOMEM; in bnxt_alloc_ctx_pg_tbls()
8899 nr_tbls = DIV_ROUND_UP(ctx_pg->nr_pages, MAX_CTX_PAGES); in bnxt_alloc_ctx_pg_tbls()
8900 rmem->nr_pages = nr_tbls; in bnxt_alloc_ctx_pg_tbls()
8909 return -ENOMEM; in bnxt_alloc_ctx_pg_tbls()
8910 ctx_pg->ctx_pg_tbl[i] = pg_tbl; in bnxt_alloc_ctx_pg_tbls()
8911 rmem = &pg_tbl->ring_mem; in bnxt_alloc_ctx_pg_tbls()
8912 rmem->pg_tbl = ctx_pg->ctx_pg_arr[i]; in bnxt_alloc_ctx_pg_tbls()
8913 rmem->pg_tbl_map = ctx_pg->ctx_dma_arr[i]; in bnxt_alloc_ctx_pg_tbls()
8914 rmem->depth = 1; in bnxt_alloc_ctx_pg_tbls()
8915 rmem->nr_pages = MAX_CTX_PAGES; in bnxt_alloc_ctx_pg_tbls()
8916 rmem->ctx_mem = ctxm; in bnxt_alloc_ctx_pg_tbls()
8917 if (i == (nr_tbls - 1)) { in bnxt_alloc_ctx_pg_tbls()
8918 int rem = ctx_pg->nr_pages % MAX_CTX_PAGES; in bnxt_alloc_ctx_pg_tbls()
8921 rmem->nr_pages = rem; in bnxt_alloc_ctx_pg_tbls()
8928 rmem->nr_pages = DIV_ROUND_UP(mem_size, BNXT_PAGE_SIZE); in bnxt_alloc_ctx_pg_tbls()
8929 if (rmem->nr_pages > 1 || depth) in bnxt_alloc_ctx_pg_tbls()
8930 rmem->depth = 1; in bnxt_alloc_ctx_pg_tbls()
8931 rmem->ctx_mem = ctxm; in bnxt_alloc_ctx_pg_tbls()
8942 struct bnxt_ring_mem_info *rmem = &ctx_pg->ring_mem; in bnxt_copy_ctx_pg_tbls()
8943 size_t nr_pages = ctx_pg->nr_pages; in bnxt_copy_ctx_pg_tbls()
8944 int page_size = rmem->page_size; in bnxt_copy_ctx_pg_tbls()
8946 u16 depth = rmem->depth; in bnxt_copy_ctx_pg_tbls()
8954 pg_tbl = ctx_pg->ctx_pg_tbl[i]; in bnxt_copy_ctx_pg_tbls()
8955 rmem = &pg_tbl->ring_mem; in bnxt_copy_ctx_pg_tbls()
8970 struct bnxt_ring_mem_info *rmem = &ctx_pg->ring_mem; in bnxt_free_ctx_pg_tbls()
8972 if (rmem->depth > 1 || ctx_pg->nr_pages > MAX_CTX_PAGES || in bnxt_free_ctx_pg_tbls()
8973 ctx_pg->ctx_pg_tbl) { in bnxt_free_ctx_pg_tbls()
8974 int i, nr_tbls = rmem->nr_pages; in bnxt_free_ctx_pg_tbls()
8980 pg_tbl = ctx_pg->ctx_pg_tbl[i]; in bnxt_free_ctx_pg_tbls()
8983 rmem2 = &pg_tbl->ring_mem; in bnxt_free_ctx_pg_tbls()
8985 ctx_pg->ctx_pg_arr[i] = NULL; in bnxt_free_ctx_pg_tbls()
8987 ctx_pg->ctx_pg_tbl[i] = NULL; in bnxt_free_ctx_pg_tbls()
8989 kfree(ctx_pg->ctx_pg_tbl); in bnxt_free_ctx_pg_tbls()
8990 ctx_pg->ctx_pg_tbl = NULL; in bnxt_free_ctx_pg_tbls()
8993 ctx_pg->nr_pages = 0; in bnxt_free_ctx_pg_tbls()
9000 struct bnxt_ctx_pg_info *ctx_pg = ctxm->pg_info; in bnxt_setup_ctxm_pg_tbls()
9004 if (!ctxm->entry_size || !ctx_pg) in bnxt_setup_ctxm_pg_tbls()
9005 return -EINVAL; in bnxt_setup_ctxm_pg_tbls()
9006 if (ctxm->instance_bmap) in bnxt_setup_ctxm_pg_tbls()
9007 n = hweight32(ctxm->instance_bmap); in bnxt_setup_ctxm_pg_tbls()
9008 if (ctxm->entry_multiple) in bnxt_setup_ctxm_pg_tbls()
9009 entries = roundup(entries, ctxm->entry_multiple); in bnxt_setup_ctxm_pg_tbls()
9010 entries = clamp_t(u32, entries, ctxm->min_entries, ctxm->max_entries); in bnxt_setup_ctxm_pg_tbls()
9011 mem_size = entries * ctxm->entry_size; in bnxt_setup_ctxm_pg_tbls()
9015 ctxm->init_value ? ctxm : NULL); in bnxt_setup_ctxm_pg_tbls()
9018 ctxm->mem_valid = 1; in bnxt_setup_ctxm_pg_tbls()
9027 u32 instance_bmap = ctxm->instance_bmap; in bnxt_hwrm_func_backing_store_cfg_v2()
9031 if (!(ctxm->flags & BNXT_CTX_MEM_TYPE_VALID) || !ctxm->pg_info) in bnxt_hwrm_func_backing_store_cfg_v2()
9035 n = hweight32(ctxm->instance_bmap); in bnxt_hwrm_func_backing_store_cfg_v2()
9043 req->type = cpu_to_le16(ctxm->type); in bnxt_hwrm_func_backing_store_cfg_v2()
9044 req->entry_size = cpu_to_le16(ctxm->entry_size); in bnxt_hwrm_func_backing_store_cfg_v2()
9045 if ((ctxm->flags & BNXT_CTX_MEM_PERSIST) && in bnxt_hwrm_func_backing_store_cfg_v2()
9046 bnxt_bs_trace_avail(bp, ctxm->type)) { in bnxt_hwrm_func_backing_store_cfg_v2()
9051 req->enables = cpu_to_le32(enables); in bnxt_hwrm_func_backing_store_cfg_v2()
9052 bs_trace = &bp->bs_trace[bnxt_bstore_to_trace[ctxm->type]]; in bnxt_hwrm_func_backing_store_cfg_v2()
9053 req->next_bs_offset = cpu_to_le32(bs_trace->last_offset); in bnxt_hwrm_func_backing_store_cfg_v2()
9055 req->subtype_valid_cnt = ctxm->split_entry_cnt; in bnxt_hwrm_func_backing_store_cfg_v2()
9056 for (i = 0, p = &req->split_entry_0; i < ctxm->split_entry_cnt; i++) in bnxt_hwrm_func_backing_store_cfg_v2()
9057 p[i] = cpu_to_le32(ctxm->split[i]); in bnxt_hwrm_func_backing_store_cfg_v2()
9063 req->instance = cpu_to_le16(i); in bnxt_hwrm_func_backing_store_cfg_v2()
9064 ctx_pg = &ctxm->pg_info[j++]; in bnxt_hwrm_func_backing_store_cfg_v2()
9065 if (!ctx_pg->entries) in bnxt_hwrm_func_backing_store_cfg_v2()
9067 req->num_entries = cpu_to_le32(ctx_pg->entries); in bnxt_hwrm_func_backing_store_cfg_v2()
9068 bnxt_hwrm_set_pg_attr(&ctx_pg->ring_mem, in bnxt_hwrm_func_backing_store_cfg_v2()
9069 &req->page_size_pbl_level, in bnxt_hwrm_func_backing_store_cfg_v2()
9070 &req->page_dir); in bnxt_hwrm_func_backing_store_cfg_v2()
9072 req->flags = in bnxt_hwrm_func_backing_store_cfg_v2()
9082 struct bnxt_ctx_mem_info *ctx = bp->ctx; in bnxt_backing_store_cfg_v2()
9089 ctxm = &ctx->ctx_arr[type]; in bnxt_backing_store_cfg_v2()
9092 if (!ctxm->mem_valid) { in bnxt_backing_store_cfg_v2()
9094 ctxm->max_entries, 1); in bnxt_backing_store_cfg_v2()
9096 netdev_warn(bp->dev, "Unable to setup ctx page for type:0x%x.\n", in bnxt_backing_store_cfg_v2()
9109 last_type = BNXT_CTX_MAX - 1; in bnxt_backing_store_cfg_v2()
9111 last_type = BNXT_CTX_L2_MAX - 1; in bnxt_backing_store_cfg_v2()
9113 ctx->ctx_arr[last_type].last = 1; in bnxt_backing_store_cfg_v2()
9116 ctxm = &ctx->ctx_arr[type]; in bnxt_backing_store_cfg_v2()
9118 if (!ctxm->mem_valid) in bnxt_backing_store_cfg_v2()
9120 rc = bnxt_hwrm_func_backing_store_cfg_v2(bp, ctxm, ctxm->last); in bnxt_backing_store_cfg_v2()
9128 * __bnxt_copy_ctx_mem - copy host context memory
9145 struct bnxt_ctx_pg_info *ctx_pg = ctxm->pg_info; in __bnxt_copy_ctx_mem()
9152 if (ctxm->instance_bmap) in __bnxt_copy_ctx_mem()
9153 n = hweight32(ctxm->instance_bmap); in __bnxt_copy_ctx_mem()
9166 size_t tail = ctxm->max_entries * ctxm->entry_size; in bnxt_copy_ctx_mem()
9177 ctxm->last = 0; in bnxt_free_one_ctx_mem()
9179 if (ctxm->mem_valid && !force && (ctxm->flags & BNXT_CTX_MEM_PERSIST)) in bnxt_free_one_ctx_mem()
9182 ctx_pg = ctxm->pg_info; in bnxt_free_one_ctx_mem()
9184 if (ctxm->instance_bmap) in bnxt_free_one_ctx_mem()
9185 n = hweight32(ctxm->instance_bmap); in bnxt_free_one_ctx_mem()
9190 ctxm->pg_info = NULL; in bnxt_free_one_ctx_mem()
9191 ctxm->mem_valid = 0; in bnxt_free_one_ctx_mem()
9198 struct bnxt_ctx_mem_info *ctx = bp->ctx; in bnxt_free_ctx_mem()
9205 bnxt_free_one_ctx_mem(bp, &ctx->ctx_arr[type], force); in bnxt_free_ctx_mem()
9207 ctx->flags &= ~BNXT_CTX_FLAG_INITED; in bnxt_free_ctx_mem()
9210 bp->ctx = NULL; in bnxt_free_ctx_mem()
9230 netdev_err(bp->dev, "Failed querying context mem capability, rc = %d.\n", in bnxt_alloc_ctx_mem()
9234 ctx = bp->ctx; in bnxt_alloc_ctx_mem()
9235 if (!ctx || (ctx->flags & BNXT_CTX_FLAG_INITED)) in bnxt_alloc_ctx_mem()
9238 ctxm = &ctx->ctx_arr[BNXT_CTX_QP]; in bnxt_alloc_ctx_mem()
9239 l2_qps = ctxm->qp_l2_entries; in bnxt_alloc_ctx_mem()
9240 qp1_qps = ctxm->qp_qp1_entries; in bnxt_alloc_ctx_mem()
9241 fast_qpmd_qps = ctxm->qp_fast_qpmd_entries; in bnxt_alloc_ctx_mem()
9242 max_qps = ctxm->max_entries; in bnxt_alloc_ctx_mem()
9243 ctxm = &ctx->ctx_arr[BNXT_CTX_SRQ]; in bnxt_alloc_ctx_mem()
9244 srqs = ctxm->srq_l2_entries; in bnxt_alloc_ctx_mem()
9245 max_srqs = ctxm->max_entries; in bnxt_alloc_ctx_mem()
9247 if ((bp->flags & BNXT_FLAG_ROCE_CAP) && !is_kdump_kernel()) { in bnxt_alloc_ctx_mem()
9250 extra_qps = max_qps - l2_qps - qp1_qps; in bnxt_alloc_ctx_mem()
9251 extra_srqs = max_srqs - srqs; in bnxt_alloc_ctx_mem()
9254 max_qps - l2_qps - qp1_qps); in bnxt_alloc_ctx_mem()
9259 extra_srqs = min_t(u32, 8192, max_srqs - srqs); in bnxt_alloc_ctx_mem()
9265 ctxm = &ctx->ctx_arr[BNXT_CTX_QP]; in bnxt_alloc_ctx_mem()
9271 ctxm = &ctx->ctx_arr[BNXT_CTX_SRQ]; in bnxt_alloc_ctx_mem()
9276 ctxm = &ctx->ctx_arr[BNXT_CTX_CQ]; in bnxt_alloc_ctx_mem()
9277 rc = bnxt_setup_ctxm_pg_tbls(bp, ctxm, ctxm->cq_l2_entries + in bnxt_alloc_ctx_mem()
9282 ctxm = &ctx->ctx_arr[BNXT_CTX_VNIC]; in bnxt_alloc_ctx_mem()
9283 rc = bnxt_setup_ctxm_pg_tbls(bp, ctxm, ctxm->max_entries, 1); in bnxt_alloc_ctx_mem()
9287 ctxm = &ctx->ctx_arr[BNXT_CTX_STAT]; in bnxt_alloc_ctx_mem()
9288 rc = bnxt_setup_ctxm_pg_tbls(bp, ctxm, ctxm->max_entries, 1); in bnxt_alloc_ctx_mem()
9292 if (!(bp->flags & BNXT_FLAG_ROCE_CAP)) in bnxt_alloc_ctx_mem()
9295 ctxm = &ctx->ctx_arr[BNXT_CTX_MRAV]; in bnxt_alloc_ctx_mem()
9297 ctxm->split_entry_cnt == BNXT_CTX_MRAV_AV_SPLIT_ENTRY + 1) { in bnxt_alloc_ctx_mem()
9298 num_ah = ctxm->mrav_av_entries; in bnxt_alloc_ctx_mem()
9299 num_mr = ctxm->max_entries - num_ah; in bnxt_alloc_ctx_mem()
9304 num_mr = min_t(u32, ctxm->max_entries / 2, 1024 * 256); in bnxt_alloc_ctx_mem()
9306 ctxm->split_entry_cnt = BNXT_CTX_MRAV_AV_SPLIT_ENTRY + 1; in bnxt_alloc_ctx_mem()
9307 if (!ctxm->mrav_av_entries || ctxm->mrav_av_entries > num_ah) in bnxt_alloc_ctx_mem()
9308 ctxm->mrav_av_entries = num_ah; in bnxt_alloc_ctx_mem()
9316 ctxm = &ctx->ctx_arr[BNXT_CTX_TIM]; in bnxt_alloc_ctx_mem()
9323 ctxm = &ctx->ctx_arr[BNXT_CTX_STQM]; in bnxt_alloc_ctx_mem()
9324 min = ctxm->min_entries; in bnxt_alloc_ctx_mem()
9325 entries_sp = ctx->ctx_arr[BNXT_CTX_VNIC].vnic_entries + l2_qps + in bnxt_alloc_ctx_mem()
9331 ctxm = &ctx->ctx_arr[BNXT_CTX_FTQM]; in bnxt_alloc_ctx_mem()
9336 for (i = 0; i < ctx->tqm_fp_rings_count + 1; i++) in bnxt_alloc_ctx_mem()
9340 if (bp->fw_cap & BNXT_FW_CAP_BACKING_STORE_V2) in bnxt_alloc_ctx_mem()
9345 netdev_err(bp->dev, "Failed configuring context mem, rc = %d.\n", in bnxt_alloc_ctx_mem()
9349 ctx->flags |= BNXT_CTX_FLAG_INITED; in bnxt_alloc_ctx_mem()
9359 if (!(bp->fw_dbg_cap & DBG_QCAPS_RESP_FLAGS_CRASHDUMP_HOST_DDR)) in bnxt_hwrm_crash_dump_mem_cfg()
9372 req->pg_size_lvl = cpu_to_le16(page_attr | in bnxt_hwrm_crash_dump_mem_cfg()
9373 bp->fw_crash_mem->ring_mem.depth); in bnxt_hwrm_crash_dump_mem_cfg()
9374 req->pbl = cpu_to_le64(bp->fw_crash_mem->ring_mem.pg_tbl_map); in bnxt_hwrm_crash_dump_mem_cfg()
9375 req->size = cpu_to_le32(bp->fw_crash_len); in bnxt_hwrm_crash_dump_mem_cfg()
9376 req->output_dest_flags = cpu_to_le16(BNXT_DBG_CR_DUMP_MDM_CFG_DDR); in bnxt_hwrm_crash_dump_mem_cfg()
9382 if (bp->fw_crash_mem) { in bnxt_free_crash_dump_mem()
9383 bnxt_free_ctx_pg_tbls(bp, bp->fw_crash_mem); in bnxt_free_crash_dump_mem()
9384 kfree(bp->fw_crash_mem); in bnxt_free_crash_dump_mem()
9385 bp->fw_crash_mem = NULL; in bnxt_free_crash_dump_mem()
9394 if (!(bp->fw_dbg_cap & DBG_QCAPS_RESP_FLAGS_CRASHDUMP_HOST_DDR)) in bnxt_alloc_crash_dump_mem()
9404 if (bp->fw_crash_mem && in bnxt_alloc_crash_dump_mem()
9405 mem_size <= bp->fw_crash_mem->nr_pages * BNXT_PAGE_SIZE) in bnxt_alloc_crash_dump_mem()
9408 if (bp->fw_crash_mem) in bnxt_alloc_crash_dump_mem()
9409 bnxt_free_ctx_pg_tbls(bp, bp->fw_crash_mem); in bnxt_alloc_crash_dump_mem()
9411 bp->fw_crash_mem = kzalloc(sizeof(*bp->fw_crash_mem), in bnxt_alloc_crash_dump_mem()
9413 if (!bp->fw_crash_mem) in bnxt_alloc_crash_dump_mem()
9414 return -ENOMEM; in bnxt_alloc_crash_dump_mem()
9416 rc = bnxt_alloc_ctx_pg_tbls(bp, bp->fw_crash_mem, mem_size, 1, NULL); in bnxt_alloc_crash_dump_mem()
9423 bp->fw_crash_len = mem_size; in bnxt_alloc_crash_dump_mem()
9431 struct bnxt_hw_resc *hw_resc = &bp->hw_resc; in bnxt_hwrm_func_resc_qcaps()
9438 req->fid = cpu_to_le16(0xffff); in bnxt_hwrm_func_resc_qcaps()
9444 hw_resc->max_tx_sch_inputs = le16_to_cpu(resp->max_tx_scheduler_inputs); in bnxt_hwrm_func_resc_qcaps()
9448 hw_resc->min_rsscos_ctxs = le16_to_cpu(resp->min_rsscos_ctx); in bnxt_hwrm_func_resc_qcaps()
9449 hw_resc->max_rsscos_ctxs = le16_to_cpu(resp->max_rsscos_ctx); in bnxt_hwrm_func_resc_qcaps()
9450 hw_resc->min_cp_rings = le16_to_cpu(resp->min_cmpl_rings); in bnxt_hwrm_func_resc_qcaps()
9451 hw_resc->max_cp_rings = le16_to_cpu(resp->max_cmpl_rings); in bnxt_hwrm_func_resc_qcaps()
9452 hw_resc->min_tx_rings = le16_to_cpu(resp->min_tx_rings); in bnxt_hwrm_func_resc_qcaps()
9453 hw_resc->max_tx_rings = le16_to_cpu(resp->max_tx_rings); in bnxt_hwrm_func_resc_qcaps()
9454 hw_resc->min_rx_rings = le16_to_cpu(resp->min_rx_rings); in bnxt_hwrm_func_resc_qcaps()
9455 hw_resc->max_rx_rings = le16_to_cpu(resp->max_rx_rings); in bnxt_hwrm_func_resc_qcaps()
9456 hw_resc->min_hw_ring_grps = le16_to_cpu(resp->min_hw_ring_grps); in bnxt_hwrm_func_resc_qcaps()
9457 hw_resc->max_hw_ring_grps = le16_to_cpu(resp->max_hw_ring_grps); in bnxt_hwrm_func_resc_qcaps()
9458 hw_resc->min_l2_ctxs = le16_to_cpu(resp->min_l2_ctxs); in bnxt_hwrm_func_resc_qcaps()
9459 hw_resc->max_l2_ctxs = le16_to_cpu(resp->max_l2_ctxs); in bnxt_hwrm_func_resc_qcaps()
9460 hw_resc->min_vnics = le16_to_cpu(resp->min_vnics); in bnxt_hwrm_func_resc_qcaps()
9461 hw_resc->max_vnics = le16_to_cpu(resp->max_vnics); in bnxt_hwrm_func_resc_qcaps()
9462 hw_resc->min_stat_ctxs = le16_to_cpu(resp->min_stat_ctx); in bnxt_hwrm_func_resc_qcaps()
9463 hw_resc->max_stat_ctxs = le16_to_cpu(resp->max_stat_ctx); in bnxt_hwrm_func_resc_qcaps()
9465 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in bnxt_hwrm_func_resc_qcaps()
9466 u16 max_msix = le16_to_cpu(resp->max_msix); in bnxt_hwrm_func_resc_qcaps()
9468 hw_resc->max_nqs = max_msix; in bnxt_hwrm_func_resc_qcaps()
9469 hw_resc->max_hw_ring_grps = hw_resc->max_rx_rings; in bnxt_hwrm_func_resc_qcaps()
9473 struct bnxt_pf_info *pf = &bp->pf; in bnxt_hwrm_func_resc_qcaps()
9475 pf->vf_resv_strategy = in bnxt_hwrm_func_resc_qcaps()
9476 le16_to_cpu(resp->vf_reservation_strategy); in bnxt_hwrm_func_resc_qcaps()
9477 if (pf->vf_resv_strategy > BNXT_VF_RESV_STRATEGY_MINIMAL_STATIC) in bnxt_hwrm_func_resc_qcaps()
9478 pf->vf_resv_strategy = BNXT_VF_RESV_STRATEGY_MAXIMAL; in bnxt_hwrm_func_resc_qcaps()
9489 struct bnxt_ptp_cfg *ptp = bp->ptp_cfg; in __bnxt_hwrm_ptp_qcfg()
9493 if (bp->hwrm_spec_code < 0x10801 || !BNXT_CHIP_P5_PLUS(bp)) { in __bnxt_hwrm_ptp_qcfg()
9494 rc = -ENODEV; in __bnxt_hwrm_ptp_qcfg()
9502 req->port_id = cpu_to_le16(bp->pf.port_id); in __bnxt_hwrm_ptp_qcfg()
9508 flags = resp->flags; in __bnxt_hwrm_ptp_qcfg()
9511 rc = -ENODEV; in __bnxt_hwrm_ptp_qcfg()
9517 rc = -ENOMEM; in __bnxt_hwrm_ptp_qcfg()
9520 ptp->bp = bp; in __bnxt_hwrm_ptp_qcfg()
9521 bp->ptp_cfg = ptp; in __bnxt_hwrm_ptp_qcfg()
9527 ptp->refclk_regs[0] = le32_to_cpu(resp->ts_ref_clock_reg_lower); in __bnxt_hwrm_ptp_qcfg()
9528 ptp->refclk_regs[1] = le32_to_cpu(resp->ts_ref_clock_reg_upper); in __bnxt_hwrm_ptp_qcfg()
9530 ptp->refclk_regs[0] = BNXT_TS_REG_TIMESYNC_TS0_LOWER; in __bnxt_hwrm_ptp_qcfg()
9531 ptp->refclk_regs[1] = BNXT_TS_REG_TIMESYNC_TS0_UPPER; in __bnxt_hwrm_ptp_qcfg()
9533 rc = -ENODEV; in __bnxt_hwrm_ptp_qcfg()
9536 ptp->rtc_configured = in __bnxt_hwrm_ptp_qcfg()
9540 netdev_warn(bp->dev, "PTP initialization failed.\n"); in __bnxt_hwrm_ptp_qcfg()
9549 bp->ptp_cfg = NULL; in __bnxt_hwrm_ptp_qcfg()
9557 struct bnxt_hw_resc *hw_resc = &bp->hw_resc; in __bnxt_hwrm_func_qcaps()
9565 req->fid = cpu_to_le16(0xffff); in __bnxt_hwrm_func_qcaps()
9571 flags = le32_to_cpu(resp->flags); in __bnxt_hwrm_func_qcaps()
9573 bp->flags |= BNXT_FLAG_ROCEV1_CAP; in __bnxt_hwrm_func_qcaps()
9575 bp->flags |= BNXT_FLAG_ROCEV2_CAP; in __bnxt_hwrm_func_qcaps()
9577 bp->fw_cap |= BNXT_FW_CAP_PCIE_STATS_SUPPORTED; in __bnxt_hwrm_func_qcaps()
9579 bp->fw_cap |= BNXT_FW_CAP_HOT_RESET; in __bnxt_hwrm_func_qcaps()
9581 bp->fw_cap |= BNXT_FW_CAP_EXT_STATS_SUPPORTED; in __bnxt_hwrm_func_qcaps()
9583 bp->fw_cap |= BNXT_FW_CAP_ERROR_RECOVERY; in __bnxt_hwrm_func_qcaps()
9585 bp->fw_cap |= BNXT_FW_CAP_ERR_RECOVER_RELOAD; in __bnxt_hwrm_func_qcaps()
9587 bp->fw_cap |= BNXT_FW_CAP_VLAN_TX_INSERT; in __bnxt_hwrm_func_qcaps()
9589 bp->fw_cap |= BNXT_FW_CAP_DBG_QCAPS; in __bnxt_hwrm_func_qcaps()
9591 flags_ext = le32_to_cpu(resp->flags_ext); in __bnxt_hwrm_func_qcaps()
9593 bp->fw_cap |= BNXT_FW_CAP_EXT_HW_STATS_SUPPORTED; in __bnxt_hwrm_func_qcaps()
9595 bp->fw_cap |= BNXT_FW_CAP_PTP_PPS; in __bnxt_hwrm_func_qcaps()
9597 bp->fw_cap |= BNXT_FW_CAP_PTP_RTC; in __bnxt_hwrm_func_qcaps()
9599 bp->fw_cap |= BNXT_FW_CAP_HOT_RESET_IF; in __bnxt_hwrm_func_qcaps()
9601 bp->fw_cap |= BNXT_FW_CAP_LIVEPATCH; in __bnxt_hwrm_func_qcaps()
9603 bp->fw_cap |= BNXT_FW_CAP_NPAR_1_2; in __bnxt_hwrm_func_qcaps()
9605 bp->fw_cap |= BNXT_FW_CAP_DFLT_VLAN_TPID_PCP; in __bnxt_hwrm_func_qcaps()
9607 bp->fw_cap |= BNXT_FW_CAP_BACKING_STORE_V2; in __bnxt_hwrm_func_qcaps()
9609 bp->flags |= BNXT_FLAG_TX_COAL_CMPL; in __bnxt_hwrm_func_qcaps()
9611 flags_ext2 = le32_to_cpu(resp->flags_ext2); in __bnxt_hwrm_func_qcaps()
9613 bp->fw_cap |= BNXT_FW_CAP_RX_ALL_PKT_TS; in __bnxt_hwrm_func_qcaps()
9615 bp->flags |= BNXT_FLAG_UDP_GSO_CAP; in __bnxt_hwrm_func_qcaps()
9617 bp->fw_cap |= BNXT_FW_CAP_TX_TS_CMP; in __bnxt_hwrm_func_qcaps()
9620 bp->fw_cap |= BNXT_FW_CAP_SW_MAX_RESOURCE_LIMITS; in __bnxt_hwrm_func_qcaps()
9623 bp->fw_cap |= BNXT_FW_CAP_ROCE_VF_RESC_MGMT_SUPPORTED; in __bnxt_hwrm_func_qcaps()
9625 bp->tx_push_thresh = 0; in __bnxt_hwrm_func_qcaps()
9628 bp->tx_push_thresh = BNXT_TX_PUSH_THRESH; in __bnxt_hwrm_func_qcaps()
9630 hw_resc->max_rsscos_ctxs = le16_to_cpu(resp->max_rsscos_ctx); in __bnxt_hwrm_func_qcaps()
9631 hw_resc->max_cp_rings = le16_to_cpu(resp->max_cmpl_rings); in __bnxt_hwrm_func_qcaps()
9632 hw_resc->max_tx_rings = le16_to_cpu(resp->max_tx_rings); in __bnxt_hwrm_func_qcaps()
9633 hw_resc->max_rx_rings = le16_to_cpu(resp->max_rx_rings); in __bnxt_hwrm_func_qcaps()
9634 hw_resc->max_hw_ring_grps = le32_to_cpu(resp->max_hw_ring_grps); in __bnxt_hwrm_func_qcaps()
9635 if (!hw_resc->max_hw_ring_grps) in __bnxt_hwrm_func_qcaps()
9636 hw_resc->max_hw_ring_grps = hw_resc->max_tx_rings; in __bnxt_hwrm_func_qcaps()
9637 hw_resc->max_l2_ctxs = le16_to_cpu(resp->max_l2_ctxs); in __bnxt_hwrm_func_qcaps()
9638 hw_resc->max_vnics = le16_to_cpu(resp->max_vnics); in __bnxt_hwrm_func_qcaps()
9639 hw_resc->max_stat_ctxs = le16_to_cpu(resp->max_stat_ctx); in __bnxt_hwrm_func_qcaps()
9641 hw_resc->max_encap_records = le32_to_cpu(resp->max_encap_records); in __bnxt_hwrm_func_qcaps()
9642 hw_resc->max_decap_records = le32_to_cpu(resp->max_decap_records); in __bnxt_hwrm_func_qcaps()
9643 hw_resc->max_tx_em_flows = le32_to_cpu(resp->max_tx_em_flows); in __bnxt_hwrm_func_qcaps()
9644 hw_resc->max_tx_wm_flows = le32_to_cpu(resp->max_tx_wm_flows); in __bnxt_hwrm_func_qcaps()
9645 hw_resc->max_rx_em_flows = le32_to_cpu(resp->max_rx_em_flows); in __bnxt_hwrm_func_qcaps()
9646 hw_resc->max_rx_wm_flows = le32_to_cpu(resp->max_rx_wm_flows); in __bnxt_hwrm_func_qcaps()
9649 struct bnxt_pf_info *pf = &bp->pf; in __bnxt_hwrm_func_qcaps()
9651 pf->fw_fid = le16_to_cpu(resp->fid); in __bnxt_hwrm_func_qcaps()
9652 pf->port_id = le16_to_cpu(resp->port_id); in __bnxt_hwrm_func_qcaps()
9653 memcpy(pf->mac_addr, resp->mac_address, ETH_ALEN); in __bnxt_hwrm_func_qcaps()
9654 pf->first_vf_id = le16_to_cpu(resp->first_vf_id); in __bnxt_hwrm_func_qcaps()
9655 pf->max_vfs = le16_to_cpu(resp->max_vfs); in __bnxt_hwrm_func_qcaps()
9656 bp->flags &= ~BNXT_FLAG_WOL_CAP; in __bnxt_hwrm_func_qcaps()
9658 bp->flags |= BNXT_FLAG_WOL_CAP; in __bnxt_hwrm_func_qcaps()
9660 bp->fw_cap |= BNXT_FW_CAP_PTP; in __bnxt_hwrm_func_qcaps()
9663 kfree(bp->ptp_cfg); in __bnxt_hwrm_func_qcaps()
9664 bp->ptp_cfg = NULL; in __bnxt_hwrm_func_qcaps()
9668 struct bnxt_vf_info *vf = &bp->vf; in __bnxt_hwrm_func_qcaps()
9670 vf->fw_fid = le16_to_cpu(resp->fid); in __bnxt_hwrm_func_qcaps()
9671 memcpy(vf->mac_addr, resp->mac_address, ETH_ALEN); in __bnxt_hwrm_func_qcaps()
9674 bp->tso_max_segs = le16_to_cpu(resp->max_tso_segs); in __bnxt_hwrm_func_qcaps()
9687 bp->fw_dbg_cap = 0; in bnxt_hwrm_dbg_qcaps()
9688 if (!(bp->fw_cap & BNXT_FW_CAP_DBG_QCAPS)) in bnxt_hwrm_dbg_qcaps()
9695 req->fid = cpu_to_le16(0xffff); in bnxt_hwrm_dbg_qcaps()
9701 bp->fw_dbg_cap = le32_to_cpu(resp->flags); in bnxt_hwrm_dbg_qcaps()
9721 netdev_err(bp->dev, "hwrm query qportcfg failure rc: %d\n", rc); in bnxt_hwrm_func_qcaps()
9724 if (bp->hwrm_spec_code >= 0x10803) { in bnxt_hwrm_func_qcaps()
9730 bp->fw_cap |= BNXT_FW_CAP_NEW_RM; in bnxt_hwrm_func_qcaps()
9742 if (!(bp->fw_cap & BNXT_FW_CAP_CFA_ADV_FLOW)) in bnxt_hwrm_cfa_adv_flow_mgnt_qcaps()
9754 flags = le32_to_cpu(resp->flags); in bnxt_hwrm_cfa_adv_flow_mgnt_qcaps()
9757 bp->fw_cap |= BNXT_FW_CAP_CFA_RFS_RING_TBL_IDX_V2; in bnxt_hwrm_cfa_adv_flow_mgnt_qcaps()
9761 bp->fw_cap |= BNXT_FW_CAP_CFA_RFS_RING_TBL_IDX_V3; in bnxt_hwrm_cfa_adv_flow_mgnt_qcaps()
9765 bp->fw_cap |= BNXT_FW_CAP_CFA_NTUPLE_RX_EXT_IP_PROTO; in bnxt_hwrm_cfa_adv_flow_mgnt_qcaps()
9774 if (bp->fw_health) in __bnxt_alloc_fw_health()
9777 bp->fw_health = kzalloc(sizeof(*bp->fw_health), GFP_KERNEL); in __bnxt_alloc_fw_health()
9778 if (!bp->fw_health) in __bnxt_alloc_fw_health()
9779 return -ENOMEM; in __bnxt_alloc_fw_health()
9781 mutex_init(&bp->fw_health->lock); in __bnxt_alloc_fw_health()
9789 if (!(bp->fw_cap & BNXT_FW_CAP_HOT_RESET) && in bnxt_alloc_fw_health()
9790 !(bp->fw_cap & BNXT_FW_CAP_ERROR_RECOVERY)) in bnxt_alloc_fw_health()
9795 bp->fw_cap &= ~BNXT_FW_CAP_HOT_RESET; in bnxt_alloc_fw_health()
9796 bp->fw_cap &= ~BNXT_FW_CAP_ERROR_RECOVERY; in bnxt_alloc_fw_health()
9805 writel(reg & BNXT_GRC_BASE_MASK, bp->bar0 + in __bnxt_map_fw_health_reg()
9812 struct bnxt_fw_health *fw_health = bp->fw_health; in bnxt_inv_fw_health_reg()
9818 reg_type = BNXT_FW_HEALTH_REG_TYPE(fw_health->regs[BNXT_FW_HEALTH_REG]); in bnxt_inv_fw_health_reg()
9820 fw_health->status_reliable = false; in bnxt_inv_fw_health_reg()
9822 reg_type = BNXT_FW_HEALTH_REG_TYPE(fw_health->regs[BNXT_FW_RESET_CNT_REG]); in bnxt_inv_fw_health_reg()
9824 fw_health->resets_reliable = false; in bnxt_inv_fw_health_reg()
9829 void __iomem *hs; in bnxt_try_map_fw_health_reg() local
9834 if (bp->fw_health) in bnxt_try_map_fw_health_reg()
9835 bp->fw_health->status_reliable = false; in bnxt_try_map_fw_health_reg()
9838 hs = bp->bar0 + BNXT_FW_HEALTH_WIN_OFF(HCOMM_STATUS_STRUCT_LOC); in bnxt_try_map_fw_health_reg()
9840 sig = readl(hs + offsetof(struct hcomm_status, sig_ver)); in bnxt_try_map_fw_health_reg()
9842 if (!bp->chip_num) { in bnxt_try_map_fw_health_reg()
9844 bp->chip_num = readl(bp->bar0 + in bnxt_try_map_fw_health_reg()
9854 status_loc = readl(hs + offsetof(struct hcomm_status, in bnxt_try_map_fw_health_reg()
9859 netdev_warn(bp->dev, "no memory for firmware status checks\n"); in bnxt_try_map_fw_health_reg()
9863 bp->fw_health->regs[BNXT_FW_HEALTH_REG] = status_loc; in bnxt_try_map_fw_health_reg()
9867 bp->fw_health->mapped_regs[BNXT_FW_HEALTH_REG] = in bnxt_try_map_fw_health_reg()
9871 bp->fw_health->status_reliable = true; in bnxt_try_map_fw_health_reg()
9876 struct bnxt_fw_health *fw_health = bp->fw_health; in bnxt_map_fw_health_regs()
9880 bp->fw_health->status_reliable = false; in bnxt_map_fw_health_regs()
9881 bp->fw_health->resets_reliable = false; in bnxt_map_fw_health_regs()
9882 /* Only pre-map the monitoring GRC registers using window 3 */ in bnxt_map_fw_health_regs()
9884 u32 reg = fw_health->regs[i]; in bnxt_map_fw_health_regs()
9891 return -ERANGE; in bnxt_map_fw_health_regs()
9892 fw_health->mapped_regs[i] = BNXT_FW_HEALTH_WIN_OFF(reg); in bnxt_map_fw_health_regs()
9894 bp->fw_health->status_reliable = true; in bnxt_map_fw_health_regs()
9895 bp->fw_health->resets_reliable = true; in bnxt_map_fw_health_regs()
9905 if (!bp->fw_health) in bnxt_remap_fw_health_regs()
9908 if (bp->fw_cap & BNXT_FW_CAP_ERROR_RECOVERY) { in bnxt_remap_fw_health_regs()
9909 bp->fw_health->status_reliable = true; in bnxt_remap_fw_health_regs()
9910 bp->fw_health->resets_reliable = true; in bnxt_remap_fw_health_regs()
9918 struct bnxt_fw_health *fw_health = bp->fw_health; in bnxt_hwrm_error_recovery_qcfg()
9923 if (!(bp->fw_cap & BNXT_FW_CAP_ERROR_RECOVERY)) in bnxt_hwrm_error_recovery_qcfg()
9934 fw_health->flags = le32_to_cpu(resp->flags); in bnxt_hwrm_error_recovery_qcfg()
9935 if ((fw_health->flags & ERROR_RECOVERY_QCFG_RESP_FLAGS_CO_CPU) && in bnxt_hwrm_error_recovery_qcfg()
9936 !(bp->fw_cap & BNXT_FW_CAP_KONG_MB_CHNL)) { in bnxt_hwrm_error_recovery_qcfg()
9937 rc = -EINVAL; in bnxt_hwrm_error_recovery_qcfg()
9940 fw_health->polling_dsecs = le32_to_cpu(resp->driver_polling_freq); in bnxt_hwrm_error_recovery_qcfg()
9941 fw_health->master_func_wait_dsecs = in bnxt_hwrm_error_recovery_qcfg()
9942 le32_to_cpu(resp->master_func_wait_period); in bnxt_hwrm_error_recovery_qcfg()
9943 fw_health->normal_func_wait_dsecs = in bnxt_hwrm_error_recovery_qcfg()
9944 le32_to_cpu(resp->normal_func_wait_period); in bnxt_hwrm_error_recovery_qcfg()
9945 fw_health->post_reset_wait_dsecs = in bnxt_hwrm_error_recovery_qcfg()
9946 le32_to_cpu(resp->master_func_wait_period_after_reset); in bnxt_hwrm_error_recovery_qcfg()
9947 fw_health->post_reset_max_wait_dsecs = in bnxt_hwrm_error_recovery_qcfg()
9948 le32_to_cpu(resp->max_bailout_time_after_reset); in bnxt_hwrm_error_recovery_qcfg()
9949 fw_health->regs[BNXT_FW_HEALTH_REG] = in bnxt_hwrm_error_recovery_qcfg()
9950 le32_to_cpu(resp->fw_health_status_reg); in bnxt_hwrm_error_recovery_qcfg()
9951 fw_health->regs[BNXT_FW_HEARTBEAT_REG] = in bnxt_hwrm_error_recovery_qcfg()
9952 le32_to_cpu(resp->fw_heartbeat_reg); in bnxt_hwrm_error_recovery_qcfg()
9953 fw_health->regs[BNXT_FW_RESET_CNT_REG] = in bnxt_hwrm_error_recovery_qcfg()
9954 le32_to_cpu(resp->fw_reset_cnt_reg); in bnxt_hwrm_error_recovery_qcfg()
9955 fw_health->regs[BNXT_FW_RESET_INPROG_REG] = in bnxt_hwrm_error_recovery_qcfg()
9956 le32_to_cpu(resp->reset_inprogress_reg); in bnxt_hwrm_error_recovery_qcfg()
9957 fw_health->fw_reset_inprog_reg_mask = in bnxt_hwrm_error_recovery_qcfg()
9958 le32_to_cpu(resp->reset_inprogress_reg_mask); in bnxt_hwrm_error_recovery_qcfg()
9959 fw_health->fw_reset_seq_cnt = resp->reg_array_cnt; in bnxt_hwrm_error_recovery_qcfg()
9960 if (fw_health->fw_reset_seq_cnt >= 16) { in bnxt_hwrm_error_recovery_qcfg()
9961 rc = -EINVAL; in bnxt_hwrm_error_recovery_qcfg()
9964 for (i = 0; i < fw_health->fw_reset_seq_cnt; i++) { in bnxt_hwrm_error_recovery_qcfg()
9965 fw_health->fw_reset_seq_regs[i] = in bnxt_hwrm_error_recovery_qcfg()
9966 le32_to_cpu(resp->reset_reg[i]); in bnxt_hwrm_error_recovery_qcfg()
9967 fw_health->fw_reset_seq_vals[i] = in bnxt_hwrm_error_recovery_qcfg()
9968 le32_to_cpu(resp->reset_reg_val[i]); in bnxt_hwrm_error_recovery_qcfg()
9969 fw_health->fw_reset_seq_delay_msec[i] = in bnxt_hwrm_error_recovery_qcfg()
9970 resp->delay_after_reset[i]; in bnxt_hwrm_error_recovery_qcfg()
9977 bp->fw_cap &= ~BNXT_FW_CAP_ERROR_RECOVERY; in bnxt_hwrm_error_recovery_qcfg()
9990 req->enables = 0; in bnxt_hwrm_func_reset()
10000 snprintf(bp->nvm_cfg_ver, FW_VER_STR_LEN, "%d.%d.%d", in bnxt_nvm_cfg_ver_get()
10022 if (!resp->max_configurable_queues) { in bnxt_hwrm_queue_qportcfg()
10023 rc = -EINVAL; in bnxt_hwrm_queue_qportcfg()
10026 bp->max_tc = resp->max_configurable_queues; in bnxt_hwrm_queue_qportcfg()
10027 bp->max_lltc = resp->max_configurable_lossless_queues; in bnxt_hwrm_queue_qportcfg()
10028 if (bp->max_tc > BNXT_MAX_QUEUE) in bnxt_hwrm_queue_qportcfg()
10029 bp->max_tc = BNXT_MAX_QUEUE; in bnxt_hwrm_queue_qportcfg()
10031 no_rdma = !(bp->flags & BNXT_FLAG_ROCE_CAP); in bnxt_hwrm_queue_qportcfg()
10032 qptr = &resp->queue_id0; in bnxt_hwrm_queue_qportcfg()
10033 for (i = 0, j = 0; i < bp->max_tc; i++) { in bnxt_hwrm_queue_qportcfg()
10034 bp->q_info[j].queue_id = *qptr; in bnxt_hwrm_queue_qportcfg()
10035 bp->q_ids[i] = *qptr++; in bnxt_hwrm_queue_qportcfg()
10036 bp->q_info[j].queue_profile = *qptr++; in bnxt_hwrm_queue_qportcfg()
10037 bp->tc_to_qidx[j] = j; in bnxt_hwrm_queue_qportcfg()
10038 if (!BNXT_CNPQ(bp->q_info[j].queue_profile) || in bnxt_hwrm_queue_qportcfg()
10042 bp->max_q = bp->max_tc; in bnxt_hwrm_queue_qportcfg()
10043 bp->max_tc = max_t(u8, j, 1); in bnxt_hwrm_queue_qportcfg()
10045 if (resp->queue_cfg_info & QUEUE_QPORTCFG_RESP_QUEUE_CFG_INFO_ASYM_CFG) in bnxt_hwrm_queue_qportcfg()
10046 bp->max_tc = 1; in bnxt_hwrm_queue_qportcfg()
10048 if (bp->max_lltc > bp->max_tc) in bnxt_hwrm_queue_qportcfg()
10049 bp->max_lltc = bp->max_tc; in bnxt_hwrm_queue_qportcfg()
10065 req->hwrm_intf_maj = HWRM_VERSION_MAJOR; in bnxt_hwrm_poll()
10066 req->hwrm_intf_min = HWRM_VERSION_MINOR; in bnxt_hwrm_poll()
10067 req->hwrm_intf_upd = HWRM_VERSION_UPDATE; in bnxt_hwrm_poll()
10087 bp->hwrm_max_req_len = HWRM_MAX_REQ_LEN; in bnxt_hwrm_ver_get()
10088 req->hwrm_intf_maj = HWRM_VERSION_MAJOR; in bnxt_hwrm_ver_get()
10089 req->hwrm_intf_min = HWRM_VERSION_MINOR; in bnxt_hwrm_ver_get()
10090 req->hwrm_intf_upd = HWRM_VERSION_UPDATE; in bnxt_hwrm_ver_get()
10097 memcpy(&bp->ver_resp, resp, sizeof(struct hwrm_ver_get_output)); in bnxt_hwrm_ver_get()
10099 bp->hwrm_spec_code = resp->hwrm_intf_maj_8b << 16 | in bnxt_hwrm_ver_get()
10100 resp->hwrm_intf_min_8b << 8 | in bnxt_hwrm_ver_get()
10101 resp->hwrm_intf_upd_8b; in bnxt_hwrm_ver_get()
10102 if (resp->hwrm_intf_maj_8b < 1) { in bnxt_hwrm_ver_get()
10103 netdev_warn(bp->dev, "HWRM interface %d.%d.%d is older than 1.0.0.\n", in bnxt_hwrm_ver_get()
10104 resp->hwrm_intf_maj_8b, resp->hwrm_intf_min_8b, in bnxt_hwrm_ver_get()
10105 resp->hwrm_intf_upd_8b); in bnxt_hwrm_ver_get()
10106 netdev_warn(bp->dev, "Please update firmware with HWRM interface 1.0.0 or newer.\n"); in bnxt_hwrm_ver_get()
10112 if (bp->hwrm_spec_code > hwrm_ver) in bnxt_hwrm_ver_get()
10113 snprintf(bp->hwrm_ver_supp, FW_VER_STR_LEN, "%d.%d.%d", in bnxt_hwrm_ver_get()
10117 snprintf(bp->hwrm_ver_supp, FW_VER_STR_LEN, "%d.%d.%d", in bnxt_hwrm_ver_get()
10118 resp->hwrm_intf_maj_8b, resp->hwrm_intf_min_8b, in bnxt_hwrm_ver_get()
10119 resp->hwrm_intf_upd_8b); in bnxt_hwrm_ver_get()
10121 fw_maj = le16_to_cpu(resp->hwrm_fw_major); in bnxt_hwrm_ver_get()
10122 if (bp->hwrm_spec_code > 0x10803 && fw_maj) { in bnxt_hwrm_ver_get()
10123 fw_min = le16_to_cpu(resp->hwrm_fw_minor); in bnxt_hwrm_ver_get()
10124 fw_bld = le16_to_cpu(resp->hwrm_fw_build); in bnxt_hwrm_ver_get()
10125 fw_rsv = le16_to_cpu(resp->hwrm_fw_patch); in bnxt_hwrm_ver_get()
10128 fw_maj = resp->hwrm_fw_maj_8b; in bnxt_hwrm_ver_get()
10129 fw_min = resp->hwrm_fw_min_8b; in bnxt_hwrm_ver_get()
10130 fw_bld = resp->hwrm_fw_bld_8b; in bnxt_hwrm_ver_get()
10131 fw_rsv = resp->hwrm_fw_rsvd_8b; in bnxt_hwrm_ver_get()
10134 bp->fw_ver_code = BNXT_FW_VER_CODE(fw_maj, fw_min, fw_bld, fw_rsv); in bnxt_hwrm_ver_get()
10135 snprintf(bp->fw_ver_str, len, "%d.%d.%d.%d", fw_maj, fw_min, fw_bld, in bnxt_hwrm_ver_get()
10138 if (strlen(resp->active_pkg_name)) { in bnxt_hwrm_ver_get()
10139 int fw_ver_len = strlen(bp->fw_ver_str); in bnxt_hwrm_ver_get()
10141 snprintf(bp->fw_ver_str + fw_ver_len, in bnxt_hwrm_ver_get()
10142 FW_VER_STR_LEN - fw_ver_len - 1, "/pkg %s", in bnxt_hwrm_ver_get()
10143 resp->active_pkg_name); in bnxt_hwrm_ver_get()
10144 bp->fw_cap |= BNXT_FW_CAP_PKG_VER; in bnxt_hwrm_ver_get()
10147 bp->hwrm_cmd_timeout = le16_to_cpu(resp->def_req_timeout); in bnxt_hwrm_ver_get()
10148 if (!bp->hwrm_cmd_timeout) in bnxt_hwrm_ver_get()
10149 bp->hwrm_cmd_timeout = DFLT_HWRM_CMD_TIMEOUT; in bnxt_hwrm_ver_get()
10150 bp->hwrm_cmd_max_timeout = le16_to_cpu(resp->max_req_timeout) * 1000; in bnxt_hwrm_ver_get()
10151 if (!bp->hwrm_cmd_max_timeout) in bnxt_hwrm_ver_get()
10152 bp->hwrm_cmd_max_timeout = HWRM_CMD_MAX_TIMEOUT; in bnxt_hwrm_ver_get()
10153 else if (bp->hwrm_cmd_max_timeout > HWRM_CMD_MAX_TIMEOUT) in bnxt_hwrm_ver_get()
10154 …netdev_warn(bp->dev, "Device requests max timeout of %d seconds, may trigger hung task watchdog\n", in bnxt_hwrm_ver_get()
10155 bp->hwrm_cmd_max_timeout / 1000); in bnxt_hwrm_ver_get()
10157 if (resp->hwrm_intf_maj_8b >= 1) { in bnxt_hwrm_ver_get()
10158 bp->hwrm_max_req_len = le16_to_cpu(resp->max_req_win_len); in bnxt_hwrm_ver_get()
10159 bp->hwrm_max_ext_req_len = le16_to_cpu(resp->max_ext_req_len); in bnxt_hwrm_ver_get()
10161 if (bp->hwrm_max_ext_req_len < HWRM_MAX_REQ_LEN) in bnxt_hwrm_ver_get()
10162 bp->hwrm_max_ext_req_len = HWRM_MAX_REQ_LEN; in bnxt_hwrm_ver_get()
10164 bp->chip_num = le16_to_cpu(resp->chip_num); in bnxt_hwrm_ver_get()
10165 bp->chip_rev = resp->chip_rev; in bnxt_hwrm_ver_get()
10166 if (bp->chip_num == CHIP_NUM_58700 && !resp->chip_rev && in bnxt_hwrm_ver_get()
10167 !resp->chip_metal) in bnxt_hwrm_ver_get()
10168 bp->flags |= BNXT_FLAG_CHIP_NITRO_A0; in bnxt_hwrm_ver_get()
10170 dev_caps_cfg = le32_to_cpu(resp->dev_caps_cfg); in bnxt_hwrm_ver_get()
10173 bp->fw_cap |= BNXT_FW_CAP_SHORT_CMD; in bnxt_hwrm_ver_get()
10176 bp->fw_cap |= BNXT_FW_CAP_KONG_MB_CHNL; in bnxt_hwrm_ver_get()
10180 bp->fw_cap |= BNXT_FW_CAP_OVS_64BIT_HANDLE; in bnxt_hwrm_ver_get()
10184 bp->fw_cap |= BNXT_FW_CAP_TRUSTED_VF; in bnxt_hwrm_ver_get()
10188 bp->fw_cap |= BNXT_FW_CAP_CFA_ADV_FLOW; in bnxt_hwrm_ver_get()
10202 if ((BNXT_VF(bp) && bp->hwrm_spec_code < 0x10901) || in bnxt_hwrm_fw_set_time()
10203 bp->hwrm_spec_code < 0x10400) in bnxt_hwrm_fw_set_time()
10204 return -EOPNOTSUPP; in bnxt_hwrm_fw_set_time()
10211 req->year = cpu_to_le16(1900 + tm.tm_year); in bnxt_hwrm_fw_set_time()
10212 req->month = 1 + tm.tm_mon; in bnxt_hwrm_fw_set_time()
10213 req->day = tm.tm_mday; in bnxt_hwrm_fw_set_time()
10214 req->hour = tm.tm_hour; in bnxt_hwrm_fw_set_time()
10215 req->minute = tm.tm_min; in bnxt_hwrm_fw_set_time()
10216 req->second = tm.tm_sec; in bnxt_hwrm_fw_set_time()
10242 if (masks[i] == -1ULL) in __bnxt_accumulate_stats()
10251 if (!stats->hw_stats) in bnxt_accumulate_stats()
10254 __bnxt_accumulate_stats(stats->hw_stats, stats->sw_stats, in bnxt_accumulate_stats()
10255 stats->hw_masks, stats->len / 8, false); in bnxt_accumulate_stats()
10265 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_accumulate_all_stats()
10268 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_accumulate_all_stats()
10269 struct bnxt_napi *bnapi = bp->bnapi[i]; in bnxt_accumulate_all_stats()
10273 cpr = &bnapi->cp_ring; in bnxt_accumulate_all_stats()
10274 stats = &cpr->stats; in bnxt_accumulate_all_stats()
10277 __bnxt_accumulate_stats(stats->hw_stats, stats->sw_stats, in bnxt_accumulate_all_stats()
10278 ring0_stats->hw_masks, in bnxt_accumulate_all_stats()
10279 ring0_stats->len / 8, ignore_zero); in bnxt_accumulate_all_stats()
10281 if (bp->flags & BNXT_FLAG_PORT_STATS) { in bnxt_accumulate_all_stats()
10282 struct bnxt_stats_mem *stats = &bp->port_stats; in bnxt_accumulate_all_stats()
10283 __le64 *hw_stats = stats->hw_stats; in bnxt_accumulate_all_stats()
10284 u64 *sw_stats = stats->sw_stats; in bnxt_accumulate_all_stats()
10285 u64 *masks = stats->hw_masks; in bnxt_accumulate_all_stats()
10297 if (bp->flags & BNXT_FLAG_PORT_STATS_EXT) { in bnxt_accumulate_all_stats()
10298 bnxt_accumulate_stats(&bp->rx_port_stats_ext); in bnxt_accumulate_all_stats()
10299 bnxt_accumulate_stats(&bp->tx_port_stats_ext); in bnxt_accumulate_all_stats()
10306 struct bnxt_pf_info *pf = &bp->pf; in bnxt_hwrm_port_qstats()
10309 if (!(bp->flags & BNXT_FLAG_PORT_STATS)) in bnxt_hwrm_port_qstats()
10312 if (flags && !(bp->fw_cap & BNXT_FW_CAP_EXT_HW_STATS_SUPPORTED)) in bnxt_hwrm_port_qstats()
10313 return -EOPNOTSUPP; in bnxt_hwrm_port_qstats()
10319 req->flags = flags; in bnxt_hwrm_port_qstats()
10320 req->port_id = cpu_to_le16(pf->port_id); in bnxt_hwrm_port_qstats()
10321 req->tx_stat_host_addr = cpu_to_le64(bp->port_stats.hw_stats_map + in bnxt_hwrm_port_qstats()
10323 req->rx_stat_host_addr = cpu_to_le64(bp->port_stats.hw_stats_map); in bnxt_hwrm_port_qstats()
10333 struct bnxt_pf_info *pf = &bp->pf; in bnxt_hwrm_port_qstats_ext()
10337 if (!(bp->flags & BNXT_FLAG_PORT_STATS_EXT)) in bnxt_hwrm_port_qstats_ext()
10340 if (flags && !(bp->fw_cap & BNXT_FW_CAP_EXT_HW_STATS_SUPPORTED)) in bnxt_hwrm_port_qstats_ext()
10341 return -EOPNOTSUPP; in bnxt_hwrm_port_qstats_ext()
10347 req_qs->flags = flags; in bnxt_hwrm_port_qstats_ext()
10348 req_qs->port_id = cpu_to_le16(pf->port_id); in bnxt_hwrm_port_qstats_ext()
10349 req_qs->rx_stat_size = cpu_to_le16(sizeof(struct rx_port_stats_ext)); in bnxt_hwrm_port_qstats_ext()
10350 req_qs->rx_stat_host_addr = cpu_to_le64(bp->rx_port_stats_ext.hw_stats_map); in bnxt_hwrm_port_qstats_ext()
10351 tx_stat_size = bp->tx_port_stats_ext.hw_stats ? in bnxt_hwrm_port_qstats_ext()
10353 req_qs->tx_stat_size = cpu_to_le16(tx_stat_size); in bnxt_hwrm_port_qstats_ext()
10354 req_qs->tx_stat_host_addr = cpu_to_le64(bp->tx_port_stats_ext.hw_stats_map); in bnxt_hwrm_port_qstats_ext()
10358 bp->fw_rx_stats_ext_size = in bnxt_hwrm_port_qstats_ext()
10359 le16_to_cpu(resp_qs->rx_stat_size) / 8; in bnxt_hwrm_port_qstats_ext()
10361 bp->fw_rx_stats_ext_size > BNXT_RX_STATS_EXT_NUM_LEGACY) in bnxt_hwrm_port_qstats_ext()
10362 bp->fw_rx_stats_ext_size = BNXT_RX_STATS_EXT_NUM_LEGACY; in bnxt_hwrm_port_qstats_ext()
10364 bp->fw_tx_stats_ext_size = tx_stat_size ? in bnxt_hwrm_port_qstats_ext()
10365 le16_to_cpu(resp_qs->tx_stat_size) / 8 : 0; in bnxt_hwrm_port_qstats_ext()
10367 bp->fw_rx_stats_ext_size = 0; in bnxt_hwrm_port_qstats_ext()
10368 bp->fw_tx_stats_ext_size = 0; in bnxt_hwrm_port_qstats_ext()
10375 if (bp->fw_tx_stats_ext_size <= in bnxt_hwrm_port_qstats_ext()
10377 bp->pri2cos_valid = 0; in bnxt_hwrm_port_qstats_ext()
10385 req_qc->flags = cpu_to_le32(QUEUE_PRI2COS_QCFG_REQ_FLAGS_IVLAN); in bnxt_hwrm_port_qstats_ext()
10393 pri2cos = &resp_qc->pri0_cos_queue_id; in bnxt_hwrm_port_qstats_ext()
10401 bp->pri2cos_valid = false; in bnxt_hwrm_port_qstats_ext()
10405 for (j = 0; j < bp->max_q; j++) { in bnxt_hwrm_port_qstats_ext()
10406 if (bp->q_ids[j] == queue_id) in bnxt_hwrm_port_qstats_ext()
10407 bp->pri2cos_idx[i] = queue_idx; in bnxt_hwrm_port_qstats_ext()
10410 bp->pri2cos_valid = true; in bnxt_hwrm_port_qstats_ext()
10431 tpa_flags = bp->flags & BNXT_FLAG_TPA; in bnxt_set_tpa()
10434 for (i = 0; i < bp->nr_vnics; i++) { in bnxt_set_tpa()
10435 rc = bnxt_hwrm_vnic_set_tpa(bp, &bp->vnic_info[i], tpa_flags); in bnxt_set_tpa()
10437 netdev_err(bp->dev, "hwrm vnic set tpa failure rc for vnic %d: %x\n", in bnxt_set_tpa()
10449 for (i = 0; i < bp->nr_vnics; i++) in bnxt_hwrm_clear_vnic_rss()
10450 bnxt_hwrm_vnic_set_rss(bp, &bp->vnic_info[i], false); in bnxt_hwrm_clear_vnic_rss()
10455 if (!bp->vnic_info) in bnxt_clear_vnic()
10459 if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS)) { in bnxt_clear_vnic()
10465 if (bp->flags & BNXT_FLAG_TPA) in bnxt_clear_vnic()
10468 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_clear_vnic()
10495 return -EINVAL; in bnxt_hwrm_set_br_mode()
10501 req->fid = cpu_to_le16(0xffff); in bnxt_hwrm_set_br_mode()
10502 req->enables = cpu_to_le32(FUNC_CFG_REQ_ENABLES_EVB_MODE); in bnxt_hwrm_set_br_mode()
10503 req->evb_mode = evb_mode; in bnxt_hwrm_set_br_mode()
10512 if (BNXT_VF(bp) || bp->hwrm_spec_code < 0x10803) in bnxt_hwrm_set_cache_line_size()
10519 req->fid = cpu_to_le16(0xffff); in bnxt_hwrm_set_cache_line_size()
10520 req->enables = cpu_to_le32(FUNC_CFG_REQ_ENABLES_CACHE_LINESIZE); in bnxt_hwrm_set_cache_line_size()
10521 req->options = FUNC_CFG_REQ_OPTIONS_CACHE_LINESIZE_SIZE_64; in bnxt_hwrm_set_cache_line_size()
10523 req->options = FUNC_CFG_REQ_OPTIONS_CACHE_LINESIZE_SIZE_128; in bnxt_hwrm_set_cache_line_size()
10532 if (vnic->flags & BNXT_VNIC_RFS_NEW_RSS_FLAG) in __bnxt_setup_vnic()
10538 netdev_err(bp->dev, "hwrm vnic %d alloc failure rc: %x\n", in __bnxt_setup_vnic()
10539 vnic->vnic_id, rc); in __bnxt_setup_vnic()
10542 bp->rsscos_nr_ctxs++; in __bnxt_setup_vnic()
10547 netdev_err(bp->dev, "hwrm vnic %d cos ctx alloc failure rc: %x\n", in __bnxt_setup_vnic()
10548 vnic->vnic_id, rc); in __bnxt_setup_vnic()
10551 bp->rsscos_nr_ctxs++; in __bnxt_setup_vnic()
10558 netdev_err(bp->dev, "hwrm vnic %d cfg failure rc: %x\n", in __bnxt_setup_vnic()
10559 vnic->vnic_id, rc); in __bnxt_setup_vnic()
10566 netdev_err(bp->dev, "hwrm vnic %d set rss failure rc: %x\n", in __bnxt_setup_vnic()
10567 vnic->vnic_id, rc); in __bnxt_setup_vnic()
10571 if (bp->flags & BNXT_FLAG_AGG_RINGS) { in __bnxt_setup_vnic()
10574 netdev_err(bp->dev, "hwrm vnic %d set hds failure rc: %x\n", in __bnxt_setup_vnic()
10575 vnic->vnic_id, rc); in __bnxt_setup_vnic()
10593 req->vnic_id = cpu_to_le32(vnic->fw_vnic_id); in bnxt_hwrm_vnic_update()
10596 req->mru = cpu_to_le16(vnic->mru); in bnxt_hwrm_vnic_update()
10598 req->enables = cpu_to_le32(valid); in bnxt_hwrm_vnic_update()
10609 netdev_err(bp->dev, "hwrm vnic %d set rss failure rc: %d\n", in bnxt_hwrm_vnic_rss_cfg_p5()
10610 vnic->vnic_id, rc); in bnxt_hwrm_vnic_rss_cfg_p5()
10615 netdev_err(bp->dev, "hwrm vnic %d cfg failure rc: %x\n", in bnxt_hwrm_vnic_rss_cfg_p5()
10616 vnic->vnic_id, rc); in bnxt_hwrm_vnic_rss_cfg_p5()
10624 nr_ctxs = bnxt_get_nr_rss_ctxs(bp, bp->rx_nr_rings); in __bnxt_setup_vnic_p5()
10628 netdev_err(bp->dev, "hwrm vnic %d ctx %d alloc failure rc: %x\n", in __bnxt_setup_vnic_p5()
10629 vnic->vnic_id, i, rc); in __bnxt_setup_vnic_p5()
10632 bp->rsscos_nr_ctxs++; in __bnxt_setup_vnic_p5()
10635 return -ENOMEM; in __bnxt_setup_vnic_p5()
10641 if (bp->flags & BNXT_FLAG_AGG_RINGS) { in __bnxt_setup_vnic_p5()
10644 netdev_err(bp->dev, "hwrm vnic %d set hds failure rc: %x\n", in __bnxt_setup_vnic_p5()
10645 vnic->vnic_id, rc); in __bnxt_setup_vnic_p5()
10653 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_setup_vnic()
10667 netdev_err(bp->dev, "hwrm vnic %d alloc failure rc: %x\n", in bnxt_alloc_and_setup_vnic()
10668 vnic->vnic_id, rc); in bnxt_alloc_and_setup_vnic()
10680 vnic = &bp->vnic_info[BNXT_VNIC_NTUPLE]; in bnxt_alloc_rfs_vnics()
10681 return bnxt_alloc_and_setup_vnic(bp, vnic, 0, bp->rx_nr_rings); in bnxt_alloc_rfs_vnics()
10684 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_alloc_rfs_vnics()
10687 for (i = 0; i < bp->rx_nr_rings; i++) { in bnxt_alloc_rfs_vnics()
10691 if (vnic_id >= bp->nr_vnics) in bnxt_alloc_rfs_vnics()
10694 vnic = &bp->vnic_info[vnic_id]; in bnxt_alloc_rfs_vnics()
10695 vnic->flags |= BNXT_VNIC_RFS_FLAG; in bnxt_alloc_rfs_vnics()
10696 if (bp->rss_cap & BNXT_RSS_CAP_NEW_RSS_CAP) in bnxt_alloc_rfs_vnics()
10697 vnic->flags |= BNXT_VNIC_RFS_NEW_RSS_FLAG; in bnxt_alloc_rfs_vnics()
10698 if (bnxt_alloc_and_setup_vnic(bp, &bp->vnic_info[vnic_id], ring_id, 1)) in bnxt_alloc_rfs_vnics()
10707 struct bnxt_vnic_info *vnic = &rss_ctx->vnic; in bnxt_del_one_rss_ctx()
10712 if (netif_running(bp->dev)) { in bnxt_del_one_rss_ctx()
10713 bnxt_hwrm_vnic_free_one(bp, &rss_ctx->vnic); in bnxt_del_one_rss_ctx()
10715 if (vnic->fw_rss_cos_lb_ctx[i] != INVALID_HW_RING_ID) in bnxt_del_one_rss_ctx()
10722 list_for_each_entry_safe(usr_fltr, tmp, &bp->usr_fltr_list, list) { in bnxt_del_one_rss_ctx()
10723 if ((usr_fltr->flags & BNXT_ACT_RSS_CTX) && in bnxt_del_one_rss_ctx()
10724 usr_fltr->fw_vnic_id == rss_ctx->index) { in bnxt_del_one_rss_ctx()
10734 if (vnic->rss_table) in bnxt_del_one_rss_ctx()
10735 dma_free_coherent(&bp->pdev->dev, vnic->rss_table_size, in bnxt_del_one_rss_ctx()
10736 vnic->rss_table, in bnxt_del_one_rss_ctx()
10737 vnic->rss_table_dma_addr); in bnxt_del_one_rss_ctx()
10738 bp->num_rss_ctx--; in bnxt_del_one_rss_ctx()
10743 bool set_tpa = !!(bp->flags & BNXT_FLAG_TPA); in bnxt_hwrm_realloc_rss_ctx_vnic()
10747 xa_for_each(&bp->dev->ethtool->rss_ctx, context, ctx) { in bnxt_hwrm_realloc_rss_ctx_vnic()
10749 struct bnxt_vnic_info *vnic = &rss_ctx->vnic; in bnxt_hwrm_realloc_rss_ctx_vnic()
10751 if (bnxt_hwrm_vnic_alloc(bp, vnic, 0, bp->rx_nr_rings) || in bnxt_hwrm_realloc_rss_ctx_vnic()
10754 netdev_err(bp->dev, "Failed to restore RSS ctx %d\n", in bnxt_hwrm_realloc_rss_ctx_vnic()
10755 rss_ctx->index); in bnxt_hwrm_realloc_rss_ctx_vnic()
10757 ethtool_rxfh_context_lost(bp->dev, rss_ctx->index); in bnxt_hwrm_realloc_rss_ctx_vnic()
10767 xa_for_each(&bp->dev->ethtool->rss_ctx, context, ctx) { in bnxt_clear_rss_ctxs()
10778 if (BNXT_VF(bp) && !bp->vf.vlan && !bnxt_is_trusted_vf(bp, &bp->vf)) in bnxt_promisc_ok()
10786 struct bnxt_vnic_info *vnic = &bp->vnic_info[1]; in bnxt_setup_nitroa0_vnic()
10789 rc = bnxt_hwrm_vnic_alloc(bp, vnic, bp->rx_nr_rings - 1, 1); in bnxt_setup_nitroa0_vnic()
10791 netdev_err(bp->dev, "Cannot allocate special vnic for NS2 A0: %x\n", in bnxt_setup_nitroa0_vnic()
10798 netdev_err(bp->dev, "Cannot allocate special vnic for NS2 A0: %x\n", in bnxt_setup_nitroa0_vnic()
10810 struct bnxt_vnic_info *vnic = &bp->vnic_info[BNXT_VNIC_DEFAULT]; in bnxt_init_chip()
10812 unsigned int rx_nr_rings = bp->rx_nr_rings; in bnxt_init_chip()
10817 netdev_err(bp->dev, "hwrm stat ctx alloc failure rc: %x\n", in bnxt_init_chip()
10825 netdev_err(bp->dev, "hwrm ring alloc failure rc: %x\n", rc); in bnxt_init_chip()
10831 netdev_err(bp->dev, "hwrm_ring_grp alloc failure: %x\n", rc); in bnxt_init_chip()
10836 rx_nr_rings--; in bnxt_init_chip()
10841 netdev_err(bp->dev, "hwrm vnic alloc failure rc: %x\n", rc); in bnxt_init_chip()
10851 if (bp->rss_cap & BNXT_RSS_CAP_RSS_HASH_TYPE_DELTA) in bnxt_init_chip()
10854 if (bp->flags & BNXT_FLAG_RFS) { in bnxt_init_chip()
10860 if (bp->flags & BNXT_FLAG_TPA) { in bnxt_init_chip()
10870 rc = bnxt_hwrm_set_vnic_filter(bp, 0, 0, bp->dev->dev_addr); in bnxt_init_chip()
10872 if (BNXT_VF(bp) && rc == -ENODEV) in bnxt_init_chip()
10873 netdev_err(bp->dev, "Cannot configure L2 filter while PF is unavailable\n"); in bnxt_init_chip()
10875 netdev_err(bp->dev, "HWRM vnic filter failure rc: %x\n", rc); in bnxt_init_chip()
10878 vnic->uc_filter_count = 1; in bnxt_init_chip()
10880 vnic->rx_mask = 0; in bnxt_init_chip()
10881 if (test_bit(BNXT_STATE_HALF_OPEN, &bp->state)) in bnxt_init_chip()
10884 if (bp->dev->flags & IFF_BROADCAST) in bnxt_init_chip()
10885 vnic->rx_mask |= CFA_L2_SET_RX_MASK_REQ_MASK_BCAST; in bnxt_init_chip()
10887 if (bp->dev->flags & IFF_PROMISC) in bnxt_init_chip()
10888 vnic->rx_mask |= CFA_L2_SET_RX_MASK_REQ_MASK_PROMISCUOUS; in bnxt_init_chip()
10890 if (bp->dev->flags & IFF_ALLMULTI) { in bnxt_init_chip()
10891 vnic->rx_mask |= CFA_L2_SET_RX_MASK_REQ_MASK_ALL_MCAST; in bnxt_init_chip()
10892 vnic->mc_list_count = 0; in bnxt_init_chip()
10893 } else if (bp->dev->flags & IFF_MULTICAST) { in bnxt_init_chip()
10897 vnic->rx_mask |= mask; in bnxt_init_chip()
10907 netdev_warn(bp->dev, "HWRM set coalescing failure rc: %x\n", in bnxt_init_chip()
10913 netdev_err(bp->dev, "Special vnic setup failure for NS2 A0 rc: %x\n", in bnxt_init_chip()
10919 netdev_update_features(bp->dev); in bnxt_init_chip()
10950 struct net_device *dev = bp->dev; in bnxt_set_real_num_queues()
10952 rc = netif_set_real_num_tx_queues(dev, bp->tx_nr_rings - in bnxt_set_real_num_queues()
10953 bp->tx_nr_rings_xdp); in bnxt_set_real_num_queues()
10957 rc = netif_set_real_num_rx_queues(dev, bp->rx_nr_rings); in bnxt_set_real_num_queues()
10962 if (bp->flags & BNXT_FLAG_RFS) in bnxt_set_real_num_queues()
10963 dev->rx_cpu_rmap = alloc_irq_cpu_rmap(bp->rx_nr_rings); in bnxt_set_real_num_queues()
10979 return -ENOMEM; in __bnxt_trim_rings()
10983 _rx--; in __bnxt_trim_rings()
10985 _tx--; in __bnxt_trim_rings()
10995 return (tx - tx_xdp) / tx_sets + tx_xdp; in __bnxt_num_tx_to_cp()
11000 int tcs = bp->num_tc; in bnxt_num_tx_to_cp()
11004 return __bnxt_num_tx_to_cp(bp, tx, tcs, bp->tx_nr_rings_xdp); in bnxt_num_tx_to_cp()
11009 int tcs = bp->num_tc; in bnxt_num_cp_to_tx()
11011 return (tx_cp - bp->tx_nr_rings_xdp) * tcs + in bnxt_num_cp_to_tx()
11012 bp->tx_nr_rings_xdp; in bnxt_num_cp_to_tx()
11035 const int len = sizeof(bp->irq_tbl[0].name); in bnxt_setup_msix()
11036 struct net_device *dev = bp->dev; in bnxt_setup_msix()
11039 tcs = bp->num_tc; in bnxt_setup_msix()
11044 count = bp->tx_nr_rings_per_tc; in bnxt_setup_msix()
11050 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_setup_msix()
11054 if (bp->flags & BNXT_FLAG_SHARED_RINGS) in bnxt_setup_msix()
11056 else if (i < bp->rx_nr_rings) in bnxt_setup_msix()
11061 snprintf(bp->irq_tbl[map_idx].name, len, "%s-%s-%d", dev->name, in bnxt_setup_msix()
11063 bp->irq_tbl[map_idx].handler = bnxt_msix; in bnxt_setup_msix()
11075 for (i = bp->total_irqs; i < total; i++) { in bnxt_change_msix()
11076 map = pci_msix_alloc_irq_at(bp->pdev, i, NULL); in bnxt_change_msix()
11078 return bp->total_irqs; in bnxt_change_msix()
11079 bp->irq_tbl[i].vector = map.virq; in bnxt_change_msix()
11080 bp->total_irqs++; in bnxt_change_msix()
11083 /* trim MSIX from the end if needed */ in bnxt_change_msix()
11084 for (i = bp->total_irqs; i > total; i--) { in bnxt_change_msix()
11085 map.index = i - 1; in bnxt_change_msix()
11086 map.virq = bp->irq_tbl[i - 1].vector; in bnxt_change_msix()
11087 pci_msix_free_irq(bp->pdev, map); in bnxt_change_msix()
11088 bp->total_irqs--; in bnxt_change_msix()
11090 return bp->total_irqs; in bnxt_change_msix()
11097 if (!bp->irq_tbl) { in bnxt_setup_int_mode()
11099 if (rc || !bp->irq_tbl) in bnxt_setup_int_mode()
11100 return rc ?: -ENODEV; in bnxt_setup_int_mode()
11111 return bp->hw_resc.max_rsscos_ctxs; in bnxt_get_max_func_rss_ctxs()
11116 return bp->hw_resc.max_vnics; in bnxt_get_max_func_vnics()
11121 return bp->hw_resc.max_stat_ctxs; in bnxt_get_max_func_stat_ctxs()
11126 return bp->hw_resc.max_cp_rings; in bnxt_get_max_func_cp_rings()
11131 unsigned int cp = bp->hw_resc.max_cp_rings; in bnxt_get_max_func_cp_rings_for_en()
11133 if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS)) in bnxt_get_max_func_cp_rings_for_en()
11134 cp -= bnxt_get_ulp_msix_num(bp); in bnxt_get_max_func_cp_rings_for_en()
11141 struct bnxt_hw_resc *hw_resc = &bp->hw_resc; in bnxt_get_max_func_irqs()
11143 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_get_max_func_irqs()
11144 return min_t(unsigned int, hw_resc->max_irqs, hw_resc->max_nqs); in bnxt_get_max_func_irqs()
11146 return min_t(unsigned int, hw_resc->max_irqs, hw_resc->max_cp_rings); in bnxt_get_max_func_irqs()
11151 bp->hw_resc.max_irqs = max_irqs; in bnxt_set_max_func_irqs()
11159 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_get_avail_cp_rings_for_en()
11160 return cp - bp->rx_nr_rings - bp->tx_nr_rings; in bnxt_get_avail_cp_rings_for_en()
11162 return cp - bp->cp_nr_rings; in bnxt_get_avail_cp_rings_for_en()
11167 return bnxt_get_max_func_stat_ctxs(bp) - bnxt_get_func_stat_ctxs(bp); in bnxt_get_avail_stat_ctxs_for_en()
11173 int total_req = bp->cp_nr_rings + num; in bnxt_get_avail_msix()
11176 num = max_irq - bp->cp_nr_rings; in bnxt_get_avail_msix()
11203 if (!(bp->flags & BNXT_FLAG_SHARED_RINGS)) in bnxt_init_int_mode()
11206 total_vecs = pci_alloc_irq_vectors(bp->pdev, min, total_vecs, in bnxt_init_int_mode()
11210 rc = -ENODEV; in bnxt_init_int_mode()
11215 if (pci_msix_can_alloc_dyn(bp->pdev)) in bnxt_init_int_mode()
11217 bp->irq_tbl = kcalloc(tbl_size, sizeof(*bp->irq_tbl), GFP_KERNEL); in bnxt_init_int_mode()
11218 if (bp->irq_tbl) { in bnxt_init_int_mode()
11220 bp->irq_tbl[i].vector = pci_irq_vector(bp->pdev, i); in bnxt_init_int_mode()
11222 bp->total_irqs = total_vecs; in bnxt_init_int_mode()
11223 /* Trim rings based upon num of vectors allocated */ in bnxt_init_int_mode()
11224 rc = bnxt_trim_rings(bp, &bp->rx_nr_rings, &bp->tx_nr_rings, in bnxt_init_int_mode()
11225 total_vecs - ulp_msix, min == 1); in bnxt_init_int_mode()
11229 tx_cp = bnxt_num_tx_to_cp(bp, bp->tx_nr_rings); in bnxt_init_int_mode()
11230 bp->cp_nr_rings = (min == 1) ? in bnxt_init_int_mode()
11231 max_t(int, tx_cp, bp->rx_nr_rings) : in bnxt_init_int_mode()
11232 tx_cp + bp->rx_nr_rings; in bnxt_init_int_mode()
11235 rc = -ENOMEM; in bnxt_init_int_mode()
11241 netdev_err(bp->dev, "bnxt_init_int_mode err: %x\n", rc); in bnxt_init_int_mode()
11242 kfree(bp->irq_tbl); in bnxt_init_int_mode()
11243 bp->irq_tbl = NULL; in bnxt_init_int_mode()
11244 pci_free_irq_vectors(bp->pdev); in bnxt_init_int_mode()
11250 pci_free_irq_vectors(bp->pdev); in bnxt_clear_int_mode()
11252 kfree(bp->irq_tbl); in bnxt_clear_int_mode()
11253 bp->irq_tbl = NULL; in bnxt_clear_int_mode()
11260 int tcs = bp->num_tc; in bnxt_reserve_rings()
11267 if (BNXT_NEW_RM(bp) && !bnxt_ulp_registered(bp->edev)) { in bnxt_reserve_rings()
11268 int ulp_msix = bnxt_get_avail_msix(bp, bp->ulp_num_msix_want); in bnxt_reserve_rings()
11270 if (ulp_msix > bp->ulp_num_msix_want) in bnxt_reserve_rings()
11271 ulp_msix = bp->ulp_num_msix_want; in bnxt_reserve_rings()
11272 irqs_required = ulp_msix + bp->cp_nr_rings; in bnxt_reserve_rings()
11277 if (irq_re_init && BNXT_NEW_RM(bp) && irqs_required != bp->total_irqs) { in bnxt_reserve_rings()
11279 if (!pci_msix_can_alloc_dyn(bp->pdev)) { in bnxt_reserve_rings()
11292 rc = -ENOSPC; in bnxt_reserve_rings()
11295 netdev_err(bp->dev, "ring reservation/IRQ init failure rc: %d\n", rc); in bnxt_reserve_rings()
11298 if (tcs && (bp->tx_nr_rings_per_tc * tcs != in bnxt_reserve_rings()
11299 bp->tx_nr_rings - bp->tx_nr_rings_xdp)) { in bnxt_reserve_rings()
11300 netdev_err(bp->dev, "tx ring reservation failure\n"); in bnxt_reserve_rings()
11301 netdev_reset_tc(bp->dev); in bnxt_reserve_rings()
11302 bp->num_tc = 0; in bnxt_reserve_rings()
11303 if (bp->tx_nr_rings_xdp) in bnxt_reserve_rings()
11304 bp->tx_nr_rings_per_tc = bp->tx_nr_rings_xdp; in bnxt_reserve_rings()
11306 bp->tx_nr_rings_per_tc = bp->tx_nr_rings; in bnxt_reserve_rings()
11307 return -ENOMEM; in bnxt_reserve_rings()
11319 bnapi = bp->bnapi[idx]; in bnxt_tx_queue_stop()
11321 WRITE_ONCE(txr->dev_state, BNXT_DEV_STATE_CLOSING); in bnxt_tx_queue_stop()
11324 if (!(bnapi->flags & BNXT_NAPI_FLAG_XDP)) { in bnxt_tx_queue_stop()
11325 txq = netdev_get_tx_queue(bp->dev, txr->txq_index); in bnxt_tx_queue_stop()
11333 if (!bp->tph_mode) in bnxt_tx_queue_stop()
11337 bnxt_hwrm_cp_ring_free(bp, txr->tx_cpr); in bnxt_tx_queue_stop()
11338 bnxt_free_one_tx_ring_skbs(bp, txr, txr->txq_index); in bnxt_tx_queue_stop()
11339 bnxt_clear_one_cp_ring(bp, txr->tx_cpr); in bnxt_tx_queue_stop()
11350 bnapi = bp->bnapi[idx]; in bnxt_tx_queue_start()
11355 if (!bp->tph_mode) in bnxt_tx_queue_start()
11358 rc = bnxt_hwrm_cp_ring_alloc_p5(bp, txr->tx_cpr); in bnxt_tx_queue_start()
11366 txr->tx_prod = 0; in bnxt_tx_queue_start()
11367 txr->tx_cons = 0; in bnxt_tx_queue_start()
11368 txr->tx_hw_cons = 0; in bnxt_tx_queue_start()
11370 WRITE_ONCE(txr->dev_state, 0); in bnxt_tx_queue_start()
11373 if (bnapi->flags & BNXT_NAPI_FLAG_XDP) in bnxt_tx_queue_start()
11376 txq = netdev_get_tx_queue(bp->dev, txr->txq_index); in bnxt_tx_queue_start()
11393 if (!irq->bp->tph_mode) in bnxt_irq_affinity_notify()
11396 cpumask_copy(irq->cpu_mask, mask); in bnxt_irq_affinity_notify()
11398 if (irq->ring_nr >= irq->bp->rx_nr_rings) in bnxt_irq_affinity_notify()
11401 if (pcie_tph_get_cpu_st(irq->bp->pdev, TPH_MEM_TYPE_VM, in bnxt_irq_affinity_notify()
11402 cpumask_first(irq->cpu_mask), &tag)) in bnxt_irq_affinity_notify()
11405 if (pcie_tph_set_st_entry(irq->bp->pdev, irq->msix_nr, tag)) in bnxt_irq_affinity_notify()
11408 netdev_lock(irq->bp->dev); in bnxt_irq_affinity_notify()
11409 if (netif_running(irq->bp->dev)) { in bnxt_irq_affinity_notify()
11410 err = netdev_rx_queue_restart(irq->bp->dev, irq->ring_nr); in bnxt_irq_affinity_notify()
11412 netdev_err(irq->bp->dev, in bnxt_irq_affinity_notify()
11415 netdev_unlock(irq->bp->dev); in bnxt_irq_affinity_notify()
11426 if (!irq->bp->tph_mode) in bnxt_irq_affinity_release()
11429 if (pcie_tph_set_st_entry(irq->bp->pdev, irq->msix_nr, 0)) { in bnxt_irq_affinity_release()
11430 netdev_err(irq->bp->dev, in bnxt_irq_affinity_release()
11432 irq->msix_nr); in bnxt_irq_affinity_release()
11439 irq_set_affinity_notifier(irq->vector, NULL); in bnxt_release_irq_notifier()
11446 irq->bp = bp; in bnxt_register_irq_notifier()
11449 if (!bp->tph_mode) in bnxt_register_irq_notifier()
11453 notify = &irq->affinity_notify; in bnxt_register_irq_notifier()
11454 notify->irq = irq->vector; in bnxt_register_irq_notifier()
11455 notify->notify = bnxt_irq_affinity_notify; in bnxt_register_irq_notifier()
11456 notify->release = bnxt_irq_affinity_release; in bnxt_register_irq_notifier()
11458 irq_set_affinity_notifier(irq->vector, notify); in bnxt_register_irq_notifier()
11467 free_irq_cpu_rmap(bp->dev->rx_cpu_rmap); in bnxt_free_irq()
11468 bp->dev->rx_cpu_rmap = NULL; in bnxt_free_irq()
11470 if (!bp->irq_tbl || !bp->bnapi) in bnxt_free_irq()
11473 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_free_irq()
11476 irq = &bp->irq_tbl[map_idx]; in bnxt_free_irq()
11477 if (irq->requested) { in bnxt_free_irq()
11478 if (irq->have_cpumask) { in bnxt_free_irq()
11479 irq_update_affinity_hint(irq->vector, NULL); in bnxt_free_irq()
11480 free_cpumask_var(irq->cpu_mask); in bnxt_free_irq()
11481 irq->have_cpumask = 0; in bnxt_free_irq()
11486 free_irq(irq->vector, bp->bnapi[i]); in bnxt_free_irq()
11489 irq->requested = 0; in bnxt_free_irq()
11493 pcie_disable_tph(bp->pdev); in bnxt_free_irq()
11494 bp->tph_mode = 0; in bnxt_free_irq()
11507 netdev_err(bp->dev, "bnxt_setup_int_mode err: %x\n", in bnxt_request_irq()
11512 rmap = bp->dev->rx_cpu_rmap; in bnxt_request_irq()
11516 rc = pcie_enable_tph(bp->pdev, PCI_TPH_ST_IV_MODE); in bnxt_request_irq()
11518 bp->tph_mode = PCI_TPH_ST_IV_MODE; in bnxt_request_irq()
11520 for (i = 0, j = 0; i < bp->cp_nr_rings; i++) { in bnxt_request_irq()
11522 struct bnxt_irq *irq = &bp->irq_tbl[map_idx]; in bnxt_request_irq()
11525 if (rmap && bp->bnapi[i]->rx_ring) { in bnxt_request_irq()
11526 rc = irq_cpu_rmap_add(rmap, irq->vector); in bnxt_request_irq()
11528 netdev_warn(bp->dev, "failed adding irq rmap for ring %d\n", in bnxt_request_irq()
11533 rc = request_irq(irq->vector, irq->handler, flags, irq->name, in bnxt_request_irq()
11534 bp->bnapi[i]); in bnxt_request_irq()
11538 netif_napi_set_irq_locked(&bp->bnapi[i]->napi, irq->vector); in bnxt_request_irq()
11539 irq->requested = 1; in bnxt_request_irq()
11541 if (zalloc_cpumask_var(&irq->cpu_mask, GFP_KERNEL)) { in bnxt_request_irq()
11542 int numa_node = dev_to_node(&bp->pdev->dev); in bnxt_request_irq()
11545 irq->have_cpumask = 1; in bnxt_request_irq()
11546 irq->msix_nr = map_idx; in bnxt_request_irq()
11547 irq->ring_nr = i; in bnxt_request_irq()
11549 irq->cpu_mask); in bnxt_request_irq()
11550 rc = irq_update_affinity_hint(irq->vector, irq->cpu_mask); in bnxt_request_irq()
11552 netdev_warn(bp->dev, in bnxt_request_irq()
11554 irq->vector); in bnxt_request_irq()
11561 if (pcie_tph_get_cpu_st(irq->bp->pdev, TPH_MEM_TYPE_VM, in bnxt_request_irq()
11562 cpumask_first(irq->cpu_mask), in bnxt_request_irq()
11566 pcie_tph_set_st_entry(irq->bp->pdev, irq->msix_nr, tag); in bnxt_request_irq()
11576 if (!bp->bnapi) in bnxt_del_napi()
11579 for (i = 0; i < bp->rx_nr_rings; i++) in bnxt_del_napi()
11580 netif_queue_set_napi(bp->dev, i, NETDEV_QUEUE_TYPE_RX, NULL); in bnxt_del_napi()
11581 for (i = 0; i < bp->tx_nr_rings - bp->tx_nr_rings_xdp; i++) in bnxt_del_napi()
11582 netif_queue_set_napi(bp->dev, i, NETDEV_QUEUE_TYPE_TX, NULL); in bnxt_del_napi()
11584 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_del_napi()
11585 struct bnxt_napi *bnapi = bp->bnapi[i]; in bnxt_del_napi()
11587 __netif_napi_del_locked(&bnapi->napi); in bnxt_del_napi()
11598 unsigned int cp_nr_rings = bp->cp_nr_rings; in bnxt_init_napi()
11602 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_init_napi()
11605 cp_nr_rings--; in bnxt_init_napi()
11607 set_bit(BNXT_STATE_NAPI_DISABLED, &bp->state); in bnxt_init_napi()
11610 bnapi = bp->bnapi[i]; in bnxt_init_napi()
11611 netif_napi_add_config_locked(bp->dev, &bnapi->napi, poll_fn, in bnxt_init_napi()
11612 bnapi->index); in bnxt_init_napi()
11615 bnapi = bp->bnapi[cp_nr_rings]; in bnxt_init_napi()
11616 netif_napi_add_locked(bp->dev, &bnapi->napi, bnxt_poll_nitroa0); in bnxt_init_napi()
11624 if (!bp->bnapi || in bnxt_disable_napi()
11625 test_and_set_bit(BNXT_STATE_NAPI_DISABLED, &bp->state)) in bnxt_disable_napi()
11628 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_disable_napi()
11629 struct bnxt_napi *bnapi = bp->bnapi[i]; in bnxt_disable_napi()
11632 cpr = &bnapi->cp_ring; in bnxt_disable_napi()
11633 if (bnapi->tx_fault) in bnxt_disable_napi()
11634 cpr->sw_stats->tx.tx_resets++; in bnxt_disable_napi()
11635 if (bnapi->in_reset) in bnxt_disable_napi()
11636 cpr->sw_stats->rx.rx_resets++; in bnxt_disable_napi()
11637 napi_disable_locked(&bnapi->napi); in bnxt_disable_napi()
11645 clear_bit(BNXT_STATE_NAPI_DISABLED, &bp->state); in bnxt_enable_napi()
11646 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_enable_napi()
11647 struct bnxt_napi *bnapi = bp->bnapi[i]; in bnxt_enable_napi()
11650 bnapi->tx_fault = 0; in bnxt_enable_napi()
11652 cpr = &bnapi->cp_ring; in bnxt_enable_napi()
11653 bnapi->in_reset = false; in bnxt_enable_napi()
11655 if (bnapi->rx_ring) { in bnxt_enable_napi()
11656 INIT_WORK(&cpr->dim.work, bnxt_dim_work); in bnxt_enable_napi()
11657 cpr->dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE; in bnxt_enable_napi()
11659 napi_enable_locked(&bnapi->napi); in bnxt_enable_napi()
11668 if (bp->tx_ring) { in bnxt_tx_disable()
11669 for (i = 0; i < bp->tx_nr_rings; i++) { in bnxt_tx_disable()
11670 txr = &bp->tx_ring[i]; in bnxt_tx_disable()
11671 WRITE_ONCE(txr->dev_state, BNXT_DEV_STATE_CLOSING); in bnxt_tx_disable()
11677 netif_carrier_off(bp->dev); in bnxt_tx_disable()
11679 netif_tx_disable(bp->dev); in bnxt_tx_disable()
11687 for (i = 0; i < bp->tx_nr_rings; i++) { in bnxt_tx_enable()
11688 txr = &bp->tx_ring[i]; in bnxt_tx_enable()
11689 WRITE_ONCE(txr->dev_state, 0); in bnxt_tx_enable()
11693 netif_tx_wake_all_queues(bp->dev); in bnxt_tx_enable()
11695 netif_carrier_on(bp->dev); in bnxt_tx_enable()
11700 u8 active_fec = link_info->active_fec_sig_mode & in bnxt_report_fec()
11731 netif_carrier_on(bp->dev); in bnxt_report_link()
11732 speed = bnxt_fw_to_ethtool_speed(bp->link_info.link_speed); in bnxt_report_link()
11734 netdev_info(bp->dev, "NIC Link is Up, speed unknown\n"); in bnxt_report_link()
11737 if (bp->link_info.duplex == BNXT_LINK_DUPLEX_FULL) in bnxt_report_link()
11741 if (bp->link_info.pause == BNXT_LINK_PAUSE_BOTH) in bnxt_report_link()
11742 flow_ctrl = "ON - receive & transmit"; in bnxt_report_link()
11743 else if (bp->link_info.pause == BNXT_LINK_PAUSE_TX) in bnxt_report_link()
11744 flow_ctrl = "ON - transmit"; in bnxt_report_link()
11745 else if (bp->link_info.pause == BNXT_LINK_PAUSE_RX) in bnxt_report_link()
11746 flow_ctrl = "ON - receive"; in bnxt_report_link()
11749 if (bp->link_info.phy_qcfg_resp.option_flags & in bnxt_report_link()
11751 u8 sig_mode = bp->link_info.active_fec_sig_mode & in bnxt_report_link()
11767 netdev_info(bp->dev, "NIC Link is Up, %u Mbps %s%s duplex, Flow control: %s\n", in bnxt_report_link()
11769 if (bp->phy_flags & BNXT_PHY_FL_EEE_CAP) in bnxt_report_link()
11770 netdev_info(bp->dev, "EEE is %s\n", in bnxt_report_link()
11771 bp->eee.eee_active ? "active" : in bnxt_report_link()
11773 fec = bp->link_info.fec_cfg; in bnxt_report_link()
11775 netdev_info(bp->dev, "FEC autoneg %s encoding: %s\n", in bnxt_report_link()
11777 bnxt_report_fec(&bp->link_info)); in bnxt_report_link()
11779 netif_carrier_off(bp->dev); in bnxt_report_link()
11780 netdev_err(bp->dev, "NIC Link is Down\n"); in bnxt_report_link()
11786 if (!resp->supported_speeds_auto_mode && in bnxt_phy_qcaps_no_speed()
11787 !resp->supported_speeds_force_mode && in bnxt_phy_qcaps_no_speed()
11788 !resp->supported_pam4_speeds_auto_mode && in bnxt_phy_qcaps_no_speed()
11789 !resp->supported_pam4_speeds_force_mode && in bnxt_phy_qcaps_no_speed()
11790 !resp->supported_speeds2_auto_mode && in bnxt_phy_qcaps_no_speed()
11791 !resp->supported_speeds2_force_mode) in bnxt_phy_qcaps_no_speed()
11798 struct bnxt_link_info *link_info = &bp->link_info; in bnxt_hwrm_phy_qcaps()
11803 if (bp->hwrm_spec_code < 0x10201) in bnxt_hwrm_phy_qcaps()
11815 bp->phy_flags = resp->flags | (le16_to_cpu(resp->flags2) << 8); in bnxt_hwrm_phy_qcaps()
11816 if (resp->flags & PORT_PHY_QCAPS_RESP_FLAGS_EEE_SUPPORTED) { in bnxt_hwrm_phy_qcaps()
11817 struct ethtool_keee *eee = &bp->eee; in bnxt_hwrm_phy_qcaps()
11818 u16 fw_speeds = le16_to_cpu(resp->supported_speeds_eee_mode); in bnxt_hwrm_phy_qcaps()
11820 _bnxt_fw_to_linkmode(eee->supported, fw_speeds); in bnxt_hwrm_phy_qcaps()
11821 bp->lpi_tmr_lo = le32_to_cpu(resp->tx_lpi_timer_low) & in bnxt_hwrm_phy_qcaps()
11823 bp->lpi_tmr_hi = le32_to_cpu(resp->valid_tx_lpi_timer_high) & in bnxt_hwrm_phy_qcaps()
11827 if (bp->hwrm_spec_code >= 0x10a01) { in bnxt_hwrm_phy_qcaps()
11829 link_info->phy_state = BNXT_PHY_STATE_DISABLED; in bnxt_hwrm_phy_qcaps()
11830 netdev_warn(bp->dev, "Ethernet link disabled\n"); in bnxt_hwrm_phy_qcaps()
11831 } else if (link_info->phy_state == BNXT_PHY_STATE_DISABLED) { in bnxt_hwrm_phy_qcaps()
11832 link_info->phy_state = BNXT_PHY_STATE_ENABLED; in bnxt_hwrm_phy_qcaps()
11833 netdev_info(bp->dev, "Ethernet link enabled\n"); in bnxt_hwrm_phy_qcaps()
11834 /* Phy re-enabled, reprobe the speeds */ in bnxt_hwrm_phy_qcaps()
11835 link_info->support_auto_speeds = 0; in bnxt_hwrm_phy_qcaps()
11836 link_info->support_pam4_auto_speeds = 0; in bnxt_hwrm_phy_qcaps()
11837 link_info->support_auto_speeds2 = 0; in bnxt_hwrm_phy_qcaps()
11840 if (resp->supported_speeds_auto_mode) in bnxt_hwrm_phy_qcaps()
11841 link_info->support_auto_speeds = in bnxt_hwrm_phy_qcaps()
11842 le16_to_cpu(resp->supported_speeds_auto_mode); in bnxt_hwrm_phy_qcaps()
11843 if (resp->supported_pam4_speeds_auto_mode) in bnxt_hwrm_phy_qcaps()
11844 link_info->support_pam4_auto_speeds = in bnxt_hwrm_phy_qcaps()
11845 le16_to_cpu(resp->supported_pam4_speeds_auto_mode); in bnxt_hwrm_phy_qcaps()
11846 if (resp->supported_speeds2_auto_mode) in bnxt_hwrm_phy_qcaps()
11847 link_info->support_auto_speeds2 = in bnxt_hwrm_phy_qcaps()
11848 le16_to_cpu(resp->supported_speeds2_auto_mode); in bnxt_hwrm_phy_qcaps()
11850 bp->port_count = resp->port_cnt; in bnxt_hwrm_phy_qcaps()
11863 if (bp->hwrm_spec_code < 0x10a03) in bnxt_hwrm_mac_qcaps()
11873 bp->mac_flags = resp->flags; in bnxt_hwrm_mac_qcaps()
11891 if (bp->phy_flags & BNXT_PHY_FL_SPEEDS2) { in bnxt_support_speed_dropped()
11892 if (bnxt_support_dropped(link_info->advertising, in bnxt_support_speed_dropped()
11893 link_info->support_auto_speeds2)) { in bnxt_support_speed_dropped()
11894 link_info->advertising = link_info->support_auto_speeds2; in bnxt_support_speed_dropped()
11899 if (bnxt_support_dropped(link_info->advertising, in bnxt_support_speed_dropped()
11900 link_info->support_auto_speeds)) { in bnxt_support_speed_dropped()
11901 link_info->advertising = link_info->support_auto_speeds; in bnxt_support_speed_dropped()
11904 if (bnxt_support_dropped(link_info->advertising_pam4, in bnxt_support_speed_dropped()
11905 link_info->support_pam4_auto_speeds)) { in bnxt_support_speed_dropped()
11906 link_info->advertising_pam4 = link_info->support_pam4_auto_speeds; in bnxt_support_speed_dropped()
11914 struct bnxt_link_info *link_info = &bp->link_info; in bnxt_update_link()
11917 u8 link_state = link_info->link_state; in bnxt_update_link()
11929 if (BNXT_VF(bp) && rc == -ENODEV) { in bnxt_update_link()
11930 netdev_warn(bp->dev, "Cannot obtain link state while PF unavailable.\n"); in bnxt_update_link()
11936 memcpy(&link_info->phy_qcfg_resp, resp, sizeof(*resp)); in bnxt_update_link()
11937 link_info->phy_link_status = resp->link; in bnxt_update_link()
11938 link_info->duplex = resp->duplex_cfg; in bnxt_update_link()
11939 if (bp->hwrm_spec_code >= 0x10800) in bnxt_update_link()
11940 link_info->duplex = resp->duplex_state; in bnxt_update_link()
11941 link_info->pause = resp->pause; in bnxt_update_link()
11942 link_info->auto_mode = resp->auto_mode; in bnxt_update_link()
11943 link_info->auto_pause_setting = resp->auto_pause; in bnxt_update_link()
11944 link_info->lp_pause = resp->link_partner_adv_pause; in bnxt_update_link()
11945 link_info->force_pause_setting = resp->force_pause; in bnxt_update_link()
11946 link_info->duplex_setting = resp->duplex_cfg; in bnxt_update_link()
11947 if (link_info->phy_link_status == BNXT_LINK_LINK) { in bnxt_update_link()
11948 link_info->link_speed = le16_to_cpu(resp->link_speed); in bnxt_update_link()
11949 if (bp->phy_flags & BNXT_PHY_FL_SPEEDS2) in bnxt_update_link()
11950 link_info->active_lanes = resp->active_lanes; in bnxt_update_link()
11952 link_info->link_speed = 0; in bnxt_update_link()
11953 link_info->active_lanes = 0; in bnxt_update_link()
11955 link_info->force_link_speed = le16_to_cpu(resp->force_link_speed); in bnxt_update_link()
11956 link_info->force_pam4_link_speed = in bnxt_update_link()
11957 le16_to_cpu(resp->force_pam4_link_speed); in bnxt_update_link()
11958 link_info->force_link_speed2 = le16_to_cpu(resp->force_link_speeds2); in bnxt_update_link()
11959 link_info->support_speeds = le16_to_cpu(resp->support_speeds); in bnxt_update_link()
11960 link_info->support_pam4_speeds = le16_to_cpu(resp->support_pam4_speeds); in bnxt_update_link()
11961 link_info->support_speeds2 = le16_to_cpu(resp->support_speeds2); in bnxt_update_link()
11962 link_info->auto_link_speeds = le16_to_cpu(resp->auto_link_speed_mask); in bnxt_update_link()
11963 link_info->auto_pam4_link_speeds = in bnxt_update_link()
11964 le16_to_cpu(resp->auto_pam4_link_speed_mask); in bnxt_update_link()
11965 link_info->auto_link_speeds2 = le16_to_cpu(resp->auto_link_speeds2); in bnxt_update_link()
11966 link_info->lp_auto_link_speeds = in bnxt_update_link()
11967 le16_to_cpu(resp->link_partner_adv_speeds); in bnxt_update_link()
11968 link_info->lp_auto_pam4_link_speeds = in bnxt_update_link()
11969 resp->link_partner_pam4_adv_speeds; in bnxt_update_link()
11970 link_info->preemphasis = le32_to_cpu(resp->preemphasis); in bnxt_update_link()
11971 link_info->phy_ver[0] = resp->phy_maj; in bnxt_update_link()
11972 link_info->phy_ver[1] = resp->phy_min; in bnxt_update_link()
11973 link_info->phy_ver[2] = resp->phy_bld; in bnxt_update_link()
11974 link_info->media_type = resp->media_type; in bnxt_update_link()
11975 link_info->phy_type = resp->phy_type; in bnxt_update_link()
11976 link_info->transceiver = resp->xcvr_pkg_type; in bnxt_update_link()
11977 link_info->phy_addr = resp->eee_config_phy_addr & in bnxt_update_link()
11979 link_info->module_status = resp->module_status; in bnxt_update_link()
11981 if (bp->phy_flags & BNXT_PHY_FL_EEE_CAP) { in bnxt_update_link()
11982 struct ethtool_keee *eee = &bp->eee; in bnxt_update_link()
11985 eee->eee_active = 0; in bnxt_update_link()
11986 if (resp->eee_config_phy_addr & in bnxt_update_link()
11988 eee->eee_active = 1; in bnxt_update_link()
11990 resp->link_partner_adv_eee_link_speed_mask); in bnxt_update_link()
11991 _bnxt_fw_to_linkmode(eee->lp_advertised, fw_speeds); in bnxt_update_link()
11996 if (resp->eee_config_phy_addr & in bnxt_update_link()
11998 eee->eee_enabled = 1; in bnxt_update_link()
12000 fw_speeds = le16_to_cpu(resp->adv_eee_link_speed_mask); in bnxt_update_link()
12001 _bnxt_fw_to_linkmode(eee->advertised, fw_speeds); in bnxt_update_link()
12003 if (resp->eee_config_phy_addr & in bnxt_update_link()
12007 eee->tx_lpi_enabled = 1; in bnxt_update_link()
12008 tmr = resp->xcvr_identifier_type_tx_lpi_timer; in bnxt_update_link()
12009 eee->tx_lpi_timer = le32_to_cpu(tmr) & in bnxt_update_link()
12015 link_info->fec_cfg = PORT_PHY_QCFG_RESP_FEC_CFG_FEC_NONE_SUPPORTED; in bnxt_update_link()
12016 if (bp->hwrm_spec_code >= 0x10504) { in bnxt_update_link()
12017 link_info->fec_cfg = le16_to_cpu(resp->fec_cfg); in bnxt_update_link()
12018 link_info->active_fec_sig_mode = resp->active_fec_signal_mode; in bnxt_update_link()
12022 if (link_info->phy_link_status == BNXT_LINK_LINK) in bnxt_update_link()
12023 link_info->link_state = BNXT_LINK_STATE_UP; in bnxt_update_link()
12025 link_info->link_state = BNXT_LINK_STATE_DOWN; in bnxt_update_link()
12026 if (link_state != link_info->link_state) in bnxt_update_link()
12030 link_info->link_state = BNXT_LINK_STATE_DOWN; in bnxt_update_link()
12038 if (support_changed && (link_info->autoneg & BNXT_AUTONEG_SPEED)) in bnxt_update_link()
12045 struct bnxt_link_info *link_info = &bp->link_info; in bnxt_get_port_module_status()
12046 struct hwrm_port_phy_qcfg_output *resp = &link_info->phy_qcfg_resp; in bnxt_get_port_module_status()
12052 module_status = link_info->module_status; in bnxt_get_port_module_status()
12057 netdev_warn(bp->dev, "Unqualified SFP+ module detected on port %d\n", in bnxt_get_port_module_status()
12058 bp->pf.port_id); in bnxt_get_port_module_status()
12059 if (bp->hwrm_spec_code >= 0x10201) { in bnxt_get_port_module_status()
12060 netdev_warn(bp->dev, "Module part number %s\n", in bnxt_get_port_module_status()
12061 resp->phy_vendor_partnumber); in bnxt_get_port_module_status()
12064 netdev_warn(bp->dev, "TX is disabled\n"); in bnxt_get_port_module_status()
12066 netdev_warn(bp->dev, "SFP+ module is shutdown\n"); in bnxt_get_port_module_status()
12073 if (bp->link_info.autoneg & BNXT_AUTONEG_FLOW_CTRL) { in bnxt_hwrm_set_pause_common()
12074 if (bp->hwrm_spec_code >= 0x10201) in bnxt_hwrm_set_pause_common()
12075 req->auto_pause = in bnxt_hwrm_set_pause_common()
12077 if (bp->link_info.req_flow_ctrl & BNXT_LINK_PAUSE_RX) in bnxt_hwrm_set_pause_common()
12078 req->auto_pause |= PORT_PHY_CFG_REQ_AUTO_PAUSE_RX; in bnxt_hwrm_set_pause_common()
12079 if (bp->link_info.req_flow_ctrl & BNXT_LINK_PAUSE_TX) in bnxt_hwrm_set_pause_common()
12080 req->auto_pause |= PORT_PHY_CFG_REQ_AUTO_PAUSE_TX; in bnxt_hwrm_set_pause_common()
12081 req->enables |= in bnxt_hwrm_set_pause_common()
12084 if (bp->link_info.req_flow_ctrl & BNXT_LINK_PAUSE_RX) in bnxt_hwrm_set_pause_common()
12085 req->force_pause |= PORT_PHY_CFG_REQ_FORCE_PAUSE_RX; in bnxt_hwrm_set_pause_common()
12086 if (bp->link_info.req_flow_ctrl & BNXT_LINK_PAUSE_TX) in bnxt_hwrm_set_pause_common()
12087 req->force_pause |= PORT_PHY_CFG_REQ_FORCE_PAUSE_TX; in bnxt_hwrm_set_pause_common()
12088 req->enables |= in bnxt_hwrm_set_pause_common()
12090 if (bp->hwrm_spec_code >= 0x10201) { in bnxt_hwrm_set_pause_common()
12091 req->auto_pause = req->force_pause; in bnxt_hwrm_set_pause_common()
12092 req->enables |= cpu_to_le32( in bnxt_hwrm_set_pause_common()
12100 if (bp->link_info.autoneg & BNXT_AUTONEG_SPEED) { in bnxt_hwrm_set_link_common()
12101 req->auto_mode |= PORT_PHY_CFG_REQ_AUTO_MODE_SPEED_MASK; in bnxt_hwrm_set_link_common()
12102 if (bp->phy_flags & BNXT_PHY_FL_SPEEDS2) { in bnxt_hwrm_set_link_common()
12103 req->enables |= in bnxt_hwrm_set_link_common()
12105 req->auto_link_speeds2_mask = cpu_to_le16(bp->link_info.advertising); in bnxt_hwrm_set_link_common()
12106 } else if (bp->link_info.advertising) { in bnxt_hwrm_set_link_common()
12107 req->enables |= cpu_to_le32(PORT_PHY_CFG_REQ_ENABLES_AUTO_LINK_SPEED_MASK); in bnxt_hwrm_set_link_common()
12108 req->auto_link_speed_mask = cpu_to_le16(bp->link_info.advertising); in bnxt_hwrm_set_link_common()
12110 if (bp->link_info.advertising_pam4) { in bnxt_hwrm_set_link_common()
12111 req->enables |= in bnxt_hwrm_set_link_common()
12113 req->auto_link_pam4_speed_mask = in bnxt_hwrm_set_link_common()
12114 cpu_to_le16(bp->link_info.advertising_pam4); in bnxt_hwrm_set_link_common()
12116 req->enables |= cpu_to_le32(PORT_PHY_CFG_REQ_ENABLES_AUTO_MODE); in bnxt_hwrm_set_link_common()
12117 req->flags |= cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_RESTART_AUTONEG); in bnxt_hwrm_set_link_common()
12119 req->flags |= cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_FORCE); in bnxt_hwrm_set_link_common()
12120 if (bp->phy_flags & BNXT_PHY_FL_SPEEDS2) { in bnxt_hwrm_set_link_common()
12121 req->force_link_speeds2 = cpu_to_le16(bp->link_info.req_link_speed); in bnxt_hwrm_set_link_common()
12122 req->enables |= cpu_to_le32(PORT_PHY_CFG_REQ_ENABLES_FORCE_LINK_SPEEDS2); in bnxt_hwrm_set_link_common()
12123 netif_info(bp, link, bp->dev, "Forcing FW speed2: %d\n", in bnxt_hwrm_set_link_common()
12124 (u32)bp->link_info.req_link_speed); in bnxt_hwrm_set_link_common()
12125 } else if (bp->link_info.req_signal_mode == BNXT_SIG_MODE_PAM4) { in bnxt_hwrm_set_link_common()
12126 req->force_pam4_link_speed = cpu_to_le16(bp->link_info.req_link_speed); in bnxt_hwrm_set_link_common()
12127 req->enables |= cpu_to_le32(PORT_PHY_CFG_REQ_ENABLES_FORCE_PAM4_LINK_SPEED); in bnxt_hwrm_set_link_common()
12129 req->force_link_speed = cpu_to_le16(bp->link_info.req_link_speed); in bnxt_hwrm_set_link_common()
12134 req->flags |= cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_RESET_PHY); in bnxt_hwrm_set_link_common()
12148 if ((bp->link_info.autoneg & BNXT_AUTONEG_FLOW_CTRL) || in bnxt_hwrm_set_pause()
12149 bp->link_info.force_link_chng) in bnxt_hwrm_set_pause()
12153 if (!rc && !(bp->link_info.autoneg & BNXT_AUTONEG_FLOW_CTRL)) { in bnxt_hwrm_set_pause()
12155 * change event, the driver needs to update the current pause in bnxt_hwrm_set_pause()
12158 bp->link_info.pause = in bnxt_hwrm_set_pause()
12159 bp->link_info.force_pause_setting = bp->link_info.req_flow_ctrl; in bnxt_hwrm_set_pause()
12160 bp->link_info.auto_pause_setting = 0; in bnxt_hwrm_set_pause()
12161 if (!bp->link_info.force_link_chng) in bnxt_hwrm_set_pause()
12164 bp->link_info.force_link_chng = false; in bnxt_hwrm_set_pause()
12171 struct ethtool_keee *eee = &bp->eee; in bnxt_hwrm_set_eee()
12173 if (eee->eee_enabled) { in bnxt_hwrm_set_eee()
12177 if (eee->tx_lpi_enabled) in bnxt_hwrm_set_eee()
12182 req->flags |= cpu_to_le32(flags); in bnxt_hwrm_set_eee()
12183 eee_speeds = bnxt_get_fw_auto_link_speeds(eee->advertised); in bnxt_hwrm_set_eee()
12184 req->eee_link_speed_mask = cpu_to_le16(eee_speeds); in bnxt_hwrm_set_eee()
12185 req->tx_lpi_timer = cpu_to_le32(eee->tx_lpi_timer); in bnxt_hwrm_set_eee()
12187 req->flags |= cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_EEE_DISABLE); in bnxt_hwrm_set_eee()
12218 if (pci_num_vf(bp->pdev) && in bnxt_hwrm_shutdown_link()
12219 !(bp->phy_flags & BNXT_PHY_FL_FW_MANAGED_LKDN)) in bnxt_hwrm_shutdown_link()
12226 req->flags = cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_FORCE_LINK_DWN); in bnxt_hwrm_shutdown_link()
12229 mutex_lock(&bp->link_lock); in bnxt_hwrm_shutdown_link()
12235 bp->link_info.link_state = BNXT_LINK_STATE_UNKNOWN; in bnxt_hwrm_shutdown_link()
12236 mutex_unlock(&bp->link_lock); in bnxt_hwrm_shutdown_link()
12247 netdev_err(bp->dev, "Failed FW reset via OP-TEE, rc=%d\n", rc); in bnxt_fw_reset_via_optee()
12251 netdev_err(bp->dev, "OP-TEE not supported\n"); in bnxt_fw_reset_via_optee()
12252 return -ENODEV; in bnxt_fw_reset_via_optee()
12258 if (bp->fw_health && bp->fw_health->status_reliable) { in bnxt_try_recover_fw()
12269 } while (rc == -EBUSY && retry < BNXT_FW_RETRY); in bnxt_try_recover_fw()
12272 netdev_err(bp->dev, in bnxt_try_recover_fw()
12275 rc = -ENODEV; in bnxt_try_recover_fw()
12278 netdev_warn(bp->dev, "Firmware recover via OP-TEE requested\n"); in bnxt_try_recover_fw()
12284 return -ENODEV; in bnxt_try_recover_fw()
12289 struct bnxt_hw_resc *hw_resc = &bp->hw_resc; in bnxt_clear_reservations()
12294 hw_resc->resv_cp_rings = 0; in bnxt_clear_reservations()
12295 hw_resc->resv_stat_ctxs = 0; in bnxt_clear_reservations()
12296 hw_resc->resv_irqs = 0; in bnxt_clear_reservations()
12297 hw_resc->resv_tx_rings = 0; in bnxt_clear_reservations()
12298 hw_resc->resv_rx_rings = 0; in bnxt_clear_reservations()
12299 hw_resc->resv_hw_ring_grps = 0; in bnxt_clear_reservations()
12300 hw_resc->resv_vnics = 0; in bnxt_clear_reservations()
12301 hw_resc->resv_rsscos_ctxs = 0; in bnxt_clear_reservations()
12303 bp->tx_nr_rings = 0; in bnxt_clear_reservations()
12304 bp->rx_nr_rings = 0; in bnxt_clear_reservations()
12317 netdev_err(bp->dev, "resc_qcaps failed\n"); in bnxt_cancel_reservations()
12334 fw_reset = (bp->fw_reset_state == BNXT_FW_RESET_STATE_ABORT); in bnxt_hwrm_if_change()
12335 bp->fw_reset_state = 0; in bnxt_hwrm_if_change()
12337 if (!(bp->fw_cap & BNXT_FW_CAP_IF_CHANGE)) in bnxt_hwrm_if_change()
12345 req->flags = cpu_to_le32(FUNC_DRV_IF_CHANGE_REQ_FLAGS_UP); in bnxt_hwrm_if_change()
12351 if (rc != -EAGAIN) in bnxt_hwrm_if_change()
12358 if (rc == -EAGAIN) { in bnxt_hwrm_if_change()
12362 flags = le32_to_cpu(resp->flags); in bnxt_hwrm_if_change()
12379 test_bit(BNXT_STATE_FW_RESET_DET, &bp->state)) in bnxt_hwrm_if_change()
12384 if (test_bit(BNXT_STATE_IN_FW_RESET, &bp->state) && !fw_reset) { in bnxt_hwrm_if_change()
12385 netdev_err(bp->dev, "RESET_DONE not set during FW reset.\n"); in bnxt_hwrm_if_change()
12386 set_bit(BNXT_STATE_ABORT_ERR, &bp->state); in bnxt_hwrm_if_change()
12387 return -ENODEV; in bnxt_hwrm_if_change()
12394 set_bit(BNXT_STATE_FW_RESET_DET, &bp->state); in bnxt_hwrm_if_change()
12395 if (!test_bit(BNXT_STATE_IN_FW_RESET, &bp->state)) in bnxt_hwrm_if_change()
12401 clear_bit(BNXT_STATE_FW_RESET_DET, &bp->state); in bnxt_hwrm_if_change()
12402 set_bit(BNXT_STATE_ABORT_ERR, &bp->state); in bnxt_hwrm_if_change()
12417 struct bnxt_pf_info *pf = &bp->pf; in bnxt_hwrm_port_led_qcaps()
12420 bp->num_leds = 0; in bnxt_hwrm_port_led_qcaps()
12421 if (BNXT_VF(bp) || bp->hwrm_spec_code < 0x10601) in bnxt_hwrm_port_led_qcaps()
12428 req->port_id = cpu_to_le16(pf->port_id); in bnxt_hwrm_port_led_qcaps()
12435 if (resp->num_leds > 0 && resp->num_leds < BNXT_MAX_LED) { in bnxt_hwrm_port_led_qcaps()
12438 bp->num_leds = resp->num_leds; in bnxt_hwrm_port_led_qcaps()
12439 memcpy(bp->leds, &resp->led0_id, sizeof(bp->leds[0]) * in bnxt_hwrm_port_led_qcaps()
12440 bp->num_leds); in bnxt_hwrm_port_led_qcaps()
12441 for (i = 0; i < bp->num_leds; i++) { in bnxt_hwrm_port_led_qcaps()
12442 struct bnxt_led_info *led = &bp->leds[i]; in bnxt_hwrm_port_led_qcaps()
12443 __le16 caps = led->led_state_caps; in bnxt_hwrm_port_led_qcaps()
12445 if (!led->led_group_id || in bnxt_hwrm_port_led_qcaps()
12447 bp->num_leds = 0; in bnxt_hwrm_port_led_qcaps()
12466 req->port_id = cpu_to_le16(bp->pf.port_id); in bnxt_hwrm_alloc_wol_fltr()
12467 req->wol_type = WOL_FILTER_ALLOC_REQ_WOL_TYPE_MAGICPKT; in bnxt_hwrm_alloc_wol_fltr()
12468 req->enables = cpu_to_le32(WOL_FILTER_ALLOC_REQ_ENABLES_MAC_ADDRESS); in bnxt_hwrm_alloc_wol_fltr()
12469 memcpy(req->mac_address, bp->dev->dev_addr, ETH_ALEN); in bnxt_hwrm_alloc_wol_fltr()
12474 bp->wol_filter_id = resp->wol_filter_id; in bnxt_hwrm_alloc_wol_fltr()
12488 req->port_id = cpu_to_le16(bp->pf.port_id); in bnxt_hwrm_free_wol_fltr()
12489 req->enables = cpu_to_le32(WOL_FILTER_FREE_REQ_ENABLES_WOL_FILTER_ID); in bnxt_hwrm_free_wol_fltr()
12490 req->wol_filter_id = bp->wol_filter_id; in bnxt_hwrm_free_wol_fltr()
12506 req->port_id = cpu_to_le16(bp->pf.port_id); in bnxt_hwrm_get_wol_fltrs()
12507 req->handle = cpu_to_le16(handle); in bnxt_hwrm_get_wol_fltrs()
12511 next_handle = le16_to_cpu(resp->next_handle); in bnxt_hwrm_get_wol_fltrs()
12513 if (resp->wol_type == in bnxt_hwrm_get_wol_fltrs()
12515 bp->wol = 1; in bnxt_hwrm_get_wol_fltrs()
12516 bp->wol_filter_id = resp->wol_filter_id; in bnxt_hwrm_get_wol_fltrs()
12528 bp->wol = 0; in bnxt_get_wol_settings()
12529 if (!BNXT_PF(bp) || !(bp->flags & BNXT_FLAG_WOL_CAP)) in bnxt_get_wol_settings()
12539 struct ethtool_keee *eee = &bp->eee; in bnxt_eee_config_ok()
12540 struct bnxt_link_info *link_info = &bp->link_info; in bnxt_eee_config_ok()
12542 if (!(bp->phy_flags & BNXT_PHY_FL_EEE_CAP)) in bnxt_eee_config_ok()
12545 if (eee->eee_enabled) { in bnxt_eee_config_ok()
12549 _bnxt_fw_to_linkmode(advertising, link_info->advertising); in bnxt_eee_config_ok()
12551 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) { in bnxt_eee_config_ok()
12552 eee->eee_enabled = 0; in bnxt_eee_config_ok()
12555 if (linkmode_andnot(tmp, eee->advertised, advertising)) { in bnxt_eee_config_ok()
12556 linkmode_and(eee->advertised, advertising, in bnxt_eee_config_ok()
12557 eee->supported); in bnxt_eee_config_ok()
12570 struct bnxt_link_info *link_info = &bp->link_info; in bnxt_update_phy_setting()
12574 netdev_err(bp->dev, "failed to update link (rc: %x)\n", in bnxt_update_phy_setting()
12581 if ((link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL) && in bnxt_update_phy_setting()
12582 (link_info->auto_pause_setting & BNXT_LINK_PAUSE_BOTH) != in bnxt_update_phy_setting()
12583 link_info->req_flow_ctrl) in bnxt_update_phy_setting()
12585 if (!(link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL) && in bnxt_update_phy_setting()
12586 link_info->force_pause_setting != link_info->req_flow_ctrl) in bnxt_update_phy_setting()
12588 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) { in bnxt_update_phy_setting()
12589 if (BNXT_AUTO_MODE(link_info->auto_mode)) in bnxt_update_phy_setting()
12593 if (link_info->req_duplex != link_info->duplex_setting) in bnxt_update_phy_setting()
12596 if (link_info->auto_mode == BNXT_LINK_AUTO_NONE) in bnxt_update_phy_setting()
12616 netdev_err(bp->dev, "failed to update phy setting (rc: %x)\n", in bnxt_update_phy_setting()
12630 if (test_bit(BNXT_STATE_IN_FW_RESET, &bp->state)) in bnxt_reinit_after_abort()
12631 return -EBUSY; in bnxt_reinit_after_abort()
12633 if (bp->dev->reg_state == NETREG_UNREGISTERED) in bnxt_reinit_after_abort()
12634 return -ENODEV; in bnxt_reinit_after_abort()
12641 clear_bit(BNXT_STATE_ABORT_ERR, &bp->state); in bnxt_reinit_after_abort()
12642 set_bit(BNXT_STATE_FW_RESET_DET, &bp->state); in bnxt_reinit_after_abort()
12653 if (list_empty(&fltr->list)) in bnxt_cfg_one_usr_fltr()
12656 if (fltr->type == BNXT_FLTR_TYPE_NTUPLE) { in bnxt_cfg_one_usr_fltr()
12658 l2_fltr = bp->vnic_info[BNXT_VNIC_DEFAULT].l2_filters[0]; in bnxt_cfg_one_usr_fltr()
12659 atomic_inc(&l2_fltr->refcnt); in bnxt_cfg_one_usr_fltr()
12660 ntp_fltr->l2_fltr = l2_fltr; in bnxt_cfg_one_usr_fltr()
12663 netdev_err(bp->dev, "restoring previously configured ntuple filter id %d failed\n", in bnxt_cfg_one_usr_fltr()
12664 fltr->sw_id); in bnxt_cfg_one_usr_fltr()
12666 } else if (fltr->type == BNXT_FLTR_TYPE_L2) { in bnxt_cfg_one_usr_fltr()
12670 netdev_err(bp->dev, "restoring previously configured l2 filter id %d failed\n", in bnxt_cfg_one_usr_fltr()
12671 fltr->sw_id); in bnxt_cfg_one_usr_fltr()
12680 list_for_each_entry_safe(usr_fltr, tmp, &bp->usr_fltr_list, list) in bnxt_cfg_usr_fltrs()
12686 int numa_node = dev_to_node(&bp->pdev->dev); in bnxt_set_xps_mapping()
12693 q_map = kcalloc(bp->tx_nr_rings_per_tc, sizeof(*q_map), GFP_KERNEL); in bnxt_set_xps_mapping()
12695 return -ENOMEM; in bnxt_set_xps_mapping()
12702 map_idx = i % bp->tx_nr_rings_per_tc; in bnxt_set_xps_mapping()
12709 for (q_idx = 0; q_idx < bp->dev->real_num_tx_queues; q_idx++) { in bnxt_set_xps_mapping()
12710 map_idx = q_idx % bp->tx_nr_rings_per_tc; in bnxt_set_xps_mapping()
12711 rc = netif_set_xps_queue(bp->dev, &q_map[map_idx], q_idx); in bnxt_set_xps_mapping()
12713 netdev_warn(bp->dev, "Error setting XPS for q:%d\n", in bnxt_set_xps_mapping()
12728 netif_carrier_off(bp->dev); in __bnxt_open_nic()
12733 netdev_err(bp->dev, "Failed to reserve default rings at open\n"); in __bnxt_open_nic()
12743 netdev_err(bp->dev, "bnxt_alloc_mem err: %x\n", rc); in __bnxt_open_nic()
12751 netdev_err(bp->dev, "bnxt_request_irq err: %x\n", rc); in __bnxt_open_nic()
12758 netdev_err(bp->dev, "bnxt_init_nic err: %x\n", rc); in __bnxt_open_nic()
12766 mutex_lock(&bp->link_lock); in __bnxt_open_nic()
12768 mutex_unlock(&bp->link_lock); in __bnxt_open_nic()
12770 netdev_warn(bp->dev, "failed to update phy settings\n"); in __bnxt_open_nic()
12772 bp->link_info.phy_retry = true; in __bnxt_open_nic()
12773 bp->link_info.phy_retry_expires = in __bnxt_open_nic()
12780 udp_tunnel_nic_reset_ntf(bp->dev); in __bnxt_open_nic()
12783 netdev_warn(bp->dev, "failed to set xps mapping\n"); in __bnxt_open_nic()
12786 if (bp->tx_nr_rings_xdp < num_possible_cpus()) { in __bnxt_open_nic()
12792 set_bit(BNXT_STATE_OPEN, &bp->state); in __bnxt_open_nic()
12796 mod_timer(&bp->timer, jiffies + bp->current_interval); in __bnxt_open_nic()
12798 mutex_lock(&bp->link_lock); in __bnxt_open_nic()
12800 mutex_unlock(&bp->link_lock); in __bnxt_open_nic()
12802 /* VF-reps may need to be re-opened after the PF is re-opened */ in __bnxt_open_nic()
12826 if (test_bit(BNXT_STATE_ABORT_ERR, &bp->state)) in bnxt_open_nic()
12827 rc = -EIO; in bnxt_open_nic()
12831 netdev_err(bp->dev, "nic open fail (rc: %x)\n", rc); in bnxt_open_nic()
12832 netif_close(bp->dev); in bnxt_open_nic()
12845 if (test_bit(BNXT_STATE_ABORT_ERR, &bp->state)) { in bnxt_half_open_nic()
12846 netdev_err(bp->dev, "A previous firmware reset has not completed, aborting half open\n"); in bnxt_half_open_nic()
12847 rc = -ENODEV; in bnxt_half_open_nic()
12853 netdev_err(bp->dev, "bnxt_alloc_mem err: %x\n", rc); in bnxt_half_open_nic()
12857 set_bit(BNXT_STATE_HALF_OPEN, &bp->state); in bnxt_half_open_nic()
12860 clear_bit(BNXT_STATE_HALF_OPEN, &bp->state); in bnxt_half_open_nic()
12862 netdev_err(bp->dev, "bnxt_init_nic err: %x\n", rc); in bnxt_half_open_nic()
12870 netif_close(bp->dev); in bnxt_half_open_nic()
12883 clear_bit(BNXT_STATE_HALF_OPEN, &bp->state); in bnxt_half_close_nic()
12889 struct bnxt_pf_info *pf = &bp->pf; in bnxt_reenable_sriov()
12890 int n = pf->active_vfs; in bnxt_reenable_sriov()
12902 if (test_bit(BNXT_STATE_ABORT_ERR, &bp->state)) { in bnxt_open()
12905 if (rc == -EBUSY) in bnxt_open()
12906 netdev_err(bp->dev, "A previous firmware reset has not completed, aborting\n"); in bnxt_open()
12908 netdev_err(bp->dev, "Failed to reinitialize after aborted firmware reset\n"); in bnxt_open()
12909 return -ENODEV; in bnxt_open()
12921 if (test_and_clear_bit(BNXT_STATE_FW_RESET_DET, &bp->state)) { in bnxt_open()
12922 if (!test_bit(BNXT_STATE_IN_FW_RESET, &bp->state)) in bnxt_open()
12933 return (test_bit(BNXT_STATE_IN_SP_TASK, &bp->state) || in bnxt_drv_busy()
12934 test_bit(BNXT_STATE_READ_STATS, &bp->state)); in bnxt_drv_busy()
12943 /* Close the VF-reps before closing PF */ in __bnxt_close_nic()
12950 clear_bit(BNXT_STATE_OPEN, &bp->state); in __bnxt_close_nic()
12964 timer_delete_sync(&bp->timer); in __bnxt_close_nic()
12968 if (bp->bnapi && irq_re_init) { in __bnxt_close_nic()
12969 bnxt_get_ring_stats(bp, &bp->net_stats_prev); in __bnxt_close_nic()
12970 bnxt_get_ring_err_stats(bp, &bp->ring_err_stats_prev); in __bnxt_close_nic()
12981 if (test_bit(BNXT_STATE_IN_FW_RESET, &bp->state)) { in bnxt_close_nic()
12990 netdev_warn(bp->dev, "FW reset in progress during close, FW reset will be aborted\n"); in bnxt_close_nic()
12991 set_bit(BNXT_STATE_ABORT_ERR, &bp->state); in bnxt_close_nic()
12995 if (bp->sriov_cfg) { in bnxt_close_nic()
12998 rc = wait_event_interruptible_timeout(bp->sriov_cfg_wait, in bnxt_close_nic()
12999 !bp->sriov_cfg, in bnxt_close_nic()
13002 …netdev_warn(bp->dev, "timeout waiting for SRIOV config operation to complete, proceeding to close!… in bnxt_close_nic()
13004 netdev_warn(bp->dev, "SRIOV config operation interrupted, proceeding to close!\n"); in bnxt_close_nic()
13027 if (bp->hwrm_spec_code < 0x10a00) in bnxt_hwrm_port_phy_read()
13028 return -EOPNOTSUPP; in bnxt_hwrm_port_phy_read()
13034 req->port_id = cpu_to_le16(bp->pf.port_id); in bnxt_hwrm_port_phy_read()
13035 req->phy_addr = phy_addr; in bnxt_hwrm_port_phy_read()
13036 req->reg_addr = cpu_to_le16(reg & 0x1f); in bnxt_hwrm_port_phy_read()
13038 req->cl45_mdio = 1; in bnxt_hwrm_port_phy_read()
13039 req->phy_addr = mdio_phy_id_prtad(phy_addr); in bnxt_hwrm_port_phy_read()
13040 req->dev_addr = mdio_phy_id_devad(phy_addr); in bnxt_hwrm_port_phy_read()
13041 req->reg_addr = cpu_to_le16(reg); in bnxt_hwrm_port_phy_read()
13047 *val = le16_to_cpu(resp->reg_data); in bnxt_hwrm_port_phy_read()
13058 if (bp->hwrm_spec_code < 0x10a00) in bnxt_hwrm_port_phy_write()
13059 return -EOPNOTSUPP; in bnxt_hwrm_port_phy_write()
13065 req->port_id = cpu_to_le16(bp->pf.port_id); in bnxt_hwrm_port_phy_write()
13066 req->phy_addr = phy_addr; in bnxt_hwrm_port_phy_write()
13067 req->reg_addr = cpu_to_le16(reg & 0x1f); in bnxt_hwrm_port_phy_write()
13069 req->cl45_mdio = 1; in bnxt_hwrm_port_phy_write()
13070 req->phy_addr = mdio_phy_id_prtad(phy_addr); in bnxt_hwrm_port_phy_write()
13071 req->dev_addr = mdio_phy_id_devad(phy_addr); in bnxt_hwrm_port_phy_write()
13072 req->reg_addr = cpu_to_le16(reg); in bnxt_hwrm_port_phy_write()
13074 req->reg_data = cpu_to_le16(val); in bnxt_hwrm_port_phy_write()
13088 mdio->phy_id = bp->link_info.phy_addr; in bnxt_ioctl()
13095 return -EAGAIN; in bnxt_ioctl()
13097 rc = bnxt_hwrm_port_phy_read(bp, mdio->phy_id, mdio->reg_num, in bnxt_ioctl()
13099 mdio->val_out = mii_regval; in bnxt_ioctl()
13105 return -EAGAIN; in bnxt_ioctl()
13107 return bnxt_hwrm_port_phy_write(bp, mdio->phy_id, mdio->reg_num, in bnxt_ioctl()
13108 mdio->val_in); in bnxt_ioctl()
13120 return -EOPNOTSUPP; in bnxt_ioctl()
13128 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_get_ring_stats()
13129 struct bnxt_napi *bnapi = bp->bnapi[i]; in bnxt_get_ring_stats()
13130 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; in bnxt_get_ring_stats()
13131 u64 *sw = cpr->stats.sw_stats; in bnxt_get_ring_stats()
13133 stats->rx_packets += BNXT_GET_RING_STATS64(sw, rx_ucast_pkts); in bnxt_get_ring_stats()
13134 stats->rx_packets += BNXT_GET_RING_STATS64(sw, rx_mcast_pkts); in bnxt_get_ring_stats()
13135 stats->rx_packets += BNXT_GET_RING_STATS64(sw, rx_bcast_pkts); in bnxt_get_ring_stats()
13137 stats->tx_packets += BNXT_GET_RING_STATS64(sw, tx_ucast_pkts); in bnxt_get_ring_stats()
13138 stats->tx_packets += BNXT_GET_RING_STATS64(sw, tx_mcast_pkts); in bnxt_get_ring_stats()
13139 stats->tx_packets += BNXT_GET_RING_STATS64(sw, tx_bcast_pkts); in bnxt_get_ring_stats()
13141 stats->rx_bytes += BNXT_GET_RING_STATS64(sw, rx_ucast_bytes); in bnxt_get_ring_stats()
13142 stats->rx_bytes += BNXT_GET_RING_STATS64(sw, rx_mcast_bytes); in bnxt_get_ring_stats()
13143 stats->rx_bytes += BNXT_GET_RING_STATS64(sw, rx_bcast_bytes); in bnxt_get_ring_stats()
13145 stats->tx_bytes += BNXT_GET_RING_STATS64(sw, tx_ucast_bytes); in bnxt_get_ring_stats()
13146 stats->tx_bytes += BNXT_GET_RING_STATS64(sw, tx_mcast_bytes); in bnxt_get_ring_stats()
13147 stats->tx_bytes += BNXT_GET_RING_STATS64(sw, tx_bcast_bytes); in bnxt_get_ring_stats()
13149 stats->rx_missed_errors += in bnxt_get_ring_stats()
13152 stats->multicast += BNXT_GET_RING_STATS64(sw, rx_mcast_pkts); in bnxt_get_ring_stats()
13154 stats->tx_dropped += BNXT_GET_RING_STATS64(sw, tx_error_pkts); in bnxt_get_ring_stats()
13156 stats->rx_dropped += in bnxt_get_ring_stats()
13157 cpr->sw_stats->rx.rx_netpoll_discards + in bnxt_get_ring_stats()
13158 cpr->sw_stats->rx.rx_oom_discards; in bnxt_get_ring_stats()
13165 struct rtnl_link_stats64 *prev_stats = &bp->net_stats_prev; in bnxt_add_prev_stats()
13167 stats->rx_packets += prev_stats->rx_packets; in bnxt_add_prev_stats()
13168 stats->tx_packets += prev_stats->tx_packets; in bnxt_add_prev_stats()
13169 stats->rx_bytes += prev_stats->rx_bytes; in bnxt_add_prev_stats()
13170 stats->tx_bytes += prev_stats->tx_bytes; in bnxt_add_prev_stats()
13171 stats->rx_missed_errors += prev_stats->rx_missed_errors; in bnxt_add_prev_stats()
13172 stats->multicast += prev_stats->multicast; in bnxt_add_prev_stats()
13173 stats->rx_dropped += prev_stats->rx_dropped; in bnxt_add_prev_stats()
13174 stats->tx_dropped += prev_stats->tx_dropped; in bnxt_add_prev_stats()
13182 set_bit(BNXT_STATE_READ_STATS, &bp->state); in bnxt_get_stats64()
13187 if (!test_bit(BNXT_STATE_OPEN, &bp->state)) { in bnxt_get_stats64()
13188 clear_bit(BNXT_STATE_READ_STATS, &bp->state); in bnxt_get_stats64()
13189 *stats = bp->net_stats_prev; in bnxt_get_stats64()
13196 if (bp->flags & BNXT_FLAG_PORT_STATS) { in bnxt_get_stats64()
13197 u64 *rx = bp->port_stats.sw_stats; in bnxt_get_stats64()
13198 u64 *tx = bp->port_stats.sw_stats + in bnxt_get_stats64()
13201 stats->rx_crc_errors = in bnxt_get_stats64()
13203 stats->rx_frame_errors = in bnxt_get_stats64()
13205 stats->rx_length_errors = in bnxt_get_stats64()
13209 stats->rx_errors = in bnxt_get_stats64()
13212 stats->collisions = in bnxt_get_stats64()
13214 stats->tx_fifo_errors = in bnxt_get_stats64()
13216 stats->tx_errors = BNXT_GET_TX_PORT_STATS64(tx, tx_err); in bnxt_get_stats64()
13218 clear_bit(BNXT_STATE_READ_STATS, &bp->state); in bnxt_get_stats64()
13225 struct bnxt_sw_stats *sw_stats = cpr->sw_stats; in bnxt_get_one_ring_err_stats()
13226 u64 *hw_stats = cpr->stats.sw_stats; in bnxt_get_one_ring_err_stats()
13228 stats->rx_total_l4_csum_errors += sw_stats->rx.rx_l4_csum_errors; in bnxt_get_one_ring_err_stats()
13229 stats->rx_total_resets += sw_stats->rx.rx_resets; in bnxt_get_one_ring_err_stats()
13230 stats->rx_total_buf_errors += sw_stats->rx.rx_buf_errors; in bnxt_get_one_ring_err_stats()
13231 stats->rx_total_oom_discards += sw_stats->rx.rx_oom_discards; in bnxt_get_one_ring_err_stats()
13232 stats->rx_total_netpoll_discards += sw_stats->rx.rx_netpoll_discards; in bnxt_get_one_ring_err_stats()
13233 stats->rx_total_ring_discards += in bnxt_get_one_ring_err_stats()
13235 stats->tx_total_resets += sw_stats->tx.tx_resets; in bnxt_get_one_ring_err_stats()
13236 stats->tx_total_ring_discards += in bnxt_get_one_ring_err_stats()
13238 stats->total_missed_irqs += sw_stats->cmn.missed_irqs; in bnxt_get_one_ring_err_stats()
13246 for (i = 0; i < bp->cp_nr_rings; i++) in bnxt_get_ring_err_stats()
13247 bnxt_get_one_ring_err_stats(bp, stats, &bp->bnapi[i]->cp_ring); in bnxt_get_ring_err_stats()
13252 struct bnxt_vnic_info *vnic = &bp->vnic_info[BNXT_VNIC_DEFAULT]; in bnxt_mc_list_updated()
13253 struct net_device *dev = bp->dev; in bnxt_mc_list_updated()
13263 vnic->mc_list_count = 0; in bnxt_mc_list_updated()
13266 haddr = ha->addr; in bnxt_mc_list_updated()
13267 if (!ether_addr_equal(haddr, vnic->mc_list + off)) { in bnxt_mc_list_updated()
13268 memcpy(vnic->mc_list + off, haddr, ETH_ALEN); in bnxt_mc_list_updated()
13277 if (mc_count != vnic->mc_list_count) { in bnxt_mc_list_updated()
13278 vnic->mc_list_count = mc_count; in bnxt_mc_list_updated()
13286 struct net_device *dev = bp->dev; in bnxt_uc_list_updated()
13287 struct bnxt_vnic_info *vnic = &bp->vnic_info[BNXT_VNIC_DEFAULT]; in bnxt_uc_list_updated()
13291 if (netdev_uc_count(dev) != (vnic->uc_filter_count - 1)) in bnxt_uc_list_updated()
13295 if (!ether_addr_equal(ha->addr, vnic->uc_list + off)) in bnxt_uc_list_updated()
13311 if (!test_bit(BNXT_STATE_OPEN, &bp->state)) in bnxt_set_rx_mode()
13314 vnic = &bp->vnic_info[BNXT_VNIC_DEFAULT]; in bnxt_set_rx_mode()
13315 mask = vnic->rx_mask; in bnxt_set_rx_mode()
13321 if (dev->flags & IFF_PROMISC) in bnxt_set_rx_mode()
13326 if (dev->flags & IFF_BROADCAST) in bnxt_set_rx_mode()
13328 if (dev->flags & IFF_ALLMULTI) { in bnxt_set_rx_mode()
13330 vnic->mc_list_count = 0; in bnxt_set_rx_mode()
13331 } else if (dev->flags & IFF_MULTICAST) { in bnxt_set_rx_mode()
13335 if (mask != vnic->rx_mask || uc_update || mc_update) { in bnxt_set_rx_mode()
13336 vnic->rx_mask = mask; in bnxt_set_rx_mode()
13344 struct net_device *dev = bp->dev; in bnxt_cfg_rx_mode()
13345 struct bnxt_vnic_info *vnic = &bp->vnic_info[BNXT_VNIC_DEFAULT]; in bnxt_cfg_rx_mode()
13357 for (i = 1; i < vnic->uc_filter_count; i++) { in bnxt_cfg_rx_mode()
13358 struct bnxt_l2_filter *fltr = vnic->l2_filters[i]; in bnxt_cfg_rx_mode()
13364 vnic->uc_filter_count = 1; in bnxt_cfg_rx_mode()
13367 if (netdev_uc_count(dev) > (BNXT_MAX_UC_ADDRS - 1)) { in bnxt_cfg_rx_mode()
13368 vnic->rx_mask |= CFA_L2_SET_RX_MASK_REQ_MASK_PROMISCUOUS; in bnxt_cfg_rx_mode()
13371 memcpy(vnic->uc_list + off, ha->addr, ETH_ALEN); in bnxt_cfg_rx_mode()
13373 vnic->uc_filter_count++; in bnxt_cfg_rx_mode()
13378 for (i = 1, off = 0; i < vnic->uc_filter_count; i++, off += ETH_ALEN) { in bnxt_cfg_rx_mode()
13379 rc = bnxt_hwrm_set_vnic_filter(bp, 0, i, vnic->uc_list + off); in bnxt_cfg_rx_mode()
13381 if (BNXT_VF(bp) && rc == -ENODEV) { in bnxt_cfg_rx_mode()
13382 if (!test_and_set_bit(BNXT_STATE_L2_FILTER_RETRY, &bp->state)) in bnxt_cfg_rx_mode()
13383 netdev_warn(bp->dev, "Cannot configure L2 filters while PF is unavailable, will retry\n"); in bnxt_cfg_rx_mode()
13385 netdev_dbg(bp->dev, "PF still unavailable while configuring L2 filters.\n"); in bnxt_cfg_rx_mode()
13388 netdev_err(bp->dev, "HWRM vnic filter failure rc: %x\n", rc); in bnxt_cfg_rx_mode()
13390 vnic->uc_filter_count = i; in bnxt_cfg_rx_mode()
13394 if (test_and_clear_bit(BNXT_STATE_L2_FILTER_RETRY, &bp->state)) in bnxt_cfg_rx_mode()
13395 netdev_notice(bp->dev, "Retry of L2 filter configuration successful.\n"); in bnxt_cfg_rx_mode()
13398 if ((vnic->rx_mask & CFA_L2_SET_RX_MASK_REQ_MASK_PROMISCUOUS) && in bnxt_cfg_rx_mode()
13400 vnic->rx_mask &= ~CFA_L2_SET_RX_MASK_REQ_MASK_PROMISCUOUS; in bnxt_cfg_rx_mode()
13402 if (rc && (vnic->rx_mask & CFA_L2_SET_RX_MASK_REQ_MASK_MCAST)) { in bnxt_cfg_rx_mode()
13403 netdev_info(bp->dev, "Failed setting MC filters rc: %d, turning on ALL_MCAST mode\n", in bnxt_cfg_rx_mode()
13405 vnic->rx_mask &= ~CFA_L2_SET_RX_MASK_REQ_MASK_MCAST; in bnxt_cfg_rx_mode()
13406 vnic->rx_mask |= CFA_L2_SET_RX_MASK_REQ_MASK_ALL_MCAST; in bnxt_cfg_rx_mode()
13407 vnic->mc_list_count = 0; in bnxt_cfg_rx_mode()
13411 netdev_err(bp->dev, "HWRM cfa l2 rx mask failure rc: %d\n", in bnxt_cfg_rx_mode()
13421 struct bnxt_hw_resc *hw_resc = &bp->hw_resc; in bnxt_can_reserve_rings()
13426 if (hw_resc->min_tx_rings || hw_resc->resv_tx_rings) in bnxt_can_reserve_rings()
13429 if (!netif_running(bp->dev)) in bnxt_can_reserve_rings()
13439 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in bnxt_rfs_supported()
13440 if (bp->fw_cap & BNXT_FW_CAP_CFA_RFS_RING_TBL_IDX_V2) in bnxt_rfs_supported()
13449 if (bp->rss_cap & BNXT_RSS_CAP_NEW_RSS_CAP) in bnxt_rfs_supported()
13460 if ((bp->flags & BNXT_FLAG_CHIP_P5_PLUS) && in bnxt_rfs_capable()
13464 if (!bnxt_can_reserve_rings(bp) || !bp->rx_nr_rings) in bnxt_rfs_capable()
13467 hwr.grp = bp->rx_nr_rings; in bnxt_rfs_capable()
13468 hwr.vnic = bnxt_get_total_vnics(bp, bp->rx_nr_rings); in bnxt_rfs_capable()
13476 if (bp->rx_nr_rings > 1) in bnxt_rfs_capable()
13477 netdev_warn(bp->dev, in bnxt_rfs_capable()
13479 min(max_rss_ctxs - 1, max_vnics - 1)); in bnxt_rfs_capable()
13490 if (hwr.vnic <= bp->hw_resc.resv_vnics && in bnxt_rfs_capable()
13491 hwr.rss_ctx <= bp->hw_resc.resv_rsscos_ctxs) in bnxt_rfs_capable()
13495 if (hwr.vnic <= bp->hw_resc.resv_vnics && in bnxt_rfs_capable()
13496 hwr.rss_ctx <= bp->hw_resc.resv_rsscos_ctxs) in bnxt_rfs_capable()
13499 netdev_warn(bp->dev, "Unable to reserve resources to support NTUPLE filters.\n"); in bnxt_rfs_capable()
13515 if ((bp->flags & BNXT_FLAG_NO_AGG_RINGS) || bp->xdp_prog) in bnxt_fix_features()
13529 if (dev->features & BNXT_HW_FEATURE_VLAN_ALL_RX) in bnxt_fix_features()
13535 if (BNXT_VF(bp) && bp->vf.vlan) in bnxt_fix_features()
13545 bp->flags = flags; in bnxt_reinit_features()
13555 u32 flags = bp->flags; in bnxt_set_features()
13566 if (bp->flags & BNXT_FLAG_NO_AGG_RINGS) in bnxt_set_features()
13577 changes = flags ^ bp->flags; in bnxt_set_features()
13580 if ((bp->flags & BNXT_FLAG_TPA) == 0 || in bnxt_set_features()
13582 (bp->flags & BNXT_FLAG_CHIP_P5_PLUS)) in bnxt_set_features()
13592 if (flags != bp->flags) { in bnxt_set_features()
13593 u32 old_flags = bp->flags; in bnxt_set_features()
13595 if (!test_bit(BNXT_STATE_OPEN, &bp->state)) { in bnxt_set_features()
13596 bp->flags = flags; in bnxt_set_features()
13609 bp->flags = flags; in bnxt_set_features()
13614 bp->flags = old_flags; in bnxt_set_features()
13623 struct ipv6hdr *ip6h = (struct ipv6hdr *)(skb->data + nw_off); in bnxt_exthdr_check()
13633 nexthdr = &ip6h->nexthdr; in bnxt_exthdr_check()
13641 hp = __skb_header_pointer(NULL, start, sizeof(*hp), skb->data, in bnxt_exthdr_check()
13653 /* The ext header may be a hop-by-hop header inserted for in bnxt_exthdr_check()
13658 if (likely(skb->len <= GRO_LEGACY_MAX_SIZE)) in bnxt_exthdr_check()
13662 if (jhdr->tlv_type != IPV6_TLV_JUMBO || jhdr->hdrlen != 0 || in bnxt_exthdr_check()
13663 jhdr->nexthdr != IPPROTO_TCP) in bnxt_exthdr_check()
13671 nexthdr = &hp->nexthdr; in bnxt_exthdr_check()
13676 if (skb->encapsulation) { in bnxt_exthdr_check()
13682 /* Only support TCP/UDP for non-tunneled ipv6 and inner ipv6 */ in bnxt_exthdr_check()
13690 __be16 udp_port = uh->dest; in bnxt_udp_tunl_check()
13692 if (udp_port != bp->vxlan_port && udp_port != bp->nge_port && in bnxt_udp_tunl_check()
13693 udp_port != bp->vxlan_gpe_port) in bnxt_udp_tunl_check()
13695 if (skb->inner_protocol == htons(ETH_P_TEB)) { in bnxt_udp_tunl_check()
13698 switch (eh->h_proto) { in bnxt_udp_tunl_check()
13706 } else if (skb->inner_protocol == htons(ETH_P_IP)) { in bnxt_udp_tunl_check()
13708 } else if (skb->inner_protocol == htons(ETH_P_IPV6)) { in bnxt_udp_tunl_check()
13723 switch (skb->inner_protocol) { in bnxt_tunl_check()
13750 if (!skb->encapsulation) in bnxt_features_check()
13752 l4_proto = &ip_hdr(skb)->protocol; in bnxt_features_check()
13783 rc = -ENOMEM; in bnxt_dbg_hwrm_rd_reg()
13787 req->host_dest_addr = cpu_to_le64(mapping); in bnxt_dbg_hwrm_rd_reg()
13790 req->read_addr = cpu_to_le32(reg_off + CHIMP_REG_VIEW_ADDR); in bnxt_dbg_hwrm_rd_reg()
13791 req->read_len32 = cpu_to_le32(num_words); in bnxt_dbg_hwrm_rd_reg()
13794 if (rc || resp->error_code) { in bnxt_dbg_hwrm_rd_reg()
13795 rc = -EIO; in bnxt_dbg_hwrm_rd_reg()
13817 req->ring_type = ring_type; in bnxt_dbg_hwrm_ring_info_get()
13818 req->fw_ring_id = cpu_to_le32(ring_id); in bnxt_dbg_hwrm_ring_info_get()
13822 *prod = le32_to_cpu(resp->producer_index); in bnxt_dbg_hwrm_ring_info_get()
13823 *cons = le32_to_cpu(resp->consumer_index); in bnxt_dbg_hwrm_ring_info_get()
13832 int i = bnapi->index, j; in bnxt_dump_tx_sw_state()
13835 netdev_info(bnapi->bp->dev, "[%d.%d]: tx{fw_ring: %d prod: %x cons: %x}\n", in bnxt_dump_tx_sw_state()
13836 i, j, txr->tx_ring_struct.fw_ring_id, txr->tx_prod, in bnxt_dump_tx_sw_state()
13837 txr->tx_cons); in bnxt_dump_tx_sw_state()
13842 struct bnxt_rx_ring_info *rxr = bnapi->rx_ring; in bnxt_dump_rx_sw_state()
13843 int i = bnapi->index; in bnxt_dump_rx_sw_state()
13848 …netdev_info(bnapi->bp->dev, "[%d]: rx{fw_ring: %d prod: %x} rx_agg{fw_ring: %d agg_prod: %x sw_agg… in bnxt_dump_rx_sw_state()
13849 i, rxr->rx_ring_struct.fw_ring_id, rxr->rx_prod, in bnxt_dump_rx_sw_state()
13850 rxr->rx_agg_ring_struct.fw_ring_id, rxr->rx_agg_prod, in bnxt_dump_rx_sw_state()
13851 rxr->rx_sw_agg_prod); in bnxt_dump_rx_sw_state()
13856 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring; in bnxt_dump_cp_sw_state()
13857 int i = bnapi->index; in bnxt_dump_cp_sw_state()
13859 netdev_info(bnapi->bp->dev, "[%d]: cp{fw_ring: %d raw_cons: %x}\n", in bnxt_dump_cp_sw_state()
13860 i, cpr->cp_ring_struct.fw_ring_id, cpr->cp_raw_cons); in bnxt_dump_cp_sw_state()
13868 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_dbg_dump_states()
13869 bnapi = bp->bnapi[i]; in bnxt_dbg_dump_states()
13880 struct bnxt_rx_ring_info *rxr = &bp->rx_ring[ring_nr]; in bnxt_hwrm_rx_ring_reset()
13882 struct bnxt_napi *bnapi = rxr->bnapi; in bnxt_hwrm_rx_ring_reset()
13891 cpr = &bnapi->cp_ring; in bnxt_hwrm_rx_ring_reset()
13892 cp_ring_id = cpr->cp_ring_struct.fw_ring_id; in bnxt_hwrm_rx_ring_reset()
13893 req->cmpl_ring = cpu_to_le16(cp_ring_id); in bnxt_hwrm_rx_ring_reset()
13894 req->ring_type = RING_RESET_REQ_RING_TYPE_RX_RING_GRP; in bnxt_hwrm_rx_ring_reset()
13895 req->ring_id = cpu_to_le16(bp->grp_info[bnapi->index].fw_grp_id); in bnxt_hwrm_rx_ring_reset()
13903 if (netif_running(bp->dev)) { in bnxt_reset_task()
13913 netdev_err(bp->dev, "TX timeout detected, starting reset task!\n"); in bnxt_tx_timeout()
13919 struct bnxt_fw_health *fw_health = bp->fw_health; in bnxt_fw_health_check()
13920 struct pci_dev *pdev = bp->pdev; in bnxt_fw_health_check()
13923 if (!fw_health->enabled || test_bit(BNXT_STATE_IN_FW_RESET, &bp->state)) in bnxt_fw_health_check()
13928 if (fw_health->tmr_counter) { in bnxt_fw_health_check()
13929 fw_health->tmr_counter--; in bnxt_fw_health_check()
13934 if (val == fw_health->last_fw_heartbeat && pci_device_is_present(pdev)) { in bnxt_fw_health_check()
13935 fw_health->arrests++; in bnxt_fw_health_check()
13939 fw_health->last_fw_heartbeat = val; in bnxt_fw_health_check()
13942 if (val != fw_health->last_fw_reset_cnt && pci_device_is_present(pdev)) { in bnxt_fw_health_check()
13943 fw_health->discoveries++; in bnxt_fw_health_check()
13947 fw_health->tmr_counter = fw_health->tmr_multiplier; in bnxt_fw_health_check()
13957 struct net_device *dev = bp->dev; in bnxt_timer()
13959 if (!netif_running(dev) || !test_bit(BNXT_STATE_OPEN, &bp->state)) in bnxt_timer()
13962 if (atomic_read(&bp->intr_sem) != 0) in bnxt_timer()
13965 if (bp->fw_cap & BNXT_FW_CAP_ERROR_RECOVERY) in bnxt_timer()
13968 if (BNXT_LINK_IS_UP(bp) && bp->stats_coal_ticks) in bnxt_timer()
13975 if ((bp->flags & BNXT_FLAG_RFS) && bp->ntp_fltr_count) in bnxt_timer()
13979 if (bp->link_info.phy_retry) { in bnxt_timer()
13980 if (time_after(jiffies, bp->link_info.phy_retry_expires)) { in bnxt_timer()
13981 bp->link_info.phy_retry = false; in bnxt_timer()
13982 netdev_warn(bp->dev, "failed to update phy settings after maximum retries.\n"); in bnxt_timer()
13988 if (test_bit(BNXT_STATE_L2_FILTER_RETRY, &bp->state)) in bnxt_timer()
13991 if ((BNXT_CHIP_P5(bp)) && !bp->chip_rev && netif_carrier_ok(dev)) in bnxt_timer()
13995 mod_timer(&bp->timer, jiffies + bp->current_interval); in bnxt_timer()
14006 clear_bit(BNXT_STATE_IN_SP_TASK, &bp->state); in bnxt_lock_sp()
14007 netdev_lock(bp->dev); in bnxt_lock_sp()
14012 set_bit(BNXT_STATE_IN_SP_TASK, &bp->state); in bnxt_unlock_sp()
14013 netdev_unlock(bp->dev); in bnxt_unlock_sp()
14019 clear_bit(BNXT_STATE_IN_SP_TASK, &bp->state); in bnxt_rtnl_lock_sp()
14021 netdev_lock(bp->dev); in bnxt_rtnl_lock_sp()
14026 set_bit(BNXT_STATE_IN_SP_TASK, &bp->state); in bnxt_rtnl_unlock_sp()
14027 netdev_unlock(bp->dev); in bnxt_rtnl_unlock_sp()
14035 if (test_bit(BNXT_STATE_OPEN, &bp->state)) in bnxt_reset()
14046 if (!test_bit(BNXT_STATE_OPEN, &bp->state)) { in bnxt_rx_ring_reset()
14051 if (bp->flags & BNXT_FLAG_TPA) in bnxt_rx_ring_reset()
14053 for (i = 0; i < bp->rx_nr_rings; i++) { in bnxt_rx_ring_reset()
14054 struct bnxt_rx_ring_info *rxr = &bp->rx_ring[i]; in bnxt_rx_ring_reset()
14058 if (!rxr->bnapi->in_reset) in bnxt_rx_ring_reset()
14063 if (rc == -EINVAL || rc == -EOPNOTSUPP) in bnxt_rx_ring_reset()
14064 …netdev_info_once(bp->dev, "RX ring reset not supported by firmware, falling back to global reset\n… in bnxt_rx_ring_reset()
14066 netdev_warn(bp->dev, "RX ring reset failed, rc = %d, falling back to global reset\n", in bnxt_rx_ring_reset()
14072 rxr->rx_prod = 0; in bnxt_rx_ring_reset()
14073 rxr->rx_agg_prod = 0; in bnxt_rx_ring_reset()
14074 rxr->rx_sw_agg_prod = 0; in bnxt_rx_ring_reset()
14075 rxr->rx_next_cons = 0; in bnxt_rx_ring_reset()
14076 rxr->bnapi->in_reset = false; in bnxt_rx_ring_reset()
14078 cpr = &rxr->bnapi->cp_ring; in bnxt_rx_ring_reset()
14079 cpr->sw_stats->rx.rx_resets++; in bnxt_rx_ring_reset()
14080 if (bp->flags & BNXT_FLAG_AGG_RINGS) in bnxt_rx_ring_reset()
14081 bnxt_db_write(bp, &rxr->rx_agg_db, rxr->rx_agg_prod); in bnxt_rx_ring_reset()
14082 bnxt_db_write(bp, &rxr->rx_db, rxr->rx_prod); in bnxt_rx_ring_reset()
14084 if (bp->flags & BNXT_FLAG_TPA) in bnxt_rx_ring_reset()
14096 pci_disable_device(bp->pdev); in bnxt_fw_fatal_close()
14105 if (test_bit(BNXT_STATE_FW_FATAL_COND, &bp->state)) { in bnxt_fw_reset_close()
14108 pci_read_config_word(bp->pdev, PCI_SUBSYSTEM_ID, &val); in bnxt_fw_reset_close()
14110 bp->fw_reset_min_dsecs = 0; in bnxt_fw_reset_close()
14117 if (pci_is_enabled(bp->pdev)) in bnxt_fw_reset_close()
14118 pci_disable_device(bp->pdev); in bnxt_fw_reset_close()
14124 struct bnxt_fw_health *fw_health = bp->fw_health; in is_bnxt_fw_ok()
14129 if (val == fw_health->last_fw_heartbeat) in is_bnxt_fw_ok()
14133 if (val != fw_health->last_fw_reset_cnt) in is_bnxt_fw_ok()
14145 struct bnxt_fw_health *fw_health = bp->fw_health; in bnxt_force_fw_reset()
14146 struct bnxt_ptp_cfg *ptp = bp->ptp_cfg; in bnxt_force_fw_reset()
14149 if (!test_bit(BNXT_STATE_OPEN, &bp->state) || in bnxt_force_fw_reset()
14150 test_bit(BNXT_STATE_IN_FW_RESET, &bp->state)) in bnxt_force_fw_reset()
14157 write_seqlock_irqsave(&ptp->ptp_lock, flags); in bnxt_force_fw_reset()
14158 set_bit(BNXT_STATE_IN_FW_RESET, &bp->state); in bnxt_force_fw_reset()
14159 write_sequnlock_irqrestore(&ptp->ptp_lock, flags); in bnxt_force_fw_reset()
14161 set_bit(BNXT_STATE_IN_FW_RESET, &bp->state); in bnxt_force_fw_reset()
14164 wait_dsecs = fw_health->master_func_wait_dsecs; in bnxt_force_fw_reset()
14165 if (fw_health->primary) { in bnxt_force_fw_reset()
14166 if (fw_health->flags & ERROR_RECOVERY_QCFG_RESP_FLAGS_CO_CPU) in bnxt_force_fw_reset()
14168 bp->fw_reset_state = BNXT_FW_RESET_STATE_RESET_FW; in bnxt_force_fw_reset()
14170 bp->fw_reset_timestamp = jiffies + wait_dsecs * HZ / 10; in bnxt_force_fw_reset()
14171 wait_dsecs = fw_health->normal_func_wait_dsecs; in bnxt_force_fw_reset()
14172 bp->fw_reset_state = BNXT_FW_RESET_STATE_ENABLE_DEV; in bnxt_force_fw_reset()
14175 bp->fw_reset_min_dsecs = fw_health->post_reset_wait_dsecs; in bnxt_force_fw_reset()
14176 bp->fw_reset_max_dsecs = fw_health->post_reset_max_wait_dsecs; in bnxt_force_fw_reset()
14182 netdev_warn(bp->dev, "Detected firmware fatal condition, initiating reset\n"); in bnxt_fw_exception()
14183 set_bit(BNXT_STATE_FW_FATAL_COND, &bp->state); in bnxt_fw_exception()
14203 netdev_err(bp->dev, "func_qcfg cmd failed, rc = %d\n", rc); in bnxt_get_registered_vfs()
14206 if (bp->pf.registered_vfs) in bnxt_get_registered_vfs()
14207 return bp->pf.registered_vfs; in bnxt_get_registered_vfs()
14208 if (bp->sriov_cfg) in bnxt_get_registered_vfs()
14218 if (test_bit(BNXT_STATE_OPEN, &bp->state) && in bnxt_fw_reset()
14219 !test_bit(BNXT_STATE_IN_FW_RESET, &bp->state)) { in bnxt_fw_reset()
14220 struct bnxt_ptp_cfg *ptp = bp->ptp_cfg; in bnxt_fw_reset()
14227 write_seqlock_irqsave(&ptp->ptp_lock, flags); in bnxt_fw_reset()
14228 set_bit(BNXT_STATE_IN_FW_RESET, &bp->state); in bnxt_fw_reset()
14229 write_sequnlock_irqrestore(&ptp->ptp_lock, flags); in bnxt_fw_reset()
14231 set_bit(BNXT_STATE_IN_FW_RESET, &bp->state); in bnxt_fw_reset()
14233 if (bp->pf.active_vfs && in bnxt_fw_reset()
14234 !test_bit(BNXT_STATE_FW_FATAL_COND, &bp->state)) in bnxt_fw_reset()
14237 netdev_err(bp->dev, "Firmware reset aborted, rc = %d\n", in bnxt_fw_reset()
14239 clear_bit(BNXT_STATE_IN_FW_RESET, &bp->state); in bnxt_fw_reset()
14240 netif_close(bp->dev); in bnxt_fw_reset()
14245 if (bp->fw_reset_max_dsecs < vf_tmo_dsecs) in bnxt_fw_reset()
14246 bp->fw_reset_max_dsecs = vf_tmo_dsecs; in bnxt_fw_reset()
14247 bp->fw_reset_state = in bnxt_fw_reset()
14253 if (bp->fw_cap & BNXT_FW_CAP_ERR_RECOVER_RELOAD) { in bnxt_fw_reset()
14254 bp->fw_reset_state = BNXT_FW_RESET_STATE_POLL_FW_DOWN; in bnxt_fw_reset()
14257 bp->fw_reset_state = BNXT_FW_RESET_STATE_ENABLE_DEV; in bnxt_fw_reset()
14258 tmo = bp->fw_reset_min_dsecs * HZ / 10; in bnxt_fw_reset()
14270 if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS)) in bnxt_chk_missed_irq()
14273 for (i = 0; i < bp->cp_nr_rings; i++) { in bnxt_chk_missed_irq()
14274 struct bnxt_napi *bnapi = bp->bnapi[i]; in bnxt_chk_missed_irq()
14282 cpr = &bnapi->cp_ring; in bnxt_chk_missed_irq()
14283 for (j = 0; j < cpr->cp_ring_count; j++) { in bnxt_chk_missed_irq()
14284 struct bnxt_cp_ring_info *cpr2 = &cpr->cp_ring_arr[j]; in bnxt_chk_missed_irq()
14287 if (cpr2->has_more_work || !bnxt_has_work(bp, cpr2)) in bnxt_chk_missed_irq()
14290 if (cpr2->cp_raw_cons != cpr2->last_cp_raw_cons) { in bnxt_chk_missed_irq()
14291 cpr2->last_cp_raw_cons = cpr2->cp_raw_cons; in bnxt_chk_missed_irq()
14294 fw_ring_id = cpr2->cp_ring_struct.fw_ring_id; in bnxt_chk_missed_irq()
14298 cpr->sw_stats->cmn.missed_irqs++; in bnxt_chk_missed_irq()
14307 struct bnxt_link_info *link_info = &bp->link_info; in bnxt_init_ethtool_link_settings()
14309 if (BNXT_AUTO_MODE(link_info->auto_mode)) { in bnxt_init_ethtool_link_settings()
14310 link_info->autoneg = BNXT_AUTONEG_SPEED; in bnxt_init_ethtool_link_settings()
14311 if (bp->hwrm_spec_code >= 0x10201) { in bnxt_init_ethtool_link_settings()
14312 if (link_info->auto_pause_setting & in bnxt_init_ethtool_link_settings()
14314 link_info->autoneg |= BNXT_AUTONEG_FLOW_CTRL; in bnxt_init_ethtool_link_settings()
14316 link_info->autoneg |= BNXT_AUTONEG_FLOW_CTRL; in bnxt_init_ethtool_link_settings()
14321 link_info->req_duplex = link_info->duplex_setting; in bnxt_init_ethtool_link_settings()
14323 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL) in bnxt_init_ethtool_link_settings()
14324 link_info->req_flow_ctrl = in bnxt_init_ethtool_link_settings()
14325 link_info->auto_pause_setting & BNXT_LINK_PAUSE_BOTH; in bnxt_init_ethtool_link_settings()
14327 link_info->req_flow_ctrl = link_info->force_pause_setting; in bnxt_init_ethtool_link_settings()
14332 struct bnxt_fw_health *fw_health = bp->fw_health; in bnxt_fw_echo_reply()
14339 req->event_data1 = cpu_to_le32(fw_health->echo_req_data1); in bnxt_fw_echo_reply()
14340 req->event_data2 = cpu_to_le32(fw_health->echo_req_data2); in bnxt_fw_echo_reply()
14354 set_bit(BNXT_STATE_IN_SP_TASK, &bp->state); in bnxt_sp_task()
14356 if (!test_bit(BNXT_STATE_OPEN, &bp->state)) { in bnxt_sp_task()
14357 clear_bit(BNXT_STATE_IN_SP_TASK, &bp->state); in bnxt_sp_task()
14361 if (test_and_clear_bit(BNXT_RESTART_ULP_SP_EVENT, &bp->sp_event)) { in bnxt_sp_task()
14366 if (test_and_clear_bit(BNXT_RX_MASK_SP_EVENT, &bp->sp_event)) in bnxt_sp_task()
14369 if (test_and_clear_bit(BNXT_RX_NTP_FLTR_SP_EVENT, &bp->sp_event)) in bnxt_sp_task()
14371 if (test_and_clear_bit(BNXT_HWRM_EXEC_FWD_REQ_SP_EVENT, &bp->sp_event)) in bnxt_sp_task()
14373 if (test_and_clear_bit(BNXT_HWRM_PF_UNLOAD_SP_EVENT, &bp->sp_event)) in bnxt_sp_task()
14374 netdev_info(bp->dev, "Receive PF driver unload event!\n"); in bnxt_sp_task()
14375 if (test_and_clear_bit(BNXT_PERIODIC_STATS_SP_EVENT, &bp->sp_event)) { in bnxt_sp_task()
14381 if (test_and_clear_bit(BNXT_LINK_CHNG_SP_EVENT, &bp->sp_event)) { in bnxt_sp_task()
14384 mutex_lock(&bp->link_lock); in bnxt_sp_task()
14386 &bp->sp_event)) in bnxt_sp_task()
14391 netdev_err(bp->dev, "SP task can't update link (rc: %x)\n", in bnxt_sp_task()
14395 &bp->sp_event)) in bnxt_sp_task()
14397 mutex_unlock(&bp->link_lock); in bnxt_sp_task()
14399 if (test_and_clear_bit(BNXT_UPDATE_PHY_SP_EVENT, &bp->sp_event)) { in bnxt_sp_task()
14402 mutex_lock(&bp->link_lock); in bnxt_sp_task()
14404 mutex_unlock(&bp->link_lock); in bnxt_sp_task()
14406 netdev_warn(bp->dev, "update phy settings retry failed\n"); in bnxt_sp_task()
14408 bp->link_info.phy_retry = false; in bnxt_sp_task()
14409 netdev_info(bp->dev, "update phy settings retry succeeded\n"); in bnxt_sp_task()
14412 if (test_and_clear_bit(BNXT_HWRM_PORT_MODULE_SP_EVENT, &bp->sp_event)) { in bnxt_sp_task()
14413 mutex_lock(&bp->link_lock); in bnxt_sp_task()
14415 mutex_unlock(&bp->link_lock); in bnxt_sp_task()
14418 if (test_and_clear_bit(BNXT_FLOW_STATS_SP_EVENT, &bp->sp_event)) in bnxt_sp_task()
14421 if (test_and_clear_bit(BNXT_RING_COAL_NOW_SP_EVENT, &bp->sp_event)) in bnxt_sp_task()
14424 if (test_and_clear_bit(BNXT_FW_ECHO_REQUEST_SP_EVENT, &bp->sp_event)) in bnxt_sp_task()
14427 if (test_and_clear_bit(BNXT_THERMAL_THRESHOLD_SP_EVENT, &bp->sp_event)) in bnxt_sp_task()
14433 if (test_and_clear_bit(BNXT_RESET_TASK_SP_EVENT, &bp->sp_event)) in bnxt_sp_task()
14436 if (test_and_clear_bit(BNXT_RESET_TASK_SILENT_SP_EVENT, &bp->sp_event)) in bnxt_sp_task()
14439 if (test_and_clear_bit(BNXT_RST_RING_SP_EVENT, &bp->sp_event)) in bnxt_sp_task()
14442 if (test_and_clear_bit(BNXT_FW_RESET_NOTIFY_SP_EVENT, &bp->sp_event)) { in bnxt_sp_task()
14443 if (test_bit(BNXT_STATE_FW_FATAL_COND, &bp->state) || in bnxt_sp_task()
14444 test_bit(BNXT_STATE_FW_NON_FATAL_COND, &bp->state)) in bnxt_sp_task()
14450 if (test_and_clear_bit(BNXT_FW_EXCEPTION_SP_EVENT, &bp->sp_event)) { in bnxt_sp_task()
14456 clear_bit(BNXT_STATE_IN_SP_TASK, &bp->state); in bnxt_sp_task()
14477 return -ENOMEM; in bnxt_check_rings()
14479 if (bp->flags & BNXT_FLAG_AGG_RINGS) in bnxt_check_rings()
14485 return -ENOMEM; in bnxt_check_rings()
14492 return -ENOMEM; in bnxt_check_rings()
14500 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) in bnxt_check_rings()
14503 if (!rc && pci_msix_can_alloc_dyn(bp->pdev)) { in bnxt_check_rings()
14504 if (!bnxt_ulp_registered(bp->edev)) { in bnxt_check_rings()
14508 if (hwr.cp > bp->total_irqs) { in bnxt_check_rings()
14512 netdev_warn(bp->dev, "Unable to allocate %d MSIX vectors, maximum available %d\n", in bnxt_check_rings()
14514 rc = -ENOSPC; in bnxt_check_rings()
14523 if (bp->bar2) { in bnxt_unmap_bars()
14524 pci_iounmap(pdev, bp->bar2); in bnxt_unmap_bars()
14525 bp->bar2 = NULL; in bnxt_unmap_bars()
14528 if (bp->bar1) { in bnxt_unmap_bars()
14529 pci_iounmap(pdev, bp->bar1); in bnxt_unmap_bars()
14530 bp->bar1 = NULL; in bnxt_unmap_bars()
14533 if (bp->bar0) { in bnxt_unmap_bars()
14534 pci_iounmap(pdev, bp->bar0); in bnxt_unmap_bars()
14535 bp->bar0 = NULL; in bnxt_unmap_bars()
14541 bnxt_unmap_bars(bp, bp->pdev); in bnxt_cleanup_pci()
14542 pci_release_regions(bp->pdev); in bnxt_cleanup_pci()
14543 if (pci_is_enabled(bp->pdev)) in bnxt_cleanup_pci()
14544 pci_disable_device(bp->pdev); in bnxt_cleanup_pci()
14549 struct bnxt_coal_cap *coal_cap = &bp->coal_cap; in bnxt_init_dflt_coal()
14553 if (coal_cap->cmpl_params & in bnxt_init_dflt_coal()
14560 coal = &bp->rx_coal; in bnxt_init_dflt_coal()
14561 coal->coal_ticks = 10; in bnxt_init_dflt_coal()
14562 coal->coal_bufs = 30; in bnxt_init_dflt_coal()
14563 coal->coal_ticks_irq = 1; in bnxt_init_dflt_coal()
14564 coal->coal_bufs_irq = 2; in bnxt_init_dflt_coal()
14565 coal->idle_thresh = 50; in bnxt_init_dflt_coal()
14566 coal->bufs_per_record = 2; in bnxt_init_dflt_coal()
14567 coal->budget = 64; /* NAPI budget */ in bnxt_init_dflt_coal()
14568 coal->flags = flags; in bnxt_init_dflt_coal()
14570 coal = &bp->tx_coal; in bnxt_init_dflt_coal()
14571 coal->coal_ticks = 28; in bnxt_init_dflt_coal()
14572 coal->coal_bufs = 30; in bnxt_init_dflt_coal()
14573 coal->coal_ticks_irq = 2; in bnxt_init_dflt_coal()
14574 coal->coal_bufs_irq = 2; in bnxt_init_dflt_coal()
14575 coal->bufs_per_record = 1; in bnxt_init_dflt_coal()
14576 coal->flags = flags; in bnxt_init_dflt_coal()
14578 bp->stats_coal_ticks = BNXT_DEF_STATS_COAL_TICKS; in bnxt_init_dflt_coal()
14581 /* FW that pre-reserves 1 VNIC per function */
14586 if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS) && in bnxt_fw_pre_resv_vnics()
14589 if ((bp->flags & BNXT_FLAG_CHIP_P5_PLUS) && in bnxt_fw_pre_resv_vnics()
14599 bp->fw_cap = 0; in bnxt_fw_init_one_p1()
14620 return -ENODEV; in bnxt_fw_init_one_p1()
14633 netdev_err(bp->dev, "hwrm query capability failure rc: %x\n", in bnxt_fw_init_one_p2()
14635 return -ENODEV; in bnxt_fw_init_one_p2()
14640 netdev_warn(bp->dev, "hwrm query adv flow mgnt failure rc: %d\n", in bnxt_fw_init_one_p2()
14644 netdev_warn(bp->dev, "no memory for firmware error recovery\n"); in bnxt_fw_init_one_p2()
14648 netdev_warn(bp->dev, "hwrm query error recovery failure rc: %d\n", in bnxt_fw_init_one_p2()
14654 return -ENODEV; in bnxt_fw_init_one_p2()
14658 netdev_warn(bp->dev, "crash dump mem alloc failure rc: %d\n", in bnxt_fw_init_one_p2()
14664 netdev_warn(bp->dev, in bnxt_fw_init_one_p2()
14670 bp->fw_cap |= BNXT_FW_CAP_PRE_RESV_VNICS; in bnxt_fw_init_one_p2()
14676 if (bp->fw_cap & BNXT_FW_CAP_PTP) in bnxt_fw_init_one_p2()
14685 bp->rss_cap &= ~BNXT_RSS_CAP_UDP_RSS_CAP; in bnxt_set_dflt_rss_hash_type()
14686 bp->rss_hash_cfg = VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4 | in bnxt_set_dflt_rss_hash_type()
14690 if (bp->rss_cap & BNXT_RSS_CAP_RSS_HASH_TYPE_DELTA) in bnxt_set_dflt_rss_hash_type()
14691 bp->rss_hash_delta = bp->rss_hash_cfg; in bnxt_set_dflt_rss_hash_type()
14692 if (BNXT_CHIP_P4_PLUS(bp) && bp->hwrm_spec_code >= 0x10501) { in bnxt_set_dflt_rss_hash_type()
14693 bp->rss_cap |= BNXT_RSS_CAP_UDP_RSS_CAP; in bnxt_set_dflt_rss_hash_type()
14694 bp->rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4 | in bnxt_set_dflt_rss_hash_type()
14701 struct net_device *dev = bp->dev; in bnxt_set_dflt_rfs()
14703 dev->hw_features &= ~NETIF_F_NTUPLE; in bnxt_set_dflt_rfs()
14704 dev->features &= ~NETIF_F_NTUPLE; in bnxt_set_dflt_rfs()
14705 bp->flags &= ~BNXT_FLAG_RFS; in bnxt_set_dflt_rfs()
14707 dev->hw_features |= NETIF_F_NTUPLE; in bnxt_set_dflt_rfs()
14709 bp->flags |= BNXT_FLAG_RFS; in bnxt_set_dflt_rfs()
14710 dev->features |= NETIF_F_NTUPLE; in bnxt_set_dflt_rfs()
14717 struct pci_dev *pdev = bp->pdev; in bnxt_fw_init_one_p3()
14723 if (bp->flags & BNXT_FLAG_WOL_CAP) in bnxt_fw_init_one_p3()
14724 device_set_wakeup_enable(&pdev->dev, bp->wol); in bnxt_fw_init_one_p3()
14726 device_set_wakeup_capable(&pdev->dev, false); in bnxt_fw_init_one_p3()
14740 netdev_err(bp->dev, "Firmware init phase 1 failed\n"); in bnxt_fw_init_one()
14745 netdev_err(bp->dev, "Firmware init phase 2 failed\n"); in bnxt_fw_init_one()
14751 rc = bnxt_approve_mac(bp, bp->dev->dev_addr, false); in bnxt_fw_init_one()
14761 struct bnxt_fw_health *fw_health = bp->fw_health; in bnxt_fw_reset_writel()
14762 u32 reg = fw_health->fw_reset_seq_regs[reg_idx]; in bnxt_fw_reset_writel()
14763 u32 val = fw_health->fw_reset_seq_vals[reg_idx]; in bnxt_fw_reset_writel()
14766 delay_msecs = fw_health->fw_reset_seq_delay_msec[reg_idx]; in bnxt_fw_reset_writel()
14771 pci_write_config_dword(bp->pdev, reg_off, val); in bnxt_fw_reset_writel()
14775 bp->bar0 + BNXT_GRCPF_REG_WINDOW_BASE_OUT + 4); in bnxt_fw_reset_writel()
14779 writel(val, bp->bar0 + reg_off); in bnxt_fw_reset_writel()
14782 writel(val, bp->bar1 + reg_off); in bnxt_fw_reset_writel()
14786 pci_read_config_dword(bp->pdev, 0, &val); in bnxt_fw_reset_writel()
14797 if (~bp->fw_cap & BNXT_FW_CAP_HOT_RESET_IF) in bnxt_hwrm_reset_permitted()
14803 req->fid = cpu_to_le16(0xffff); in bnxt_hwrm_reset_permitted()
14806 result = !!(le16_to_cpu(resp->flags) & in bnxt_hwrm_reset_permitted()
14814 struct bnxt_fw_health *fw_health = bp->fw_health; in bnxt_reset_all()
14817 if (bp->fw_cap & BNXT_FW_CAP_ERR_RECOVER_RELOAD) { in bnxt_reset_all()
14819 bp->fw_reset_timestamp = jiffies; in bnxt_reset_all()
14823 if (fw_health->flags & ERROR_RECOVERY_QCFG_RESP_FLAGS_HOST) { in bnxt_reset_all()
14824 for (i = 0; i < fw_health->fw_reset_seq_cnt; i++) in bnxt_reset_all()
14826 } else if (fw_health->flags & ERROR_RECOVERY_QCFG_RESP_FLAGS_CO_CPU) { in bnxt_reset_all()
14831 req->target_id = cpu_to_le16(HWRM_TARGET_ID_KONG); in bnxt_reset_all()
14832 req->embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_CHIP; in bnxt_reset_all()
14833 req->selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTASAP; in bnxt_reset_all()
14834 req->flags = FW_RESET_REQ_FLAGS_RESET_GRACEFUL; in bnxt_reset_all()
14837 if (rc != -ENODEV) in bnxt_reset_all()
14838 netdev_warn(bp->dev, "Unable to reset FW rc=%d\n", rc); in bnxt_reset_all()
14840 bp->fw_reset_timestamp = jiffies; in bnxt_reset_all()
14845 return time_after(jiffies, bp->fw_reset_timestamp + in bnxt_fw_reset_timeout()
14846 (bp->fw_reset_max_dsecs * HZ / 10)); in bnxt_fw_reset_timeout()
14851 clear_bit(BNXT_STATE_IN_FW_RESET, &bp->state); in bnxt_fw_reset_abort()
14852 if (bp->fw_reset_state != BNXT_FW_RESET_STATE_POLL_VF) in bnxt_fw_reset_abort()
14854 bp->fw_reset_state = BNXT_FW_RESET_STATE_ABORT; in bnxt_fw_reset_abort()
14855 netif_close(bp->dev); in bnxt_fw_reset_abort()
14863 if (!test_bit(BNXT_STATE_IN_FW_RESET, &bp->state)) { in bnxt_fw_reset_task()
14864 netdev_err(bp->dev, "bnxt_fw_reset_task() called when not in fw reset mode!\n"); in bnxt_fw_reset_task()
14868 switch (bp->fw_reset_state) { in bnxt_fw_reset_task()
14874 …netdev_err(bp->dev, "Firmware reset aborted, subsequent func_qcfg cmd failed, rc = %d, %d msecs si… in bnxt_fw_reset_task()
14875 n, jiffies_to_msecs(jiffies - in bnxt_fw_reset_task()
14876 bp->fw_reset_timestamp)); in bnxt_fw_reset_task()
14880 clear_bit(BNXT_STATE_IN_FW_RESET, &bp->state); in bnxt_fw_reset_task()
14881 bp->fw_reset_state = 0; in bnxt_fw_reset_task()
14882 netdev_err(bp->dev, "Firmware reset aborted, bnxt_get_registered_vfs() returns %d\n", in bnxt_fw_reset_task()
14889 bp->fw_reset_timestamp = jiffies; in bnxt_fw_reset_task()
14890 netdev_lock(bp->dev); in bnxt_fw_reset_task()
14891 if (test_bit(BNXT_STATE_ABORT_ERR, &bp->state)) { in bnxt_fw_reset_task()
14893 netdev_unlock(bp->dev); in bnxt_fw_reset_task()
14897 if (bp->fw_cap & BNXT_FW_CAP_ERR_RECOVER_RELOAD) { in bnxt_fw_reset_task()
14898 bp->fw_reset_state = BNXT_FW_RESET_STATE_POLL_FW_DOWN; in bnxt_fw_reset_task()
14901 bp->fw_reset_state = BNXT_FW_RESET_STATE_ENABLE_DEV; in bnxt_fw_reset_task()
14902 tmo = bp->fw_reset_min_dsecs * HZ / 10; in bnxt_fw_reset_task()
14904 netdev_unlock(bp->dev); in bnxt_fw_reset_task()
14918 if (!bp->fw_health->primary) { in bnxt_fw_reset_task()
14919 u32 wait_dsecs = bp->fw_health->normal_func_wait_dsecs; in bnxt_fw_reset_task()
14921 bp->fw_reset_state = BNXT_FW_RESET_STATE_ENABLE_DEV; in bnxt_fw_reset_task()
14925 bp->fw_reset_state = BNXT_FW_RESET_STATE_RESET_FW; in bnxt_fw_reset_task()
14930 bp->fw_reset_state = BNXT_FW_RESET_STATE_ENABLE_DEV; in bnxt_fw_reset_task()
14931 bnxt_queue_fw_reset_work(bp, bp->fw_reset_min_dsecs * HZ / 10); in bnxt_fw_reset_task()
14935 if (test_bit(BNXT_STATE_FW_FATAL_COND, &bp->state) && in bnxt_fw_reset_task()
14936 !bp->fw_reset_min_dsecs) { in bnxt_fw_reset_task()
14939 pci_read_config_word(bp->pdev, PCI_SUBSYSTEM_ID, &val); in bnxt_fw_reset_task()
14942 netdev_err(bp->dev, "Firmware reset aborted, PCI config space invalid\n"); in bnxt_fw_reset_task()
14943 rc = -ETIMEDOUT; in bnxt_fw_reset_task()
14950 clear_bit(BNXT_STATE_FW_FATAL_COND, &bp->state); in bnxt_fw_reset_task()
14951 clear_bit(BNXT_STATE_FW_NON_FATAL_COND, &bp->state); in bnxt_fw_reset_task()
14952 if (test_and_clear_bit(BNXT_STATE_FW_ACTIVATE_RESET, &bp->state) && in bnxt_fw_reset_task()
14953 !test_bit(BNXT_STATE_FW_ACTIVATE, &bp->state)) in bnxt_fw_reset_task()
14955 if (pci_enable_device(bp->pdev)) { in bnxt_fw_reset_task()
14956 netdev_err(bp->dev, "Cannot re-enable PCI device\n"); in bnxt_fw_reset_task()
14957 rc = -ENODEV; in bnxt_fw_reset_task()
14960 pci_set_master(bp->pdev); in bnxt_fw_reset_task()
14961 bp->fw_reset_state = BNXT_FW_RESET_STATE_POLL_FW; in bnxt_fw_reset_task()
14964 bp->hwrm_cmd_timeout = SHORT_HWRM_CMD_TIMEOUT; in bnxt_fw_reset_task()
14968 netdev_err(bp->dev, "Firmware reset aborted\n"); in bnxt_fw_reset_task()
14974 bp->hwrm_cmd_timeout = DFLT_HWRM_CMD_TIMEOUT; in bnxt_fw_reset_task()
14975 bp->fw_reset_state = BNXT_FW_RESET_STATE_OPENING; in bnxt_fw_reset_task()
14982 netdev_lock(bp->dev); in bnxt_fw_reset_task()
14983 rc = bnxt_open(bp->dev); in bnxt_fw_reset_task()
14985 netdev_err(bp->dev, "bnxt_open() failed during FW reset\n"); in bnxt_fw_reset_task()
14987 netdev_unlock(bp->dev); in bnxt_fw_reset_task()
14992 if ((bp->fw_cap & BNXT_FW_CAP_ERROR_RECOVERY) && in bnxt_fw_reset_task()
14993 bp->fw_health->enabled) { in bnxt_fw_reset_task()
14994 bp->fw_health->last_fw_reset_cnt = in bnxt_fw_reset_task()
14997 bp->fw_reset_state = 0; in bnxt_fw_reset_task()
15000 clear_bit(BNXT_STATE_IN_FW_RESET, &bp->state); in bnxt_fw_reset_task()
15002 clear_bit(BNXT_STATE_FW_ACTIVATE, &bp->state); in bnxt_fw_reset_task()
15003 if (test_and_clear_bit(BNXT_STATE_RECOVER, &bp->state)) { in bnxt_fw_reset_task()
15007 netdev_unlock(bp->dev); in bnxt_fw_reset_task()
15011 netdev_lock(bp->dev); in bnxt_fw_reset_task()
15014 netdev_unlock(bp->dev); in bnxt_fw_reset_task()
15020 if (bp->fw_health->status_reliable || in bnxt_fw_reset_task()
15021 (bp->fw_cap & BNXT_FW_CAP_ERROR_RECOVERY)) { in bnxt_fw_reset_task()
15024 netdev_err(bp->dev, "fw_health_status 0x%x\n", sts); in bnxt_fw_reset_task()
15027 netdev_lock(bp->dev); in bnxt_fw_reset_task()
15029 netdev_unlock(bp->dev); in bnxt_fw_reset_task()
15039 SET_NETDEV_DEV(dev, &pdev->dev); in bnxt_init_board()
15041 /* enable device (incl. PCI PM wakeup), and bus-mastering */ in bnxt_init_board()
15044 dev_err(&pdev->dev, "Cannot enable PCI device, aborting\n"); in bnxt_init_board()
15049 dev_err(&pdev->dev, in bnxt_init_board()
15051 rc = -ENODEV; in bnxt_init_board()
15057 dev_err(&pdev->dev, "Cannot obtain PCI resources, aborting\n"); in bnxt_init_board()
15061 if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)) != 0 && in bnxt_init_board()
15062 dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)) != 0) { in bnxt_init_board()
15063 dev_err(&pdev->dev, "System does not support DMA, aborting\n"); in bnxt_init_board()
15064 rc = -EIO; in bnxt_init_board()
15070 bp->dev = dev; in bnxt_init_board()
15071 bp->pdev = pdev; in bnxt_init_board()
15073 /* Doorbell BAR bp->bar1 is mapped after bnxt_fw_init_one_p2() in bnxt_init_board()
15076 bp->bar0 = pci_ioremap_bar(pdev, 0); in bnxt_init_board()
15077 if (!bp->bar0) { in bnxt_init_board()
15078 dev_err(&pdev->dev, "Cannot map device registers, aborting\n"); in bnxt_init_board()
15079 rc = -ENOMEM; in bnxt_init_board()
15083 bp->bar2 = pci_ioremap_bar(pdev, 4); in bnxt_init_board()
15084 if (!bp->bar2) { in bnxt_init_board()
15085 dev_err(&pdev->dev, "Cannot map bar4 registers, aborting\n"); in bnxt_init_board()
15086 rc = -ENOMEM; in bnxt_init_board()
15090 INIT_WORK(&bp->sp_task, bnxt_sp_task); in bnxt_init_board()
15091 INIT_DELAYED_WORK(&bp->fw_reset_task, bnxt_fw_reset_task); in bnxt_init_board()
15093 spin_lock_init(&bp->ntp_fltr_lock); in bnxt_init_board()
15095 spin_lock_init(&bp->db_lock); in bnxt_init_board()
15098 bp->rx_ring_size = BNXT_DEFAULT_RX_RING_SIZE; in bnxt_init_board()
15099 bp->tx_ring_size = BNXT_DEFAULT_TX_RING_SIZE; in bnxt_init_board()
15101 timer_setup(&bp->timer, bnxt_timer, 0); in bnxt_init_board()
15102 bp->current_interval = BNXT_TIMER_INTERVAL; in bnxt_init_board()
15104 bp->vxlan_fw_dst_port_id = INVALID_HW_RING_ID; in bnxt_init_board()
15105 bp->nge_fw_dst_port_id = INVALID_HW_RING_ID; in bnxt_init_board()
15107 clear_bit(BNXT_STATE_OPEN, &bp->state); in bnxt_init_board()
15129 if (!is_valid_ether_addr(addr->sa_data)) in bnxt_change_mac_addr()
15130 return -EADDRNOTAVAIL; in bnxt_change_mac_addr()
15132 if (ether_addr_equal(addr->sa_data, dev->dev_addr)) in bnxt_change_mac_addr()
15135 rc = bnxt_approve_mac(bp, addr->sa_data, true); in bnxt_change_mac_addr()
15139 eth_hw_addr_set(dev, addr->sa_data); in bnxt_change_mac_addr()
15158 WRITE_ONCE(dev->mtu, new_mtu); in bnxt_change_mtu()
15160 /* MTU change may change the AGG ring settings if an XDP multi-buffer in bnxt_change_mtu()
15164 if (READ_ONCE(bp->xdp_prog)) in bnxt_change_mtu()
15181 if (tc > bp->max_tc) { in bnxt_setup_mq_tc()
15183 tc, bp->max_tc); in bnxt_setup_mq_tc()
15184 return -EINVAL; in bnxt_setup_mq_tc()
15187 if (bp->num_tc == tc) in bnxt_setup_mq_tc()
15190 if (bp->flags & BNXT_FLAG_SHARED_RINGS) in bnxt_setup_mq_tc()
15193 rc = bnxt_check_rings(bp, bp->tx_nr_rings_per_tc, bp->rx_nr_rings, in bnxt_setup_mq_tc()
15194 sh, tc, bp->tx_nr_rings_xdp); in bnxt_setup_mq_tc()
15198 /* Needs to close the device and do hw resource re-allocations */ in bnxt_setup_mq_tc()
15199 if (netif_running(bp->dev)) in bnxt_setup_mq_tc()
15203 bp->tx_nr_rings = bp->tx_nr_rings_per_tc * tc; in bnxt_setup_mq_tc()
15205 bp->num_tc = tc; in bnxt_setup_mq_tc()
15207 bp->tx_nr_rings = bp->tx_nr_rings_per_tc; in bnxt_setup_mq_tc()
15209 bp->num_tc = 0; in bnxt_setup_mq_tc()
15211 bp->tx_nr_rings += bp->tx_nr_rings_xdp; in bnxt_setup_mq_tc()
15212 tx_cp = bnxt_num_tx_to_cp(bp, bp->tx_nr_rings); in bnxt_setup_mq_tc()
15213 bp->cp_nr_rings = sh ? max_t(int, tx_cp, bp->rx_nr_rings) : in bnxt_setup_mq_tc()
15214 tx_cp + bp->rx_nr_rings; in bnxt_setup_mq_tc()
15216 if (netif_running(bp->dev)) in bnxt_setup_mq_tc()
15228 !tc_cls_can_offload_and_chain0(bp->dev, type_data)) in bnxt_setup_tc_block_cb()
15229 return -EOPNOTSUPP; in bnxt_setup_tc_block_cb()
15233 return bnxt_tc_setup_flower(bp, bp->pf.fw_fid, type_data); in bnxt_setup_tc_block_cb()
15235 return -EOPNOTSUPP; in bnxt_setup_tc_block_cb()
15255 mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS; in bnxt_setup_tc()
15257 return bnxt_setup_mq_tc(dev, mqprio->num_tc); in bnxt_setup_tc()
15260 return -EOPNOTSUPP; in bnxt_setup_tc()
15272 vnic = &bp->vnic_info[BNXT_VNIC_DEFAULT]; in bnxt_get_ntp_filter_idx()
15273 return bnxt_toeplitz(bp, fkeys, (void *)vnic->rss_hash_key); in bnxt_get_ntp_filter_idx()
15282 spin_lock_bh(&bp->ntp_fltr_lock); in bnxt_insert_ntp_filter()
15283 bit_id = bitmap_find_free_region(bp->ntp_fltr_bmap, bp->max_fltr, 0); in bnxt_insert_ntp_filter()
15285 spin_unlock_bh(&bp->ntp_fltr_lock); in bnxt_insert_ntp_filter()
15286 return -ENOMEM; in bnxt_insert_ntp_filter()
15289 fltr->base.sw_id = (u16)bit_id; in bnxt_insert_ntp_filter()
15290 fltr->base.type = BNXT_FLTR_TYPE_NTUPLE; in bnxt_insert_ntp_filter()
15291 fltr->base.flags |= BNXT_ACT_RING_DST; in bnxt_insert_ntp_filter()
15292 head = &bp->ntp_fltr_hash_tbl[idx]; in bnxt_insert_ntp_filter()
15293 hlist_add_head_rcu(&fltr->base.hash, head); in bnxt_insert_ntp_filter()
15294 set_bit(BNXT_FLTR_INSERTED, &fltr->base.state); in bnxt_insert_ntp_filter()
15295 bnxt_insert_usr_fltr(bp, &fltr->base); in bnxt_insert_ntp_filter()
15296 bp->ntp_fltr_count++; in bnxt_insert_ntp_filter()
15297 spin_unlock_bh(&bp->ntp_fltr_lock); in bnxt_insert_ntp_filter()
15304 struct bnxt_flow_masks *masks1 = &f1->fmasks; in bnxt_fltr_match()
15305 struct bnxt_flow_masks *masks2 = &f2->fmasks; in bnxt_fltr_match()
15306 struct flow_keys *keys1 = &f1->fkeys; in bnxt_fltr_match()
15307 struct flow_keys *keys2 = &f2->fkeys; in bnxt_fltr_match()
15309 if (keys1->basic.n_proto != keys2->basic.n_proto || in bnxt_fltr_match()
15310 keys1->basic.ip_proto != keys2->basic.ip_proto) in bnxt_fltr_match()
15313 if (keys1->basic.n_proto == htons(ETH_P_IP)) { in bnxt_fltr_match()
15314 if (keys1->addrs.v4addrs.src != keys2->addrs.v4addrs.src || in bnxt_fltr_match()
15315 masks1->addrs.v4addrs.src != masks2->addrs.v4addrs.src || in bnxt_fltr_match()
15316 keys1->addrs.v4addrs.dst != keys2->addrs.v4addrs.dst || in bnxt_fltr_match()
15317 masks1->addrs.v4addrs.dst != masks2->addrs.v4addrs.dst) in bnxt_fltr_match()
15320 if (!ipv6_addr_equal(&keys1->addrs.v6addrs.src, in bnxt_fltr_match()
15321 &keys2->addrs.v6addrs.src) || in bnxt_fltr_match()
15322 !ipv6_addr_equal(&masks1->addrs.v6addrs.src, in bnxt_fltr_match()
15323 &masks2->addrs.v6addrs.src) || in bnxt_fltr_match()
15324 !ipv6_addr_equal(&keys1->addrs.v6addrs.dst, in bnxt_fltr_match()
15325 &keys2->addrs.v6addrs.dst) || in bnxt_fltr_match()
15326 !ipv6_addr_equal(&masks1->addrs.v6addrs.dst, in bnxt_fltr_match()
15327 &masks2->addrs.v6addrs.dst)) in bnxt_fltr_match()
15331 return keys1->ports.src == keys2->ports.src && in bnxt_fltr_match()
15332 masks1->ports.src == masks2->ports.src && in bnxt_fltr_match()
15333 keys1->ports.dst == keys2->ports.dst && in bnxt_fltr_match()
15334 masks1->ports.dst == masks2->ports.dst && in bnxt_fltr_match()
15335 keys1->control.flags == keys2->control.flags && in bnxt_fltr_match()
15336 f1->l2_fltr == f2->l2_fltr; in bnxt_fltr_match()
15346 head = &bp->ntp_fltr_hash_tbl[idx]; in bnxt_lookup_ntp_filter_from_idx()
15366 if (ether_addr_equal(dev->dev_addr, eth->h_dest)) { in bnxt_rx_flow_steer()
15367 l2_fltr = bp->vnic_info[BNXT_VNIC_DEFAULT].l2_filters[0]; in bnxt_rx_flow_steer()
15368 atomic_inc(&l2_fltr->refcnt); in bnxt_rx_flow_steer()
15372 ether_addr_copy(key.dst_mac_addr, eth->h_dest); in bnxt_rx_flow_steer()
15376 return -EINVAL; in bnxt_rx_flow_steer()
15377 if (l2_fltr->base.flags & BNXT_ACT_FUNC_DST) { in bnxt_rx_flow_steer()
15379 return -EINVAL; in bnxt_rx_flow_steer()
15385 return -ENOMEM; in bnxt_rx_flow_steer()
15388 fkeys = &new_fltr->fkeys; in bnxt_rx_flow_steer()
15390 rc = -EPROTONOSUPPORT; in bnxt_rx_flow_steer()
15394 if ((fkeys->basic.n_proto != htons(ETH_P_IP) && in bnxt_rx_flow_steer()
15395 fkeys->basic.n_proto != htons(ETH_P_IPV6)) || in bnxt_rx_flow_steer()
15396 ((fkeys->basic.ip_proto != IPPROTO_TCP) && in bnxt_rx_flow_steer()
15397 (fkeys->basic.ip_proto != IPPROTO_UDP))) { in bnxt_rx_flow_steer()
15398 rc = -EPROTONOSUPPORT; in bnxt_rx_flow_steer()
15401 new_fltr->fmasks = BNXT_FLOW_IPV4_MASK_ALL; in bnxt_rx_flow_steer()
15402 if (fkeys->basic.n_proto == htons(ETH_P_IPV6)) { in bnxt_rx_flow_steer()
15403 if (bp->hwrm_spec_code < 0x10601) { in bnxt_rx_flow_steer()
15404 rc = -EPROTONOSUPPORT; in bnxt_rx_flow_steer()
15407 new_fltr->fmasks = BNXT_FLOW_IPV6_MASK_ALL; in bnxt_rx_flow_steer()
15409 flags = fkeys->control.flags; in bnxt_rx_flow_steer()
15411 bp->hwrm_spec_code < 0x10601) || (flags & FLOW_DIS_IS_FRAGMENT)) { in bnxt_rx_flow_steer()
15412 rc = -EPROTONOSUPPORT; in bnxt_rx_flow_steer()
15415 new_fltr->l2_fltr = l2_fltr; in bnxt_rx_flow_steer()
15421 rc = fltr->base.sw_id; in bnxt_rx_flow_steer()
15427 new_fltr->flow_id = flow_id; in bnxt_rx_flow_steer()
15428 new_fltr->base.rxq = rxq_index; in bnxt_rx_flow_steer()
15432 return new_fltr->base.sw_id; in bnxt_rx_flow_steer()
15444 spin_lock_bh(&bp->ntp_fltr_lock); in bnxt_del_ntp_filter()
15445 if (!test_and_clear_bit(BNXT_FLTR_INSERTED, &fltr->base.state)) { in bnxt_del_ntp_filter()
15446 spin_unlock_bh(&bp->ntp_fltr_lock); in bnxt_del_ntp_filter()
15449 hlist_del_rcu(&fltr->base.hash); in bnxt_del_ntp_filter()
15450 bnxt_del_one_usr_fltr(bp, &fltr->base); in bnxt_del_ntp_filter()
15451 bp->ntp_fltr_count--; in bnxt_del_ntp_filter()
15452 spin_unlock_bh(&bp->ntp_fltr_lock); in bnxt_del_ntp_filter()
15453 bnxt_del_l2_filter(bp, fltr->l2_fltr); in bnxt_del_ntp_filter()
15454 clear_bit(fltr->base.sw_id, bp->ntp_fltr_bmap); in bnxt_del_ntp_filter()
15469 head = &bp->ntp_fltr_hash_tbl[i]; in bnxt_cfg_ntp_filters()
15473 if (test_bit(BNXT_FLTR_VALID, &fltr->base.state)) { in bnxt_cfg_ntp_filters()
15474 if (fltr->base.flags & BNXT_ACT_NO_AGING) in bnxt_cfg_ntp_filters()
15476 if (rps_may_expire_flow(bp->dev, fltr->base.rxq, in bnxt_cfg_ntp_filters()
15477 fltr->flow_id, in bnxt_cfg_ntp_filters()
15478 fltr->base.sw_id)) { in bnxt_cfg_ntp_filters()
15489 set_bit(BNXT_FLTR_VALID, &fltr->base.state); in bnxt_cfg_ntp_filters()
15505 if (ti->type == UDP_TUNNEL_TYPE_VXLAN) in bnxt_udp_tunnel_set_port()
15507 else if (ti->type == UDP_TUNNEL_TYPE_GENEVE) in bnxt_udp_tunnel_set_port()
15512 return bnxt_hwrm_tunnel_dst_port_alloc(bp, ti->port, cmd); in bnxt_udp_tunnel_set_port()
15521 if (ti->type == UDP_TUNNEL_TYPE_VXLAN) in bnxt_udp_tunnel_unset_port()
15523 else if (ti->type == UDP_TUNNEL_TYPE_GENEVE) in bnxt_udp_tunnel_unset_port()
15558 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, bp->br_mode, 0, 0, in bnxt_bridge_getlink()
15569 if (bp->hwrm_spec_code < 0x10708 || !BNXT_SINGLE_PF(bp)) in bnxt_bridge_setlink()
15570 return -EOPNOTSUPP; in bnxt_bridge_setlink()
15574 return -EINVAL; in bnxt_bridge_setlink()
15580 if (mode == bp->br_mode) in bnxt_bridge_setlink()
15585 bp->br_mode = mode; in bnxt_bridge_setlink()
15596 if (bp->eswitch_mode != DEVLINK_ESWITCH_MODE_SWITCHDEV) in bnxt_get_port_parent_id()
15597 return -EOPNOTSUPP; in bnxt_get_port_parent_id()
15599 /* The PF and it's VF-reps only support the switchdev framework */ in bnxt_get_port_parent_id()
15600 if (!BNXT_PF(bp) || !(bp->flags & BNXT_FLAG_DSN_VALID)) in bnxt_get_port_parent_id()
15601 return -EOPNOTSUPP; in bnxt_get_port_parent_id()
15603 ppid->id_len = sizeof(bp->dsn); in bnxt_get_port_parent_id()
15604 memcpy(ppid->id, bp->dsn, ppid->id_len); in bnxt_get_port_parent_id()
15649 if (!bp->bnapi) in bnxt_get_queue_stats_rx()
15652 cpr = &bp->bnapi[i]->cp_ring; in bnxt_get_queue_stats_rx()
15653 sw = cpr->stats.sw_stats; in bnxt_get_queue_stats_rx()
15655 stats->packets = 0; in bnxt_get_queue_stats_rx()
15656 stats->packets += BNXT_GET_RING_STATS64(sw, rx_ucast_pkts); in bnxt_get_queue_stats_rx()
15657 stats->packets += BNXT_GET_RING_STATS64(sw, rx_mcast_pkts); in bnxt_get_queue_stats_rx()
15658 stats->packets += BNXT_GET_RING_STATS64(sw, rx_bcast_pkts); in bnxt_get_queue_stats_rx()
15660 stats->bytes = 0; in bnxt_get_queue_stats_rx()
15661 stats->bytes += BNXT_GET_RING_STATS64(sw, rx_ucast_bytes); in bnxt_get_queue_stats_rx()
15662 stats->bytes += BNXT_GET_RING_STATS64(sw, rx_mcast_bytes); in bnxt_get_queue_stats_rx()
15663 stats->bytes += BNXT_GET_RING_STATS64(sw, rx_bcast_bytes); in bnxt_get_queue_stats_rx()
15665 stats->alloc_fail = cpr->sw_stats->rx.rx_oom_discards; in bnxt_get_queue_stats_rx()
15675 if (!bp->tx_ring) in bnxt_get_queue_stats_tx()
15678 bnapi = bp->tx_ring[bp->tx_ring_map[i]].bnapi; in bnxt_get_queue_stats_tx()
15679 sw = bnapi->cp_ring.stats.sw_stats; in bnxt_get_queue_stats_tx()
15681 stats->packets = 0; in bnxt_get_queue_stats_tx()
15682 stats->packets += BNXT_GET_RING_STATS64(sw, tx_ucast_pkts); in bnxt_get_queue_stats_tx()
15683 stats->packets += BNXT_GET_RING_STATS64(sw, tx_mcast_pkts); in bnxt_get_queue_stats_tx()
15684 stats->packets += BNXT_GET_RING_STATS64(sw, tx_bcast_pkts); in bnxt_get_queue_stats_tx()
15686 stats->bytes = 0; in bnxt_get_queue_stats_tx()
15687 stats->bytes += BNXT_GET_RING_STATS64(sw, tx_ucast_bytes); in bnxt_get_queue_stats_tx()
15688 stats->bytes += BNXT_GET_RING_STATS64(sw, tx_mcast_bytes); in bnxt_get_queue_stats_tx()
15689 stats->bytes += BNXT_GET_RING_STATS64(sw, tx_bcast_bytes); in bnxt_get_queue_stats_tx()
15698 rx->packets = bp->net_stats_prev.rx_packets; in bnxt_get_base_stats()
15699 rx->bytes = bp->net_stats_prev.rx_bytes; in bnxt_get_base_stats()
15700 rx->alloc_fail = bp->ring_err_stats_prev.rx_total_oom_discards; in bnxt_get_base_stats()
15702 tx->packets = bp->net_stats_prev.tx_packets; in bnxt_get_base_stats()
15703 tx->bytes = bp->net_stats_prev.tx_bytes; in bnxt_get_base_stats()
15719 if (!bp->rx_ring) in bnxt_queue_mem_alloc()
15720 return -ENETDOWN; in bnxt_queue_mem_alloc()
15722 rxr = &bp->rx_ring[idx]; in bnxt_queue_mem_alloc()
15728 clone->rx_prod = 0; in bnxt_queue_mem_alloc()
15729 clone->rx_agg_prod = 0; in bnxt_queue_mem_alloc()
15730 clone->rx_sw_agg_prod = 0; in bnxt_queue_mem_alloc()
15731 clone->rx_next_cons = 0; in bnxt_queue_mem_alloc()
15733 rc = bnxt_alloc_rx_page_pool(bp, clone, rxr->page_pool->p.nid); in bnxt_queue_mem_alloc()
15737 rc = xdp_rxq_info_reg(&clone->xdp_rxq, bp->dev, idx, 0); in bnxt_queue_mem_alloc()
15741 rc = xdp_rxq_info_reg_mem_model(&clone->xdp_rxq, in bnxt_queue_mem_alloc()
15743 clone->page_pool); in bnxt_queue_mem_alloc()
15747 ring = &clone->rx_ring_struct; in bnxt_queue_mem_alloc()
15748 rc = bnxt_alloc_ring(bp, &ring->ring_mem); in bnxt_queue_mem_alloc()
15752 if (bp->flags & BNXT_FLAG_AGG_RINGS) { in bnxt_queue_mem_alloc()
15753 ring = &clone->rx_agg_ring_struct; in bnxt_queue_mem_alloc()
15754 rc = bnxt_alloc_ring(bp, &ring->ring_mem); in bnxt_queue_mem_alloc()
15763 if (bp->flags & BNXT_FLAG_TPA) { in bnxt_queue_mem_alloc()
15773 if (bp->flags & BNXT_FLAG_AGG_RINGS) in bnxt_queue_mem_alloc()
15775 if (bp->flags & BNXT_FLAG_TPA) in bnxt_queue_mem_alloc()
15783 bnxt_free_ring(bp, &clone->rx_agg_ring_struct.ring_mem); in bnxt_queue_mem_alloc()
15785 bnxt_free_ring(bp, &clone->rx_ring_struct.ring_mem); in bnxt_queue_mem_alloc()
15787 xdp_rxq_info_unreg(&clone->xdp_rxq); in bnxt_queue_mem_alloc()
15789 page_pool_destroy(clone->page_pool); in bnxt_queue_mem_alloc()
15791 page_pool_destroy(clone->head_pool); in bnxt_queue_mem_alloc()
15792 clone->page_pool = NULL; in bnxt_queue_mem_alloc()
15793 clone->head_pool = NULL; in bnxt_queue_mem_alloc()
15806 xdp_rxq_info_unreg(&rxr->xdp_rxq); in bnxt_queue_mem_free()
15808 page_pool_destroy(rxr->page_pool); in bnxt_queue_mem_free()
15810 page_pool_destroy(rxr->head_pool); in bnxt_queue_mem_free()
15811 rxr->page_pool = NULL; in bnxt_queue_mem_free()
15812 rxr->head_pool = NULL; in bnxt_queue_mem_free()
15814 ring = &rxr->rx_ring_struct; in bnxt_queue_mem_free()
15815 bnxt_free_ring(bp, &ring->ring_mem); in bnxt_queue_mem_free()
15817 ring = &rxr->rx_agg_ring_struct; in bnxt_queue_mem_free()
15818 bnxt_free_ring(bp, &ring->ring_mem); in bnxt_queue_mem_free()
15820 kfree(rxr->rx_agg_bmap); in bnxt_queue_mem_free()
15821 rxr->rx_agg_bmap = NULL; in bnxt_queue_mem_free()
15832 dst_ring = &dst->rx_ring_struct; in bnxt_copy_rx_ring()
15833 dst_rmem = &dst_ring->ring_mem; in bnxt_copy_rx_ring()
15834 src_ring = &src->rx_ring_struct; in bnxt_copy_rx_ring()
15835 src_rmem = &src_ring->ring_mem; in bnxt_copy_rx_ring()
15837 WARN_ON(dst_rmem->nr_pages != src_rmem->nr_pages); in bnxt_copy_rx_ring()
15838 WARN_ON(dst_rmem->page_size != src_rmem->page_size); in bnxt_copy_rx_ring()
15839 WARN_ON(dst_rmem->flags != src_rmem->flags); in bnxt_copy_rx_ring()
15840 WARN_ON(dst_rmem->depth != src_rmem->depth); in bnxt_copy_rx_ring()
15841 WARN_ON(dst_rmem->vmem_size != src_rmem->vmem_size); in bnxt_copy_rx_ring()
15842 WARN_ON(dst_rmem->ctx_mem != src_rmem->ctx_mem); in bnxt_copy_rx_ring()
15844 dst_rmem->pg_tbl = src_rmem->pg_tbl; in bnxt_copy_rx_ring()
15845 dst_rmem->pg_tbl_map = src_rmem->pg_tbl_map; in bnxt_copy_rx_ring()
15846 *dst_rmem->vmem = *src_rmem->vmem; in bnxt_copy_rx_ring()
15847 for (i = 0; i < dst_rmem->nr_pages; i++) { in bnxt_copy_rx_ring()
15848 dst_rmem->pg_arr[i] = src_rmem->pg_arr[i]; in bnxt_copy_rx_ring()
15849 dst_rmem->dma_arr[i] = src_rmem->dma_arr[i]; in bnxt_copy_rx_ring()
15852 if (!(bp->flags & BNXT_FLAG_AGG_RINGS)) in bnxt_copy_rx_ring()
15855 dst_ring = &dst->rx_agg_ring_struct; in bnxt_copy_rx_ring()
15856 dst_rmem = &dst_ring->ring_mem; in bnxt_copy_rx_ring()
15857 src_ring = &src->rx_agg_ring_struct; in bnxt_copy_rx_ring()
15858 src_rmem = &src_ring->ring_mem; in bnxt_copy_rx_ring()
15860 WARN_ON(dst_rmem->nr_pages != src_rmem->nr_pages); in bnxt_copy_rx_ring()
15861 WARN_ON(dst_rmem->page_size != src_rmem->page_size); in bnxt_copy_rx_ring()
15862 WARN_ON(dst_rmem->flags != src_rmem->flags); in bnxt_copy_rx_ring()
15863 WARN_ON(dst_rmem->depth != src_rmem->depth); in bnxt_copy_rx_ring()
15864 WARN_ON(dst_rmem->vmem_size != src_rmem->vmem_size); in bnxt_copy_rx_ring()
15865 WARN_ON(dst_rmem->ctx_mem != src_rmem->ctx_mem); in bnxt_copy_rx_ring()
15866 WARN_ON(dst->rx_agg_bmap_size != src->rx_agg_bmap_size); in bnxt_copy_rx_ring()
15868 dst_rmem->pg_tbl = src_rmem->pg_tbl; in bnxt_copy_rx_ring()
15869 dst_rmem->pg_tbl_map = src_rmem->pg_tbl_map; in bnxt_copy_rx_ring()
15870 *dst_rmem->vmem = *src_rmem->vmem; in bnxt_copy_rx_ring()
15871 for (i = 0; i < dst_rmem->nr_pages; i++) { in bnxt_copy_rx_ring()
15872 dst_rmem->pg_arr[i] = src_rmem->pg_arr[i]; in bnxt_copy_rx_ring()
15873 dst_rmem->dma_arr[i] = src_rmem->dma_arr[i]; in bnxt_copy_rx_ring()
15876 dst->rx_agg_bmap = src->rx_agg_bmap; in bnxt_copy_rx_ring()
15888 rxr = &bp->rx_ring[idx]; in bnxt_queue_start()
15891 rxr->rx_prod = clone->rx_prod; in bnxt_queue_start()
15892 rxr->rx_agg_prod = clone->rx_agg_prod; in bnxt_queue_start()
15893 rxr->rx_sw_agg_prod = clone->rx_sw_agg_prod; in bnxt_queue_start()
15894 rxr->rx_next_cons = clone->rx_next_cons; in bnxt_queue_start()
15895 rxr->rx_tpa = clone->rx_tpa; in bnxt_queue_start()
15896 rxr->rx_tpa_idx_map = clone->rx_tpa_idx_map; in bnxt_queue_start()
15897 rxr->page_pool = clone->page_pool; in bnxt_queue_start()
15898 rxr->head_pool = clone->head_pool; in bnxt_queue_start()
15899 rxr->xdp_rxq = clone->xdp_rxq; in bnxt_queue_start()
15903 bnapi = rxr->bnapi; in bnxt_queue_start()
15904 cpr = &bnapi->cp_ring; in bnxt_queue_start()
15913 if (bp->tph_mode) { in bnxt_queue_start()
15914 rc = bnxt_hwrm_cp_ring_alloc_p5(bp, rxr->rx_cpr); in bnxt_queue_start()
15923 bnxt_db_write(bp, &rxr->rx_db, rxr->rx_prod); in bnxt_queue_start()
15924 if (bp->flags & BNXT_FLAG_AGG_RINGS) in bnxt_queue_start()
15925 bnxt_db_write(bp, &rxr->rx_agg_db, rxr->rx_agg_prod); in bnxt_queue_start()
15927 if (bp->flags & BNXT_FLAG_SHARED_RINGS) { in bnxt_queue_start()
15933 napi_enable_locked(&bnapi->napi); in bnxt_queue_start()
15934 bnxt_db_nq_arm(bp, &cpr->cp_db, cpr->cp_raw_cons); in bnxt_queue_start()
15936 for (i = 0; i < bp->nr_vnics; i++) { in bnxt_queue_start()
15937 vnic = &bp->vnic_info[i]; in bnxt_queue_start()
15941 netdev_err(bp->dev, "hwrm vnic %d set rss failure rc: %d\n", in bnxt_queue_start()
15942 vnic->vnic_id, rc); in bnxt_queue_start()
15945 vnic->mru = bp->dev->mtu + ETH_HLEN + VLAN_HLEN; in bnxt_queue_start()
15953 netdev_err(bp->dev, "Unexpected HWRM error during queue start rc: %d\n", in bnxt_queue_start()
15955 napi_enable_locked(&bnapi->napi); in bnxt_queue_start()
15956 bnxt_db_nq_arm(bp, &cpr->cp_db, cpr->cp_raw_cons); in bnxt_queue_start()
15970 for (i = 0; i < bp->nr_vnics; i++) { in bnxt_queue_stop()
15971 vnic = &bp->vnic_info[i]; in bnxt_queue_stop()
15972 vnic->mru = 0; in bnxt_queue_stop()
15978 rxr = &bp->rx_ring[idx]; in bnxt_queue_stop()
15979 bnapi = rxr->bnapi; in bnxt_queue_stop()
15980 cpr = &bnapi->cp_ring; in bnxt_queue_stop()
15981 cancel_work_sync(&cpr->dim.work); in bnxt_queue_stop()
15984 page_pool_disable_direct_recycling(rxr->page_pool); in bnxt_queue_stop()
15986 page_pool_disable_direct_recycling(rxr->head_pool); in bnxt_queue_stop()
15988 if (bp->flags & BNXT_FLAG_SHARED_RINGS) in bnxt_queue_stop()
15995 napi_disable_locked(&bnapi->napi); in bnxt_queue_stop()
15997 if (bp->tph_mode) { in bnxt_queue_stop()
15998 bnxt_hwrm_cp_ring_free(bp, rxr->rx_cpr); in bnxt_queue_stop()
15999 bnxt_clear_one_cp_ring(bp, rxr->rx_cpr); in bnxt_queue_stop()
16001 bnxt_db_nq(bp, &cpr->cp_db, cpr->cp_raw_cons); in bnxt_queue_stop()
16034 WARN_ON(bp->num_rss_ctx); in bnxt_remove_one()
16035 clear_bit(BNXT_STATE_IN_FW_RESET, &bp->state); in bnxt_remove_one()
16037 cancel_work_sync(&bp->sp_task); in bnxt_remove_one()
16038 cancel_delayed_work_sync(&bp->fw_reset_task); in bnxt_remove_one()
16039 bp->sp_event = 0; in bnxt_remove_one()
16051 kfree(bp->ptp_cfg); in bnxt_remove_one()
16052 bp->ptp_cfg = NULL; in bnxt_remove_one()
16053 kfree(bp->fw_health); in bnxt_remove_one()
16054 bp->fw_health = NULL; in bnxt_remove_one()
16058 kfree(bp->rss_indir_tbl); in bnxt_remove_one()
16059 bp->rss_indir_tbl = NULL; in bnxt_remove_one()
16067 struct bnxt_link_info *link_info = &bp->link_info; in bnxt_probe_phy()
16069 bp->phy_flags = 0; in bnxt_probe_phy()
16072 netdev_err(bp->dev, "Probe phy can't get phy capabilities (rc: %x)\n", in bnxt_probe_phy()
16076 if (bp->phy_flags & BNXT_PHY_FL_NO_FCS) in bnxt_probe_phy()
16077 bp->dev->priv_flags |= IFF_SUPP_NOFCS; in bnxt_probe_phy()
16079 bp->dev->priv_flags &= ~IFF_SUPP_NOFCS; in bnxt_probe_phy()
16081 bp->mac_flags = 0; in bnxt_probe_phy()
16087 mutex_lock(&bp->link_lock); in bnxt_probe_phy()
16090 mutex_unlock(&bp->link_lock); in bnxt_probe_phy()
16091 netdev_err(bp->dev, "Probe phy can't update link (rc: %x)\n", in bnxt_probe_phy()
16099 if (link_info->auto_link_speeds && !link_info->support_auto_speeds) in bnxt_probe_phy()
16100 link_info->support_auto_speeds = link_info->support_speeds; in bnxt_probe_phy()
16103 mutex_unlock(&bp->link_lock); in bnxt_probe_phy()
16111 if (!pdev->msix_cap) in bnxt_get_max_irq()
16114 pci_read_config_word(pdev, pdev->msix_cap + PCI_MSIX_FLAGS, &ctrl); in bnxt_get_max_irq()
16121 struct bnxt_hw_resc *hw_resc = &bp->hw_resc; in _bnxt_get_max_rings()
16124 *max_tx = hw_resc->max_tx_rings; in _bnxt_get_max_rings()
16125 *max_rx = hw_resc->max_rx_rings; in _bnxt_get_max_rings()
16127 max_irq = min_t(int, bnxt_get_max_func_irqs(bp) - in _bnxt_get_max_rings()
16129 hw_resc->max_stat_ctxs - in _bnxt_get_max_rings()
16131 if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS)) in _bnxt_get_max_rings()
16133 max_ring_grps = hw_resc->max_hw_ring_grps; in _bnxt_get_max_rings()
16135 *max_cp -= 1; in _bnxt_get_max_rings()
16136 *max_rx -= 2; in _bnxt_get_max_rings()
16138 if (bp->flags & BNXT_FLAG_AGG_RINGS) in _bnxt_get_max_rings()
16140 if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) { in _bnxt_get_max_rings()
16162 return -ENOMEM; in bnxt_get_max_rings()
16173 if (rc && (bp->flags & BNXT_FLAG_AGG_RINGS)) { in bnxt_get_dflt_rings()
16175 bp->flags &= ~BNXT_FLAG_AGG_RINGS; in bnxt_get_dflt_rings()
16179 bp->flags |= BNXT_FLAG_AGG_RINGS; in bnxt_get_dflt_rings()
16182 bp->flags |= BNXT_FLAG_NO_AGG_RINGS; in bnxt_get_dflt_rings()
16183 bp->dev->hw_features &= ~(NETIF_F_LRO | NETIF_F_GRO_HW); in bnxt_get_dflt_rings()
16184 bp->dev->features &= ~(NETIF_F_LRO | NETIF_F_GRO_HW); in bnxt_get_dflt_rings()
16188 if (bp->flags & BNXT_FLAG_ROCE_CAP) { in bnxt_get_dflt_rings()
16200 max_cp -= BNXT_MIN_ROCE_CP_RINGS; in bnxt_get_dflt_rings()
16201 max_irq -= BNXT_MIN_ROCE_CP_RINGS; in bnxt_get_dflt_rings()
16202 max_stat -= BNXT_MIN_ROCE_STAT_CTXS; in bnxt_get_dflt_rings()
16217 bp->cp_nr_rings = min_t(int, bp->tx_nr_rings_per_tc, bp->rx_nr_rings); in bnxt_trim_dflt_sh_rings()
16218 bp->rx_nr_rings = bp->cp_nr_rings; in bnxt_trim_dflt_sh_rings()
16219 bp->tx_nr_rings_per_tc = bp->cp_nr_rings; in bnxt_trim_dflt_sh_rings()
16220 bp->tx_nr_rings = bp->tx_nr_rings_per_tc; in bnxt_trim_dflt_sh_rings()
16232 bp->flags |= BNXT_FLAG_SHARED_RINGS; in bnxt_set_dflt_rings()
16234 /* Reduce default rings on multi-port cards so that total default in bnxt_set_dflt_rings()
16237 if (bp->port_count > 1) { in bnxt_set_dflt_rings()
16239 max_t(int, num_online_cpus() / bp->port_count, 1); in bnxt_set_dflt_rings()
16246 bp->rx_nr_rings = min_t(int, dflt_rings, max_rx_rings); in bnxt_set_dflt_rings()
16247 bp->tx_nr_rings_per_tc = min_t(int, dflt_rings, max_tx_rings); in bnxt_set_dflt_rings()
16251 bp->cp_nr_rings = bp->tx_nr_rings_per_tc + bp->rx_nr_rings; in bnxt_set_dflt_rings()
16252 bp->tx_nr_rings = bp->tx_nr_rings_per_tc; in bnxt_set_dflt_rings()
16254 avail_msix = bnxt_get_max_func_irqs(bp) - bp->cp_nr_rings; in bnxt_set_dflt_rings()
16256 int ulp_num_msix = min(avail_msix, bp->ulp_num_msix_want); in bnxt_set_dflt_rings()
16263 if (rc && rc != -ENODEV) in bnxt_set_dflt_rings()
16264 netdev_warn(bp->dev, "Unable to reserve tx rings\n"); in bnxt_set_dflt_rings()
16265 bp->tx_nr_rings_per_tc = bp->tx_nr_rings; in bnxt_set_dflt_rings()
16269 /* Rings may have been trimmed, re-reserve the trimmed rings. */ in bnxt_set_dflt_rings()
16272 if (rc && rc != -ENODEV) in bnxt_set_dflt_rings()
16273 netdev_warn(bp->dev, "2nd rings reservation failed.\n"); in bnxt_set_dflt_rings()
16274 bp->tx_nr_rings_per_tc = bp->tx_nr_rings; in bnxt_set_dflt_rings()
16277 bp->rx_nr_rings++; in bnxt_set_dflt_rings()
16278 bp->cp_nr_rings++; in bnxt_set_dflt_rings()
16281 bp->tx_nr_rings = 0; in bnxt_set_dflt_rings()
16282 bp->rx_nr_rings = 0; in bnxt_set_dflt_rings()
16291 if (bp->tx_nr_rings) in bnxt_init_dflt_ring_mode()
16298 if (BNXT_VF(bp) && rc == -ENODEV) in bnxt_init_dflt_ring_mode()
16299 netdev_err(bp->dev, "Cannot configure VF rings while PF is unavailable.\n"); in bnxt_init_dflt_ring_mode()
16301 netdev_err(bp->dev, "Not enough rings available.\n"); in bnxt_init_dflt_ring_mode()
16308 bp->tx_nr_rings_per_tc = bp->tx_nr_rings; in bnxt_init_dflt_ring_mode()
16321 netdev_ops_assert_locked(bp->dev); in bnxt_restore_pf_fw_resources()
16324 if (netif_running(bp->dev)) in bnxt_restore_pf_fw_resources()
16332 if (netif_running(bp->dev)) { in bnxt_restore_pf_fw_resources()
16334 netif_close(bp->dev); in bnxt_restore_pf_fw_resources()
16347 eth_hw_addr_set(bp->dev, bp->pf.mac_addr); in bnxt_init_mac_addr()
16350 struct bnxt_vf_info *vf = &bp->vf; in bnxt_init_mac_addr()
16353 if (is_valid_ether_addr(vf->mac_addr)) { in bnxt_init_mac_addr()
16355 eth_hw_addr_set(bp->dev, vf->mac_addr); in bnxt_init_mac_addr()
16361 eth_hw_addr_random(bp->dev); in bnxt_init_mac_addr()
16363 rc = bnxt_approve_mac(bp, bp->dev->dev_addr, strict_approval); in bnxt_init_mac_addr()
16371 struct pci_dev *pdev = bp->pdev; in bnxt_vpd_read_info()
16387 size = min_t(int, kw_len, BNXT_VPD_FLD_LEN - 1); in bnxt_vpd_read_info()
16388 memcpy(bp->board_partno, &vpd_data[pos], size); in bnxt_vpd_read_info()
16397 size = min_t(int, kw_len, BNXT_VPD_FLD_LEN - 1); in bnxt_vpd_read_info()
16398 memcpy(bp->board_serialno, &vpd_data[pos], size); in bnxt_vpd_read_info()
16405 struct pci_dev *pdev = bp->pdev; in bnxt_pcie_dsn_get()
16410 netdev_info(bp->dev, "Unable to read adapter's DSN\n"); in bnxt_pcie_dsn_get()
16411 return -EOPNOTSUPP; in bnxt_pcie_dsn_get()
16416 bp->flags |= BNXT_FLAG_DSN_VALID; in bnxt_pcie_dsn_get()
16422 if (!bp->db_size) in bnxt_map_db_bar()
16423 return -ENODEV; in bnxt_map_db_bar()
16424 bp->bar1 = pci_iomap(bp->pdev, 2, bp->db_size); in bnxt_map_db_bar()
16425 if (!bp->bar1) in bnxt_map_db_bar()
16426 return -ENOMEM; in bnxt_map_db_bar()
16432 netdev_info(bp->dev, "%s found at mem %lx, node addr %pM\n", in bnxt_print_device_info()
16433 board_info[bp->board_idx].name, in bnxt_print_device_info()
16434 (long)pci_resource_start(bp->pdev, 0), bp->dev->dev_addr); in bnxt_print_device_info()
16436 pcie_print_link_status(bp->pdev); in bnxt_print_device_info()
16447 return -ENODEV; in bnxt_init_one()
16449 if (!pdev->msix_cap) { in bnxt_init_one()
16450 dev_err(&pdev->dev, "MSIX capability not found, aborting\n"); in bnxt_init_one()
16451 return -ENODEV; in bnxt_init_one()
16466 return -ENOMEM; in bnxt_init_one()
16469 bp->board_idx = ent->driver_data; in bnxt_init_one()
16470 bp->msg_enable = BNXT_DEF_MSG_ENABLE; in bnxt_init_one()
16473 if (bnxt_vf_pciid(bp->board_idx)) in bnxt_init_one()
16474 bp->flags |= BNXT_FLAG_VF; in bnxt_init_one()
16478 SET_NETDEV_DEVLINK_PORT(dev, &bp->dl_port); in bnxt_init_one()
16484 dev->netdev_ops = &bnxt_netdev_ops; in bnxt_init_one()
16485 dev->stat_ops = &bnxt_stat_ops; in bnxt_init_one()
16486 dev->watchdog_timeo = BNXT_TX_TIMEOUT; in bnxt_init_one()
16487 dev->ethtool_ops = &bnxt_ethtool_ops; in bnxt_init_one()
16494 mutex_init(&bp->hwrm_cmd_lock); in bnxt_init_one()
16495 mutex_init(&bp->link_lock); in bnxt_init_one()
16505 bp->flags |= BNXT_FLAG_CHIP_P5_PLUS; in bnxt_init_one()
16507 bp->flags |= BNXT_FLAG_CHIP_P7; in bnxt_init_one()
16520 dev_err(&pdev->dev, "Cannot map doorbell BAR rc = %d, aborting\n", in bnxt_init_one()
16525 dev->hw_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | NETIF_F_SG | in bnxt_init_one()
16532 if (bp->flags & BNXT_FLAG_UDP_GSO_CAP) in bnxt_init_one()
16533 dev->hw_features |= NETIF_F_GSO_UDP_L4; in bnxt_init_one()
16536 dev->hw_features |= NETIF_F_LRO; in bnxt_init_one()
16538 dev->hw_enc_features = in bnxt_init_one()
16544 if (bp->flags & BNXT_FLAG_UDP_GSO_CAP) in bnxt_init_one()
16545 dev->hw_enc_features |= NETIF_F_GSO_UDP_L4; in bnxt_init_one()
16546 if (bp->flags & BNXT_FLAG_CHIP_P7) in bnxt_init_one()
16547 dev->udp_tunnel_nic_info = &bnxt_udp_tunnels_p7; in bnxt_init_one()
16549 dev->udp_tunnel_nic_info = &bnxt_udp_tunnels; in bnxt_init_one()
16551 dev->gso_partial_features = NETIF_F_GSO_UDP_TUNNEL_CSUM | in bnxt_init_one()
16553 dev->vlan_features = dev->hw_features | NETIF_F_HIGHDMA; in bnxt_init_one()
16554 if (bp->fw_cap & BNXT_FW_CAP_VLAN_RX_STRIP) in bnxt_init_one()
16555 dev->hw_features |= BNXT_HW_FEATURE_VLAN_ALL_RX; in bnxt_init_one()
16556 if (bp->fw_cap & BNXT_FW_CAP_VLAN_TX_INSERT) in bnxt_init_one()
16557 dev->hw_features |= BNXT_HW_FEATURE_VLAN_ALL_TX; in bnxt_init_one()
16559 dev->hw_features |= NETIF_F_GRO_HW; in bnxt_init_one()
16560 dev->features |= dev->hw_features | NETIF_F_HIGHDMA; in bnxt_init_one()
16561 if (dev->features & NETIF_F_GRO_HW) in bnxt_init_one()
16562 dev->features &= ~NETIF_F_LRO; in bnxt_init_one()
16563 dev->priv_flags |= IFF_UNICAST_FLT; in bnxt_init_one()
16566 if (bp->tso_max_segs) in bnxt_init_one()
16567 netif_set_tso_max_segs(dev, bp->tso_max_segs); in bnxt_init_one()
16569 dev->xdp_features = NETDEV_XDP_ACT_BASIC | NETDEV_XDP_ACT_REDIRECT | in bnxt_init_one()
16573 init_waitqueue_head(&bp->sriov_cfg_wait); in bnxt_init_one()
16576 bp->gro_func = bnxt_gro_func_5730x; in bnxt_init_one()
16578 bp->gro_func = bnxt_gro_func_5731x; in bnxt_init_one()
16580 bp->gro_func = bnxt_gro_func_5750x; in bnxt_init_one()
16583 bp->flags |= BNXT_FLAG_DOUBLE_DB; in bnxt_init_one()
16587 dev_err(&pdev->dev, "Unable to initialize mac address.\n"); in bnxt_init_one()
16588 rc = -EADDRNOTAVAIL; in bnxt_init_one()
16594 rc = bnxt_pcie_dsn_get(bp, bp->dsn); in bnxt_init_one()
16597 /* MTU range: 60 - FW defined max */ in bnxt_init_one()
16598 dev->min_mtu = ETH_ZLEN; in bnxt_init_one()
16599 dev->max_mtu = bp->max_mtu; in bnxt_init_one()
16605 hw_resc = &bp->hw_resc; in bnxt_init_one()
16606 bp->max_fltr = hw_resc->max_rx_em_flows + hw_resc->max_rx_wm_flows + in bnxt_init_one()
16609 if (bp->max_fltr < BNXT_MAX_FLTR) in bnxt_init_one()
16610 bp->max_fltr = BNXT_MAX_FLTR; in bnxt_init_one()
16619 if (BNXT_VF(bp) && rc == -ENODEV) { in bnxt_init_one()
16620 netdev_err(bp->dev, "Cannot configure VF rings while PF is unavailable.\n"); in bnxt_init_one()
16622 netdev_err(bp->dev, "Not enough rings available.\n"); in bnxt_init_one()
16623 rc = -ENOMEM; in bnxt_init_one()
16632 if (dev->hw_features & BNXT_HW_FEATURE_VLAN_ALL_RX) in bnxt_init_one()
16633 bp->flags |= BNXT_FLAG_STRIP_VLAN; in bnxt_init_one()
16640 * limited MSIX, so we re-initialize the TX rings per TC. in bnxt_init_one()
16642 bp->tx_nr_rings_per_tc = bp->tx_nr_rings; in bnxt_init_one()
16649 dev_err(&pdev->dev, "Unable to create workqueue.\n"); in bnxt_init_one()
16650 rc = -ENOMEM; in bnxt_init_one()
16665 INIT_LIST_HEAD(&bp->usr_fltr_list); in bnxt_init_one()
16668 bp->rss_cap |= BNXT_RSS_CAP_MULTI_RSS_CTX; in bnxt_init_one()
16670 dev->queue_mgmt_ops = &bnxt_queue_mgmt_ops; in bnxt_init_one()
16671 dev->request_ops_lock = true; in bnxt_init_one()
16699 kfree(bp->ptp_cfg); in bnxt_init_one()
16700 bp->ptp_cfg = NULL; in bnxt_init_one()
16701 kfree(bp->fw_health); in bnxt_init_one()
16702 bp->fw_health = NULL; in bnxt_init_one()
16706 kfree(bp->rss_indir_tbl); in bnxt_init_one()
16707 bp->rss_indir_tbl = NULL; in bnxt_init_one()
16736 pci_wake_from_d3(pdev, bp->wol); in bnxt_shutdown()
16761 pci_disable_device(bp->pdev); in bnxt_suspend()
16775 rc = pci_enable_device(bp->pdev); in bnxt_resume()
16777 netdev_err(dev, "Cannot re-enable PCI device during resume, err = %d\n", in bnxt_resume()
16781 pci_set_master(bp->pdev); in bnxt_resume()
16783 rc = -ENODEV; in bnxt_resume()
16788 rc = -EBUSY; in bnxt_resume()
16799 rc = -ENODEV; in bnxt_resume()
16802 if (bp->fw_crash_mem) in bnxt_resume()
16806 kfree(bp->ptp_cfg); in bnxt_resume()
16807 bp->ptp_cfg = NULL; in bnxt_resume()
16817 netdev_unlock(bp->dev); in bnxt_resume()
16835 * bnxt_io_error_detected - called when PCI error is detected
16837 * @state: The current pci connection state
16856 if (test_and_set_bit(BNXT_STATE_IN_FW_RESET, &bp->state)) { in bnxt_io_error_detected()
16857 netdev_err(bp->dev, "Firmware reset already in progress\n"); in bnxt_io_error_detected()
16871 set_bit(BNXT_STATE_PCI_CHANNEL_IO_FROZEN, &bp->state); in bnxt_io_error_detected()
16888 * bnxt_io_slot_reset - called after the pci bus has been reset.
16891 * Restart the card from scratch, as if from a cold-boot.
16905 netdev_info(bp->dev, "PCI Slot Reset\n"); in bnxt_io_slot_reset()
16907 if (!(bp->flags & BNXT_FLAG_CHIP_P5_PLUS) && in bnxt_io_slot_reset()
16908 test_bit(BNXT_STATE_PCI_CHANNEL_IO_FROZEN, &bp->state)) in bnxt_io_slot_reset()
16914 dev_err(&pdev->dev, in bnxt_io_slot_reset()
16915 "Cannot re-enable PCI device after reset.\n"); in bnxt_io_slot_reset()
16922 * As pci_restore_state() does not re-write the BARs if the in bnxt_io_slot_reset()
16927 &bp->state)) { in bnxt_io_slot_reset()
16930 pci_write_config_dword(bp->pdev, off, 0); in bnxt_io_slot_reset()
16949 dev_err(&pdev->dev, "Firmware not ready\n"); in bnxt_io_slot_reset()
16963 clear_bit(BNXT_STATE_IN_FW_RESET, &bp->state); in bnxt_io_slot_reset()
16971 * bnxt_io_resume - called when traffic can start flowing again.
16983 netdev_info(bp->dev, "PCI Slot Resume\n"); in bnxt_io_resume()