Lines Matching full:host
31 #include <linux/mmc/host.h>
117 spin_lock_bh(&slot->host->lock); in dw_mci_req_show()
143 spin_unlock_bh(&slot->host->lock); in dw_mci_req_show()
151 struct dw_mci *host = s->private; in dw_mci_regs_show() local
153 pm_runtime_get_sync(host->dev); in dw_mci_regs_show()
155 seq_printf(s, "STATUS:\t0x%08x\n", mci_readl(host, STATUS)); in dw_mci_regs_show()
156 seq_printf(s, "RINTSTS:\t0x%08x\n", mci_readl(host, RINTSTS)); in dw_mci_regs_show()
157 seq_printf(s, "CMD:\t0x%08x\n", mci_readl(host, CMD)); in dw_mci_regs_show()
158 seq_printf(s, "CTRL:\t0x%08x\n", mci_readl(host, CTRL)); in dw_mci_regs_show()
159 seq_printf(s, "INTMASK:\t0x%08x\n", mci_readl(host, INTMASK)); in dw_mci_regs_show()
160 seq_printf(s, "CLKENA:\t0x%08x\n", mci_readl(host, CLKENA)); in dw_mci_regs_show()
162 pm_runtime_put_autosuspend(host->dev); in dw_mci_regs_show()
171 struct dw_mci *host = slot->host; in dw_mci_init_debugfs() local
178 debugfs_create_file("regs", S_IRUSR, root, host, &dw_mci_regs_fops); in dw_mci_init_debugfs()
180 debugfs_create_u32("state", S_IRUSR, root, &host->state); in dw_mci_init_debugfs()
182 &host->pending_events); in dw_mci_init_debugfs()
184 &host->completed_events); in dw_mci_init_debugfs()
186 fault_create_debugfs_attr("fail_data_crc", root, &host->fail_data_crc); in dw_mci_init_debugfs()
191 static bool dw_mci_ctrl_reset(struct dw_mci *host, u32 reset) in dw_mci_ctrl_reset() argument
195 ctrl = mci_readl(host, CTRL); in dw_mci_ctrl_reset()
197 mci_writel(host, CTRL, ctrl); in dw_mci_ctrl_reset()
200 if (readl_poll_timeout_atomic(host->regs + SDMMC_CTRL, ctrl, in dw_mci_ctrl_reset()
203 dev_err(host->dev, in dw_mci_ctrl_reset()
212 static void dw_mci_wait_while_busy(struct dw_mci *host, u32 cmd_flags) in dw_mci_wait_while_busy() argument
226 if (readl_poll_timeout_atomic(host->regs + SDMMC_STATUS, in dw_mci_wait_while_busy()
230 dev_err(host->dev, "Busy; trying anyway\n"); in dw_mci_wait_while_busy()
236 struct dw_mci *host = slot->host; in mci_send_cmd() local
239 mci_writel(host, CMDARG, arg); in mci_send_cmd()
241 dw_mci_wait_while_busy(host, cmd); in mci_send_cmd()
242 mci_writel(host, CMD, SDMMC_CMD_START | cmd); in mci_send_cmd()
244 if (readl_poll_timeout_atomic(host->regs + SDMMC_CMD, cmd_status, in mci_send_cmd()
255 struct dw_mci *host = slot->host; in dw_mci_prepare_command() local
277 WARN_ON(slot->host->state != STATE_SENDING_CMD); in dw_mci_prepare_command()
278 slot->host->state = STATE_SENDING_CMD11; in dw_mci_prepare_command()
291 clk_en_a = mci_readl(host, CLKENA); in dw_mci_prepare_command()
293 mci_writel(host, CLKENA, clk_en_a); in dw_mci_prepare_command()
320 static u32 dw_mci_prep_stop_abort(struct dw_mci *host, struct mmc_command *cmd) in dw_mci_prep_stop_abort() argument
328 stop = &host->stop_abort; in dw_mci_prep_stop_abort()
353 if (!test_bit(DW_MMC_CARD_NO_USE_HOLD, &host->slot->flags)) in dw_mci_prep_stop_abort()
359 static inline void dw_mci_set_cto(struct dw_mci *host) in dw_mci_set_cto() argument
366 cto_clks = mci_readl(host, TMOUT) & 0xff; in dw_mci_set_cto()
367 cto_div = (mci_readl(host, CLKDIV) & 0xff) * 2; in dw_mci_set_cto()
372 host->bus_hz); in dw_mci_set_cto()
390 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_set_cto()
391 if (!test_bit(EVENT_CMD_COMPLETE, &host->pending_events)) in dw_mci_set_cto()
392 mod_timer(&host->cto_timer, in dw_mci_set_cto()
394 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_set_cto()
397 static void dw_mci_start_command(struct dw_mci *host, in dw_mci_start_command() argument
400 host->cmd = cmd; in dw_mci_start_command()
401 dev_vdbg(host->dev, in dw_mci_start_command()
405 mci_writel(host, CMDARG, cmd->arg); in dw_mci_start_command()
407 dw_mci_wait_while_busy(host, cmd_flags); in dw_mci_start_command()
409 mci_writel(host, CMD, cmd_flags | SDMMC_CMD_START); in dw_mci_start_command()
413 dw_mci_set_cto(host); in dw_mci_start_command()
416 static inline void send_stop_abort(struct dw_mci *host, struct mmc_data *data) in send_stop_abort() argument
418 struct mmc_command *stop = &host->stop_abort; in send_stop_abort()
420 dw_mci_start_command(host, stop, host->stop_cmdr); in send_stop_abort()
424 static void dw_mci_stop_dma(struct dw_mci *host) in dw_mci_stop_dma() argument
426 if (host->using_dma) { in dw_mci_stop_dma()
427 host->dma_ops->stop(host); in dw_mci_stop_dma()
428 host->dma_ops->cleanup(host); in dw_mci_stop_dma()
432 set_bit(EVENT_XFER_COMPLETE, &host->pending_events); in dw_mci_stop_dma()
435 static void dw_mci_dma_cleanup(struct dw_mci *host) in dw_mci_dma_cleanup() argument
437 struct mmc_data *data = host->data; in dw_mci_dma_cleanup()
440 dma_unmap_sg(host->dev, in dw_mci_dma_cleanup()
448 static void dw_mci_idmac_reset(struct dw_mci *host) in dw_mci_idmac_reset() argument
450 u32 bmod = mci_readl(host, BMOD); in dw_mci_idmac_reset()
453 mci_writel(host, BMOD, bmod); in dw_mci_idmac_reset()
456 static void dw_mci_idmac_stop_dma(struct dw_mci *host) in dw_mci_idmac_stop_dma() argument
461 temp = mci_readl(host, CTRL); in dw_mci_idmac_stop_dma()
464 mci_writel(host, CTRL, temp); in dw_mci_idmac_stop_dma()
467 temp = mci_readl(host, BMOD); in dw_mci_idmac_stop_dma()
470 mci_writel(host, BMOD, temp); in dw_mci_idmac_stop_dma()
475 struct dw_mci *host = arg; in dw_mci_dmac_complete_dma() local
476 struct mmc_data *data = host->data; in dw_mci_dmac_complete_dma()
478 dev_vdbg(host->dev, "DMA complete\n"); in dw_mci_dmac_complete_dma()
480 if ((host->use_dma == TRANS_MODE_EDMAC) && in dw_mci_dmac_complete_dma()
483 dma_sync_sg_for_cpu(mmc_dev(host->slot->mmc), in dw_mci_dmac_complete_dma()
488 host->dma_ops->cleanup(host); in dw_mci_dmac_complete_dma()
495 set_bit(EVENT_XFER_COMPLETE, &host->pending_events); in dw_mci_dmac_complete_dma()
496 queue_work(system_bh_wq, &host->bh_work); in dw_mci_dmac_complete_dma()
500 static int dw_mci_idmac_init(struct dw_mci *host) in dw_mci_idmac_init() argument
504 if (host->dma_64bit_address == 1) { in dw_mci_idmac_init()
507 host->ring_size = in dw_mci_idmac_init()
511 for (i = 0, p = host->sg_cpu; i < host->ring_size - 1; in dw_mci_idmac_init()
513 p->des6 = (host->sg_dma + in dw_mci_idmac_init()
517 p->des7 = (u64)(host->sg_dma + in dw_mci_idmac_init()
528 p->des6 = host->sg_dma & 0xffffffff; in dw_mci_idmac_init()
529 p->des7 = (u64)host->sg_dma >> 32; in dw_mci_idmac_init()
535 host->ring_size = in dw_mci_idmac_init()
539 for (i = 0, p = host->sg_cpu; in dw_mci_idmac_init()
540 i < host->ring_size - 1; in dw_mci_idmac_init()
542 p->des3 = cpu_to_le32(host->sg_dma + in dw_mci_idmac_init()
549 p->des3 = cpu_to_le32(host->sg_dma); in dw_mci_idmac_init()
553 dw_mci_idmac_reset(host); in dw_mci_idmac_init()
555 if (host->dma_64bit_address == 1) { in dw_mci_idmac_init()
557 mci_writel(host, IDSTS64, IDMAC_INT_CLR); in dw_mci_idmac_init()
558 mci_writel(host, IDINTEN64, SDMMC_IDMAC_INT_NI | in dw_mci_idmac_init()
562 mci_writel(host, DBADDRL, host->sg_dma & 0xffffffff); in dw_mci_idmac_init()
563 mci_writel(host, DBADDRU, (u64)host->sg_dma >> 32); in dw_mci_idmac_init()
567 mci_writel(host, IDSTS, IDMAC_INT_CLR); in dw_mci_idmac_init()
568 mci_writel(host, IDINTEN, SDMMC_IDMAC_INT_NI | in dw_mci_idmac_init()
572 mci_writel(host, DBADDR, host->sg_dma); in dw_mci_idmac_init()
578 static inline int dw_mci_prepare_desc64(struct dw_mci *host, in dw_mci_prepare_desc64() argument
587 desc_first = desc_last = desc = host->sg_cpu; in dw_mci_prepare_desc64()
643 dev_dbg(host->dev, "descriptor is still owned by IDMAC.\n"); in dw_mci_prepare_desc64()
644 memset(host->sg_cpu, 0, DESC_RING_BUF_SZ); in dw_mci_prepare_desc64()
645 dw_mci_idmac_init(host); in dw_mci_prepare_desc64()
650 static inline int dw_mci_prepare_desc32(struct dw_mci *host, in dw_mci_prepare_desc32() argument
659 desc_first = desc_last = desc = host->sg_cpu; in dw_mci_prepare_desc32()
717 dev_dbg(host->dev, "descriptor is still owned by IDMAC.\n"); in dw_mci_prepare_desc32()
718 memset(host->sg_cpu, 0, DESC_RING_BUF_SZ); in dw_mci_prepare_desc32()
719 dw_mci_idmac_init(host); in dw_mci_prepare_desc32()
723 static int dw_mci_idmac_start_dma(struct dw_mci *host, unsigned int sg_len) in dw_mci_idmac_start_dma() argument
728 if (host->dma_64bit_address == 1) in dw_mci_idmac_start_dma()
729 ret = dw_mci_prepare_desc64(host, host->data, sg_len); in dw_mci_idmac_start_dma()
731 ret = dw_mci_prepare_desc32(host, host->data, sg_len); in dw_mci_idmac_start_dma()
740 dw_mci_ctrl_reset(host, SDMMC_CTRL_DMA_RESET); in dw_mci_idmac_start_dma()
741 dw_mci_idmac_reset(host); in dw_mci_idmac_start_dma()
744 temp = mci_readl(host, CTRL); in dw_mci_idmac_start_dma()
746 mci_writel(host, CTRL, temp); in dw_mci_idmac_start_dma()
752 temp = mci_readl(host, BMOD); in dw_mci_idmac_start_dma()
754 mci_writel(host, BMOD, temp); in dw_mci_idmac_start_dma()
757 mci_writel(host, PLDMND, 1); in dw_mci_idmac_start_dma()
771 static void dw_mci_edmac_stop_dma(struct dw_mci *host) in dw_mci_edmac_stop_dma() argument
773 dmaengine_terminate_async(host->dms->ch); in dw_mci_edmac_stop_dma()
776 static int dw_mci_edmac_start_dma(struct dw_mci *host, in dw_mci_edmac_start_dma() argument
781 struct scatterlist *sgl = host->data->sg; in dw_mci_edmac_start_dma()
783 u32 sg_elems = host->data->sg_len; in dw_mci_edmac_start_dma()
785 u32 fifo_offset = host->fifo_reg - host->regs; in dw_mci_edmac_start_dma()
790 cfg.dst_addr = host->phy_regs + fifo_offset; in dw_mci_edmac_start_dma()
796 fifoth_val = mci_readl(host, FIFOTH); in dw_mci_edmac_start_dma()
800 if (host->data->flags & MMC_DATA_WRITE) in dw_mci_edmac_start_dma()
805 ret = dmaengine_slave_config(host->dms->ch, &cfg); in dw_mci_edmac_start_dma()
807 dev_err(host->dev, "Failed to config edmac.\n"); in dw_mci_edmac_start_dma()
811 desc = dmaengine_prep_slave_sg(host->dms->ch, sgl, in dw_mci_edmac_start_dma()
815 dev_err(host->dev, "Can't prepare slave sg.\n"); in dw_mci_edmac_start_dma()
821 desc->callback_param = (void *)host; in dw_mci_edmac_start_dma()
825 if (host->data->flags & MMC_DATA_WRITE) in dw_mci_edmac_start_dma()
826 dma_sync_sg_for_device(mmc_dev(host->slot->mmc), sgl, in dw_mci_edmac_start_dma()
829 dma_async_issue_pending(host->dms->ch); in dw_mci_edmac_start_dma()
834 static int dw_mci_edmac_init(struct dw_mci *host) in dw_mci_edmac_init() argument
837 host->dms = kzalloc(sizeof(struct dw_mci_dma_slave), GFP_KERNEL); in dw_mci_edmac_init()
838 if (!host->dms) in dw_mci_edmac_init()
841 host->dms->ch = dma_request_chan(host->dev, "rx-tx"); in dw_mci_edmac_init()
842 if (IS_ERR(host->dms->ch)) { in dw_mci_edmac_init()
843 int ret = PTR_ERR(host->dms->ch); in dw_mci_edmac_init()
845 dev_err(host->dev, "Failed to get external DMA channel.\n"); in dw_mci_edmac_init()
846 kfree(host->dms); in dw_mci_edmac_init()
847 host->dms = NULL; in dw_mci_edmac_init()
854 static void dw_mci_edmac_exit(struct dw_mci *host) in dw_mci_edmac_exit() argument
856 if (host->dms) { in dw_mci_edmac_exit()
857 if (host->dms->ch) { in dw_mci_edmac_exit()
858 dma_release_channel(host->dms->ch); in dw_mci_edmac_exit()
859 host->dms->ch = NULL; in dw_mci_edmac_exit()
861 kfree(host->dms); in dw_mci_edmac_exit()
862 host->dms = NULL; in dw_mci_edmac_exit()
875 static int dw_mci_pre_dma_transfer(struct dw_mci *host, in dw_mci_pre_dma_transfer() argument
901 sg_len = dma_map_sg(host->dev, in dw_mci_pre_dma_transfer()
919 if (!slot->host->use_dma || !data) in dw_mci_pre_req()
925 if (dw_mci_pre_dma_transfer(slot->host, mrq->data, in dw_mci_pre_req()
937 if (!slot->host->use_dma || !data) in dw_mci_post_req()
941 dma_unmap_sg(slot->host->dev, in dw_mci_post_req()
952 struct dw_mci *host = slot->host; in dw_mci_get_cd() local
975 present = (mci_readl(slot->host, CDETECT) & (1 << slot->id)) in dw_mci_get_cd()
978 spin_lock_bh(&host->lock); in dw_mci_get_cd()
984 spin_unlock_bh(&host->lock); in dw_mci_get_cd()
989 static void dw_mci_adjust_fifoth(struct dw_mci *host, struct mmc_data *data) in dw_mci_adjust_fifoth() argument
993 u32 fifo_width = 1 << host->data_shift; in dw_mci_adjust_fifoth()
999 if (!host->use_dma) in dw_mci_adjust_fifoth()
1002 tx_wmark = (host->fifo_depth) / 2; in dw_mci_adjust_fifoth()
1003 tx_wmark_invers = host->fifo_depth - tx_wmark; in dw_mci_adjust_fifoth()
1026 mci_writel(host, FIFOTH, fifoth_val); in dw_mci_adjust_fifoth()
1029 static void dw_mci_ctrl_thld(struct dw_mci *host, struct mmc_data *data) in dw_mci_ctrl_thld() argument
1040 if (host->verid < DW_MMC_240A || in dw_mci_ctrl_thld()
1041 (host->verid < DW_MMC_280A && data->flags & MMC_DATA_WRITE)) in dw_mci_ctrl_thld()
1049 host->timing != MMC_TIMING_MMC_HS400) in dw_mci_ctrl_thld()
1057 if (host->timing != MMC_TIMING_MMC_HS200 && in dw_mci_ctrl_thld()
1058 host->timing != MMC_TIMING_UHS_SDR104 && in dw_mci_ctrl_thld()
1059 host->timing != MMC_TIMING_MMC_HS400) in dw_mci_ctrl_thld()
1062 blksz_depth = blksz / (1 << host->data_shift); in dw_mci_ctrl_thld()
1063 fifo_depth = host->fifo_depth; in dw_mci_ctrl_thld()
1074 mci_writel(host, CDTHRCTL, SDMMC_SET_THLD(thld_size, enable)); in dw_mci_ctrl_thld()
1078 mci_writel(host, CDTHRCTL, 0); in dw_mci_ctrl_thld()
1081 static int dw_mci_submit_data_dma(struct dw_mci *host, struct mmc_data *data) in dw_mci_submit_data_dma() argument
1087 host->using_dma = 0; in dw_mci_submit_data_dma()
1090 if (!host->use_dma) in dw_mci_submit_data_dma()
1093 sg_len = dw_mci_pre_dma_transfer(host, data, COOKIE_MAPPED); in dw_mci_submit_data_dma()
1095 host->dma_ops->stop(host); in dw_mci_submit_data_dma()
1099 host->using_dma = 1; in dw_mci_submit_data_dma()
1101 if (host->use_dma == TRANS_MODE_IDMAC) in dw_mci_submit_data_dma()
1102 dev_vdbg(host->dev, in dw_mci_submit_data_dma()
1104 (unsigned long)host->sg_cpu, in dw_mci_submit_data_dma()
1105 (unsigned long)host->sg_dma, in dw_mci_submit_data_dma()
1113 if (host->prev_blksz != data->blksz) in dw_mci_submit_data_dma()
1114 dw_mci_adjust_fifoth(host, data); in dw_mci_submit_data_dma()
1117 temp = mci_readl(host, CTRL); in dw_mci_submit_data_dma()
1119 mci_writel(host, CTRL, temp); in dw_mci_submit_data_dma()
1122 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_submit_data_dma()
1123 temp = mci_readl(host, INTMASK); in dw_mci_submit_data_dma()
1125 mci_writel(host, INTMASK, temp); in dw_mci_submit_data_dma()
1126 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_submit_data_dma()
1128 if (host->dma_ops->start(host, sg_len)) { in dw_mci_submit_data_dma()
1129 host->dma_ops->stop(host); in dw_mci_submit_data_dma()
1131 dev_dbg(host->dev, in dw_mci_submit_data_dma()
1140 static void dw_mci_submit_data(struct dw_mci *host, struct mmc_data *data) in dw_mci_submit_data() argument
1148 WARN_ON(host->data); in dw_mci_submit_data()
1149 host->sg = NULL; in dw_mci_submit_data()
1150 host->data = data; in dw_mci_submit_data()
1153 host->dir_status = DW_MCI_RECV_STATUS; in dw_mci_submit_data()
1155 host->dir_status = DW_MCI_SEND_STATUS; in dw_mci_submit_data()
1157 dw_mci_ctrl_thld(host, data); in dw_mci_submit_data()
1159 if (dw_mci_submit_data_dma(host, data)) { in dw_mci_submit_data()
1160 if (host->data->flags & MMC_DATA_READ) in dw_mci_submit_data()
1165 sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags); in dw_mci_submit_data()
1166 host->sg = data->sg; in dw_mci_submit_data()
1167 host->part_buf_start = 0; in dw_mci_submit_data()
1168 host->part_buf_count = 0; in dw_mci_submit_data()
1170 mci_writel(host, RINTSTS, SDMMC_INT_TXDR | SDMMC_INT_RXDR); in dw_mci_submit_data()
1172 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_submit_data()
1173 temp = mci_readl(host, INTMASK); in dw_mci_submit_data()
1175 mci_writel(host, INTMASK, temp); in dw_mci_submit_data()
1176 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_submit_data()
1178 temp = mci_readl(host, CTRL); in dw_mci_submit_data()
1180 mci_writel(host, CTRL, temp); in dw_mci_submit_data()
1188 if (host->wm_aligned) in dw_mci_submit_data()
1189 dw_mci_adjust_fifoth(host, data); in dw_mci_submit_data()
1191 mci_writel(host, FIFOTH, host->fifoth_val); in dw_mci_submit_data()
1192 host->prev_blksz = 0; in dw_mci_submit_data()
1199 host->prev_blksz = data->blksz; in dw_mci_submit_data()
1205 struct dw_mci *host = slot->host; in dw_mci_setup_bus() local
1212 if (host->state == STATE_WAITING_CMD11_DONE) in dw_mci_setup_bus()
1218 mci_writel(host, CLKENA, 0); in dw_mci_setup_bus()
1220 } else if (clock != host->current_speed || force_clkinit) { in dw_mci_setup_bus()
1221 div = host->bus_hz / clock; in dw_mci_setup_bus()
1222 if (host->bus_hz % clock && host->bus_hz > clock) in dw_mci_setup_bus()
1229 div = (host->bus_hz != clock) ? DIV_ROUND_UP(div, 2) : 0; in dw_mci_setup_bus()
1238 slot->id, host->bus_hz, clock, in dw_mci_setup_bus()
1239 div ? ((host->bus_hz / div) >> 1) : in dw_mci_setup_bus()
1240 host->bus_hz, div); in dw_mci_setup_bus()
1252 mci_writel(host, CLKENA, 0); in dw_mci_setup_bus()
1253 mci_writel(host, CLKSRC, 0); in dw_mci_setup_bus()
1259 mci_writel(host, CLKDIV, div); in dw_mci_setup_bus()
1268 mci_writel(host, CLKENA, clk_en_a); in dw_mci_setup_bus()
1275 slot->mmc->actual_clock = div ? ((host->bus_hz / div) >> 1) : in dw_mci_setup_bus()
1276 host->bus_hz; in dw_mci_setup_bus()
1279 host->current_speed = clock; in dw_mci_setup_bus()
1282 mci_writel(host, CTYPE, (slot->ctype << slot->id)); in dw_mci_setup_bus()
1285 static void dw_mci_set_data_timeout(struct dw_mci *host, in dw_mci_set_data_timeout() argument
1288 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_set_data_timeout()
1293 return drv_data->set_data_timeout(host, timeout_ns); in dw_mci_set_data_timeout()
1295 clk_div = (mci_readl(host, CLKDIV) & 0xFF) * 2; in dw_mci_set_data_timeout()
1299 tmp = DIV_ROUND_UP_ULL((u64)timeout_ns * host->bus_hz, NSEC_PER_SEC); in dw_mci_set_data_timeout()
1311 mci_writel(host, TMOUT, tmout); in dw_mci_set_data_timeout()
1312 dev_dbg(host->dev, "timeout_ns: %u => TMOUT[31:8]: %#08x", in dw_mci_set_data_timeout()
1316 static void __dw_mci_start_request(struct dw_mci *host, in __dw_mci_start_request() argument
1326 host->mrq = mrq; in __dw_mci_start_request()
1328 host->pending_events = 0; in __dw_mci_start_request()
1329 host->completed_events = 0; in __dw_mci_start_request()
1330 host->cmd_status = 0; in __dw_mci_start_request()
1331 host->data_status = 0; in __dw_mci_start_request()
1332 host->dir_status = 0; in __dw_mci_start_request()
1336 dw_mci_set_data_timeout(host, data->timeout_ns); in __dw_mci_start_request()
1337 mci_writel(host, BYTCNT, data->blksz*data->blocks); in __dw_mci_start_request()
1338 mci_writel(host, BLKSIZ, data->blksz); in __dw_mci_start_request()
1348 dw_mci_submit_data(host, data); in __dw_mci_start_request()
1352 dw_mci_start_command(host, cmd, cmdflags); in __dw_mci_start_request()
1367 spin_lock_irqsave(&host->irq_lock, irqflags); in __dw_mci_start_request()
1368 if (!test_bit(EVENT_CMD_COMPLETE, &host->pending_events)) in __dw_mci_start_request()
1369 mod_timer(&host->cmd11_timer, in __dw_mci_start_request()
1371 spin_unlock_irqrestore(&host->irq_lock, irqflags); in __dw_mci_start_request()
1374 host->stop_cmdr = dw_mci_prep_stop_abort(host, cmd); in __dw_mci_start_request()
1377 static void dw_mci_start_request(struct dw_mci *host, in dw_mci_start_request() argument
1384 __dw_mci_start_request(host, slot, cmd); in dw_mci_start_request()
1387 /* must be called with host->lock held */
1388 static void dw_mci_queue_request(struct dw_mci *host, struct dw_mci_slot *slot, in dw_mci_queue_request() argument
1392 host->state); in dw_mci_queue_request()
1396 if (host->state == STATE_WAITING_CMD11_DONE) { in dw_mci_queue_request()
1404 host->state = STATE_IDLE; in dw_mci_queue_request()
1407 if (host->state == STATE_IDLE) { in dw_mci_queue_request()
1408 host->state = STATE_SENDING_CMD; in dw_mci_queue_request()
1409 dw_mci_start_request(host, slot); in dw_mci_queue_request()
1411 list_add_tail(&slot->queue_node, &host->queue); in dw_mci_queue_request()
1418 struct dw_mci *host = slot->host; in dw_mci_request() local
1434 spin_lock_bh(&host->lock); in dw_mci_request()
1436 dw_mci_queue_request(host, slot, mrq); in dw_mci_request()
1438 spin_unlock_bh(&host->lock); in dw_mci_request()
1444 const struct dw_mci_drv_data *drv_data = slot->host->drv_data; in dw_mci_set_ios()
1460 regs = mci_readl(slot->host, UHS_REG); in dw_mci_set_ios()
1470 mci_writel(slot->host, UHS_REG, regs); in dw_mci_set_ios()
1471 slot->host->timing = ios->timing; in dw_mci_set_ios()
1480 drv_data->set_ios(slot->host, ios); in dw_mci_set_ios()
1488 dev_err(slot->host->dev, in dw_mci_set_ios()
1495 regs = mci_readl(slot->host, PWREN); in dw_mci_set_ios()
1497 mci_writel(slot->host, PWREN, regs); in dw_mci_set_ios()
1500 if (!slot->host->vqmmc_enabled) { in dw_mci_set_ios()
1504 dev_err(slot->host->dev, in dw_mci_set_ios()
1507 slot->host->vqmmc_enabled = true; in dw_mci_set_ios()
1511 slot->host->vqmmc_enabled = true; in dw_mci_set_ios()
1515 dw_mci_ctrl_reset(slot->host, in dw_mci_set_ios()
1530 if (!IS_ERR(mmc->supply.vqmmc) && slot->host->vqmmc_enabled) in dw_mci_set_ios()
1532 slot->host->vqmmc_enabled = false; in dw_mci_set_ios()
1534 regs = mci_readl(slot->host, PWREN); in dw_mci_set_ios()
1536 mci_writel(slot->host, PWREN, regs); in dw_mci_set_ios()
1542 if (slot->host->state == STATE_WAITING_CMD11_DONE && ios->clock != 0) in dw_mci_set_ios()
1543 slot->host->state = STATE_IDLE; in dw_mci_set_ios()
1555 status = mci_readl(slot->host, STATUS); in dw_mci_card_busy()
1563 struct dw_mci *host = slot->host; in dw_mci_switch_voltage() local
1564 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_switch_voltage()
1577 uhs = mci_readl(host, UHS_REG); in dw_mci_switch_voltage()
1592 mci_writel(host, UHS_REG, uhs); in dw_mci_switch_voltage()
1608 mci_readl(slot->host, WRTPRT) & (1 << slot->id) ? 1 : 0; in dw_mci_get_ro()
1619 struct dw_mci *host = slot->host; in dw_mci_hw_reset() local
1620 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_hw_reset()
1623 if (host->use_dma == TRANS_MODE_IDMAC) in dw_mci_hw_reset()
1624 dw_mci_idmac_reset(host); in dw_mci_hw_reset()
1626 if (!dw_mci_ctrl_reset(host, SDMMC_CTRL_DMA_RESET | in dw_mci_hw_reset()
1631 drv_data->hw_reset(host); in dw_mci_hw_reset()
1641 reset = mci_readl(host, RST_N); in dw_mci_hw_reset()
1643 mci_writel(host, RST_N, reset); in dw_mci_hw_reset()
1646 mci_writel(host, RST_N, reset); in dw_mci_hw_reset()
1652 struct dw_mci *host = slot->host; in dw_mci_prepare_sdio_irq() local
1663 clk_en_a_old = mci_readl(host, CLKENA); in dw_mci_prepare_sdio_irq()
1673 mci_writel(host, CLKENA, clk_en_a); in dw_mci_prepare_sdio_irq()
1681 struct dw_mci *host = slot->host; in __dw_mci_enable_sdio_irq() local
1685 spin_lock_irqsave(&host->irq_lock, irqflags); in __dw_mci_enable_sdio_irq()
1688 int_mask = mci_readl(host, INTMASK); in __dw_mci_enable_sdio_irq()
1693 mci_writel(host, INTMASK, int_mask); in __dw_mci_enable_sdio_irq()
1695 spin_unlock_irqrestore(&host->irq_lock, irqflags); in __dw_mci_enable_sdio_irq()
1701 struct dw_mci *host = slot->host; in dw_mci_enable_sdio_irq() local
1708 pm_runtime_get_noresume(host->dev); in dw_mci_enable_sdio_irq()
1710 pm_runtime_put_noidle(host->dev); in dw_mci_enable_sdio_irq()
1723 struct dw_mci *host = slot->host; in dw_mci_execute_tuning() local
1724 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_execute_tuning()
1736 struct dw_mci *host = slot->host; in dw_mci_prepare_hs400_tuning() local
1737 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_prepare_hs400_tuning()
1740 return drv_data->prepare_hs400_tuning(host, ios); in dw_mci_prepare_hs400_tuning()
1745 static bool dw_mci_reset(struct dw_mci *host) in dw_mci_reset() argument
1755 if (host->sg) { in dw_mci_reset()
1756 sg_miter_stop(&host->sg_miter); in dw_mci_reset()
1757 host->sg = NULL; in dw_mci_reset()
1760 if (host->use_dma) in dw_mci_reset()
1763 if (dw_mci_ctrl_reset(host, flags)) { in dw_mci_reset()
1768 mci_writel(host, RINTSTS, 0xFFFFFFFF); in dw_mci_reset()
1770 if (!host->use_dma) { in dw_mci_reset()
1776 if (readl_poll_timeout_atomic(host->regs + SDMMC_STATUS, in dw_mci_reset()
1780 dev_err(host->dev, in dw_mci_reset()
1787 if (!dw_mci_ctrl_reset(host, SDMMC_CTRL_FIFO_RESET)) in dw_mci_reset()
1791 if (!(mci_readl(host, CTRL) & SDMMC_CTRL_RESET)) { in dw_mci_reset()
1792 dev_err(host->dev, in dw_mci_reset()
1799 if (host->use_dma == TRANS_MODE_IDMAC) in dw_mci_reset()
1801 dw_mci_idmac_init(host); in dw_mci_reset()
1807 mci_send_cmd(host->slot, SDMMC_CMD_UPD_CLK, 0); in dw_mci_reset()
1831 struct dw_mci *host = container_of(t, struct dw_mci, fault_timer); in dw_mci_fault_timer() local
1834 spin_lock_irqsave(&host->irq_lock, flags); in dw_mci_fault_timer()
1840 if (!host->data_status) { in dw_mci_fault_timer()
1841 host->data_status = SDMMC_INT_DCRC; in dw_mci_fault_timer()
1842 set_bit(EVENT_DATA_ERROR, &host->pending_events); in dw_mci_fault_timer()
1843 queue_work(system_bh_wq, &host->bh_work); in dw_mci_fault_timer()
1846 spin_unlock_irqrestore(&host->irq_lock, flags); in dw_mci_fault_timer()
1851 static void dw_mci_start_fault_timer(struct dw_mci *host) in dw_mci_start_fault_timer() argument
1853 struct mmc_data *data = host->data; in dw_mci_start_fault_timer()
1858 if (!should_fail(&host->fail_data_crc, 1)) in dw_mci_start_fault_timer()
1864 hrtimer_start(&host->fault_timer, in dw_mci_start_fault_timer()
1869 static void dw_mci_stop_fault_timer(struct dw_mci *host) in dw_mci_stop_fault_timer() argument
1871 hrtimer_cancel(&host->fault_timer); in dw_mci_stop_fault_timer()
1874 static void dw_mci_init_fault(struct dw_mci *host) in dw_mci_init_fault() argument
1876 host->fail_data_crc = (struct fault_attr) FAULT_ATTR_INITIALIZER; in dw_mci_init_fault()
1878 hrtimer_setup(&host->fault_timer, dw_mci_fault_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); in dw_mci_init_fault()
1881 static void dw_mci_init_fault(struct dw_mci *host) in dw_mci_init_fault() argument
1885 static void dw_mci_start_fault_timer(struct dw_mci *host) in dw_mci_start_fault_timer() argument
1889 static void dw_mci_stop_fault_timer(struct dw_mci *host) in dw_mci_stop_fault_timer() argument
1894 static void dw_mci_request_end(struct dw_mci *host, struct mmc_request *mrq) in dw_mci_request_end() argument
1895 __releases(&host->lock) in dw_mci_request_end()
1896 __acquires(&host->lock) in dw_mci_request_end()
1899 struct mmc_host *prev_mmc = host->slot->mmc; in dw_mci_request_end()
1901 WARN_ON(host->cmd || host->data); in dw_mci_request_end()
1903 host->slot->mrq = NULL; in dw_mci_request_end()
1904 host->mrq = NULL; in dw_mci_request_end()
1905 if (!list_empty(&host->queue)) { in dw_mci_request_end()
1906 slot = list_entry(host->queue.next, in dw_mci_request_end()
1909 dev_vdbg(host->dev, "list not empty: %s is next\n", in dw_mci_request_end()
1911 host->state = STATE_SENDING_CMD; in dw_mci_request_end()
1912 dw_mci_start_request(host, slot); in dw_mci_request_end()
1914 dev_vdbg(host->dev, "list empty\n"); in dw_mci_request_end()
1916 if (host->state == STATE_SENDING_CMD11) in dw_mci_request_end()
1917 host->state = STATE_WAITING_CMD11_DONE; in dw_mci_request_end()
1919 host->state = STATE_IDLE; in dw_mci_request_end()
1922 spin_unlock(&host->lock); in dw_mci_request_end()
1924 spin_lock(&host->lock); in dw_mci_request_end()
1927 static int dw_mci_command_complete(struct dw_mci *host, struct mmc_command *cmd) in dw_mci_command_complete() argument
1929 u32 status = host->cmd_status; in dw_mci_command_complete()
1931 host->cmd_status = 0; in dw_mci_command_complete()
1936 cmd->resp[3] = mci_readl(host, RESP0); in dw_mci_command_complete()
1937 cmd->resp[2] = mci_readl(host, RESP1); in dw_mci_command_complete()
1938 cmd->resp[1] = mci_readl(host, RESP2); in dw_mci_command_complete()
1939 cmd->resp[0] = mci_readl(host, RESP3); in dw_mci_command_complete()
1941 cmd->resp[0] = mci_readl(host, RESP0); in dw_mci_command_complete()
1960 static int dw_mci_data_complete(struct dw_mci *host, struct mmc_data *data) in dw_mci_data_complete() argument
1962 u32 status = host->data_status; in dw_mci_data_complete()
1970 if (host->dir_status == in dw_mci_data_complete()
1979 } else if (host->dir_status == in dw_mci_data_complete()
1988 dev_dbg(host->dev, "data error, status 0x%08x\n", status); in dw_mci_data_complete()
1994 dw_mci_reset(host); in dw_mci_data_complete()
2003 static void dw_mci_set_drto(struct dw_mci *host) in dw_mci_set_drto() argument
2005 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_set_drto()
2012 drto_clks = drv_data->get_drto_clks(host); in dw_mci_set_drto()
2014 drto_clks = mci_readl(host, TMOUT) >> 8; in dw_mci_set_drto()
2015 drto_div = (mci_readl(host, CLKDIV) & 0xff) * 2; in dw_mci_set_drto()
2020 host->bus_hz); in dw_mci_set_drto()
2022 dev_dbg(host->dev, "drto_ms: %u\n", drto_ms); in dw_mci_set_drto()
2027 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_set_drto()
2028 if (!test_bit(EVENT_DATA_COMPLETE, &host->pending_events)) in dw_mci_set_drto()
2029 mod_timer(&host->dto_timer, in dw_mci_set_drto()
2031 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_set_drto()
2034 static bool dw_mci_clear_pending_cmd_complete(struct dw_mci *host) in dw_mci_clear_pending_cmd_complete() argument
2036 if (!test_bit(EVENT_CMD_COMPLETE, &host->pending_events)) in dw_mci_clear_pending_cmd_complete()
2046 WARN_ON(timer_delete_sync(&host->cto_timer)); in dw_mci_clear_pending_cmd_complete()
2047 clear_bit(EVENT_CMD_COMPLETE, &host->pending_events); in dw_mci_clear_pending_cmd_complete()
2052 static bool dw_mci_clear_pending_data_complete(struct dw_mci *host) in dw_mci_clear_pending_data_complete() argument
2054 if (!test_bit(EVENT_DATA_COMPLETE, &host->pending_events)) in dw_mci_clear_pending_data_complete()
2058 WARN_ON(timer_delete_sync(&host->dto_timer)); in dw_mci_clear_pending_data_complete()
2059 clear_bit(EVENT_DATA_COMPLETE, &host->pending_events); in dw_mci_clear_pending_data_complete()
2066 struct dw_mci *host = from_work(host, t, bh_work); in dw_mci_work_func() local
2074 spin_lock(&host->lock); in dw_mci_work_func()
2076 state = host->state; in dw_mci_work_func()
2077 data = host->data; in dw_mci_work_func()
2078 mrq = host->mrq; in dw_mci_work_func()
2090 if (!dw_mci_clear_pending_cmd_complete(host)) in dw_mci_work_func()
2093 cmd = host->cmd; in dw_mci_work_func()
2094 host->cmd = NULL; in dw_mci_work_func()
2095 set_bit(EVENT_CMD_COMPLETE, &host->completed_events); in dw_mci_work_func()
2096 err = dw_mci_command_complete(host, cmd); in dw_mci_work_func()
2098 __dw_mci_start_request(host, host->slot, in dw_mci_work_func()
2126 host->dir_status == DW_MCI_RECV_STATUS) { in dw_mci_work_func()
2131 send_stop_abort(host, data); in dw_mci_work_func()
2132 dw_mci_stop_dma(host); in dw_mci_work_func()
2138 dw_mci_request_end(host, mrq); in dw_mci_work_func()
2155 &host->pending_events)) { in dw_mci_work_func()
2156 if (!(host->data_status & (SDMMC_INT_DRTO | in dw_mci_work_func()
2158 send_stop_abort(host, data); in dw_mci_work_func()
2159 dw_mci_stop_dma(host); in dw_mci_work_func()
2165 &host->pending_events)) { in dw_mci_work_func()
2170 if (host->dir_status == DW_MCI_RECV_STATUS) in dw_mci_work_func()
2171 dw_mci_set_drto(host); in dw_mci_work_func()
2175 set_bit(EVENT_XFER_COMPLETE, &host->completed_events); in dw_mci_work_func()
2191 &host->pending_events)) { in dw_mci_work_func()
2192 if (!(host->data_status & (SDMMC_INT_DRTO | in dw_mci_work_func()
2194 send_stop_abort(host, data); in dw_mci_work_func()
2195 dw_mci_stop_dma(host); in dw_mci_work_func()
2204 if (!dw_mci_clear_pending_data_complete(host)) { in dw_mci_work_func()
2210 if (host->dir_status == DW_MCI_RECV_STATUS) in dw_mci_work_func()
2211 dw_mci_set_drto(host); in dw_mci_work_func()
2215 dw_mci_stop_fault_timer(host); in dw_mci_work_func()
2216 host->data = NULL; in dw_mci_work_func()
2217 set_bit(EVENT_DATA_COMPLETE, &host->completed_events); in dw_mci_work_func()
2218 err = dw_mci_data_complete(host, data); in dw_mci_work_func()
2224 dw_mci_request_end(host, mrq); in dw_mci_work_func()
2230 send_stop_abort(host, data); in dw_mci_work_func()
2242 &host->pending_events)) { in dw_mci_work_func()
2243 host->cmd = NULL; in dw_mci_work_func()
2244 dw_mci_request_end(host, mrq); in dw_mci_work_func()
2258 if (!dw_mci_clear_pending_cmd_complete(host)) in dw_mci_work_func()
2263 dw_mci_reset(host); in dw_mci_work_func()
2265 dw_mci_stop_fault_timer(host); in dw_mci_work_func()
2266 host->cmd = NULL; in dw_mci_work_func()
2267 host->data = NULL; in dw_mci_work_func()
2270 dw_mci_command_complete(host, mrq->stop); in dw_mci_work_func()
2272 host->cmd_status = 0; in dw_mci_work_func()
2274 dw_mci_request_end(host, mrq); in dw_mci_work_func()
2279 &host->pending_events)) in dw_mci_work_func()
2287 host->state = state; in dw_mci_work_func()
2289 spin_unlock(&host->lock); in dw_mci_work_func()
2294 static void dw_mci_set_part_bytes(struct dw_mci *host, void *buf, int cnt) in dw_mci_set_part_bytes() argument
2296 memcpy((void *)&host->part_buf, buf, cnt); in dw_mci_set_part_bytes()
2297 host->part_buf_count = cnt; in dw_mci_set_part_bytes()
2301 static int dw_mci_push_part_bytes(struct dw_mci *host, void *buf, int cnt) in dw_mci_push_part_bytes() argument
2303 cnt = min(cnt, (1 << host->data_shift) - host->part_buf_count); in dw_mci_push_part_bytes()
2304 memcpy((void *)&host->part_buf + host->part_buf_count, buf, cnt); in dw_mci_push_part_bytes()
2305 host->part_buf_count += cnt; in dw_mci_push_part_bytes()
2310 static int dw_mci_pull_part_bytes(struct dw_mci *host, void *buf, int cnt) in dw_mci_pull_part_bytes() argument
2312 cnt = min_t(int, cnt, host->part_buf_count); in dw_mci_pull_part_bytes()
2314 memcpy(buf, (void *)&host->part_buf + host->part_buf_start, in dw_mci_pull_part_bytes()
2316 host->part_buf_count -= cnt; in dw_mci_pull_part_bytes()
2317 host->part_buf_start += cnt; in dw_mci_pull_part_bytes()
2323 static void dw_mci_pull_final_bytes(struct dw_mci *host, void *buf, int cnt) in dw_mci_pull_final_bytes() argument
2325 memcpy(buf, &host->part_buf, cnt); in dw_mci_pull_final_bytes()
2326 host->part_buf_start = cnt; in dw_mci_pull_final_bytes()
2327 host->part_buf_count = (1 << host->data_shift) - cnt; in dw_mci_pull_final_bytes()
2330 static void dw_mci_push_data16(struct dw_mci *host, void *buf, int cnt) in dw_mci_push_data16() argument
2332 struct mmc_data *data = host->data; in dw_mci_push_data16()
2336 if (unlikely(host->part_buf_count)) { in dw_mci_push_data16()
2337 int len = dw_mci_push_part_bytes(host, buf, cnt); in dw_mci_push_data16()
2341 if (host->part_buf_count == 2) { in dw_mci_push_data16()
2342 mci_fifo_writew(host->fifo_reg, host->part_buf16); in dw_mci_push_data16()
2343 host->part_buf_count = 0; in dw_mci_push_data16()
2359 mci_fifo_writew(host->fifo_reg, aligned_buf[i]); in dw_mci_push_data16()
2367 mci_fifo_writew(host->fifo_reg, *pdata++); in dw_mci_push_data16()
2372 dw_mci_set_part_bytes(host, buf, cnt); in dw_mci_push_data16()
2376 mci_fifo_writew(host->fifo_reg, host->part_buf16); in dw_mci_push_data16()
2380 static void dw_mci_pull_data16(struct dw_mci *host, void *buf, int cnt) in dw_mci_pull_data16() argument
2392 aligned_buf[i] = mci_fifo_readw(host->fifo_reg); in dw_mci_pull_data16()
2404 *pdata++ = mci_fifo_readw(host->fifo_reg); in dw_mci_pull_data16()
2408 host->part_buf16 = mci_fifo_readw(host->fifo_reg); in dw_mci_pull_data16()
2409 dw_mci_pull_final_bytes(host, buf, cnt); in dw_mci_pull_data16()
2413 static void dw_mci_push_data32(struct dw_mci *host, void *buf, int cnt) in dw_mci_push_data32() argument
2415 struct mmc_data *data = host->data; in dw_mci_push_data32()
2419 if (unlikely(host->part_buf_count)) { in dw_mci_push_data32()
2420 int len = dw_mci_push_part_bytes(host, buf, cnt); in dw_mci_push_data32()
2424 if (host->part_buf_count == 4) { in dw_mci_push_data32()
2425 mci_fifo_writel(host->fifo_reg, host->part_buf32); in dw_mci_push_data32()
2426 host->part_buf_count = 0; in dw_mci_push_data32()
2442 mci_fifo_writel(host->fifo_reg, aligned_buf[i]); in dw_mci_push_data32()
2450 mci_fifo_writel(host->fifo_reg, *pdata++); in dw_mci_push_data32()
2455 dw_mci_set_part_bytes(host, buf, cnt); in dw_mci_push_data32()
2459 mci_fifo_writel(host->fifo_reg, host->part_buf32); in dw_mci_push_data32()
2463 static void dw_mci_pull_data32(struct dw_mci *host, void *buf, int cnt) in dw_mci_pull_data32() argument
2475 aligned_buf[i] = mci_fifo_readl(host->fifo_reg); in dw_mci_pull_data32()
2487 *pdata++ = mci_fifo_readl(host->fifo_reg); in dw_mci_pull_data32()
2491 host->part_buf32 = mci_fifo_readl(host->fifo_reg); in dw_mci_pull_data32()
2492 dw_mci_pull_final_bytes(host, buf, cnt); in dw_mci_pull_data32()
2496 static void dw_mci_push_data64(struct dw_mci *host, void *buf, int cnt) in dw_mci_push_data64() argument
2498 struct mmc_data *data = host->data; in dw_mci_push_data64()
2502 if (unlikely(host->part_buf_count)) { in dw_mci_push_data64()
2503 int len = dw_mci_push_part_bytes(host, buf, cnt); in dw_mci_push_data64()
2508 if (host->part_buf_count == 8) { in dw_mci_push_data64()
2509 mci_fifo_writeq(host->fifo_reg, host->part_buf); in dw_mci_push_data64()
2510 host->part_buf_count = 0; in dw_mci_push_data64()
2526 mci_fifo_writeq(host->fifo_reg, aligned_buf[i]); in dw_mci_push_data64()
2534 mci_fifo_writeq(host->fifo_reg, *pdata++); in dw_mci_push_data64()
2539 dw_mci_set_part_bytes(host, buf, cnt); in dw_mci_push_data64()
2543 mci_fifo_writeq(host->fifo_reg, host->part_buf); in dw_mci_push_data64()
2547 static void dw_mci_pull_data64(struct dw_mci *host, void *buf, int cnt) in dw_mci_pull_data64() argument
2559 aligned_buf[i] = mci_fifo_readq(host->fifo_reg); in dw_mci_pull_data64()
2572 *pdata++ = mci_fifo_readq(host->fifo_reg); in dw_mci_pull_data64()
2576 host->part_buf = mci_fifo_readq(host->fifo_reg); in dw_mci_pull_data64()
2577 dw_mci_pull_final_bytes(host, buf, cnt); in dw_mci_pull_data64()
2581 static void dw_mci_push_data64_32(struct dw_mci *host, void *buf, int cnt) in dw_mci_push_data64_32() argument
2583 struct mmc_data *data = host->data; in dw_mci_push_data64_32()
2587 if (unlikely(host->part_buf_count)) { in dw_mci_push_data64_32()
2588 int len = dw_mci_push_part_bytes(host, buf, cnt); in dw_mci_push_data64_32()
2593 if (host->part_buf_count == 8) { in dw_mci_push_data64_32()
2594 mci_fifo_l_writeq(host->fifo_reg, host->part_buf); in dw_mci_push_data64_32()
2595 host->part_buf_count = 0; in dw_mci_push_data64_32()
2611 mci_fifo_l_writeq(host->fifo_reg, aligned_buf[i]); in dw_mci_push_data64_32()
2619 mci_fifo_l_writeq(host->fifo_reg, *pdata++); in dw_mci_push_data64_32()
2624 dw_mci_set_part_bytes(host, buf, cnt); in dw_mci_push_data64_32()
2628 mci_fifo_l_writeq(host->fifo_reg, host->part_buf); in dw_mci_push_data64_32()
2632 static void dw_mci_pull_data64_32(struct dw_mci *host, void *buf, int cnt) in dw_mci_pull_data64_32() argument
2644 aligned_buf[i] = mci_fifo_l_readq(host->fifo_reg); in dw_mci_pull_data64_32()
2657 *pdata++ = mci_fifo_l_readq(host->fifo_reg); in dw_mci_pull_data64_32()
2661 host->part_buf = mci_fifo_l_readq(host->fifo_reg); in dw_mci_pull_data64_32()
2662 dw_mci_pull_final_bytes(host, buf, cnt); in dw_mci_pull_data64_32()
2666 static void dw_mci_pull_data(struct dw_mci *host, void *buf, int cnt) in dw_mci_pull_data() argument
2671 len = dw_mci_pull_part_bytes(host, buf, cnt); in dw_mci_pull_data()
2678 host->pull_data(host, buf, cnt); in dw_mci_pull_data()
2681 static void dw_mci_read_data_pio(struct dw_mci *host, bool dto) in dw_mci_read_data_pio() argument
2683 struct sg_mapping_iter *sg_miter = &host->sg_miter; in dw_mci_read_data_pio()
2686 struct mmc_data *data = host->data; in dw_mci_read_data_pio()
2687 int shift = host->data_shift; in dw_mci_read_data_pio()
2696 host->sg = sg_miter->piter.sg; in dw_mci_read_data_pio()
2702 fcnt = (SDMMC_GET_FCNT(mci_readl(host, STATUS)) in dw_mci_read_data_pio()
2703 << shift) + host->part_buf_count; in dw_mci_read_data_pio()
2707 dw_mci_pull_data(host, (void *)(buf + offset), len); in dw_mci_read_data_pio()
2714 status = mci_readl(host, MINTSTS); in dw_mci_read_data_pio()
2715 mci_writel(host, RINTSTS, SDMMC_INT_RXDR); in dw_mci_read_data_pio()
2718 (dto && SDMMC_GET_FCNT(mci_readl(host, STATUS)))); in dw_mci_read_data_pio()
2730 host->sg = NULL; in dw_mci_read_data_pio()
2732 set_bit(EVENT_XFER_COMPLETE, &host->pending_events); in dw_mci_read_data_pio()
2735 static void dw_mci_write_data_pio(struct dw_mci *host) in dw_mci_write_data_pio() argument
2737 struct sg_mapping_iter *sg_miter = &host->sg_miter; in dw_mci_write_data_pio()
2740 struct mmc_data *data = host->data; in dw_mci_write_data_pio()
2741 int shift = host->data_shift; in dw_mci_write_data_pio()
2744 unsigned int fifo_depth = host->fifo_depth; in dw_mci_write_data_pio()
2751 host->sg = sg_miter->piter.sg; in dw_mci_write_data_pio()
2758 SDMMC_GET_FCNT(mci_readl(host, STATUS))) in dw_mci_write_data_pio()
2759 << shift) - host->part_buf_count; in dw_mci_write_data_pio()
2763 host->push_data(host, (void *)(buf + offset), len); in dw_mci_write_data_pio()
2770 status = mci_readl(host, MINTSTS); in dw_mci_write_data_pio()
2771 mci_writel(host, RINTSTS, SDMMC_INT_TXDR); in dw_mci_write_data_pio()
2784 host->sg = NULL; in dw_mci_write_data_pio()
2786 set_bit(EVENT_XFER_COMPLETE, &host->pending_events); in dw_mci_write_data_pio()
2789 static void dw_mci_cmd_interrupt(struct dw_mci *host, u32 status) in dw_mci_cmd_interrupt() argument
2791 timer_delete(&host->cto_timer); in dw_mci_cmd_interrupt()
2793 if (!host->cmd_status) in dw_mci_cmd_interrupt()
2794 host->cmd_status = status; in dw_mci_cmd_interrupt()
2798 set_bit(EVENT_CMD_COMPLETE, &host->pending_events); in dw_mci_cmd_interrupt()
2799 queue_work(system_bh_wq, &host->bh_work); in dw_mci_cmd_interrupt()
2801 dw_mci_start_fault_timer(host); in dw_mci_cmd_interrupt()
2804 static void dw_mci_handle_cd(struct dw_mci *host) in dw_mci_handle_cd() argument
2806 struct dw_mci_slot *slot = host->slot; in dw_mci_handle_cd()
2809 msecs_to_jiffies(host->pdata->detect_delay_ms)); in dw_mci_handle_cd()
2814 struct dw_mci *host = dev_id; in dw_mci_interrupt() local
2816 struct dw_mci_slot *slot = host->slot; in dw_mci_interrupt()
2818 pending = mci_readl(host, MINTSTS); /* read-only mask reg */ in dw_mci_interrupt()
2822 if ((host->state == STATE_SENDING_CMD11) && in dw_mci_interrupt()
2824 mci_writel(host, RINTSTS, SDMMC_INT_VOLT_SWITCH); in dw_mci_interrupt()
2831 spin_lock(&host->irq_lock); in dw_mci_interrupt()
2832 dw_mci_cmd_interrupt(host, pending); in dw_mci_interrupt()
2833 spin_unlock(&host->irq_lock); in dw_mci_interrupt()
2835 timer_delete(&host->cmd11_timer); in dw_mci_interrupt()
2839 spin_lock(&host->irq_lock); in dw_mci_interrupt()
2841 timer_delete(&host->cto_timer); in dw_mci_interrupt()
2842 mci_writel(host, RINTSTS, DW_MCI_CMD_ERROR_FLAGS); in dw_mci_interrupt()
2843 host->cmd_status = pending; in dw_mci_interrupt()
2845 set_bit(EVENT_CMD_COMPLETE, &host->pending_events); in dw_mci_interrupt()
2847 spin_unlock(&host->irq_lock); in dw_mci_interrupt()
2851 spin_lock(&host->irq_lock); in dw_mci_interrupt()
2853 if (host->quirks & DW_MMC_QUIRK_EXTENDED_TMOUT) in dw_mci_interrupt()
2854 timer_delete(&host->dto_timer); in dw_mci_interrupt()
2857 mci_writel(host, RINTSTS, DW_MCI_DATA_ERROR_FLAGS); in dw_mci_interrupt()
2858 host->data_status = pending; in dw_mci_interrupt()
2860 set_bit(EVENT_DATA_ERROR, &host->pending_events); in dw_mci_interrupt()
2862 if (host->quirks & DW_MMC_QUIRK_EXTENDED_TMOUT) in dw_mci_interrupt()
2865 &host->pending_events); in dw_mci_interrupt()
2867 queue_work(system_bh_wq, &host->bh_work); in dw_mci_interrupt()
2869 spin_unlock(&host->irq_lock); in dw_mci_interrupt()
2873 spin_lock(&host->irq_lock); in dw_mci_interrupt()
2875 timer_delete(&host->dto_timer); in dw_mci_interrupt()
2877 mci_writel(host, RINTSTS, SDMMC_INT_DATA_OVER); in dw_mci_interrupt()
2878 if (!host->data_status) in dw_mci_interrupt()
2879 host->data_status = pending; in dw_mci_interrupt()
2881 if (host->dir_status == DW_MCI_RECV_STATUS) { in dw_mci_interrupt()
2882 if (host->sg != NULL) in dw_mci_interrupt()
2883 dw_mci_read_data_pio(host, true); in dw_mci_interrupt()
2885 set_bit(EVENT_DATA_COMPLETE, &host->pending_events); in dw_mci_interrupt()
2886 queue_work(system_bh_wq, &host->bh_work); in dw_mci_interrupt()
2888 spin_unlock(&host->irq_lock); in dw_mci_interrupt()
2892 mci_writel(host, RINTSTS, SDMMC_INT_RXDR); in dw_mci_interrupt()
2893 if (host->dir_status == DW_MCI_RECV_STATUS && host->sg) in dw_mci_interrupt()
2894 dw_mci_read_data_pio(host, false); in dw_mci_interrupt()
2898 mci_writel(host, RINTSTS, SDMMC_INT_TXDR); in dw_mci_interrupt()
2899 if (host->dir_status == DW_MCI_SEND_STATUS && host->sg) in dw_mci_interrupt()
2900 dw_mci_write_data_pio(host); in dw_mci_interrupt()
2904 spin_lock(&host->irq_lock); in dw_mci_interrupt()
2906 mci_writel(host, RINTSTS, SDMMC_INT_CMD_DONE); in dw_mci_interrupt()
2907 dw_mci_cmd_interrupt(host, pending); in dw_mci_interrupt()
2909 spin_unlock(&host->irq_lock); in dw_mci_interrupt()
2913 mci_writel(host, RINTSTS, SDMMC_INT_CD); in dw_mci_interrupt()
2914 dw_mci_handle_cd(host); in dw_mci_interrupt()
2918 mci_writel(host, RINTSTS, in dw_mci_interrupt()
2926 if (host->use_dma != TRANS_MODE_IDMAC) in dw_mci_interrupt()
2930 if (host->dma_64bit_address == 1) { in dw_mci_interrupt()
2931 pending = mci_readl(host, IDSTS64); in dw_mci_interrupt()
2933 mci_writel(host, IDSTS64, SDMMC_IDMAC_INT_TI | in dw_mci_interrupt()
2935 mci_writel(host, IDSTS64, SDMMC_IDMAC_INT_NI); in dw_mci_interrupt()
2936 if (!test_bit(EVENT_DATA_ERROR, &host->pending_events)) in dw_mci_interrupt()
2937 host->dma_ops->complete((void *)host); in dw_mci_interrupt()
2940 pending = mci_readl(host, IDSTS); in dw_mci_interrupt()
2942 mci_writel(host, IDSTS, SDMMC_IDMAC_INT_TI | in dw_mci_interrupt()
2944 mci_writel(host, IDSTS, SDMMC_IDMAC_INT_NI); in dw_mci_interrupt()
2945 if (!test_bit(EVENT_DATA_ERROR, &host->pending_events)) in dw_mci_interrupt()
2946 host->dma_ops->complete((void *)host); in dw_mci_interrupt()
2955 struct dw_mci *host = slot->host; in dw_mci_init_slot_caps() local
2956 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_init_slot_caps()
2960 if (host->pdata->caps) in dw_mci_init_slot_caps()
2961 mmc->caps = host->pdata->caps; in dw_mci_init_slot_caps()
2963 if (host->pdata->pm_caps) in dw_mci_init_slot_caps()
2964 mmc->pm_caps = host->pdata->pm_caps; in dw_mci_init_slot_caps()
2969 if (host->dev->of_node) { in dw_mci_init_slot_caps()
2970 ctrl_id = of_alias_get_id(host->dev->of_node, "mshc"); in dw_mci_init_slot_caps()
2974 ctrl_id = to_platform_device(host->dev)->id; in dw_mci_init_slot_caps()
2979 dev_err(host->dev, "invalid controller id %d\n", in dw_mci_init_slot_caps()
2986 if (host->pdata->caps2) in dw_mci_init_slot_caps()
2987 mmc->caps2 = host->pdata->caps2; in dw_mci_init_slot_caps()
2989 /* if host has set a minimum_freq, we should respect it */ in dw_mci_init_slot_caps()
2990 if (host->minimum_speed) in dw_mci_init_slot_caps()
2991 mmc->f_min = host->minimum_speed; in dw_mci_init_slot_caps()
3005 static int dw_mci_init_slot(struct dw_mci *host) in dw_mci_init_slot() argument
3011 mmc = mmc_alloc_host(sizeof(struct dw_mci_slot), host->dev); in dw_mci_init_slot()
3017 slot->sdio_id = host->sdio_id0 + slot->id; in dw_mci_init_slot()
3019 slot->host = host; in dw_mci_init_slot()
3020 host->slot = slot; in dw_mci_init_slot()
3041 if (host->use_dma == TRANS_MODE_IDMAC) { in dw_mci_init_slot()
3042 mmc->max_segs = host->ring_size; in dw_mci_init_slot()
3045 mmc->max_req_size = mmc->max_seg_size * host->ring_size; in dw_mci_init_slot()
3047 } else if (host->use_dma == TRANS_MODE_EDMAC) { in dw_mci_init_slot()
3085 slot->host->slot = NULL; in dw_mci_cleanup_slot()
3089 static void dw_mci_init_dma(struct dw_mci *host) in dw_mci_init_dma() argument
3092 struct device *dev = host->dev; in dw_mci_init_dma()
3105 host->use_dma = SDMMC_GET_TRANS_MODE(mci_readl(host, HCON)); in dw_mci_init_dma()
3106 if (host->use_dma == DMA_INTERFACE_IDMA) { in dw_mci_init_dma()
3107 host->use_dma = TRANS_MODE_IDMAC; in dw_mci_init_dma()
3108 } else if (host->use_dma == DMA_INTERFACE_DWDMA || in dw_mci_init_dma()
3109 host->use_dma == DMA_INTERFACE_GDMA) { in dw_mci_init_dma()
3110 host->use_dma = TRANS_MODE_EDMAC; in dw_mci_init_dma()
3116 if (host->use_dma == TRANS_MODE_IDMAC) { in dw_mci_init_dma()
3121 addr_config = SDMMC_GET_ADDR_CONFIG(mci_readl(host, HCON)); in dw_mci_init_dma()
3124 /* host supports IDMAC in 64-bit address mode */ in dw_mci_init_dma()
3125 host->dma_64bit_address = 1; in dw_mci_init_dma()
3126 dev_info(host->dev, in dw_mci_init_dma()
3128 if (!dma_set_mask(host->dev, DMA_BIT_MASK(64))) in dw_mci_init_dma()
3129 dma_set_coherent_mask(host->dev, in dw_mci_init_dma()
3132 /* host supports IDMAC in 32-bit address mode */ in dw_mci_init_dma()
3133 host->dma_64bit_address = 0; in dw_mci_init_dma()
3134 dev_info(host->dev, in dw_mci_init_dma()
3139 host->sg_cpu = dmam_alloc_coherent(host->dev, in dw_mci_init_dma()
3141 &host->sg_dma, GFP_KERNEL); in dw_mci_init_dma()
3142 if (!host->sg_cpu) { in dw_mci_init_dma()
3143 dev_err(host->dev, in dw_mci_init_dma()
3149 host->dma_ops = &dw_mci_idmac_ops; in dw_mci_init_dma()
3150 dev_info(host->dev, "Using internal DMA controller.\n"); in dw_mci_init_dma()
3157 host->dma_ops = &dw_mci_edmac_ops; in dw_mci_init_dma()
3158 dev_info(host->dev, "Using external DMA controller.\n"); in dw_mci_init_dma()
3161 if (host->dma_ops->init && host->dma_ops->start && in dw_mci_init_dma()
3162 host->dma_ops->stop && host->dma_ops->cleanup) { in dw_mci_init_dma()
3163 if (host->dma_ops->init(host)) { in dw_mci_init_dma()
3164 dev_err(host->dev, "%s: Unable to initialize DMA Controller.\n", in dw_mci_init_dma()
3169 dev_err(host->dev, "DMA initialization not found.\n"); in dw_mci_init_dma()
3176 dev_info(host->dev, "Using PIO mode.\n"); in dw_mci_init_dma()
3177 host->use_dma = TRANS_MODE_PIO; in dw_mci_init_dma()
3182 struct dw_mci *host = from_timer(host, t, cmd11_timer); in dw_mci_cmd11_timer() local
3184 if (host->state != STATE_SENDING_CMD11) { in dw_mci_cmd11_timer()
3185 dev_warn(host->dev, "Unexpected CMD11 timeout\n"); in dw_mci_cmd11_timer()
3189 host->cmd_status = SDMMC_INT_RTO; in dw_mci_cmd11_timer()
3190 set_bit(EVENT_CMD_COMPLETE, &host->pending_events); in dw_mci_cmd11_timer()
3191 queue_work(system_bh_wq, &host->bh_work); in dw_mci_cmd11_timer()
3196 struct dw_mci *host = from_timer(host, t, cto_timer); in dw_mci_cto_timer() local
3200 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_cto_timer()
3210 pending = mci_readl(host, MINTSTS); /* read-only mask reg */ in dw_mci_cto_timer()
3213 dev_warn(host->dev, "Unexpected interrupt latency\n"); in dw_mci_cto_timer()
3216 if (test_bit(EVENT_CMD_COMPLETE, &host->pending_events)) { in dw_mci_cto_timer()
3218 dev_warn(host->dev, "CTO timeout when already completed\n"); in dw_mci_cto_timer()
3226 switch (host->state) { in dw_mci_cto_timer()
3235 host->cmd_status = SDMMC_INT_RTO; in dw_mci_cto_timer()
3236 set_bit(EVENT_CMD_COMPLETE, &host->pending_events); in dw_mci_cto_timer()
3237 queue_work(system_bh_wq, &host->bh_work); in dw_mci_cto_timer()
3240 dev_warn(host->dev, "Unexpected command timeout, state %d\n", in dw_mci_cto_timer()
3241 host->state); in dw_mci_cto_timer()
3246 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_cto_timer()
3251 struct dw_mci *host = from_timer(host, t, dto_timer); in dw_mci_dto_timer() local
3255 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_dto_timer()
3261 pending = mci_readl(host, MINTSTS); /* read-only mask reg */ in dw_mci_dto_timer()
3264 dev_warn(host->dev, "Unexpected data interrupt latency\n"); in dw_mci_dto_timer()
3267 if (test_bit(EVENT_DATA_COMPLETE, &host->pending_events)) { in dw_mci_dto_timer()
3269 dev_warn(host->dev, "DTO timeout when already completed\n"); in dw_mci_dto_timer()
3277 switch (host->state) { in dw_mci_dto_timer()
3285 host->data_status = SDMMC_INT_DRTO; in dw_mci_dto_timer()
3286 set_bit(EVENT_DATA_ERROR, &host->pending_events); in dw_mci_dto_timer()
3287 set_bit(EVENT_DATA_COMPLETE, &host->pending_events); in dw_mci_dto_timer()
3288 queue_work(system_bh_wq, &host->bh_work); in dw_mci_dto_timer()
3291 dev_warn(host->dev, "Unexpected data timeout, state %d\n", in dw_mci_dto_timer()
3292 host->state); in dw_mci_dto_timer()
3297 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_dto_timer()
3301 static struct dw_mci_board *dw_mci_parse_dt(struct dw_mci *host) in dw_mci_parse_dt() argument
3304 struct device *dev = host->dev; in dw_mci_parse_dt()
3305 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_parse_dt()
3325 device_property_read_u32(dev, "data-addr", &host->data_addr_override); in dw_mci_parse_dt()
3328 host->wm_aligned = true; in dw_mci_parse_dt()
3334 ret = drv_data->parse_dt(host); in dw_mci_parse_dt()
3343 static struct dw_mci_board *dw_mci_parse_dt(struct dw_mci *host) in dw_mci_parse_dt() argument
3349 static void dw_mci_enable_cd(struct dw_mci *host) in dw_mci_enable_cd() argument
3358 if (host->slot->mmc->caps & MMC_CAP_NEEDS_POLL) in dw_mci_enable_cd()
3361 if (mmc_gpio_get_cd(host->slot->mmc) < 0) { in dw_mci_enable_cd()
3362 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_enable_cd()
3363 temp = mci_readl(host, INTMASK); in dw_mci_enable_cd()
3365 mci_writel(host, INTMASK, temp); in dw_mci_enable_cd()
3366 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_enable_cd()
3370 int dw_mci_probe(struct dw_mci *host) in dw_mci_probe() argument
3372 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_probe()
3376 if (!host->pdata) { in dw_mci_probe()
3377 host->pdata = dw_mci_parse_dt(host); in dw_mci_probe()
3378 if (IS_ERR(host->pdata)) in dw_mci_probe()
3379 return dev_err_probe(host->dev, PTR_ERR(host->pdata), in dw_mci_probe()
3383 host->biu_clk = devm_clk_get(host->dev, "biu"); in dw_mci_probe()
3384 if (IS_ERR(host->biu_clk)) { in dw_mci_probe()
3385 dev_dbg(host->dev, "biu clock not available\n"); in dw_mci_probe()
3386 ret = PTR_ERR(host->biu_clk); in dw_mci_probe()
3391 ret = clk_prepare_enable(host->biu_clk); in dw_mci_probe()
3393 dev_err(host->dev, "failed to enable biu clock\n"); in dw_mci_probe()
3398 host->ciu_clk = devm_clk_get(host->dev, "ciu"); in dw_mci_probe()
3399 if (IS_ERR(host->ciu_clk)) { in dw_mci_probe()
3400 dev_dbg(host->dev, "ciu clock not available\n"); in dw_mci_probe()
3401 ret = PTR_ERR(host->ciu_clk); in dw_mci_probe()
3405 host->bus_hz = host->pdata->bus_hz; in dw_mci_probe()
3407 ret = clk_prepare_enable(host->ciu_clk); in dw_mci_probe()
3409 dev_err(host->dev, "failed to enable ciu clock\n"); in dw_mci_probe()
3413 if (host->pdata->bus_hz) { in dw_mci_probe()
3414 ret = clk_set_rate(host->ciu_clk, host->pdata->bus_hz); in dw_mci_probe()
3416 dev_warn(host->dev, in dw_mci_probe()
3418 host->pdata->bus_hz); in dw_mci_probe()
3420 host->bus_hz = clk_get_rate(host->ciu_clk); in dw_mci_probe()
3423 if (!host->bus_hz) { in dw_mci_probe()
3424 dev_err(host->dev, in dw_mci_probe()
3430 if (host->pdata->rstc) { in dw_mci_probe()
3431 reset_control_assert(host->pdata->rstc); in dw_mci_probe()
3433 reset_control_deassert(host->pdata->rstc); in dw_mci_probe()
3437 ret = drv_data->init(host); in dw_mci_probe()
3439 dev_err(host->dev, in dw_mci_probe()
3445 timer_setup(&host->cmd11_timer, dw_mci_cmd11_timer, 0); in dw_mci_probe()
3446 timer_setup(&host->cto_timer, dw_mci_cto_timer, 0); in dw_mci_probe()
3447 timer_setup(&host->dto_timer, dw_mci_dto_timer, 0); in dw_mci_probe()
3449 spin_lock_init(&host->lock); in dw_mci_probe()
3450 spin_lock_init(&host->irq_lock); in dw_mci_probe()
3451 INIT_LIST_HEAD(&host->queue); in dw_mci_probe()
3453 dw_mci_init_fault(host); in dw_mci_probe()
3456 * Get the host data width - this assumes that HCON has been set with in dw_mci_probe()
3459 i = SDMMC_GET_HDATA_WIDTH(mci_readl(host, HCON)); in dw_mci_probe()
3461 host->push_data = dw_mci_push_data16; in dw_mci_probe()
3462 host->pull_data = dw_mci_pull_data16; in dw_mci_probe()
3464 host->data_shift = 1; in dw_mci_probe()
3466 if ((host->quirks & DW_MMC_QUIRK_FIFO64_32)) { in dw_mci_probe()
3467 host->push_data = dw_mci_push_data64_32; in dw_mci_probe()
3468 host->pull_data = dw_mci_pull_data64_32; in dw_mci_probe()
3470 host->push_data = dw_mci_push_data64; in dw_mci_probe()
3471 host->pull_data = dw_mci_pull_data64; in dw_mci_probe()
3474 host->data_shift = 3; in dw_mci_probe()
3478 "HCON reports a reserved host data width!\n" in dw_mci_probe()
3480 host->push_data = dw_mci_push_data32; in dw_mci_probe()
3481 host->pull_data = dw_mci_pull_data32; in dw_mci_probe()
3483 host->data_shift = 2; in dw_mci_probe()
3487 if (!dw_mci_ctrl_reset(host, SDMMC_CTRL_ALL_RESET_FLAGS)) { in dw_mci_probe()
3492 host->dma_ops = host->pdata->dma_ops; in dw_mci_probe()
3493 dw_mci_init_dma(host); in dw_mci_probe()
3495 /* Clear the interrupts for the host controller */ in dw_mci_probe()
3496 mci_writel(host, RINTSTS, 0xFFFFFFFF); in dw_mci_probe()
3497 mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */ in dw_mci_probe()
3500 mci_writel(host, TMOUT, 0xFFFFFFFF); in dw_mci_probe()
3506 if (!host->pdata->fifo_depth) { in dw_mci_probe()
3513 fifo_size = mci_readl(host, FIFOTH); in dw_mci_probe()
3516 fifo_size = host->pdata->fifo_depth; in dw_mci_probe()
3518 host->fifo_depth = fifo_size; in dw_mci_probe()
3519 host->fifoth_val = in dw_mci_probe()
3521 mci_writel(host, FIFOTH, host->fifoth_val); in dw_mci_probe()
3524 mci_writel(host, CLKENA, 0); in dw_mci_probe()
3525 mci_writel(host, CLKSRC, 0); in dw_mci_probe()
3531 host->verid = SDMMC_GET_VERID(mci_readl(host, VERID)); in dw_mci_probe()
3532 dev_info(host->dev, "Version ID is %04x\n", host->verid); in dw_mci_probe()
3534 if (host->data_addr_override) in dw_mci_probe()
3535 host->fifo_reg = host->regs + host->data_addr_override; in dw_mci_probe()
3536 else if (host->verid < DW_MMC_240A) in dw_mci_probe()
3537 host->fifo_reg = host->regs + DATA_OFFSET; in dw_mci_probe()
3539 host->fifo_reg = host->regs + DATA_240A_OFFSET; in dw_mci_probe()
3541 INIT_WORK(&host->bh_work, dw_mci_work_func); in dw_mci_probe()
3542 ret = devm_request_irq(host->dev, host->irq, dw_mci_interrupt, in dw_mci_probe()
3543 host->irq_flags, "dw-mci", host); in dw_mci_probe()
3551 mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER | in dw_mci_probe()
3555 mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); in dw_mci_probe()
3557 dev_info(host->dev, in dw_mci_probe()
3558 "DW MMC controller at irq %d,%d bit host data width,%u deep fifo\n", in dw_mci_probe()
3559 host->irq, width, fifo_size); in dw_mci_probe()
3562 ret = dw_mci_init_slot(host); in dw_mci_probe()
3564 dev_dbg(host->dev, "slot %d init failed\n", i); in dw_mci_probe()
3569 dw_mci_enable_cd(host); in dw_mci_probe()
3574 if (host->use_dma && host->dma_ops->exit) in dw_mci_probe()
3575 host->dma_ops->exit(host); in dw_mci_probe()
3577 reset_control_assert(host->pdata->rstc); in dw_mci_probe()
3580 clk_disable_unprepare(host->ciu_clk); in dw_mci_probe()
3583 clk_disable_unprepare(host->biu_clk); in dw_mci_probe()
3589 void dw_mci_remove(struct dw_mci *host) in dw_mci_remove() argument
3591 dev_dbg(host->dev, "remove slot\n"); in dw_mci_remove()
3592 if (host->slot) in dw_mci_remove()
3593 dw_mci_cleanup_slot(host->slot); in dw_mci_remove()
3595 mci_writel(host, RINTSTS, 0xFFFFFFFF); in dw_mci_remove()
3596 mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */ in dw_mci_remove()
3599 mci_writel(host, CLKENA, 0); in dw_mci_remove()
3600 mci_writel(host, CLKSRC, 0); in dw_mci_remove()
3602 if (host->use_dma && host->dma_ops->exit) in dw_mci_remove()
3603 host->dma_ops->exit(host); in dw_mci_remove()
3605 reset_control_assert(host->pdata->rstc); in dw_mci_remove()
3607 clk_disable_unprepare(host->ciu_clk); in dw_mci_remove()
3608 clk_disable_unprepare(host->biu_clk); in dw_mci_remove()
3617 struct dw_mci *host = dev_get_drvdata(dev); in dw_mci_runtime_suspend() local
3619 if (host->use_dma && host->dma_ops->exit) in dw_mci_runtime_suspend()
3620 host->dma_ops->exit(host); in dw_mci_runtime_suspend()
3622 clk_disable_unprepare(host->ciu_clk); in dw_mci_runtime_suspend()
3624 if (host->slot && in dw_mci_runtime_suspend()
3625 (mmc_can_gpio_cd(host->slot->mmc) || in dw_mci_runtime_suspend()
3626 !mmc_card_is_removable(host->slot->mmc))) in dw_mci_runtime_suspend()
3627 clk_disable_unprepare(host->biu_clk); in dw_mci_runtime_suspend()
3636 struct dw_mci *host = dev_get_drvdata(dev); in dw_mci_runtime_resume() local
3638 if (host->slot && in dw_mci_runtime_resume()
3639 (mmc_can_gpio_cd(host->slot->mmc) || in dw_mci_runtime_resume()
3640 !mmc_card_is_removable(host->slot->mmc))) { in dw_mci_runtime_resume()
3641 ret = clk_prepare_enable(host->biu_clk); in dw_mci_runtime_resume()
3646 ret = clk_prepare_enable(host->ciu_clk); in dw_mci_runtime_resume()
3650 if (!dw_mci_ctrl_reset(host, SDMMC_CTRL_ALL_RESET_FLAGS)) { in dw_mci_runtime_resume()
3651 clk_disable_unprepare(host->ciu_clk); in dw_mci_runtime_resume()
3656 if (host->use_dma && host->dma_ops->init) in dw_mci_runtime_resume()
3657 host->dma_ops->init(host); in dw_mci_runtime_resume()
3663 mci_writel(host, FIFOTH, host->fifoth_val); in dw_mci_runtime_resume()
3664 host->prev_blksz = 0; in dw_mci_runtime_resume()
3667 mci_writel(host, TMOUT, 0xFFFFFFFF); in dw_mci_runtime_resume()
3669 mci_writel(host, RINTSTS, 0xFFFFFFFF); in dw_mci_runtime_resume()
3670 mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER | in dw_mci_runtime_resume()
3673 mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); in dw_mci_runtime_resume()
3676 if (host->slot && host->slot->mmc->pm_flags & MMC_PM_KEEP_POWER) in dw_mci_runtime_resume()
3677 dw_mci_set_ios(host->slot->mmc, &host->slot->mmc->ios); in dw_mci_runtime_resume()
3680 dw_mci_setup_bus(host->slot, true); in dw_mci_runtime_resume()
3683 if (sdio_irq_claimed(host->slot->mmc)) in dw_mci_runtime_resume()
3684 __dw_mci_enable_sdio_irq(host->slot, 1); in dw_mci_runtime_resume()
3687 dw_mci_enable_cd(host); in dw_mci_runtime_resume()
3692 if (host->slot && in dw_mci_runtime_resume()
3693 (mmc_can_gpio_cd(host->slot->mmc) || in dw_mci_runtime_resume()
3694 !mmc_card_is_removable(host->slot->mmc))) in dw_mci_runtime_resume()
3695 clk_disable_unprepare(host->biu_clk); in dw_mci_runtime_resume()