Lines Matching +full:mpfs +full:- +full:can
1 # SPDX-License-Identifier: GPL-2.0-only
6 on-chip processors through queued messages and interrupt driven
16 The controller has 3 mailbox channels, the last of which can be
35 ARM MHUv3 controllers can implement a varying number of extensions
37 will be discovered and possibly managed at probe-time.
64 which can be used in Secure mode only.
82 running on the Cortex-M3 rWTM secure processor of the Armada 37xx
99 This driver provides support for inter-processor communication
180 tristate "PolarFire SoC (MPFS) Mailbox"
185 This driver adds support for the PolarFire SoC (MPFS) mailbox controller.
188 module will be called mailbox-mpfs.
193 tristate "Microchip Inter-processor Communication (IPC) SBI driver"
198 Inter-process communication (IPC) controller.
201 module will be called mailbox-mchp-ipc-sbi.
210 providing an interface for invoking the inter-process communication
223 tristate "APM SoC X-Gene SLIMpro Mailbox Controller"
226 An implementation of the APM X-Gene Interprocessor Communication
227 Mailbox (IPCM) between the ARM 64-bit cores and SLIMpro controller.
228 It is used to send short messages between ARM64-bit cores and
230 want to use the APM X-Gene SLIMpro IPCM support.
256 with hardware for Inter-Processor Communication Controller (IPCC)
317 Qualcomm Technologies, Inc. Inter-Processor Communication Controller
324 tristate "T-head TH1520 Mailbox"
327 Mailbox driver implementation for the Thead TH-1520 platform. Enables