Lines Matching +full:meson +full:- +full:gpio +full:- +full:intc
1 # SPDX-License-Identifier: GPL-2.0-only
116 tristate "Broadcom BCM2712 MSI-X Interrupt Peripheral support"
125 Enable support for the Broadcom BCM2712 MSI-X target peripheral
126 (MIP) needed by brcmstb PCIe to handle MSI-X interrupts on
138 tristate "Broadcom STB 7038-style L1/L2 interrupt controller driver"
146 tristate "Broadcom STB 7120-style L2 interrupt controller driver"
200 will be called irq-lan966x-oic.
241 bool "J-Core integrated AIC" if COMPILE_TEST
245 Support for the J-Core integrated AIC.
252 bool "Renesas INTC External IRQ Pin Support" if COMPILE_TEST
256 interrupt pins, as found on SH/R-Mobile and R-Car Gen1 SoCs.
259 bool "Renesas R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} IRQC support" if COMPILE_TEST
264 devices, as found on R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} SoCs.
321 tristate "TS-4800 IRQ controller"
326 Support for the TS-4800 FPGA IRQ controller
467 tristate "Meson GPIO Interrupt Multiplexer"
472 Support Meson SoC Family GPIO Interrupt Multiplexer
504 Say yes here to enable C-SKY SMP interrupt controller driver used
505 for C-SKY SMP system.
510 bool "C-SKY APB Interrupt Controller"
513 Say yes here to enable C-SKY APB interrupt controller driver used
514 by C-SKY single core SOC system. It uses mmio map apb-bus to visit
543 CPU-to-CPU MSI controller. This requires a specially crafted DT
549 bool "Loongson-1 Interrupt Controller"
555 Support for the Loongson-1 platform Interrupt Controller.
586 This enables support for the PRU-ICSS Local Interrupt Controller
587 present within a PRU-ICSS subsystem present on various TI SoCs.
588 The PRUSS INTC enables various interrupts to be routed to multiple
627 This enables support for the INTC chip found in StarFive JH8100
633 bool "THEAD C9XX ACLINT S-mode IPI Interrupt Controller"
639 This enables support for T-HEAD specific ACLINT SSWI device
665 Documentation/arch/loongarch/irq-chip-model.rst.
693 Support for the Loongson-3 HyperTransport PIC Controller.
778 This on-chip interrupt controller enables MSI sources to be
786 SP7021 SoC has 2 Chips: C-Chip & P-Chip. This is used as a
787 chained controller, routing all interrupt source in P-Chip to
788 the primary controller on C-Chip.