Lines Matching +full:sleep +full:- +full:map
1 // SPDX-License-Identifier: GPL-2.0-or-later
72 *accel = &pack2->accel; in inv_icm42600_fifo_decode_packet()
73 *gyro = &pack2->gyro; in inv_icm42600_fifo_decode_packet()
74 *temp = &pack2->temp; in inv_icm42600_fifo_decode_packet()
75 *timestamp = &pack2->timestamp; in inv_icm42600_fifo_decode_packet()
81 *accel = &pack1->data; in inv_icm42600_fifo_decode_packet()
83 *temp = &pack1->temp; in inv_icm42600_fifo_decode_packet()
91 *gyro = &pack1->data; in inv_icm42600_fifo_decode_packet()
92 *temp = &pack1->temp; in inv_icm42600_fifo_decode_packet()
98 return -EINVAL; in inv_icm42600_fifo_decode_packet()
105 if (st->fifo.en & INV_ICM42600_SENSOR_GYRO) in inv_icm42600_buffer_update_fifo_period()
106 period_gyro = inv_icm42600_odr_to_period(st->conf.gyro.odr); in inv_icm42600_buffer_update_fifo_period()
110 if (st->fifo.en & INV_ICM42600_SENSOR_ACCEL) in inv_icm42600_buffer_update_fifo_period()
111 period_accel = inv_icm42600_odr_to_period(st->conf.accel.odr); in inv_icm42600_buffer_update_fifo_period()
120 st->fifo.period = period; in inv_icm42600_buffer_update_fifo_period()
143 ret = regmap_update_bits(st->map, INV_ICM42600_REG_FIFO_CONFIG1, mask, val); in inv_icm42600_buffer_set_fifo_en()
147 st->fifo.en = fifo_en; in inv_icm42600_buffer_set_fifo_en()
182 * inv_icm42600_buffer_update_watermark - update watermark FIFO threshold
213 packet_size = inv_icm42600_get_packet_size(st->fifo.en); in inv_icm42600_buffer_update_watermark()
216 wm_gyro = inv_icm42600_wm_truncate(st->fifo.watermark.gyro, packet_size); in inv_icm42600_buffer_update_watermark()
217 wm_accel = inv_icm42600_wm_truncate(st->fifo.watermark.accel, packet_size); in inv_icm42600_buffer_update_watermark()
219 period_gyro = inv_icm42600_odr_to_period(st->conf.gyro.odr) / 1000UL; in inv_icm42600_buffer_update_watermark()
220 period_accel = inv_icm42600_odr_to_period(st->conf.accel.odr) / 1000UL; in inv_icm42600_buffer_update_watermark()
230 st->fifo.watermark.eff_accel = wm_accel; in inv_icm42600_buffer_update_watermark()
233 st->fifo.watermark.eff_gyro = wm_gyro; in inv_icm42600_buffer_update_watermark()
237 latency = latency_gyro - (latency_accel % latency_gyro); in inv_icm42600_buffer_update_watermark()
239 latency = latency_accel - (latency_gyro % latency_accel); in inv_icm42600_buffer_update_watermark()
250 st->fifo.watermark.eff_gyro = latency / period_gyro; in inv_icm42600_buffer_update_watermark()
251 if (st->fifo.watermark.eff_gyro < 1) in inv_icm42600_buffer_update_watermark()
252 st->fifo.watermark.eff_gyro = 1; in inv_icm42600_buffer_update_watermark()
253 st->fifo.watermark.eff_accel = latency / period_accel; in inv_icm42600_buffer_update_watermark()
254 if (st->fifo.watermark.eff_accel < 1) in inv_icm42600_buffer_update_watermark()
255 st->fifo.watermark.eff_accel = 1; in inv_icm42600_buffer_update_watermark()
262 ret = regmap_update_bits_check(st->map, INV_ICM42600_REG_INT_SOURCE0, in inv_icm42600_buffer_update_watermark()
269 memcpy(st->buffer, &raw_wm, sizeof(raw_wm)); in inv_icm42600_buffer_update_watermark()
270 ret = regmap_bulk_write(st->map, INV_ICM42600_REG_FIFO_WATERMARK, in inv_icm42600_buffer_update_watermark()
271 st->buffer, sizeof(raw_wm)); in inv_icm42600_buffer_update_watermark()
277 ret = regmap_set_bits(st->map, INV_ICM42600_REG_INT_SOURCE0, in inv_icm42600_buffer_update_watermark()
289 struct device *dev = regmap_get_device(st->map); in inv_icm42600_buffer_preenable()
291 struct inv_sensors_timestamp *ts = &sensor_st->ts; in inv_icm42600_buffer_preenable()
295 mutex_lock(&st->lock); in inv_icm42600_buffer_preenable()
297 mutex_unlock(&st->lock); in inv_icm42600_buffer_preenable()
311 mutex_lock(&st->lock); in inv_icm42600_buffer_postenable()
314 if (st->fifo.on) { in inv_icm42600_buffer_postenable()
320 ret = regmap_set_bits(st->map, INV_ICM42600_REG_INT_SOURCE0, in inv_icm42600_buffer_postenable()
326 ret = regmap_write(st->map, INV_ICM42600_REG_SIGNAL_PATH_RESET, in inv_icm42600_buffer_postenable()
332 ret = regmap_write(st->map, INV_ICM42600_REG_FIFO_CONFIG, in inv_icm42600_buffer_postenable()
338 ret = regmap_bulk_read(st->map, INV_ICM42600_REG_FIFO_COUNT, st->buffer, 2); in inv_icm42600_buffer_postenable()
344 st->fifo.on++; in inv_icm42600_buffer_postenable()
346 mutex_unlock(&st->lock); in inv_icm42600_buffer_postenable()
355 mutex_lock(&st->lock); in inv_icm42600_buffer_predisable()
358 if (st->fifo.on > 1) { in inv_icm42600_buffer_predisable()
364 ret = regmap_write(st->map, INV_ICM42600_REG_FIFO_CONFIG, in inv_icm42600_buffer_predisable()
370 ret = regmap_write(st->map, INV_ICM42600_REG_SIGNAL_PATH_RESET, in inv_icm42600_buffer_predisable()
376 ret = regmap_clear_bits(st->map, INV_ICM42600_REG_INT_SOURCE0, in inv_icm42600_buffer_predisable()
383 st->fifo.on--; in inv_icm42600_buffer_predisable()
385 mutex_unlock(&st->lock); in inv_icm42600_buffer_predisable()
392 struct device *dev = regmap_get_device(st->map); in inv_icm42600_buffer_postdisable()
398 unsigned int sleep; in inv_icm42600_buffer_postdisable() local
401 if (indio_dev == st->indio_gyro) { in inv_icm42600_buffer_postdisable()
403 watermark = &st->fifo.watermark.gyro; in inv_icm42600_buffer_postdisable()
404 } else if (indio_dev == st->indio_accel) { in inv_icm42600_buffer_postdisable()
406 watermark = &st->fifo.watermark.accel; in inv_icm42600_buffer_postdisable()
408 return -EINVAL; in inv_icm42600_buffer_postdisable()
411 mutex_lock(&st->lock); in inv_icm42600_buffer_postdisable()
413 ret = inv_icm42600_buffer_set_fifo_en(st, st->fifo.en & ~sensor); in inv_icm42600_buffer_postdisable()
431 if (!st->fifo.on) in inv_icm42600_buffer_postdisable()
435 mutex_unlock(&st->lock); in inv_icm42600_buffer_postdisable()
437 /* sleep maximum required time */ in inv_icm42600_buffer_postdisable()
438 sleep = max(sleep_sensor, sleep_temp); in inv_icm42600_buffer_postdisable()
439 if (sleep) in inv_icm42600_buffer_postdisable()
440 msleep(sleep); in inv_icm42600_buffer_postdisable()
467 st->fifo.count = 0; in inv_icm42600_buffer_fifo_read()
468 st->fifo.nb.gyro = 0; in inv_icm42600_buffer_fifo_read()
469 st->fifo.nb.accel = 0; in inv_icm42600_buffer_fifo_read()
470 st->fifo.nb.total = 0; in inv_icm42600_buffer_fifo_read()
474 max_count = sizeof(st->fifo.data); in inv_icm42600_buffer_fifo_read()
476 max_count = max * inv_icm42600_get_packet_size(st->fifo.en); in inv_icm42600_buffer_fifo_read()
479 raw_fifo_count = (__be16 *)st->buffer; in inv_icm42600_buffer_fifo_read()
480 ret = regmap_bulk_read(st->map, INV_ICM42600_REG_FIFO_COUNT, in inv_icm42600_buffer_fifo_read()
484 st->fifo.count = be16_to_cpup(raw_fifo_count); in inv_icm42600_buffer_fifo_read()
487 if (st->fifo.count == 0) in inv_icm42600_buffer_fifo_read()
489 if (st->fifo.count > max_count) in inv_icm42600_buffer_fifo_read()
490 st->fifo.count = max_count; in inv_icm42600_buffer_fifo_read()
493 ret = regmap_noinc_read(st->map, INV_ICM42600_REG_FIFO_DATA, in inv_icm42600_buffer_fifo_read()
494 st->fifo.data, st->fifo.count); in inv_icm42600_buffer_fifo_read()
499 for (i = 0; i < st->fifo.count; i += size) { in inv_icm42600_buffer_fifo_read()
500 size = inv_icm42600_fifo_decode_packet(&st->fifo.data[i], in inv_icm42600_buffer_fifo_read()
505 st->fifo.nb.gyro++; in inv_icm42600_buffer_fifo_read()
507 st->fifo.nb.accel++; in inv_icm42600_buffer_fifo_read()
508 st->fifo.nb.total++; in inv_icm42600_buffer_fifo_read()
516 struct inv_icm42600_sensor_state *gyro_st = iio_priv(st->indio_gyro); in inv_icm42600_buffer_fifo_parse()
517 struct inv_icm42600_sensor_state *accel_st = iio_priv(st->indio_accel); in inv_icm42600_buffer_fifo_parse()
521 if (st->fifo.nb.total == 0) in inv_icm42600_buffer_fifo_parse()
525 if (st->fifo.nb.gyro > 0) { in inv_icm42600_buffer_fifo_parse()
526 ts = &gyro_st->ts; in inv_icm42600_buffer_fifo_parse()
527 inv_sensors_timestamp_interrupt(ts, st->fifo.watermark.eff_gyro, in inv_icm42600_buffer_fifo_parse()
528 st->timestamp.gyro); in inv_icm42600_buffer_fifo_parse()
529 ret = inv_icm42600_gyro_parse_fifo(st->indio_gyro); in inv_icm42600_buffer_fifo_parse()
535 if (st->fifo.nb.accel > 0) { in inv_icm42600_buffer_fifo_parse()
536 ts = &accel_st->ts; in inv_icm42600_buffer_fifo_parse()
537 inv_sensors_timestamp_interrupt(ts, st->fifo.watermark.eff_accel, in inv_icm42600_buffer_fifo_parse()
538 st->timestamp.accel); in inv_icm42600_buffer_fifo_parse()
539 ret = inv_icm42600_accel_parse_fifo(st->indio_accel); in inv_icm42600_buffer_fifo_parse()
550 struct inv_icm42600_sensor_state *gyro_st = iio_priv(st->indio_gyro); in inv_icm42600_buffer_hwfifo_flush()
551 struct inv_icm42600_sensor_state *accel_st = iio_priv(st->indio_accel); in inv_icm42600_buffer_hwfifo_flush()
556 gyro_ts = iio_get_time_ns(st->indio_gyro); in inv_icm42600_buffer_hwfifo_flush()
557 accel_ts = iio_get_time_ns(st->indio_accel); in inv_icm42600_buffer_hwfifo_flush()
563 if (st->fifo.nb.total == 0) in inv_icm42600_buffer_hwfifo_flush()
566 if (st->fifo.nb.gyro > 0) { in inv_icm42600_buffer_hwfifo_flush()
567 ts = &gyro_st->ts; in inv_icm42600_buffer_hwfifo_flush()
568 inv_sensors_timestamp_interrupt(ts, st->fifo.nb.gyro, gyro_ts); in inv_icm42600_buffer_hwfifo_flush()
569 ret = inv_icm42600_gyro_parse_fifo(st->indio_gyro); in inv_icm42600_buffer_hwfifo_flush()
574 if (st->fifo.nb.accel > 0) { in inv_icm42600_buffer_hwfifo_flush()
575 ts = &accel_st->ts; in inv_icm42600_buffer_hwfifo_flush()
576 inv_sensors_timestamp_interrupt(ts, st->fifo.nb.accel, accel_ts); in inv_icm42600_buffer_hwfifo_flush()
577 ret = inv_icm42600_accel_parse_fifo(st->indio_accel); in inv_icm42600_buffer_hwfifo_flush()
590 st->fifo.watermark.eff_gyro = 1; in inv_icm42600_buffer_init()
591 st->fifo.watermark.eff_accel = 1; in inv_icm42600_buffer_init()
595 * - use invalid value in inv_icm42600_buffer_init()
596 * - FIFO count in bytes in inv_icm42600_buffer_init()
597 * - FIFO count in big endian in inv_icm42600_buffer_init()
600 ret = regmap_update_bits(st->map, INV_ICM42600_REG_INTF_CONFIG0, in inv_icm42600_buffer_init()
611 return regmap_update_bits(st->map, INV_ICM42600_REG_FIFO_CONFIG1, in inv_icm42600_buffer_init()