Lines Matching +full:back +full:- +full:to +full:- +full:back
1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright 2016-2024 Analog Devices Inc.
26 #include <linux/fpga/adi-axi-common.h>
28 #include <linux/iio/buffer-dmaengine.h>
32 #include "ad3552r-hs.h"
109 * lock to protect multiple accesses to the device registers and global
120 static int axi_dac_enable(struct iio_backend *back) in axi_dac_enable() argument
122 struct axi_dac_state *st = iio_backend_get_priv(back); in axi_dac_enable()
126 guard(mutex)(&st->lock); in axi_dac_enable()
127 ret = regmap_set_bits(st->regmap, AXI_DAC_RSTN_REG, in axi_dac_enable()
136 ret = regmap_read_poll_timeout(st->regmap, AXI_DAC_DRP_STATUS_REG, in axi_dac_enable()
143 return regmap_set_bits(st->regmap, AXI_DAC_RSTN_REG, in axi_dac_enable()
147 static void axi_dac_disable(struct iio_backend *back) in axi_dac_disable() argument
149 struct axi_dac_state *st = iio_backend_get_priv(back); in axi_dac_disable()
151 guard(mutex)(&st->lock); in axi_dac_disable()
152 regmap_write(st->regmap, AXI_DAC_RSTN_REG, 0); in axi_dac_disable()
155 static struct iio_buffer *axi_dac_request_buffer(struct iio_backend *back, in axi_dac_request_buffer() argument
158 struct axi_dac_state *st = iio_backend_get_priv(back); in axi_dac_request_buffer()
161 if (device_property_read_string(st->dev, "dma-names", &dma_name)) in axi_dac_request_buffer()
164 return iio_dmaengine_buffer_setup_ext(st->dev, indio_dev, dma_name, in axi_dac_request_buffer()
168 static void axi_dac_free_buffer(struct iio_backend *back, in axi_dac_free_buffer() argument
189 if (!st->dac_clk) { in __axi_dac_frequency_get()
190 dev_err(st->dev, "Sampling rate is 0...\n"); in __axi_dac_frequency_get()
191 return -EINVAL; in __axi_dac_frequency_get()
199 ret = regmap_read(st->regmap, reg, &raw); in __axi_dac_frequency_get()
204 *freq = DIV_ROUND_CLOSEST_ULL(raw * st->dac_clk, BIT(16)); in __axi_dac_frequency_get()
216 scoped_guard(mutex, &st->lock) { in axi_dac_frequency_get()
217 ret = __axi_dac_frequency_get(st, chan->channel, tone_2, &freq); in axi_dac_frequency_get()
234 reg = AXI_DAC_CHAN_CNTRL_3_REG(chan->channel); in axi_dac_scale_get()
236 reg = AXI_DAC_CHAN_CNTRL_1_REG(chan->channel); in axi_dac_scale_get()
238 ret = regmap_read(st->regmap, reg, &raw); in axi_dac_scale_get()
251 vals[0] *= -1; in axi_dac_scale_get()
253 vals[1] *= -1; in axi_dac_scale_get()
268 reg = AXI_DAC_CHAN_CNTRL_4_REG(chan->channel); in axi_dac_phase_get()
270 reg = AXI_DAC_CHAN_CNTRL_2_REG(chan->channel); in axi_dac_phase_get()
272 ret = regmap_read(st->regmap, reg, &raw); in axi_dac_phase_get()
295 dev_err(st->dev, "Invalid frequency(%u) dac_clk(%llu)\n", in __axi_dac_frequency_set()
297 return -EINVAL; in __axi_dac_frequency_set()
307 ret = regmap_update_bits(st->regmap, reg, in __axi_dac_frequency_set()
313 return regmap_set_bits(st->regmap, AXI_DAC_CNTRL_1_REG, in __axi_dac_frequency_set()
328 guard(mutex)(&st->lock); in axi_dac_frequency_set()
329 ret = __axi_dac_frequency_set(st, chan->channel, st->dac_clk, freq, in axi_dac_frequency_set()
350 if (scale <= -2 * (int)MEGA || scale >= 2 * (int)MEGA) in axi_dac_scale_set()
351 return -EINVAL; in axi_dac_scale_set()
356 scale *= -1; in axi_dac_scale_set()
362 reg = AXI_DAC_CHAN_CNTRL_3_REG(chan->channel); in axi_dac_scale_set()
364 reg = AXI_DAC_CHAN_CNTRL_1_REG(chan->channel); in axi_dac_scale_set()
366 guard(mutex)(&st->lock); in axi_dac_scale_set()
367 ret = regmap_write(st->regmap, reg, raw); in axi_dac_scale_set()
372 ret = regmap_set_bits(st->regmap, AXI_DAC_CNTRL_1_REG, in axi_dac_scale_set()
394 return -EINVAL; in axi_dac_phase_set()
399 reg = AXI_DAC_CHAN_CNTRL_4_REG(chan->channel); in axi_dac_phase_set()
401 reg = AXI_DAC_CHAN_CNTRL_2_REG(chan->channel); in axi_dac_phase_set()
403 guard(mutex)(&st->lock); in axi_dac_phase_set()
404 ret = regmap_update_bits(st->regmap, reg, AXI_DAC_CHAN_CNTRL_2_PHASE, in axi_dac_phase_set()
410 ret = regmap_set_bits(st->regmap, AXI_DAC_CNTRL_1_REG, in axi_dac_phase_set()
418 static int axi_dac_ext_info_set(struct iio_backend *back, uintptr_t private, in axi_dac_ext_info_set() argument
422 struct axi_dac_state *st = iio_backend_get_priv(back); in axi_dac_ext_info_set()
438 return -EOPNOTSUPP; in axi_dac_ext_info_set()
442 static int axi_dac_ext_info_get(struct iio_backend *back, uintptr_t private, in axi_dac_ext_info_get() argument
445 struct axi_dac_state *st = iio_backend_get_priv(back); in axi_dac_ext_info_get()
451 private - AXI_DAC_FREQ_TONE_1); in axi_dac_ext_info_get()
455 private - AXI_DAC_SCALE_TONE_1); in axi_dac_ext_info_get()
459 private - AXI_DAC_PHASE_TONE_1); in axi_dac_ext_info_get()
461 return -EOPNOTSUPP; in axi_dac_ext_info_get()
475 static int axi_dac_extend_chan(struct iio_backend *back, in axi_dac_extend_chan() argument
478 struct axi_dac_state *st = iio_backend_get_priv(back); in axi_dac_extend_chan()
480 if (chan->type != IIO_ALTVOLTAGE) in axi_dac_extend_chan()
481 return -EINVAL; in axi_dac_extend_chan()
482 if (st->reg_config & AXI_DAC_CONFIG_DDS_DISABLE) in axi_dac_extend_chan()
483 /* nothing to extend */ in axi_dac_extend_chan()
486 chan->ext_info = axi_dac_ext_info; in axi_dac_extend_chan()
491 static int axi_dac_data_source_set(struct iio_backend *back, unsigned int chan, in axi_dac_data_source_set() argument
494 struct axi_dac_state *st = iio_backend_get_priv(back); in axi_dac_data_source_set()
498 return regmap_update_bits(st->regmap, in axi_dac_data_source_set()
503 return regmap_update_bits(st->regmap, in axi_dac_data_source_set()
508 return regmap_update_bits(st->regmap, in axi_dac_data_source_set()
513 return -EINVAL; in axi_dac_data_source_set()
517 static int axi_dac_set_sample_rate(struct iio_backend *back, unsigned int chan, in axi_dac_set_sample_rate() argument
520 struct axi_dac_state *st = iio_backend_get_priv(back); in axi_dac_set_sample_rate()
525 return -EINVAL; in axi_dac_set_sample_rate()
526 if (st->reg_config & AXI_DAC_CONFIG_DDS_DISABLE) in axi_dac_set_sample_rate()
530 guard(mutex)(&st->lock); in axi_dac_set_sample_rate()
538 if (!st->dac_clk) { in axi_dac_set_sample_rate()
539 st->dac_clk = sample_rate; in axi_dac_set_sample_rate()
553 st->dac_clk = sample_rate; in axi_dac_set_sample_rate()
558 static int axi_dac_reg_access(struct iio_backend *back, unsigned int reg, in axi_dac_reg_access() argument
561 struct axi_dac_state *st = iio_backend_get_priv(back); in axi_dac_reg_access()
564 return regmap_read(st->regmap, reg, readval); in axi_dac_reg_access()
566 return regmap_write(st->regmap, reg, writeval); in axi_dac_reg_access()
569 static int axi_dac_ddr_enable(struct iio_backend *back) in axi_dac_ddr_enable() argument
571 struct axi_dac_state *st = iio_backend_get_priv(back); in axi_dac_ddr_enable()
573 return regmap_clear_bits(st->regmap, AXI_DAC_CNTRL_2_REG, in axi_dac_ddr_enable()
577 static int axi_dac_ddr_disable(struct iio_backend *back) in axi_dac_ddr_disable() argument
579 struct axi_dac_state *st = iio_backend_get_priv(back); in axi_dac_ddr_disable()
581 return regmap_set_bits(st->regmap, AXI_DAC_CNTRL_2_REG, in axi_dac_ddr_disable()
585 static int axi_dac_data_stream_enable(struct iio_backend *back) in axi_dac_data_stream_enable() argument
587 struct axi_dac_state *st = iio_backend_get_priv(back); in axi_dac_data_stream_enable()
590 ret = regmap_read_poll_timeout(st->regmap, in axi_dac_data_stream_enable()
597 return regmap_set_bits(st->regmap, AXI_DAC_CUSTOM_CTRL_REG, in axi_dac_data_stream_enable()
601 static int axi_dac_data_stream_disable(struct iio_backend *back) in axi_dac_data_stream_disable() argument
603 struct axi_dac_state *st = iio_backend_get_priv(back); in axi_dac_data_stream_disable()
605 return regmap_clear_bits(st->regmap, AXI_DAC_CUSTOM_CTRL_REG, in axi_dac_data_stream_disable()
609 static int axi_dac_data_transfer_addr(struct iio_backend *back, u32 address) in axi_dac_data_transfer_addr() argument
611 struct axi_dac_state *st = iio_backend_get_priv(back); in axi_dac_data_transfer_addr()
614 return -EINVAL; in axi_dac_data_transfer_addr()
620 return regmap_update_bits(st->regmap, AXI_DAC_CUSTOM_CTRL_REG, in axi_dac_data_transfer_addr()
626 static int axi_dac_data_format_set(struct iio_backend *back, unsigned int ch, in axi_dac_data_format_set() argument
629 struct axi_dac_state *st = iio_backend_get_priv(back); in axi_dac_data_format_set()
631 switch (data->type) { in axi_dac_data_format_set()
633 return regmap_clear_bits(st->regmap, AXI_DAC_CNTRL_2_REG, in axi_dac_data_format_set()
636 return -EINVAL; in axi_dac_data_format_set()
640 static int __axi_dac_bus_reg_write(struct iio_backend *back, u32 reg, in __axi_dac_bus_reg_write() argument
643 struct axi_dac_state *st = iio_backend_get_priv(back); in __axi_dac_bus_reg_write()
648 * Both AXI_DAC_CNTRL_2_REG and AXI_DAC_CUSTOM_WR_REG need to know in __axi_dac_bus_reg_write()
659 ret = regmap_write(st->regmap, AXI_DAC_CUSTOM_WR_REG, ival); in __axi_dac_bus_reg_write()
664 ret = regmap_set_bits(st->regmap, AXI_DAC_CNTRL_2_REG, in __axi_dac_bus_reg_write()
667 ret = regmap_clear_bits(st->regmap, AXI_DAC_CNTRL_2_REG, in __axi_dac_bus_reg_write()
672 ret = regmap_update_bits(st->regmap, AXI_DAC_CUSTOM_CTRL_REG, in __axi_dac_bus_reg_write()
678 ret = regmap_update_bits(st->regmap, AXI_DAC_CUSTOM_CTRL_REG, in __axi_dac_bus_reg_write()
684 ret = regmap_read_poll_timeout(st->regmap, in __axi_dac_bus_reg_write()
688 if (ret == -ETIMEDOUT) in __axi_dac_bus_reg_write()
689 dev_err(st->dev, "AXI read timeout\n"); in __axi_dac_bus_reg_write()
692 return regmap_clear_bits(st->regmap, AXI_DAC_CUSTOM_CTRL_REG, in __axi_dac_bus_reg_write()
696 static int axi_dac_bus_reg_write(struct iio_backend *back, u32 reg, in axi_dac_bus_reg_write() argument
699 struct axi_dac_state *st = iio_backend_get_priv(back); in axi_dac_bus_reg_write()
701 guard(mutex)(&st->lock); in axi_dac_bus_reg_write()
702 return __axi_dac_bus_reg_write(back, reg, val, data_size); in axi_dac_bus_reg_write()
705 static int axi_dac_bus_reg_read(struct iio_backend *back, u32 reg, u32 *val, in axi_dac_bus_reg_read() argument
708 struct axi_dac_state *st = iio_backend_get_priv(back); in axi_dac_bus_reg_read()
711 guard(mutex)(&st->lock); in axi_dac_bus_reg_read()
715 * io address space to get data read. in axi_dac_bus_reg_read()
717 ret = __axi_dac_bus_reg_write(back, AXI_DAC_RD_ADDR(reg), 0, in axi_dac_bus_reg_read()
722 return regmap_read(st->regmap, AXI_DAC_CUSTOM_RD_REG, val); in axi_dac_bus_reg_read()
725 static int axi_dac_bus_set_io_mode(struct iio_backend *back, in axi_dac_bus_set_io_mode() argument
728 struct axi_dac_state *st = iio_backend_get_priv(back); in axi_dac_bus_set_io_mode()
732 return -EINVAL; in axi_dac_bus_set_io_mode()
734 guard(mutex)(&st->lock); in axi_dac_bus_set_io_mode()
736 ret = regmap_update_bits(st->regmap, AXI_DAC_CUSTOM_CTRL_REG, in axi_dac_bus_set_io_mode()
742 return regmap_read_poll_timeout(st->regmap, AXI_DAC_UI_STATUS_REG, ival, in axi_dac_bus_set_io_mode()
759 .bus_sample_data_clock_hz = st->dac_clk_rate, in axi_dac_create_platform_device()
762 .parent = st->dev, in axi_dac_create_platform_device()
775 return devm_add_action_or_reset(st->dev, axi_dac_child_remove, pdev); in axi_dac_create_platform_device()
806 .name = "axi-dac",
811 .name = "axi-ad3552r",
830 st = devm_kzalloc(&pdev->dev, sizeof(*st), GFP_KERNEL); in axi_dac_probe()
832 return -ENOMEM; in axi_dac_probe()
834 st->info = device_get_match_data(&pdev->dev); in axi_dac_probe()
835 if (!st->info) in axi_dac_probe()
836 return -ENODEV; in axi_dac_probe()
837 clk = devm_clk_get_enabled(&pdev->dev, "s_axi_aclk"); in axi_dac_probe()
839 /* Backward compat., old fdt versions without clock-names. */ in axi_dac_probe()
840 clk = devm_clk_get_enabled(&pdev->dev, NULL); in axi_dac_probe()
842 return dev_err_probe(&pdev->dev, PTR_ERR(clk), in axi_dac_probe()
843 "failed to get clock\n"); in axi_dac_probe()
846 if (st->info->has_dac_clk) { in axi_dac_probe()
849 dac_clk = devm_clk_get_enabled(&pdev->dev, "dac_clk"); in axi_dac_probe()
851 return dev_err_probe(&pdev->dev, PTR_ERR(dac_clk), in axi_dac_probe()
852 "failed to get dac_clk clock\n"); in axi_dac_probe()
855 st->dac_clk_rate = clk_get_rate(dac_clk) / 2; in axi_dac_probe()
862 st->dev = &pdev->dev; in axi_dac_probe()
863 st->regmap = devm_regmap_init_mmio(&pdev->dev, base, in axi_dac_probe()
865 if (IS_ERR(st->regmap)) in axi_dac_probe()
866 return dev_err_probe(&pdev->dev, PTR_ERR(st->regmap), in axi_dac_probe()
867 "failed to init register map\n"); in axi_dac_probe()
870 * Force disable the core. Up to the frontend to enable us. And we can in axi_dac_probe()
873 ret = regmap_write(st->regmap, AXI_DAC_RSTN_REG, 0); in axi_dac_probe()
877 ret = regmap_read(st->regmap, ADI_AXI_REG_VERSION, &ver); in axi_dac_probe()
882 ADI_AXI_PCORE_VER_MAJOR(st->info->version)) { in axi_dac_probe()
883 dev_err(&pdev->dev, in axi_dac_probe()
885 ADI_AXI_PCORE_VER_MAJOR(st->info->version), in axi_dac_probe()
886 ADI_AXI_PCORE_VER_MINOR(st->info->version), in axi_dac_probe()
887 ADI_AXI_PCORE_VER_PATCH(st->info->version), in axi_dac_probe()
891 return -ENODEV; in axi_dac_probe()
895 ret = regmap_read(st->regmap, AXI_DAC_CONFIG_REG, &st->reg_config); in axi_dac_probe()
900 * In some designs, setting the R1_MODE bit to 0 (which is the default in axi_dac_probe()
901 * value) causes all channels of the frontend to be routed to the same in axi_dac_probe()
903 * Multiple-Input and Multiple-Output (MIMO). As most of the times we in axi_dac_probe()
907 ret = regmap_set_bits(st->regmap, AXI_DAC_CNTRL_2_REG, in axi_dac_probe()
912 mutex_init(&st->lock); in axi_dac_probe()
914 ret = devm_iio_backend_register(&pdev->dev, st->info->backend_info, st); in axi_dac_probe()
916 return dev_err_probe(&pdev->dev, ret, in axi_dac_probe()
917 "failed to register iio backend\n"); in axi_dac_probe()
919 device_for_each_child_node_scoped(&pdev->dev, child) { in axi_dac_probe()
922 if (!st->info->has_child_nodes) in axi_dac_probe()
923 return dev_err_probe(&pdev->dev, -EINVAL, in axi_dac_probe()
924 "invalid fdt axi-dac compatible."); in axi_dac_probe()
929 return dev_err_probe(&pdev->dev, ret, in axi_dac_probe()
932 return dev_err_probe(&pdev->dev, -EINVAL, in axi_dac_probe()
937 return dev_err_probe(&pdev->dev, -EINVAL, in axi_dac_probe()
941 dev_info(&pdev->dev, "AXI DAC IP core (%d.%.2d.%c) probed\n", in axi_dac_probe()
962 { .compatible = "adi,axi-dac-9.1.b", .data = &dac_generic },
963 { .compatible = "adi,axi-ad3552r", .data = &dac_ad3552r },
970 .name = "adi-axi-dac",