Lines Matching full:st
441 #define at91_adc_readl(st, reg) \ argument
442 readl_relaxed((st)->base + (st)->soc_info.platform->layout->reg)
443 #define at91_adc_read_chan(st, reg) \ argument
444 readl_relaxed((st)->base + reg)
445 #define at91_adc_writel(st, reg, val) \ argument
446 writel_relaxed(val, (st)->base + (st)->soc_info.platform->layout->reg)
790 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_active_scan_mask_to_reg() local
799 return mask & GENMASK(st->soc_info.platform->nr_channels, 0); in at91_adc_active_scan_mask_to_reg()
802 static void at91_adc_cor(struct at91_adc_state *st, in at91_adc_cor() argument
809 cur_cor = at91_adc_readl(st, COR); in at91_adc_cor()
810 cor <<= st->soc_info.platform->layout->COR_diff_offset; in at91_adc_cor()
812 at91_adc_writel(st, COR, cur_cor | cor); in at91_adc_cor()
814 at91_adc_writel(st, COR, cur_cor & ~cor); in at91_adc_cor()
817 static void at91_adc_irq_status(struct at91_adc_state *st, u32 *status, in at91_adc_irq_status() argument
820 *status = at91_adc_readl(st, ISR); in at91_adc_irq_status()
821 if (st->soc_info.platform->layout->EOC_ISR) in at91_adc_irq_status()
822 *eoc = at91_adc_readl(st, EOC_ISR); in at91_adc_irq_status()
827 static void at91_adc_irq_mask(struct at91_adc_state *st, u32 *status, u32 *eoc) in at91_adc_irq_mask() argument
829 *status = at91_adc_readl(st, IMR); in at91_adc_irq_mask()
830 if (st->soc_info.platform->layout->EOC_IMR) in at91_adc_irq_mask()
831 *eoc = at91_adc_readl(st, EOC_IMR); in at91_adc_irq_mask()
836 static void at91_adc_eoc_dis(struct at91_adc_state *st, unsigned int channel) in at91_adc_eoc_dis() argument
843 if (!st->soc_info.platform->layout->EOC_IDR) in at91_adc_eoc_dis()
844 at91_adc_writel(st, IDR, BIT(channel)); in at91_adc_eoc_dis()
847 static void at91_adc_eoc_ena(struct at91_adc_state *st, unsigned int channel) in at91_adc_eoc_ena() argument
849 if (!st->soc_info.platform->layout->EOC_IDR) in at91_adc_eoc_ena()
850 at91_adc_writel(st, IER, BIT(channel)); in at91_adc_eoc_ena()
852 at91_adc_writel(st, EOC_IER, BIT(channel)); in at91_adc_eoc_ena()
855 static int at91_adc_config_emr(struct at91_adc_state *st, in at91_adc_config_emr() argument
860 unsigned int osr_mask = st->soc_info.platform->osr_mask; in at91_adc_config_emr()
864 for (i = 0; i < st->soc_info.platform->oversampling_avail_no; i++) { in at91_adc_config_emr()
865 if (oversampling_ratio == st->soc_info.platform->oversampling_avail[i]) in at91_adc_config_emr()
868 if (i == st->soc_info.platform->oversampling_avail_no) in at91_adc_config_emr()
895 ret = pm_runtime_resume_and_get(st->dev); in at91_adc_config_emr()
899 emr = at91_adc_readl(st, EMR); in at91_adc_config_emr()
906 at91_adc_writel(st, EMR, emr); in at91_adc_config_emr()
908 pm_runtime_mark_last_busy(st->dev); in at91_adc_config_emr()
909 pm_runtime_put_autosuspend(st->dev); in at91_adc_config_emr()
911 st->oversampling_ratio = oversampling_ratio; in at91_adc_config_emr()
916 static int at91_adc_adjust_val_osr(struct at91_adc_state *st, int *val) in at91_adc_adjust_val_osr() argument
920 if (st->oversampling_ratio == 1) in at91_adc_adjust_val_osr()
922 else if (st->oversampling_ratio == 4) in at91_adc_adjust_val_osr()
924 else if (st->oversampling_ratio == 16) in at91_adc_adjust_val_osr()
926 else if (st->oversampling_ratio == 64) in at91_adc_adjust_val_osr()
928 else if (st->oversampling_ratio == 256) in at91_adc_adjust_val_osr()
936 * st->soc_info.platform->chan_realbits, so shift left diff bits. in at91_adc_adjust_val_osr()
938 diff = st->soc_info.platform->chan_realbits - nbits; in at91_adc_adjust_val_osr()
944 static void at91_adc_adjust_val_osr_array(struct at91_adc_state *st, void *buf, in at91_adc_adjust_val_osr_array() argument
960 at91_adc_adjust_val_osr(st, &val); in at91_adc_adjust_val_osr_array()
966 static int at91_adc_configure_touch(struct at91_adc_state *st, bool state) in at91_adc_configure_touch() argument
968 u32 clk_khz = st->current_sample_rate / 1000; in at91_adc_configure_touch()
974 ret = pm_runtime_resume_and_get(st->dev); in at91_adc_configure_touch()
979 at91_adc_writel(st, IDR, in at91_adc_configure_touch()
981 at91_adc_writel(st, TSMR, 0); in at91_adc_configure_touch()
983 pm_runtime_mark_last_busy(st->dev); in at91_adc_configure_touch()
984 pm_runtime_put_autosuspend(st->dev); in at91_adc_configure_touch()
1010 at91_adc_writel(st, TSMR, tsmr); in at91_adc_configure_touch()
1012 acr = at91_adc_readl(st, ACR); in at91_adc_configure_touch()
1015 at91_adc_writel(st, ACR, acr); in at91_adc_configure_touch()
1018 st->touch_st.sample_period_val = in at91_adc_configure_touch()
1022 at91_adc_writel(st, IER, AT91_SAMA5D2_IER_PEN); in at91_adc_configure_touch()
1027 static u16 at91_adc_touch_pos(struct at91_adc_state *st, int reg) in at91_adc_touch_pos() argument
1038 if (reg == st->soc_info.platform->layout->XPOSR) in at91_adc_touch_pos()
1039 val = at91_adc_readl(st, XPOSR); in at91_adc_touch_pos()
1040 else if (reg == st->soc_info.platform->layout->YPOSR) in at91_adc_touch_pos()
1041 val = at91_adc_readl(st, YPOSR); in at91_adc_touch_pos()
1044 dev_dbg(&st->indio_dev->dev, "pos is 0\n"); in at91_adc_touch_pos()
1050 dev_err(&st->indio_dev->dev, "scale is 0\n"); in at91_adc_touch_pos()
1058 static u16 at91_adc_touch_x_pos(struct at91_adc_state *st) in at91_adc_touch_x_pos() argument
1060 st->touch_st.x_pos = at91_adc_touch_pos(st, st->soc_info.platform->layout->XPOSR); in at91_adc_touch_x_pos()
1061 return st->touch_st.x_pos; in at91_adc_touch_x_pos()
1064 static u16 at91_adc_touch_y_pos(struct at91_adc_state *st) in at91_adc_touch_y_pos() argument
1066 return at91_adc_touch_pos(st, st->soc_info.platform->layout->YPOSR); in at91_adc_touch_y_pos()
1069 static u16 at91_adc_touch_pressure(struct at91_adc_state *st) in at91_adc_touch_pressure() argument
1078 val = at91_adc_readl(st, PRESSR); in at91_adc_touch_pressure()
1083 pres = rxp * (st->touch_st.x_pos * factor / 1024) * in at91_adc_touch_pressure()
1097 static int at91_adc_read_position(struct at91_adc_state *st, int chan, u16 *val) in at91_adc_read_position() argument
1100 if (!st->touch_st.touching) in at91_adc_read_position()
1102 if (chan == st->soc_info.platform->touch_chan_x) in at91_adc_read_position()
1103 *val = at91_adc_touch_x_pos(st); in at91_adc_read_position()
1104 else if (chan == st->soc_info.platform->touch_chan_y) in at91_adc_read_position()
1105 *val = at91_adc_touch_y_pos(st); in at91_adc_read_position()
1112 static int at91_adc_read_pressure(struct at91_adc_state *st, int chan, u16 *val) in at91_adc_read_pressure() argument
1115 if (!st->touch_st.touching) in at91_adc_read_pressure()
1117 if (chan == st->soc_info.platform->touch_chan_p) in at91_adc_read_pressure()
1118 *val = at91_adc_touch_pressure(st); in at91_adc_read_pressure()
1125 static void at91_adc_configure_trigger_registers(struct at91_adc_state *st, in at91_adc_configure_trigger_registers() argument
1128 u32 status = at91_adc_readl(st, TRGR); in at91_adc_configure_trigger_registers()
1134 status |= st->selected_trig->trgmod_value; in at91_adc_configure_trigger_registers()
1137 at91_adc_writel(st, TRGR, status); in at91_adc_configure_trigger_registers()
1143 struct at91_adc_state *st = iio_priv(indio); in at91_adc_configure_trigger() local
1147 ret = pm_runtime_resume_and_get(st->dev); in at91_adc_configure_trigger()
1152 at91_adc_configure_trigger_registers(st, state); in at91_adc_configure_trigger()
1155 pm_runtime_mark_last_busy(st->dev); in at91_adc_configure_trigger()
1156 pm_runtime_put_autosuspend(st->dev); in at91_adc_configure_trigger()
1165 struct at91_adc_state *st = iio_priv(indio); in at91_adc_reenable_trigger() local
1168 if (st->dma_st.dma_chan) in at91_adc_reenable_trigger()
1171 enable_irq(st->irq); in at91_adc_reenable_trigger()
1174 at91_adc_readl(st, LCDR); in at91_adc_reenable_trigger()
1183 static int at91_adc_dma_size_done(struct at91_adc_state *st) in at91_adc_dma_size_done() argument
1189 status = dmaengine_tx_status(st->dma_st.dma_chan, in at91_adc_dma_size_done()
1190 st->dma_st.dma_chan->cookie, in at91_adc_dma_size_done()
1196 i = st->dma_st.rx_buf_sz - state.residue; in at91_adc_dma_size_done()
1199 if (i >= st->dma_st.buf_idx) in at91_adc_dma_size_done()
1200 size = i - st->dma_st.buf_idx; in at91_adc_dma_size_done()
1202 size = st->dma_st.rx_buf_sz + i - st->dma_st.buf_idx; in at91_adc_dma_size_done()
1215 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_dma_start() local
1221 if (!st->dma_st.dma_chan) in at91_adc_dma_start()
1225 st->dma_st.buf_idx = 0; in at91_adc_dma_start()
1231 st->dma_st.rx_buf_sz = 0; in at91_adc_dma_start()
1241 st->dma_st.rx_buf_sz += chan->scan_type.storagebits / 8; in at91_adc_dma_start()
1243 st->dma_st.rx_buf_sz *= st->dma_st.watermark; in at91_adc_dma_start()
1246 desc = dmaengine_prep_dma_cyclic(st->dma_st.dma_chan, in at91_adc_dma_start()
1247 st->dma_st.rx_dma_buf, in at91_adc_dma_start()
1248 st->dma_st.rx_buf_sz, in at91_adc_dma_start()
1249 st->dma_st.rx_buf_sz / 2, in at91_adc_dma_start()
1264 dmaengine_terminate_async(st->dma_st.dma_chan); in at91_adc_dma_start()
1269 at91_adc_writel(st, IER, AT91_SAMA5D2_IER_GOVRE); in at91_adc_dma_start()
1271 dma_async_issue_pending(st->dma_st.dma_chan); in at91_adc_dma_start()
1274 st->dma_st.dma_ts = iio_get_time_ns(indio_dev); in at91_adc_dma_start()
1282 struct at91_adc_state *st) in at91_adc_buffer_check_use_irq() argument
1285 if (st->dma_st.dma_chan) in at91_adc_buffer_check_use_irq()
1295 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_current_chan_is_touch() local
1298 &st->touch_st.channels_bitmask, in at91_adc_current_chan_is_touch()
1299 st->soc_info.platform->max_index + 1); in at91_adc_current_chan_is_touch()
1306 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_buffer_prepare() local
1310 return at91_adc_configure_touch(st, true); in at91_adc_buffer_prepare()
1316 ret = pm_runtime_resume_and_get(st->dev); in at91_adc_buffer_prepare()
1339 at91_adc_cor(st, chan); in at91_adc_buffer_prepare()
1341 at91_adc_writel(st, CHER, BIT(chan->channel)); in at91_adc_buffer_prepare()
1344 if (at91_adc_buffer_check_use_irq(indio_dev, st)) in at91_adc_buffer_prepare()
1345 at91_adc_writel(st, IER, AT91_SAMA5D2_IER_DRDY); in at91_adc_buffer_prepare()
1348 pm_runtime_mark_last_busy(st->dev); in at91_adc_buffer_prepare()
1349 pm_runtime_put_autosuspend(st->dev); in at91_adc_buffer_prepare()
1355 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_buffer_postdisable() local
1361 return at91_adc_configure_touch(st, false); in at91_adc_buffer_postdisable()
1367 ret = pm_runtime_resume_and_get(st->dev); in at91_adc_buffer_postdisable()
1390 at91_adc_writel(st, CHDR, BIT(chan->channel)); in at91_adc_buffer_postdisable()
1392 if (st->dma_st.dma_chan) in at91_adc_buffer_postdisable()
1393 at91_adc_read_chan(st, chan->address); in at91_adc_buffer_postdisable()
1396 if (at91_adc_buffer_check_use_irq(indio_dev, st)) in at91_adc_buffer_postdisable()
1397 at91_adc_writel(st, IDR, AT91_SAMA5D2_IER_DRDY); in at91_adc_buffer_postdisable()
1400 at91_adc_readl(st, OVER); in at91_adc_buffer_postdisable()
1403 if (st->dma_st.dma_chan) in at91_adc_buffer_postdisable()
1404 dmaengine_terminate_sync(st->dma_st.dma_chan); in at91_adc_buffer_postdisable()
1406 pm_runtime_mark_last_busy(st->dev); in at91_adc_buffer_postdisable()
1407 pm_runtime_put_autosuspend(st->dev); in at91_adc_buffer_postdisable()
1441 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_trigger_handler_nodma() local
1454 at91_adc_irq_status(st, &status, &eoc); in at91_adc_trigger_handler_nodma()
1455 at91_adc_irq_mask(st, &imr, &eoc_imr); in at91_adc_trigger_handler_nodma()
1482 val = at91_adc_read_chan(st, chan->address); in at91_adc_trigger_handler_nodma()
1483 at91_adc_adjust_val_osr(st, &val); in at91_adc_trigger_handler_nodma()
1484 st->buffer[i] = val; in at91_adc_trigger_handler_nodma()
1486 st->buffer[i] = 0; in at91_adc_trigger_handler_nodma()
1491 iio_push_to_buffers_with_timestamp(indio_dev, st->buffer, in at91_adc_trigger_handler_nodma()
1497 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_trigger_handler_dma() local
1498 int transferred_len = at91_adc_dma_size_done(st); in at91_adc_trigger_handler_dma()
1503 u32 status = at91_adc_readl(st, ISR); in at91_adc_trigger_handler_dma()
1509 sample_size = div_s64(st->dma_st.rx_buf_sz, st->dma_st.watermark); in at91_adc_trigger_handler_dma()
1517 interval = div_s64((ns - st->dma_st.dma_ts), sample_count); in at91_adc_trigger_handler_dma()
1524 at91_adc_adjust_val_osr_array(st, in at91_adc_trigger_handler_dma()
1525 &st->dma_st.rx_buf[st->dma_st.buf_idx], in at91_adc_trigger_handler_dma()
1529 (st->dma_st.rx_buf + st->dma_st.buf_idx), in at91_adc_trigger_handler_dma()
1530 (st->dma_st.dma_ts + interval * sample_index)); in at91_adc_trigger_handler_dma()
1534 st->dma_st.buf_idx += sample_size; in at91_adc_trigger_handler_dma()
1536 if (st->dma_st.buf_idx >= st->dma_st.rx_buf_sz) in at91_adc_trigger_handler_dma()
1537 st->dma_st.buf_idx = 0; in at91_adc_trigger_handler_dma()
1541 st->dma_st.dma_ts = iio_get_time_ns(indio_dev); in at91_adc_trigger_handler_dma()
1548 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_trigger_handler() local
1555 at91_adc_writel(st, CR, AT91_SAMA5D2_CR_START); in at91_adc_trigger_handler()
1557 if (st->dma_st.dma_chan) in at91_adc_trigger_handler()
1595 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_setup_samp_freq() local
1599 f_per = clk_get_rate(st->per_clk); in at91_adc_setup_samp_freq()
1604 ret = pm_runtime_resume_and_get(st->dev); in at91_adc_setup_samp_freq()
1608 mr = at91_adc_readl(st, MR); in at91_adc_setup_samp_freq()
1613 at91_adc_writel(st, MR, mr); in at91_adc_setup_samp_freq()
1615 pm_runtime_mark_last_busy(st->dev); in at91_adc_setup_samp_freq()
1616 pm_runtime_put_autosuspend(st->dev); in at91_adc_setup_samp_freq()
1620 st->current_sample_rate = freq; in at91_adc_setup_samp_freq()
1623 static inline unsigned at91_adc_get_sample_freq(struct at91_adc_state *st) in at91_adc_get_sample_freq() argument
1625 return st->current_sample_rate; in at91_adc_get_sample_freq()
1630 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_touch_data_handler() local
1636 st->soc_info.platform->max_index + 1) { in at91_adc_touch_data_handler()
1641 at91_adc_read_position(st, chan->channel, &val); in at91_adc_touch_data_handler()
1643 at91_adc_read_pressure(st, chan->channel, &val); in at91_adc_touch_data_handler()
1646 st->buffer[i] = val; in at91_adc_touch_data_handler()
1657 schedule_work(&st->touch_st.workq); in at91_adc_touch_data_handler()
1660 static void at91_adc_pen_detect_interrupt(struct at91_adc_state *st) in at91_adc_pen_detect_interrupt() argument
1662 at91_adc_writel(st, IDR, AT91_SAMA5D2_IER_PEN); in at91_adc_pen_detect_interrupt()
1663 at91_adc_writel(st, IER, AT91_SAMA5D2_IER_NOPEN | in at91_adc_pen_detect_interrupt()
1666 at91_adc_writel(st, TRGR, AT91_SAMA5D2_TRGR_TRGMOD_PERIODIC | in at91_adc_pen_detect_interrupt()
1667 AT91_SAMA5D2_TRGR_TRGPER(st->touch_st.sample_period_val)); in at91_adc_pen_detect_interrupt()
1668 st->touch_st.touching = true; in at91_adc_pen_detect_interrupt()
1673 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_no_pen_detect_interrupt() local
1675 at91_adc_writel(st, TRGR, AT91_SAMA5D2_TRGR_TRGMOD_NO_TRIGGER); in at91_adc_no_pen_detect_interrupt()
1676 at91_adc_writel(st, IDR, AT91_SAMA5D2_IER_NOPEN | in at91_adc_no_pen_detect_interrupt()
1679 st->touch_st.touching = false; in at91_adc_no_pen_detect_interrupt()
1683 at91_adc_writel(st, IER, AT91_SAMA5D2_IER_PEN); in at91_adc_no_pen_detect_interrupt()
1690 struct at91_adc_state *st = container_of(touch_st, in at91_adc_workq_handler() local
1692 struct iio_dev *indio_dev = st->indio_dev; in at91_adc_workq_handler()
1694 iio_push_to_buffers(indio_dev, st->buffer); in at91_adc_workq_handler()
1700 struct at91_adc_state *st = iio_priv(indio); in at91_adc_interrupt() local
1705 at91_adc_irq_status(st, &status, &eoc); in at91_adc_interrupt()
1706 at91_adc_irq_mask(st, &imr, &eoc_imr); in at91_adc_interrupt()
1712 at91_adc_pen_detect_interrupt(st); in at91_adc_interrupt()
1725 status = at91_adc_readl(st, XPOSR); in at91_adc_interrupt()
1726 status = at91_adc_readl(st, YPOSR); in at91_adc_interrupt()
1727 status = at91_adc_readl(st, PRESSR); in at91_adc_interrupt()
1733 } else if (iio_buffer_enabled(indio) && st->dma_st.dma_chan) { in at91_adc_interrupt()
1739 st->conversion_value = at91_adc_read_chan(st, st->chan->address); in at91_adc_interrupt()
1740 st->conversion_done = true; in at91_adc_interrupt()
1741 wake_up_interruptible(&st->wq_data_available); in at91_adc_interrupt()
1746 /* This needs to be called with direct mode claimed and st->lock locked. */
1750 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_read_info_raw() local
1754 ret = pm_runtime_resume_and_get(st->dev); in at91_adc_read_info_raw()
1763 ret = at91_adc_read_position(st, chan->channel, in at91_adc_read_info_raw()
1767 ret = at91_adc_adjust_val_osr(st, val); in at91_adc_read_info_raw()
1772 ret = at91_adc_read_pressure(st, chan->channel, in at91_adc_read_info_raw()
1776 ret = at91_adc_adjust_val_osr(st, val); in at91_adc_read_info_raw()
1783 st->chan = chan; in at91_adc_read_info_raw()
1785 at91_adc_cor(st, chan); in at91_adc_read_info_raw()
1786 at91_adc_writel(st, CHER, BIT(chan->channel)); in at91_adc_read_info_raw()
1793 at91_adc_writel(st, TEMPMR, AT91_SAMA5D2_TEMPMR_TEMPON); in at91_adc_read_info_raw()
1794 at91_adc_eoc_ena(st, chan->channel); in at91_adc_read_info_raw()
1795 at91_adc_writel(st, CR, AT91_SAMA5D2_CR_START); in at91_adc_read_info_raw()
1797 ret = wait_event_interruptible_timeout(st->wq_data_available, in at91_adc_read_info_raw()
1798 st->conversion_done, in at91_adc_read_info_raw()
1804 *val = st->conversion_value; in at91_adc_read_info_raw()
1805 ret = at91_adc_adjust_val_osr(st, val); in at91_adc_read_info_raw()
1809 st->conversion_done = false; in at91_adc_read_info_raw()
1812 at91_adc_eoc_dis(st, st->chan->channel); in at91_adc_read_info_raw()
1814 at91_adc_writel(st, TEMPMR, 0U); in at91_adc_read_info_raw()
1815 at91_adc_writel(st, CHDR, BIT(chan->channel)); in at91_adc_read_info_raw()
1818 at91_adc_readl(st, LCDR); in at91_adc_read_info_raw()
1821 pm_runtime_mark_last_busy(st->dev); in at91_adc_read_info_raw()
1822 pm_runtime_put_autosuspend(st->dev); in at91_adc_read_info_raw()
1829 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_read_info_locked() local
1831 guard(mutex)(&st->lock); in at91_adc_read_info_locked()
1836 static void at91_adc_temp_sensor_configure(struct at91_adc_state *st, in at91_adc_temp_sensor_configure() argument
1853 st->temp_st.saved_sample_rate = st->current_sample_rate; in at91_adc_temp_sensor_configure()
1854 st->temp_st.saved_oversampling = st->oversampling_ratio; in at91_adc_temp_sensor_configure()
1857 sample_rate = st->temp_st.saved_sample_rate; in at91_adc_temp_sensor_configure()
1858 oversampling_ratio = st->temp_st.saved_oversampling; in at91_adc_temp_sensor_configure()
1859 startup_time = st->soc_info.startup_time; in at91_adc_temp_sensor_configure()
1864 at91_adc_setup_samp_freq(st->indio_dev, sample_rate, startup_time, in at91_adc_temp_sensor_configure()
1866 at91_adc_config_emr(st, oversampling_ratio, trackx); in at91_adc_temp_sensor_configure()
1872 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_read_temp() local
1873 struct at91_adc_temp_sensor_clb *clb = &st->soc_info.temp_sensor_clb; in at91_adc_read_temp()
1878 guard(mutex)(&st->lock); in at91_adc_read_temp()
1880 ret = pm_runtime_resume_and_get(st->dev); in at91_adc_read_temp()
1884 at91_adc_temp_sensor_configure(st, true); in at91_adc_read_temp()
1887 tmp = at91_adc_readl(st, ACR); in at91_adc_read_temp()
1889 at91_adc_writel(st, ACR, tmp); in at91_adc_read_temp()
1896 at91_adc_writel(st, ACR, tmp); in at91_adc_read_temp()
1901 at91_adc_temp_sensor_configure(st, false); in at91_adc_read_temp()
1902 pm_runtime_mark_last_busy(st->dev); in at91_adc_read_temp()
1903 pm_runtime_put_autosuspend(st->dev); in at91_adc_read_temp()
1924 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_read_raw() local
1937 *val = st->vref_uv / 1000; in at91_adc_read_raw()
1955 *val = at91_adc_get_sample_freq(st); in at91_adc_read_raw()
1959 *val = st->oversampling_ratio; in at91_adc_read_raw()
1971 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_write_raw() local
1977 if (val == st->oversampling_ratio) in at91_adc_write_raw()
1982 mutex_lock(&st->lock); in at91_adc_write_raw()
1984 ret = at91_adc_config_emr(st, val, 0); in at91_adc_write_raw()
1985 mutex_unlock(&st->lock); in at91_adc_write_raw()
1989 if (val < st->soc_info.min_sample_rate || in at91_adc_write_raw()
1990 val > st->soc_info.max_sample_rate) in at91_adc_write_raw()
1995 mutex_lock(&st->lock); in at91_adc_write_raw()
1997 st->soc_info.startup_time, 0); in at91_adc_write_raw()
1998 mutex_unlock(&st->lock); in at91_adc_write_raw()
2011 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_read_avail() local
2015 *vals = (int *)st->soc_info.platform->oversampling_avail; in at91_adc_read_avail()
2017 *length = st->soc_info.platform->oversampling_avail_no; in at91_adc_read_avail()
2024 static void at91_adc_dma_init(struct at91_adc_state *st) in at91_adc_dma_init() argument
2026 struct device *dev = &st->indio_dev->dev; in at91_adc_dma_init()
2029 unsigned int sample_size = st->soc_info.platform->nr_channels * 2; in at91_adc_dma_init()
2038 if (st->dma_st.dma_chan) in at91_adc_dma_init()
2041 st->dma_st.dma_chan = dma_request_chan(dev, "rx"); in at91_adc_dma_init()
2042 if (IS_ERR(st->dma_st.dma_chan)) { in at91_adc_dma_init()
2044 st->dma_st.dma_chan = NULL; in at91_adc_dma_init()
2048 st->dma_st.rx_buf = dma_alloc_coherent(st->dma_st.dma_chan->device->dev, in at91_adc_dma_init()
2050 &st->dma_st.rx_dma_buf, in at91_adc_dma_init()
2052 if (!st->dma_st.rx_buf) { in at91_adc_dma_init()
2059 config.src_addr = (phys_addr_t)(st->dma_st.phys_addr in at91_adc_dma_init()
2060 + st->soc_info.platform->layout->LCDR); in at91_adc_dma_init()
2065 if (dmaengine_slave_config(st->dma_st.dma_chan, &config)) { in at91_adc_dma_init()
2071 dma_chan_name(st->dma_st.dma_chan)); in at91_adc_dma_init()
2076 dma_free_coherent(st->dma_st.dma_chan->device->dev, pages * PAGE_SIZE, in at91_adc_dma_init()
2077 st->dma_st.rx_buf, st->dma_st.rx_dma_buf); in at91_adc_dma_init()
2079 dma_release_channel(st->dma_st.dma_chan); in at91_adc_dma_init()
2080 st->dma_st.dma_chan = NULL; in at91_adc_dma_init()
2085 static void at91_adc_dma_disable(struct at91_adc_state *st) in at91_adc_dma_disable() argument
2087 struct device *dev = &st->indio_dev->dev; in at91_adc_dma_disable()
2089 unsigned int sample_size = st->soc_info.platform->nr_channels * 2; in at91_adc_dma_disable()
2094 if (!st->dma_st.dma_chan) in at91_adc_dma_disable()
2098 dmaengine_terminate_sync(st->dma_st.dma_chan); in at91_adc_dma_disable()
2100 dma_free_coherent(st->dma_st.dma_chan->device->dev, pages * PAGE_SIZE, in at91_adc_dma_disable()
2101 st->dma_st.rx_buf, st->dma_st.rx_dma_buf); in at91_adc_dma_disable()
2102 dma_release_channel(st->dma_st.dma_chan); in at91_adc_dma_disable()
2103 st->dma_st.dma_chan = NULL; in at91_adc_dma_disable()
2110 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_set_watermark() local
2116 if (!st->selected_trig->hw_trig) { in at91_adc_set_watermark()
2122 st->dma_st.watermark = val; in at91_adc_set_watermark()
2131 at91_adc_dma_disable(st); in at91_adc_set_watermark()
2133 at91_adc_dma_init(st); in at91_adc_set_watermark()
2141 at91_adc_dma_disable(st); in at91_adc_set_watermark()
2149 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_update_scan_mode() local
2151 if (bitmap_subset(scan_mask, &st->touch_st.channels_bitmask, in at91_adc_update_scan_mode()
2152 st->soc_info.platform->max_index + 1)) in at91_adc_update_scan_mode()
2158 if (bitmap_intersects(&st->touch_st.channels_bitmask, scan_mask, in at91_adc_update_scan_mode()
2159 st->soc_info.platform->max_index + 1)) in at91_adc_update_scan_mode()
2166 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_hw_init() local
2168 at91_adc_writel(st, CR, AT91_SAMA5D2_CR_SWRST); in at91_adc_hw_init()
2169 if (st->soc_info.platform->layout->EOC_IDR) in at91_adc_hw_init()
2170 at91_adc_writel(st, EOC_IDR, 0xffffffff); in at91_adc_hw_init()
2171 at91_adc_writel(st, IDR, 0xffffffff); in at91_adc_hw_init()
2176 at91_adc_writel(st, MR, in at91_adc_hw_init()
2179 at91_adc_setup_samp_freq(indio_dev, st->soc_info.min_sample_rate, in at91_adc_hw_init()
2180 st->soc_info.startup_time, 0); in at91_adc_hw_init()
2183 at91_adc_config_emr(st, st->oversampling_ratio, 0); in at91_adc_hw_init()
2190 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_get_fifo_state() local
2192 return sysfs_emit(buf, "%d\n", !!st->dma_st.dma_chan); in at91_adc_get_fifo_state()
2199 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_get_watermark() local
2201 return sysfs_emit(buf, "%d\n", st->dma_st.watermark); in at91_adc_get_watermark()
2232 struct at91_adc_state *st = iio_priv(indio); in at91_adc_buffer_and_trigger_init() local
2236 if (st->selected_trig->hw_trig) in at91_adc_buffer_and_trigger_init()
2249 if (!st->selected_trig->hw_trig) in at91_adc_buffer_and_trigger_init()
2252 st->trig = at91_adc_allocate_trigger(indio, st->selected_trig->name); in at91_adc_buffer_and_trigger_init()
2253 if (IS_ERR(st->trig)) { in at91_adc_buffer_and_trigger_init()
2255 return PTR_ERR(st->trig); in at91_adc_buffer_and_trigger_init()
2262 st->dma_st.watermark = 1; in at91_adc_buffer_and_trigger_init()
2267 static int at91_adc_temp_sensor_init(struct at91_adc_state *st, in at91_adc_temp_sensor_init() argument
2270 struct at91_adc_temp_sensor_clb *clb = &st->soc_info.temp_sensor_clb; in at91_adc_temp_sensor_init()
2276 if (!st->soc_info.platform->temp_sensor) in at91_adc_temp_sensor_init()
2318 struct at91_adc_state *st; in at91_adc_probe() local
2323 indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*st)); in at91_adc_probe()
2327 st = iio_priv(indio_dev); in at91_adc_probe()
2328 st->indio_dev = indio_dev; in at91_adc_probe()
2330 st->soc_info.platform = device_get_match_data(dev); in at91_adc_probe()
2332 ret = at91_adc_temp_sensor_init(st, &pdev->dev); in at91_adc_probe()
2335 num_channels = st->soc_info.platform->max_channels - 1; in at91_adc_probe()
2337 num_channels = st->soc_info.platform->max_channels; in at91_adc_probe()
2342 indio_dev->channels = *st->soc_info.platform->adc_channels; in at91_adc_probe()
2345 bitmap_set(&st->touch_st.channels_bitmask, in at91_adc_probe()
2346 st->soc_info.platform->touch_chan_x, 1); in at91_adc_probe()
2347 bitmap_set(&st->touch_st.channels_bitmask, in at91_adc_probe()
2348 st->soc_info.platform->touch_chan_y, 1); in at91_adc_probe()
2349 bitmap_set(&st->touch_st.channels_bitmask, in at91_adc_probe()
2350 st->soc_info.platform->touch_chan_p, 1); in at91_adc_probe()
2352 st->oversampling_ratio = 1; in at91_adc_probe()
2355 &st->soc_info.min_sample_rate); in at91_adc_probe()
2363 &st->soc_info.max_sample_rate); in at91_adc_probe()
2371 &st->soc_info.startup_time); in at91_adc_probe()
2385 st->selected_trig = NULL; in at91_adc_probe()
2388 for (i = 0; i < st->soc_info.platform->hw_trig_cnt + 1; i++) in at91_adc_probe()
2390 st->selected_trig = &at91_adc_trigger_list[i]; in at91_adc_probe()
2394 if (!st->selected_trig) { in at91_adc_probe()
2399 init_waitqueue_head(&st->wq_data_available); in at91_adc_probe()
2400 mutex_init(&st->lock); in at91_adc_probe()
2401 INIT_WORK(&st->touch_st.workq, at91_adc_workq_handler); in at91_adc_probe()
2403 st->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in at91_adc_probe()
2404 if (IS_ERR(st->base)) in at91_adc_probe()
2405 return PTR_ERR(st->base); in at91_adc_probe()
2408 st->dma_st.phys_addr = res->start; in at91_adc_probe()
2410 st->irq = platform_get_irq(pdev, 0); in at91_adc_probe()
2411 if (st->irq < 0) in at91_adc_probe()
2412 return st->irq; in at91_adc_probe()
2414 st->per_clk = devm_clk_get(&pdev->dev, "adc_clk"); in at91_adc_probe()
2415 if (IS_ERR(st->per_clk)) in at91_adc_probe()
2416 return PTR_ERR(st->per_clk); in at91_adc_probe()
2418 st->reg = devm_regulator_get(&pdev->dev, "vddana"); in at91_adc_probe()
2419 if (IS_ERR(st->reg)) in at91_adc_probe()
2420 return PTR_ERR(st->reg); in at91_adc_probe()
2422 st->vref = devm_regulator_get(&pdev->dev, "vref"); in at91_adc_probe()
2423 if (IS_ERR(st->vref)) in at91_adc_probe()
2424 return PTR_ERR(st->vref); in at91_adc_probe()
2426 ret = devm_request_irq(&pdev->dev, st->irq, at91_adc_interrupt, 0, in at91_adc_probe()
2431 ret = regulator_enable(st->reg); in at91_adc_probe()
2435 ret = regulator_enable(st->vref); in at91_adc_probe()
2439 st->vref_uv = regulator_get_voltage(st->vref); in at91_adc_probe()
2440 if (st->vref_uv <= 0) { in at91_adc_probe()
2445 ret = clk_prepare_enable(st->per_clk); in at91_adc_probe()
2450 st->dev = &pdev->dev; in at91_adc_probe()
2451 pm_runtime_set_autosuspend_delay(st->dev, 500); in at91_adc_probe()
2452 pm_runtime_use_autosuspend(st->dev); in at91_adc_probe()
2453 pm_runtime_set_active(st->dev); in at91_adc_probe()
2454 pm_runtime_enable(st->dev); in at91_adc_probe()
2455 pm_runtime_get_noresume(st->dev); in at91_adc_probe()
2470 if (st->selected_trig->hw_trig) in at91_adc_probe()
2472 st->selected_trig->name); in at91_adc_probe()
2475 readl_relaxed(st->base + st->soc_info.platform->layout->VERSION)); in at91_adc_probe()
2477 pm_runtime_mark_last_busy(st->dev); in at91_adc_probe()
2478 pm_runtime_put_autosuspend(st->dev); in at91_adc_probe()
2483 at91_adc_dma_disable(st); in at91_adc_probe()
2485 pm_runtime_put_noidle(st->dev); in at91_adc_probe()
2486 pm_runtime_disable(st->dev); in at91_adc_probe()
2487 pm_runtime_set_suspended(st->dev); in at91_adc_probe()
2488 pm_runtime_dont_use_autosuspend(st->dev); in at91_adc_probe()
2489 clk_disable_unprepare(st->per_clk); in at91_adc_probe()
2491 regulator_disable(st->vref); in at91_adc_probe()
2493 regulator_disable(st->reg); in at91_adc_probe()
2500 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_remove() local
2504 at91_adc_dma_disable(st); in at91_adc_remove()
2506 pm_runtime_disable(st->dev); in at91_adc_remove()
2507 pm_runtime_set_suspended(st->dev); in at91_adc_remove()
2508 clk_disable_unprepare(st->per_clk); in at91_adc_remove()
2510 regulator_disable(st->vref); in at91_adc_remove()
2511 regulator_disable(st->reg); in at91_adc_remove()
2517 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_suspend() local
2520 ret = pm_runtime_resume_and_get(st->dev); in at91_adc_suspend()
2533 at91_adc_writel(st, CR, AT91_SAMA5D2_CR_SWRST); in at91_adc_suspend()
2535 pm_runtime_mark_last_busy(st->dev); in at91_adc_suspend()
2536 pm_runtime_put_noidle(st->dev); in at91_adc_suspend()
2537 clk_disable_unprepare(st->per_clk); in at91_adc_suspend()
2538 regulator_disable(st->vref); in at91_adc_suspend()
2539 regulator_disable(st->reg); in at91_adc_suspend()
2547 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_resume() local
2554 ret = regulator_enable(st->reg); in at91_adc_resume()
2558 ret = regulator_enable(st->vref); in at91_adc_resume()
2562 ret = clk_prepare_enable(st->per_clk); in at91_adc_resume()
2566 pm_runtime_get_noresume(st->dev); in at91_adc_resume()
2576 at91_adc_configure_trigger_registers(st, true); in at91_adc_resume()
2579 pm_runtime_mark_last_busy(st->dev); in at91_adc_resume()
2580 pm_runtime_put_autosuspend(st->dev); in at91_adc_resume()
2585 pm_runtime_mark_last_busy(st->dev); in at91_adc_resume()
2586 pm_runtime_put_noidle(st->dev); in at91_adc_resume()
2587 clk_disable_unprepare(st->per_clk); in at91_adc_resume()
2589 regulator_disable(st->vref); in at91_adc_resume()
2591 regulator_disable(st->reg); in at91_adc_resume()
2600 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_runtime_suspend() local
2602 clk_disable(st->per_clk); in at91_adc_runtime_suspend()
2610 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_runtime_resume() local
2612 return clk_enable(st->per_clk); in at91_adc_runtime_resume()