Lines Matching +full:back +full:- +full:to +full:- +full:back
1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright 2012-2020 Analog Devices Inc.
23 #include <linux/fpga/adi-axi-common.h>
26 #include <linux/iio/buffer-dmaengine.h>
116 /* lock to protect multiple accesses to the device registers */
120 static int axi_adc_enable(struct iio_backend *back) in axi_adc_enable() argument
122 struct adi_axi_adc_state *st = iio_backend_get_priv(back); in axi_adc_enable()
126 guard(mutex)(&st->lock); in axi_adc_enable()
127 ret = regmap_set_bits(st->regmap, ADI_AXI_REG_RSTN, in axi_adc_enable()
137 ret = regmap_read_poll_timeout(st->regmap, ADI_AXI_ADC_REG_DRP_STATUS, in axi_adc_enable()
143 return regmap_set_bits(st->regmap, ADI_AXI_REG_RSTN, in axi_adc_enable()
147 static void axi_adc_disable(struct iio_backend *back) in axi_adc_disable() argument
149 struct adi_axi_adc_state *st = iio_backend_get_priv(back); in axi_adc_disable()
151 guard(mutex)(&st->lock); in axi_adc_disable()
152 regmap_write(st->regmap, ADI_AXI_REG_RSTN, 0); in axi_adc_disable()
155 static int axi_adc_data_format_set(struct iio_backend *back, unsigned int chan, in axi_adc_data_format_set() argument
158 struct adi_axi_adc_state *st = iio_backend_get_priv(back); in axi_adc_data_format_set()
161 if (!data->enable) in axi_adc_data_format_set()
162 return regmap_clear_bits(st->regmap, in axi_adc_data_format_set()
167 if (data->sign_extend) in axi_adc_data_format_set()
169 if (data->type == IIO_BACKEND_OFFSET_BINARY) in axi_adc_data_format_set()
172 return regmap_update_bits(st->regmap, ADI_AXI_REG_CHAN_CTRL(chan), in axi_adc_data_format_set()
176 static int axi_adc_data_sample_trigger(struct iio_backend *back, in axi_adc_data_sample_trigger() argument
179 struct adi_axi_adc_state *st = iio_backend_get_priv(back); in axi_adc_data_sample_trigger()
183 return regmap_clear_bits(st->regmap, ADI_AXI_ADC_REG_CTRL, in axi_adc_data_sample_trigger()
186 return regmap_set_bits(st->regmap, ADI_AXI_ADC_REG_CTRL, in axi_adc_data_sample_trigger()
189 return -EINVAL; in axi_adc_data_sample_trigger()
193 static int axi_adc_iodelays_set(struct iio_backend *back, unsigned int lane, in axi_adc_iodelays_set() argument
196 struct adi_axi_adc_state *st = iio_backend_get_priv(back); in axi_adc_iodelays_set()
201 return -EINVAL; in axi_adc_iodelays_set()
203 return -EINVAL; in axi_adc_iodelays_set()
205 guard(mutex)(&st->lock); in axi_adc_iodelays_set()
206 ret = regmap_write(st->regmap, ADI_AXI_ADC_REG_DELAY(lane), tap); in axi_adc_iodelays_set()
213 ret = regmap_read(st->regmap, ADI_AXI_ADC_REG_DELAY(lane), &val); in axi_adc_iodelays_set()
217 return -EIO; in axi_adc_iodelays_set()
222 static int axi_adc_test_pattern_set(struct iio_backend *back, in axi_adc_test_pattern_set() argument
226 struct adi_axi_adc_state *st = iio_backend_get_priv(back); in axi_adc_test_pattern_set()
230 /* nothing to do */ in axi_adc_test_pattern_set()
233 return regmap_update_bits(st->regmap, ADI_AXI_ADC_REG_CHAN_CTRL_3(chan), in axi_adc_test_pattern_set()
237 return regmap_update_bits(st->regmap, ADI_AXI_ADC_REG_CHAN_CTRL_3(chan), in axi_adc_test_pattern_set()
241 return -EINVAL; in axi_adc_test_pattern_set()
250 guard(mutex)(&st->lock); in axi_adc_read_chan_status()
252 ret = regmap_write(st->regmap, ADI_AXI_ADC_REG_CHAN_STATUS(chan), in axi_adc_read_chan_status()
257 /* let's give enough time to validate or erroring the incoming pattern */ in axi_adc_read_chan_status()
260 return regmap_read(st->regmap, ADI_AXI_ADC_REG_CHAN_STATUS(chan), in axi_adc_read_chan_status()
264 static int axi_adc_chan_status(struct iio_backend *back, unsigned int chan, in axi_adc_chan_status() argument
267 struct adi_axi_adc_state *st = iio_backend_get_priv(back); in axi_adc_chan_status()
283 static int axi_adc_debugfs_print_chan_status(struct iio_backend *back, in axi_adc_debugfs_print_chan_status() argument
287 struct adi_axi_adc_state *st = iio_backend_get_priv(back); in axi_adc_debugfs_print_chan_status()
307 static int axi_adc_chan_enable(struct iio_backend *back, unsigned int chan) in axi_adc_chan_enable() argument
309 struct adi_axi_adc_state *st = iio_backend_get_priv(back); in axi_adc_chan_enable()
311 return regmap_set_bits(st->regmap, ADI_AXI_REG_CHAN_CTRL(chan), in axi_adc_chan_enable()
315 static int axi_adc_chan_disable(struct iio_backend *back, unsigned int chan) in axi_adc_chan_disable() argument
317 struct adi_axi_adc_state *st = iio_backend_get_priv(back); in axi_adc_chan_disable()
319 return regmap_clear_bits(st->regmap, ADI_AXI_REG_CHAN_CTRL(chan), in axi_adc_chan_disable()
323 static int axi_adc_interface_type_get(struct iio_backend *back, in axi_adc_interface_type_get() argument
326 struct adi_axi_adc_state *st = iio_backend_get_priv(back); in axi_adc_interface_type_get()
330 ret = regmap_read(st->regmap, ADI_AXI_ADC_REG_CONFIG, &val); in axi_adc_interface_type_get()
342 static int axi_adc_ad485x_data_size_set(struct iio_backend *back, in axi_adc_ad485x_data_size_set() argument
345 struct adi_axi_adc_state *st = iio_backend_get_priv(back); in axi_adc_ad485x_data_size_set()
351 * 16-bit and a 20-bit variant. in axi_adc_ad485x_data_size_set()
353 * to the 16-bit variant of the IP block. in axi_adc_ad485x_data_size_set()
363 * The 0x2 (AXI_AD485X_PACKET_FORMAT_32BIT) corresponds only to the in axi_adc_ad485x_data_size_set()
364 * 20-bit variant of the IP block. Setting this value properly is in axi_adc_ad485x_data_size_set()
365 * ensured by the upper layers of the drivers calling the axi-adc in axi_adc_ad485x_data_size_set()
367 * Also, for 16-bit IP block, the 0x2 (AXI_AD485X_PACKET_FORMAT_32BIT) in axi_adc_ad485x_data_size_set()
368 * value is handled as maximum size available which is 24-bit for this in axi_adc_ad485x_data_size_set()
375 return -EINVAL; in axi_adc_ad485x_data_size_set()
378 return regmap_update_bits(st->regmap, ADI_AXI_ADC_REG_CNTRL_3, in axi_adc_ad485x_data_size_set()
383 static int axi_adc_ad485x_oversampling_ratio_set(struct iio_backend *back, in axi_adc_ad485x_oversampling_ratio_set() argument
386 struct adi_axi_adc_state *st = iio_backend_get_priv(back); in axi_adc_ad485x_oversampling_ratio_set()
389 * oversampling in REG_CNTRL_3 register. A ratio equal to 1 implies no in axi_adc_ad485x_oversampling_ratio_set()
395 return -EINVAL; in axi_adc_ad485x_oversampling_ratio_set()
397 return regmap_clear_bits(st->regmap, ADI_AXI_ADC_REG_CNTRL_3, in axi_adc_ad485x_oversampling_ratio_set()
400 return regmap_set_bits(st->regmap, ADI_AXI_ADC_REG_CNTRL_3, in axi_adc_ad485x_oversampling_ratio_set()
405 static struct iio_buffer *axi_adc_request_buffer(struct iio_backend *back, in axi_adc_request_buffer() argument
408 struct adi_axi_adc_state *st = iio_backend_get_priv(back); in axi_adc_request_buffer()
411 if (device_property_read_string(st->dev, "dma-names", &dma_name)) in axi_adc_request_buffer()
414 return iio_dmaengine_buffer_setup(st->dev, indio_dev, dma_name); in axi_adc_request_buffer()
417 static int axi_adc_raw_write(struct iio_backend *back, u32 val) in axi_adc_raw_write() argument
419 struct adi_axi_adc_state *st = iio_backend_get_priv(back); in axi_adc_raw_write()
421 regmap_write(st->regmap, ADI_AXI_REG_CONFIG_WR, val); in axi_adc_raw_write()
422 regmap_write(st->regmap, ADI_AXI_REG_CONFIG_CTRL, in axi_adc_raw_write()
425 regmap_write(st->regmap, ADI_AXI_REG_CONFIG_CTRL, 0x00); in axi_adc_raw_write()
431 static int axi_adc_raw_read(struct iio_backend *back, u32 *val) in axi_adc_raw_read() argument
433 struct adi_axi_adc_state *st = iio_backend_get_priv(back); in axi_adc_raw_read()
435 regmap_write(st->regmap, ADI_AXI_REG_CONFIG_CTRL, in axi_adc_raw_read()
438 regmap_read(st->regmap, ADI_AXI_REG_CONFIG_RD, val); in axi_adc_raw_read()
439 regmap_write(st->regmap, ADI_AXI_REG_CONFIG_CTRL, 0x00); in axi_adc_raw_read()
445 static int ad7606_bus_reg_read(struct iio_backend *back, u32 reg, u32 *val) in ad7606_bus_reg_read() argument
447 struct adi_axi_adc_state *st = iio_backend_get_priv(back); in ad7606_bus_reg_read()
450 guard(mutex)(&st->lock); in ad7606_bus_reg_read()
457 axi_adc_raw_write(back, addr); in ad7606_bus_reg_read()
458 axi_adc_raw_read(back, val); in ad7606_bus_reg_read()
460 /* Write 0x0 on the bus to get back to ADC mode */ in ad7606_bus_reg_read()
461 axi_adc_raw_write(back, 0); in ad7606_bus_reg_read()
466 static int ad7606_bus_reg_write(struct iio_backend *back, u32 reg, u32 val) in ad7606_bus_reg_write() argument
468 struct adi_axi_adc_state *st = iio_backend_get_priv(back); in ad7606_bus_reg_write()
471 guard(mutex)(&st->lock); in ad7606_bus_reg_write()
473 /* Write any register to switch to register mode */ in ad7606_bus_reg_write()
474 axi_adc_raw_write(back, 0xaf00); in ad7606_bus_reg_write()
478 axi_adc_raw_write(back, buf); in ad7606_bus_reg_write()
480 /* Write 0x0 on the bus to get back to ADC mode */ in ad7606_bus_reg_write()
481 axi_adc_raw_write(back, 0); in ad7606_bus_reg_write()
486 static void axi_adc_free_buffer(struct iio_backend *back, in axi_adc_free_buffer() argument
492 static int axi_adc_reg_access(struct iio_backend *back, unsigned int reg, in axi_adc_reg_access() argument
495 struct adi_axi_adc_state *st = iio_backend_get_priv(back); in axi_adc_reg_access()
498 return regmap_read(st->regmap, reg, readval); in axi_adc_reg_access()
500 return regmap_write(st->regmap, reg, writeval); in axi_adc_reg_access()
518 .parent = st->dev, in axi_adc_create_platform_device()
522 .data = st->info->pdata, in axi_adc_create_platform_device()
523 .size_data = st->info->pdata_sz, in axi_adc_create_platform_device()
532 ret = devm_add_action_or_reset(st->dev, axi_adc_child_remove, pdev); in axi_adc_create_platform_device()
557 .name = "axi-adc",
581 .name = "axi-ad485x",
593 st = devm_kzalloc(&pdev->dev, sizeof(*st), GFP_KERNEL); in adi_axi_adc_probe()
595 return -ENOMEM; in adi_axi_adc_probe()
601 st->dev = &pdev->dev; in adi_axi_adc_probe()
602 st->regmap = devm_regmap_init_mmio(&pdev->dev, base, in adi_axi_adc_probe()
604 if (IS_ERR(st->regmap)) in adi_axi_adc_probe()
605 return dev_err_probe(&pdev->dev, PTR_ERR(st->regmap), in adi_axi_adc_probe()
606 "failed to init register map\n"); in adi_axi_adc_probe()
608 st->info = device_get_match_data(&pdev->dev); in adi_axi_adc_probe()
609 if (!st->info) in adi_axi_adc_probe()
610 return -ENODEV; in adi_axi_adc_probe()
612 clk = devm_clk_get_enabled(&pdev->dev, NULL); in adi_axi_adc_probe()
614 return dev_err_probe(&pdev->dev, PTR_ERR(clk), in adi_axi_adc_probe()
615 "failed to get clock\n"); in adi_axi_adc_probe()
618 * Force disable the core. Up to the frontend to enable us. And we can in adi_axi_adc_probe()
621 ret = regmap_write(st->regmap, ADI_AXI_REG_RSTN, 0); in adi_axi_adc_probe()
625 ret = regmap_read(st->regmap, ADI_AXI_REG_VERSION, &ver); in adi_axi_adc_probe()
630 ADI_AXI_PCORE_VER_MAJOR(st->info->version)) { in adi_axi_adc_probe()
631 dev_err(&pdev->dev, in adi_axi_adc_probe()
633 ADI_AXI_PCORE_VER_MAJOR(st->info->version), in adi_axi_adc_probe()
634 ADI_AXI_PCORE_VER_MINOR(st->info->version), in adi_axi_adc_probe()
635 ADI_AXI_PCORE_VER_PATCH(st->info->version), in adi_axi_adc_probe()
639 return -ENODEV; in adi_axi_adc_probe()
642 ret = devm_iio_backend_register(&pdev->dev, st->info->backend_info, st); in adi_axi_adc_probe()
644 return dev_err_probe(&pdev->dev, ret, in adi_axi_adc_probe()
645 "failed to register iio backend\n"); in adi_axi_adc_probe()
647 device_for_each_child_node_scoped(&pdev->dev, child) { in adi_axi_adc_probe()
650 if (!st->info->has_child_nodes) in adi_axi_adc_probe()
651 return dev_err_probe(&pdev->dev, -EINVAL, in adi_axi_adc_probe()
652 "invalid fdt axi-dac compatible."); in adi_axi_adc_probe()
657 return dev_err_probe(&pdev->dev, ret, in adi_axi_adc_probe()
660 return dev_err_probe(&pdev->dev, -EINVAL, in adi_axi_adc_probe()
665 return dev_err_probe(&pdev->dev, -EINVAL, in adi_axi_adc_probe()
669 dev_info(&pdev->dev, "AXI ADC IP core (%d.%.2d.%c) probed\n", in adi_axi_adc_probe()
702 { .compatible = "adi,axi-adc-10.0.a", .data = &adc_generic },
703 { .compatible = "adi,axi-ad485x", .data = &adi_axi_ad485x },
704 { .compatible = "adi,axi-ad7606x", .data = &adc_ad7606 },