Lines Matching +full:1 +full:st
39 * X is the integer part and X + 1 is the fractional part.
78 { 0, 610352 }, { 1, 220703 }
86 1, 2, 4, 8, 16, 32, 64,
90 1, 2, 4, 8, 16, 32, 64, 128, 256,
94 1, 2, 4, 8, 16, 32, 64, 128,
100 AD7605_CHANNEL(1),
108 AD7606_CHANNEL(1, 16),
120 AD7606_CHANNEL(1, 18),
132 AD7606_CHANNEL(1, 14),
144 AD7606_CHANNEL(1, 18),
166 AD7606_CHANNEL(1, 16),
324 int ad7606_reset(struct ad7606_state *st) in ad7606_reset() argument
326 if (st->gpio_reset) { in ad7606_reset()
327 gpiod_set_value(st->gpio_reset, 1); in ad7606_reset()
329 gpiod_set_value(st->gpio_reset, 0); in ad7606_reset()
340 struct ad7606_state *st = iio_priv(indio_dev); in ad7606_16bit_chan_scale_setup() local
341 struct ad7606_chan_scale *cs = &st->chan_scales[ch]; in ad7606_16bit_chan_scale_setup()
343 if (!st->sw_mode_en) { in ad7606_16bit_chan_scale_setup()
363 struct ad7606_state *st = iio_priv(indio_dev); in ad7606_get_chan_config() local
364 unsigned int num_channels = st->chip_info->num_adc_channels; in ad7606_get_chan_config()
365 unsigned int offset = indio_dev->num_channels - st->chip_info->num_adc_channels; in ad7606_get_chan_config()
366 struct device *dev = st->dev; in ad7606_get_chan_config()
380 /* channel number (here) is from 1 to num_channels */ in ad7606_get_chan_config()
387 if (reg != (ch + 1)) in ad7606_get_chan_config()
395 if (ret == 0 && (pins[0] != reg || pins[1] != reg)) { in ad7606_get_chan_config()
419 struct ad7606_state *st = iio_priv(indio_dev); in ad7606c_18bit_chan_scale_setup() local
420 struct ad7606_chan_scale *cs = &st->chan_scales[ch]; in ad7606c_18bit_chan_scale_setup()
424 if (!st->sw_mode_en) { in ad7606c_18bit_chan_scale_setup()
441 cs->range = 1; in ad7606c_18bit_chan_scale_setup()
442 chan->differential = 1; in ad7606c_18bit_chan_scale_setup()
467 cs->range = 1; in ad7606c_18bit_chan_scale_setup()
476 struct ad7606_state *st = iio_priv(indio_dev); in ad7606c_16bit_chan_scale_setup() local
477 struct ad7606_chan_scale *cs = &st->chan_scales[ch]; in ad7606c_16bit_chan_scale_setup()
481 if (!st->sw_mode_en) { in ad7606c_16bit_chan_scale_setup()
498 cs->range = 1; in ad7606c_16bit_chan_scale_setup()
499 chan->differential = 1; in ad7606c_16bit_chan_scale_setup()
525 cs->range = 1; in ad7606c_16bit_chan_scale_setup()
534 struct ad7606_state *st = iio_priv(indio_dev); in ad7607_chan_scale_setup() local
535 struct ad7606_chan_scale *cs = &st->chan_scales[ch]; in ad7607_chan_scale_setup()
546 struct ad7606_state *st = iio_priv(indio_dev); in ad7608_chan_scale_setup() local
547 struct ad7606_chan_scale *cs = &st->chan_scales[ch]; in ad7608_chan_scale_setup()
558 struct ad7606_state *st = iio_priv(indio_dev); in ad7609_chan_scale_setup() local
559 struct ad7606_chan_scale *cs = &st->chan_scales[ch]; in ad7609_chan_scale_setup()
572 struct ad7606_state *st = iio_priv(indio_dev); in ad7606_reg_access() local
575 guard(mutex)(&st->lock); in ad7606_reg_access()
578 ret = st->bops->reg_read(st, reg); in ad7606_reg_access()
584 return st->bops->reg_write(st, reg, writeval); in ad7606_reg_access()
588 static int ad7606_pwm_set_high(struct ad7606_state *st) in ad7606_pwm_set_high() argument
593 pwm_get_state(st->cnvst_pwm, &cnvst_pwm_state); in ad7606_pwm_set_high()
597 ret = pwm_apply_might_sleep(st->cnvst_pwm, &cnvst_pwm_state); in ad7606_pwm_set_high()
602 static int ad7606_pwm_set_low(struct ad7606_state *st) in ad7606_pwm_set_low() argument
607 pwm_get_state(st->cnvst_pwm, &cnvst_pwm_state); in ad7606_pwm_set_low()
611 ret = pwm_apply_might_sleep(st->cnvst_pwm, &cnvst_pwm_state); in ad7606_pwm_set_low()
616 static int ad7606_pwm_set_swing(struct ad7606_state *st) in ad7606_pwm_set_swing() argument
620 pwm_get_state(st->cnvst_pwm, &cnvst_pwm_state); in ad7606_pwm_set_swing()
624 return pwm_apply_might_sleep(st->cnvst_pwm, &cnvst_pwm_state); in ad7606_pwm_set_swing()
627 static bool ad7606_pwm_is_swinging(struct ad7606_state *st) in ad7606_pwm_is_swinging() argument
631 pwm_get_state(st->cnvst_pwm, &cnvst_pwm_state); in ad7606_pwm_is_swinging()
637 static int ad7606_set_sampling_freq(struct ad7606_state *st, unsigned long freq) in ad7606_set_sampling_freq() argument
640 bool is_swinging = ad7606_pwm_is_swinging(st); in ad7606_set_sampling_freq()
647 pwm_get_state(st->cnvst_pwm, &cnvst_pwm_state); in ad7606_set_sampling_freq()
659 return pwm_apply_might_sleep(st->cnvst_pwm, &cnvst_pwm_state); in ad7606_set_sampling_freq()
662 static int ad7606_read_samples(struct ad7606_state *st) in ad7606_read_samples() argument
664 unsigned int num = st->chip_info->num_adc_channels; in ad7606_read_samples()
666 return st->bops->read_block(st->dev, num, &st->data); in ad7606_read_samples()
673 struct ad7606_state *st = iio_priv(indio_dev); in ad7606_trigger_handler() local
676 guard(mutex)(&st->lock); in ad7606_trigger_handler()
678 ret = ad7606_read_samples(st); in ad7606_trigger_handler()
682 iio_push_to_buffers_with_timestamp(indio_dev, &st->data, in ad7606_trigger_handler()
687 gpiod_set_value(st->gpio_convst, 1); in ad7606_trigger_handler()
695 struct ad7606_state *st = iio_priv(indio_dev); in ad7606_scan_direct() local
696 unsigned int realbits = st->chip_info->channels[1].scan_type.realbits; in ad7606_scan_direct()
700 if (st->gpio_convst) { in ad7606_scan_direct()
701 gpiod_set_value(st->gpio_convst, 1); in ad7606_scan_direct()
703 ret = ad7606_pwm_set_high(st); in ad7606_scan_direct()
714 if (!st->back) { in ad7606_scan_direct()
715 ret = wait_for_completion_timeout(&st->completion, in ad7606_scan_direct()
722 fsleep(1); in ad7606_scan_direct()
725 ret = ad7606_read_samples(st); in ad7606_scan_direct()
729 chan = &indio_dev->channels[ch + 1]; in ad7606_scan_direct()
732 *val = st->data.buf32[ch]; in ad7606_scan_direct()
734 *val = st->data.buf16[ch]; in ad7606_scan_direct()
737 *val = sign_extend32(st->data.buf32[ch], realbits - 1); in ad7606_scan_direct()
739 *val = sign_extend32(st->data.buf16[ch], realbits - 1); in ad7606_scan_direct()
743 if (!st->gpio_convst) { in ad7606_scan_direct()
744 ret = ad7606_pwm_set_low(st); in ad7606_scan_direct()
748 gpiod_set_value(st->gpio_convst, 0); in ad7606_scan_direct()
760 struct ad7606_state *st = iio_priv(indio_dev); in ad7606_read_raw() local
774 if (st->sw_mode_en) in ad7606_read_raw()
776 cs = &st->chan_scales[ch]; in ad7606_read_raw()
778 *val2 = cs->scale_avail[cs->range][1]; in ad7606_read_raw()
781 *val = st->oversampling; in ad7606_read_raw()
788 pwm_get_state(st->cnvst_pwm, &cnvst_pwm_state); in ad7606_read_raw()
800 struct ad7606_state *st = iio_priv(indio_dev); in in_voltage_scale_available_show() local
801 struct ad7606_chan_scale *cs = &st->chan_scales[0]; in in_voltage_scale_available_show()
808 vals[i][0], vals[i][1]); in in_voltage_scale_available_show()
809 buf[len - 1] = '\n'; in in_voltage_scale_available_show()
818 struct ad7606_state *st = iio_priv(indio_dev); in ad7606_write_scale_hw() local
820 gpiod_set_value(st->gpio_range, val); in ad7606_write_scale_hw()
827 struct ad7606_state *st = iio_priv(indio_dev); in ad7606_write_os_hw() local
832 gpiod_multi_set_value_cansleep(st->gpio_os, values); in ad7606_write_os_hw()
835 if (st->chip_info->os_req_reset) in ad7606_write_os_hw()
836 ad7606_reset(st); in ad7606_write_os_hw()
847 struct ad7606_state *st = iio_priv(indio_dev); in ad7606_write_raw() local
852 guard(mutex)(&st->lock); in ad7606_write_raw()
856 if (st->sw_mode_en) in ad7606_write_raw()
858 cs = &st->chan_scales[ch]; in ad7606_write_raw()
861 cs->scale_avail[i][1]; in ad7606_write_raw()
868 ret = st->write_scale(indio_dev, ch, i + cs->reg_offset); in ad7606_write_raw()
878 i = find_closest(val, st->oversampling_avail, in ad7606_write_raw()
879 st->num_os_ratios); in ad7606_write_raw()
883 ret = st->write_os(indio_dev, i); in ad7606_write_raw()
887 st->oversampling = st->oversampling_avail[i]; in ad7606_write_raw()
893 return ad7606_set_sampling_freq(st, val); in ad7606_write_raw()
904 struct ad7606_state *st = iio_priv(indio_dev); in ad7606_oversampling_ratio_avail() local
905 const unsigned int *vals = st->oversampling_avail; in ad7606_oversampling_ratio_avail()
909 for (i = 0; i < st->num_os_ratios; i++) in ad7606_oversampling_ratio_avail()
911 buf[len - 1] = '\n'; in ad7606_oversampling_ratio_avail()
947 static int ad7606_request_gpios(struct ad7606_state *st) in ad7606_request_gpios() argument
949 struct device *dev = st->dev; in ad7606_request_gpios()
951 st->gpio_convst = devm_gpiod_get_optional(dev, "adi,conversion-start", in ad7606_request_gpios()
954 if (IS_ERR(st->gpio_convst)) in ad7606_request_gpios()
955 return PTR_ERR(st->gpio_convst); in ad7606_request_gpios()
957 st->gpio_reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW); in ad7606_request_gpios()
958 if (IS_ERR(st->gpio_reset)) in ad7606_request_gpios()
959 return PTR_ERR(st->gpio_reset); in ad7606_request_gpios()
961 st->gpio_range = devm_gpiod_get_optional(dev, "adi,range", in ad7606_request_gpios()
963 if (IS_ERR(st->gpio_range)) in ad7606_request_gpios()
964 return PTR_ERR(st->gpio_range); in ad7606_request_gpios()
966 st->gpio_standby = devm_gpiod_get_optional(dev, "standby", in ad7606_request_gpios()
968 if (IS_ERR(st->gpio_standby)) in ad7606_request_gpios()
969 return PTR_ERR(st->gpio_standby); in ad7606_request_gpios()
971 st->gpio_frstdata = devm_gpiod_get_optional(dev, "adi,first-data", in ad7606_request_gpios()
973 if (IS_ERR(st->gpio_frstdata)) in ad7606_request_gpios()
974 return PTR_ERR(st->gpio_frstdata); in ad7606_request_gpios()
976 if (!st->chip_info->oversampling_num) in ad7606_request_gpios()
979 st->gpio_os = devm_gpiod_get_array_optional(dev, in ad7606_request_gpios()
982 return PTR_ERR_OR_ZERO(st->gpio_os); in ad7606_request_gpios()
994 struct ad7606_state *st = iio_priv(indio_dev); in ad7606_interrupt() local
998 if (st->gpio_convst) { in ad7606_interrupt()
999 gpiod_set_value(st->gpio_convst, 0); in ad7606_interrupt()
1001 ret = ad7606_pwm_set_low(st); in ad7606_interrupt()
1003 dev_err(st->dev, "PWM set low failed"); in ad7606_interrupt()
1007 iio_trigger_poll_nested(st->trig); in ad7606_interrupt()
1009 complete(&st->completion); in ad7606_interrupt()
1019 struct ad7606_state *st = iio_priv(indio_dev); in ad7606_validate_trigger() local
1021 if (st->trig != trig) in ad7606_validate_trigger()
1029 struct ad7606_state *st = iio_priv(indio_dev); in ad7606_buffer_postenable() local
1031 gpiod_set_value(st->gpio_convst, 1); in ad7606_buffer_postenable()
1038 struct ad7606_state *st = iio_priv(indio_dev); in ad7606_buffer_predisable() local
1040 gpiod_set_value(st->gpio_convst, 0); in ad7606_buffer_predisable()
1050 struct ad7606_state *st = iio_priv(indio_dev); in ad7606_read_avail() local
1056 *vals = st->oversampling_avail; in ad7606_read_avail()
1057 *length = st->num_os_ratios; in ad7606_read_avail()
1063 if (st->sw_mode_en) in ad7606_read_avail()
1066 cs = &st->chan_scales[ch]; in ad7606_read_avail()
1078 struct ad7606_state *st = iio_priv(indio_dev); in ad7606_backend_buffer_postenable() local
1080 return ad7606_pwm_set_swing(st); in ad7606_backend_buffer_postenable()
1085 struct ad7606_state *st = iio_priv(indio_dev); in ad7606_backend_buffer_predisable() local
1087 return ad7606_pwm_set_low(st); in ad7606_backend_buffer_predisable()
1093 struct ad7606_state *st = iio_priv(indio_dev); in ad7606_update_scan_mode() local
1100 if (!st->bops->update_scan_mode) in ad7606_update_scan_mode()
1103 return st->bops->update_scan_mode(indio_dev, scan_mask); in ad7606_update_scan_mode()
1159 static int ad7606_write_mask(struct ad7606_state *st, unsigned int addr, in ad7606_write_mask() argument
1164 readval = st->bops->reg_read(st, addr); in ad7606_write_mask()
1171 return st->bops->reg_write(st, addr, readval); in ad7606_write_mask()
1176 struct ad7606_state *st = iio_priv(indio_dev); in ad7616_write_scale_sw() local
1184 * because the order of channels in iio is 0A, 0B, 1A, 1B... in ad7616_write_scale_sw()
1186 ch_index = ch >> 1; in ad7616_write_scale_sw()
1196 mode = AD7616_RANGE_CH_MODE(ch_index, ((val + 1) & 0b11)); in ad7616_write_scale_sw()
1198 return ad7606_write_mask(st, ch_addr, AD7616_RANGE_CH_MSK(ch_index), in ad7616_write_scale_sw()
1204 struct ad7606_state *st = iio_priv(indio_dev); in ad7616_write_os_sw() local
1206 return ad7606_write_mask(st, AD7616_CONFIGURATION_REGISTER, in ad7616_write_os_sw()
1212 struct ad7606_state *st = iio_priv(indio_dev); in ad7606_write_scale_sw() local
1214 return ad7606_write_mask(st, AD7606_RANGE_CH_ADDR(ch), in ad7606_write_scale_sw()
1221 struct ad7606_state *st = iio_priv(indio_dev); in ad7606_write_os_sw() local
1223 return st->bops->reg_write(st, AD7606_OS_MODE, val); in ad7606_write_os_sw()
1228 struct ad7606_state *st = iio_priv(indio_dev); in ad7616_sw_mode_setup() local
1236 st->write_scale = ad7616_write_scale_sw; in ad7616_sw_mode_setup()
1237 st->write_os = &ad7616_write_os_sw; in ad7616_sw_mode_setup()
1239 if (st->bops->sw_mode_config) { in ad7616_sw_mode_setup()
1240 ret = st->bops->sw_mode_config(indio_dev); in ad7616_sw_mode_setup()
1246 return ad7606_write_mask(st, AD7616_CONFIGURATION_REGISTER, in ad7616_sw_mode_setup()
1253 struct ad7606_state *st = iio_priv(indio_dev); in ad7606b_sw_mode_setup() local
1263 if (st->gpio_os) in ad7606b_sw_mode_setup()
1264 gpiod_multi_set_value_cansleep(st->gpio_os, os); in ad7606b_sw_mode_setup()
1267 st->oversampling_avail = ad7606b_oversampling_avail; in ad7606b_sw_mode_setup()
1268 st->num_os_ratios = ARRAY_SIZE(ad7606b_oversampling_avail); in ad7606b_sw_mode_setup()
1270 st->write_scale = ad7606_write_scale_sw; in ad7606b_sw_mode_setup()
1271 st->write_os = &ad7606_write_os_sw; in ad7606b_sw_mode_setup()
1273 if (!st->bops->sw_mode_config) in ad7606b_sw_mode_setup()
1276 return st->bops->sw_mode_config(indio_dev); in ad7606b_sw_mode_setup()
1281 struct ad7606_state *st = iio_priv(indio_dev); in ad7606_chan_scales_setup() local
1282 unsigned int offset = indio_dev->num_channels - st->chip_info->num_adc_channels; in ad7606_chan_scales_setup()
1289 chans = devm_kzalloc(st->dev, size, GFP_KERNEL); in ad7606_chan_scales_setup()
1296 for (ch = 0; ch < st->chip_info->num_adc_channels; ch++) { in ad7606_chan_scales_setup()
1297 ret = st->chip_info->scale_setup_cb(indio_dev, &chans[ch + offset], ch); in ad7606_chan_scales_setup()
1314 struct ad7606_state *st; in ad7606_probe() local
1318 indio_dev = devm_iio_device_alloc(dev, sizeof(*st)); in ad7606_probe()
1322 st = iio_priv(indio_dev); in ad7606_probe()
1325 st->dev = dev; in ad7606_probe()
1326 mutex_init(&st->lock); in ad7606_probe()
1327 st->bops = bops; in ad7606_probe()
1328 st->base_address = base_address; in ad7606_probe()
1329 st->oversampling = 1; in ad7606_probe()
1336 st->chip_info = chip_info; in ad7606_probe()
1338 if (st->chip_info->oversampling_num) { in ad7606_probe()
1339 st->oversampling_avail = st->chip_info->oversampling_avail; in ad7606_probe()
1340 st->num_os_ratios = st->chip_info->oversampling_num; in ad7606_probe()
1343 ret = ad7606_request_gpios(st); in ad7606_probe()
1347 if (st->gpio_os) { in ad7606_probe()
1348 if (st->gpio_range) in ad7606_probe()
1353 if (st->gpio_range) in ad7606_probe()
1360 indio_dev->channels = st->chip_info->channels; in ad7606_probe()
1361 indio_dev->num_channels = st->chip_info->num_channels; in ad7606_probe()
1363 ret = ad7606_reset(st); in ad7606_probe()
1365 dev_warn(st->dev, "failed to RESET: no RESET GPIO specified\n"); in ad7606_probe()
1368 if (st->chip_info->init_delay_ms) { in ad7606_probe()
1369 if (msleep_interruptible(st->chip_info->init_delay_ms)) in ad7606_probe()
1374 if (!st->gpio_convst) { in ad7606_probe()
1375 st->cnvst_pwm = devm_pwm_get(dev, NULL); in ad7606_probe()
1376 if (IS_ERR(st->cnvst_pwm)) in ad7606_probe()
1377 return PTR_ERR(st->cnvst_pwm); in ad7606_probe()
1379 /* The PWM is initialized at 1MHz to have a fast enough GPIO emulation. */ in ad7606_probe()
1380 ret = ad7606_set_sampling_freq(st, 1 * MEGA); in ad7606_probe()
1384 ret = ad7606_pwm_set_low(st); in ad7606_probe()
1394 st->cnvst_pwm); in ad7606_probe()
1399 if (st->bops->iio_backend_config) { in ad7606_probe()
1404 ret = ad7606_set_sampling_freq(st, in ad7606_probe()
1409 ret = st->bops->iio_backend_config(dev, indio_dev); in ad7606_probe()
1417 if (!st->gpio_convst) in ad7606_probe()
1421 init_completion(&st->completion); in ad7606_probe()
1422 st->trig = devm_iio_trigger_alloc(dev, "%s-dev%d", in ad7606_probe()
1425 if (!st->trig) in ad7606_probe()
1428 st->trig->ops = &ad7606_trigger_ops; in ad7606_probe()
1429 iio_trigger_set_drvdata(st->trig, indio_dev); in ad7606_probe()
1430 ret = devm_iio_trigger_register(dev, st->trig); in ad7606_probe()
1434 indio_dev->trig = iio_trigger_get(st->trig); in ad7606_probe()
1450 st->write_scale = ad7606_write_scale_hw; in ad7606_probe()
1451 st->write_os = ad7606_write_os_hw; in ad7606_probe()
1453 st->sw_mode_en = st->chip_info->sw_setup_cb && in ad7606_probe()
1454 device_property_present(st->dev, "adi,sw-mode"); in ad7606_probe()
1455 if (st->sw_mode_en) { in ad7606_probe()
1457 st->chip_info->sw_setup_cb(indio_dev); in ad7606_probe()
1473 struct ad7606_state *st = iio_priv(indio_dev); in ad7606_suspend() local
1475 if (st->gpio_standby) { in ad7606_suspend()
1476 gpiod_set_value(st->gpio_range, 1); in ad7606_suspend()
1477 gpiod_set_value(st->gpio_standby, 1); in ad7606_suspend()
1486 struct ad7606_state *st = iio_priv(indio_dev); in ad7606_resume() local
1488 if (st->gpio_standby) { in ad7606_resume()
1489 gpiod_set_value(st->gpio_range, st->chan_scales[0].range); in ad7606_resume()
1490 gpiod_set_value(st->gpio_standby, 1); in ad7606_resume()
1491 ad7606_reset(st); in ad7606_resume()