1 // SPDX-License-Identifier: BSD-3-Clause
7  * Core driver code with main interface to the I3C subsystem.
13 #include <linux/i3c/master.h>
36 #define HC_CONTROL_HOT_JOIN_CTRL	BIT(8)	/* Hot-Join ACK/NACK Control */
40 #define HC_CONTROL_IBA_INCLUDE		BIT(0)	/* Include I3C Broadcast Address */
42 #define MASTER_DEVICE_ADDR		0x08	/* Master Device Address */
58 #define HC_CAP_NON_CURRENT_MASTER_CAP	BIT(5)	/* master handoff capable */
106 #define IBI_NOTIFY_MR_REJECTED		BIT(1)	/* Rejected Master Request Control */
107 #define IBI_NOTIFY_HJ_REJECTED		BIT(0)	/* Rejected Hot-Join Control */
115 	return container_of(m, struct i3c_hci, master);  in to_i3c_hci()
126 	if (hci->cmd == &mipi_i3c_hci_cmd_v1) {  in i3c_hci_bus_init()
143 	ret = hci->io->init(hci);  in i3c_hci_bus_init()
148 	if (hci->quirks & HCI_QUIRK_RESP_BUF_THLD)  in i3c_hci_bus_init()
160 	struct platform_device *pdev = to_platform_device(m->dev.parent);  in i3c_hci_bus_cleanup()
166 	hci->io->cleanup(hci);  in i3c_hci_bus_cleanup()
167 	if (hci->cmd == &mipi_i3c_hci_cmd_v1)  in i3c_hci_bus_cleanup()
193 	bool raw = !!(hci->quirks & HCI_QUIRK_RAW_CCC);  in i3c_hci_send_ccc_cmd()
194 	bool prefixed = raw && !!(ccc->id & I3C_CCC_DIRECT);  in i3c_hci_send_ccc_cmd()
195 	unsigned int nxfers = ccc->ndests + prefixed;  in i3c_hci_send_ccc_cmd()
200 	    ccc->id, ccc->rnw, ccc->ndests, ccc->dests[0].payload.len);  in i3c_hci_send_ccc_cmd()
204 		return -ENOMEM;  in i3c_hci_send_ccc_cmd()
207 		xfer->data = NULL;  in i3c_hci_send_ccc_cmd()
208 		xfer->data_len = 0;  in i3c_hci_send_ccc_cmd()
209 		xfer->rnw = false;  in i3c_hci_send_ccc_cmd()
210 		hci->cmd->prep_ccc(hci, xfer, I3C_BROADCAST_ADDR,  in i3c_hci_send_ccc_cmd()
211 				   ccc->id, true);  in i3c_hci_send_ccc_cmd()
215 	for (i = 0; i < nxfers - prefixed; i++) {  in i3c_hci_send_ccc_cmd()
216 		xfer[i].data = ccc->dests[i].payload.data;  in i3c_hci_send_ccc_cmd()
217 		xfer[i].data_len = ccc->dests[i].payload.len;  in i3c_hci_send_ccc_cmd()
218 		xfer[i].rnw = ccc->rnw;  in i3c_hci_send_ccc_cmd()
219 		ret = hci->cmd->prep_ccc(hci, &xfer[i], ccc->dests[i].addr,  in i3c_hci_send_ccc_cmd()
220 					 ccc->id, raw);  in i3c_hci_send_ccc_cmd()
225 	last = i - 1;  in i3c_hci_send_ccc_cmd()
230 		xfer--;  in i3c_hci_send_ccc_cmd()
232 	ret = hci->io->queue_xfer(hci, xfer, nxfers);  in i3c_hci_send_ccc_cmd()
236 	    hci->io->dequeue_xfer(hci, xfer, nxfers)) {  in i3c_hci_send_ccc_cmd()
237 		ret = -ETIME;  in i3c_hci_send_ccc_cmd()
241 		if (ccc->rnw)  in i3c_hci_send_ccc_cmd()
242 			ccc->dests[i - prefixed].payload.len =  in i3c_hci_send_ccc_cmd()
249 			ccc->err = I3C_ERROR_M2;  in i3c_hci_send_ccc_cmd()
252 			ret = -EIO;  in i3c_hci_send_ccc_cmd()
257 	if (ccc->rnw)  in i3c_hci_send_ccc_cmd()
259 		    ccc->dests[0].payload.len, ccc->dests[0].payload.data);  in i3c_hci_send_ccc_cmd()
272 	return hci->cmd->perform_daa(hci);  in i3c_hci_daa()
278 	if (hci->io != &mipi_i3c_hci_dma ||  in i3c_hci_alloc_safe_xfer_buf()
279 	    xfer->data == NULL || !is_vmalloc_addr(xfer->data))  in i3c_hci_alloc_safe_xfer_buf()
282 	if (xfer->rnw)  in i3c_hci_alloc_safe_xfer_buf()
283 		xfer->bounce_buf = kzalloc(xfer->data_len, GFP_KERNEL);  in i3c_hci_alloc_safe_xfer_buf()
285 		xfer->bounce_buf = kmemdup(xfer->data,  in i3c_hci_alloc_safe_xfer_buf()
286 					   xfer->data_len, GFP_KERNEL);  in i3c_hci_alloc_safe_xfer_buf()
288 	return xfer->bounce_buf == NULL ? -ENOMEM : 0;  in i3c_hci_alloc_safe_xfer_buf()
294 	if (hci->io != &mipi_i3c_hci_dma || xfer->bounce_buf == NULL)  in i3c_hci_free_safe_xfer_buf()
297 	if (xfer->rnw)  in i3c_hci_free_safe_xfer_buf()
298 		memcpy(xfer->data, xfer->bounce_buf, xfer->data_len);  in i3c_hci_free_safe_xfer_buf()
300 	kfree(xfer->bounce_buf);  in i3c_hci_free_safe_xfer_buf()
318 		return -ENOMEM;  in i3c_hci_priv_xfers()
320 	size_limit = 1U << (16 + FIELD_GET(HC_CAP_MAX_DATA_LENGTH, hci->caps));  in i3c_hci_priv_xfers()
324 		ret = -EFBIG;  in i3c_hci_priv_xfers()
334 		hci->cmd->prep_i3c_xfer(hci, dev, &xfer[i]);  in i3c_hci_priv_xfers()
340 	last = i - 1;  in i3c_hci_priv_xfers()
344 	ret = hci->io->queue_xfer(hci, xfer, nxfers);  in i3c_hci_priv_xfers()
348 	    hci->io->dequeue_xfer(hci, xfer, nxfers)) {  in i3c_hci_priv_xfers()
349 		ret = -ETIME;  in i3c_hci_priv_xfers()
356 			ret = -EIO;  in i3c_hci_priv_xfers()
382 		return -ENOMEM;  in i3c_hci_i2c_xfers()
388 		hci->cmd->prep_i2c_xfer(hci, dev, &xfer[i]);  in i3c_hci_i2c_xfers()
391 	last = i - 1;  in i3c_hci_i2c_xfers()
395 	ret = hci->io->queue_xfer(hci, xfer, nxfers);  in i3c_hci_i2c_xfers()
399 	    hci->io->dequeue_xfer(hci, xfer, nxfers)) {  in i3c_hci_i2c_xfers()
400 		ret = -ETIME;  in i3c_hci_i2c_xfers()
405 			ret = -EIO;  in i3c_hci_i2c_xfers()
430 		return -ENOMEM;  in i3c_hci_attach_i3c_dev()
431 	if (hci->cmd == &mipi_i3c_hci_cmd_v1) {  in i3c_hci_attach_i3c_dev()
438 						     dev->info.dyn_addr ?: dev->info.static_addr);  in i3c_hci_attach_i3c_dev()
439 		dev_data->dat_idx = ret;  in i3c_hci_attach_i3c_dev()
453 	if (hci->cmd == &mipi_i3c_hci_cmd_v1)  in i3c_hci_reattach_i3c_dev()
454 		mipi_i3c_hci_dat_v1.set_dynamic_addr(hci, dev_data->dat_idx,  in i3c_hci_reattach_i3c_dev()
455 					     dev->info.dyn_addr);  in i3c_hci_reattach_i3c_dev()
468 	if (hci->cmd == &mipi_i3c_hci_cmd_v1)  in i3c_hci_detach_i3c_dev()
469 		mipi_i3c_hci_dat_v1.free_entry(hci, dev_data->dat_idx);  in i3c_hci_detach_i3c_dev()
482 	if (hci->cmd != &mipi_i3c_hci_cmd_v1)  in i3c_hci_attach_i2c_dev()
486 		return -ENOMEM;  in i3c_hci_attach_i2c_dev()
492 	mipi_i3c_hci_dat_v1.set_static_addr(hci, ret, dev->addr);  in i3c_hci_attach_i2c_dev()
494 	dev_data->dat_idx = ret;  in i3c_hci_attach_i2c_dev()
509 		if (hci->cmd == &mipi_i3c_hci_cmd_v1)  in i3c_hci_detach_i2c_dev()
510 			mipi_i3c_hci_dat_v1.free_entry(hci, dev_data->dat_idx);  in i3c_hci_detach_i2c_dev()
521 	unsigned int dat_idx = dev_data->dat_idx;  in i3c_hci_request_ibi()
523 	if (req->max_payload_len != 0)  in i3c_hci_request_ibi()
527 	return hci->io->request_ibi(hci, dev, req);  in i3c_hci_request_ibi()
535 	hci->io->free_ibi(hci, dev);  in i3c_hci_free_ibi()
544 	mipi_i3c_hci_dat_v1.clear_flags(hci, dev_data->dat_idx, DAT_0_SIR_REJECT, 0);  in i3c_hci_enable_ibi()
545 	return i3c_master_enec_locked(m, dev->info.dyn_addr, I3C_CCC_EVENT_SIR);  in i3c_hci_enable_ibi()
554 	mipi_i3c_hci_dat_v1.set_flags(hci, dev_data->dat_idx, DAT_0_SIR_REJECT, 0);  in i3c_hci_disable_ibi()
555 	return i3c_master_disec_locked(m, dev->info.dyn_addr, I3C_CCC_EVENT_SIR);  in i3c_hci_disable_ibi()
564 	hci->io->recycle_ibi_slot(hci, dev, slot);  in i3c_hci_recycle_ibi_slot()
604 		dev_err(&hci->master.dev, "Host Controller Internal Error\n");  in i3c_hci_irq_handler()
608 	hci->io->irq_handler(hci);  in i3c_hci_irq_handler()
611 		dev_err(&hci->master.dev, "unexpected INTR_STATUS %#x\n", val);  in i3c_hci_irq_handler()
626 	hci->version_major = (regval >> 8) & 0xf;  in i3c_hci_init()
627 	hci->version_minor = (regval >> 4) & 0xf;  in i3c_hci_init()
628 	hci->revision = regval & 0xf;  in i3c_hci_init()
629 	dev_notice(&hci->master.dev, "MIPI I3C HCI v%u.%u r%02u\n",  in i3c_hci_init()
630 		   hci->version_major, hci->version_minor, hci->revision);  in i3c_hci_init()
638 		dev_err(&hci->master.dev, "unsupported HCI version\n");  in i3c_hci_init()
639 		return -EPROTONOSUPPORT;  in i3c_hci_init()
642 	hci->caps = reg_read(HC_CAPABILITIES);  in i3c_hci_init()
643 	DBG("caps = %#x", hci->caps);  in i3c_hci_init()
645 	size_in_dwords = hci->version_major < 1 ||  in i3c_hci_init()
646 			 (hci->version_major == 1 && hci->version_minor < 1);  in i3c_hci_init()
650 	hci->DAT_regs = offset ? hci->base_regs + offset : NULL;  in i3c_hci_init()
651 	hci->DAT_entries = FIELD_GET(DAT_TABLE_SIZE, regval);  in i3c_hci_init()
652 	hci->DAT_entry_size = FIELD_GET(DAT_ENTRY_SIZE, regval) ? 0 : 8;  in i3c_hci_init()
654 		hci->DAT_entries = 4 * hci->DAT_entries / hci->DAT_entry_size;  in i3c_hci_init()
655 	dev_info(&hci->master.dev, "DAT: %u %u-bytes entries at offset %#x\n",  in i3c_hci_init()
656 		 hci->DAT_entries, hci->DAT_entry_size, offset);  in i3c_hci_init()
660 	hci->DCT_regs = offset ? hci->base_regs + offset : NULL;  in i3c_hci_init()
661 	hci->DCT_entries = FIELD_GET(DCT_TABLE_SIZE, regval);  in i3c_hci_init()
662 	hci->DCT_entry_size = FIELD_GET(DCT_ENTRY_SIZE, regval) ? 0 : 16;  in i3c_hci_init()
664 		hci->DCT_entries = 4 * hci->DCT_entries / hci->DCT_entry_size;  in i3c_hci_init()
665 	dev_info(&hci->master.dev, "DCT: %u %u-bytes entries at offset %#x\n",  in i3c_hci_init()
666 		 hci->DCT_entries, hci->DCT_entry_size, offset);  in i3c_hci_init()
670 	hci->RHS_regs = offset ? hci->base_regs + offset : NULL;  in i3c_hci_init()
671 	dev_info(&hci->master.dev, "Ring Headers at offset %#x\n", offset);  in i3c_hci_init()
675 	hci->PIO_regs = offset ? hci->base_regs + offset : NULL;  in i3c_hci_init()
676 	dev_info(&hci->master.dev, "PIO section at offset %#x\n", offset);  in i3c_hci_init()
680 	hci->EXTCAPS_regs = offset ? hci->base_regs + offset : NULL;  in i3c_hci_init()
681 	dev_info(&hci->master.dev, "Extended Caps at offset %#x\n", offset);  in i3c_hci_init()
695 		return -ENXIO;  in i3c_hci_init()
700 		return -ENXIO;  in i3c_hci_init()
714 				dev_err(&hci->master.dev, "cannot set BE mode\n");  in i3c_hci_init()
715 				return -EOPNOTSUPP;  in i3c_hci_init()
724 				dev_err(&hci->master.dev, "cannot clear BE mode\n");  in i3c_hci_init()
725 				return -EOPNOTSUPP;  in i3c_hci_init()
731 	switch (FIELD_GET(HC_CAP_CMD_SIZE, hci->caps)) {  in i3c_hci_init()
733 		hci->cmd = &mipi_i3c_hci_cmd_v1;  in i3c_hci_init()
736 		hci->cmd = &mipi_i3c_hci_cmd_v2;  in i3c_hci_init()
739 		dev_err(&hci->master.dev, "wrong CMD_SIZE capability value\n");  in i3c_hci_init()
740 		return -EINVAL;  in i3c_hci_init()
743 	mode_selector = hci->version_major > 1 ||  in i3c_hci_init()
744 				(hci->version_major == 1 && hci->version_minor > 0);  in i3c_hci_init()
747 	if (hci->quirks & HCI_QUIRK_PIO_MODE)  in i3c_hci_init()
748 		hci->RHS_regs = NULL;  in i3c_hci_init()
751 	if (hci->RHS_regs) {  in i3c_hci_init()
754 			dev_err(&hci->master.dev, "PIO mode is stuck\n");  in i3c_hci_init()
755 			ret = -EIO;  in i3c_hci_init()
757 			hci->io = &mipi_i3c_hci_dma;  in i3c_hci_init()
758 			dev_info(&hci->master.dev, "Using DMA\n");  in i3c_hci_init()
763 	if (!hci->io && hci->PIO_regs) {  in i3c_hci_init()
766 			dev_err(&hci->master.dev, "DMA mode is stuck\n");  in i3c_hci_init()
767 			ret = -EIO;  in i3c_hci_init()
769 			hci->io = &mipi_i3c_hci_pio;  in i3c_hci_init()
770 			dev_info(&hci->master.dev, "Using PIO\n");  in i3c_hci_init()
774 	if (!hci->io) {  in i3c_hci_init()
775 		dev_err(&hci->master.dev, "neither DMA nor PIO can be used\n");  in i3c_hci_init()
777 			ret = -EINVAL;  in i3c_hci_init()
782 	if (hci->quirks & HCI_QUIRK_OD_PP_TIMING)  in i3c_hci_init()
793 	hci = devm_kzalloc(&pdev->dev, sizeof(*hci), GFP_KERNEL);  in i3c_hci_probe()
795 		return -ENOMEM;  in i3c_hci_probe()
796 	hci->base_regs = devm_platform_ioremap_resource(pdev, 0);  in i3c_hci_probe()
797 	if (IS_ERR(hci->base_regs))  in i3c_hci_probe()
798 		return PTR_ERR(hci->base_regs);  in i3c_hci_probe()
802 	hci->master.dev.init_name = dev_name(&pdev->dev);  in i3c_hci_probe()
804 	hci->quirks = (unsigned long)device_get_match_data(&pdev->dev);  in i3c_hci_probe()
811 	ret = devm_request_irq(&pdev->dev, irq, i3c_hci_irq_handler,  in i3c_hci_probe()
816 	ret = i3c_master_register(&hci->master, &pdev->dev,  in i3c_hci_probe()
828 	i3c_master_unregister(&hci->master);  in i3c_hci_remove()
832 	{ .compatible = "mipi-i3c-hci", },
847 		.name = "mipi-i3c-hci",
853 MODULE_ALIAS("platform:mipi-i3c-hci");
856 MODULE_DESCRIPTION("MIPI I3C HCI driver");