Lines Matching +full:num +full:- +full:transfer +full:- +full:bits
1 // SPDX-License-Identifier: GPL-2.0-only
7 * maximum 255 bytes at a time. If a larger transfer is attempted, error code
8 * (-EINVAL) is returned.
84 #define SLV_ADDR_DEC_SA1M BIT(3) /* 10-bit addressing for addr_1 enabled */
86 #define SLV_ADDR_DEC_SA2M BIT(5) /* 10-bit addressing for addr_2 enabled */
106 #define SLV_STATUS_WTC BIT(1) /* Write transfer complete */
121 * struct axxia_i2c_dev - I2C device context
124 * @msg_r: pointer to current read message (sequence transfer)
133 * @last: a flag indicating is this is last message in transfer
158 int_en = readl(idev->base + MST_INT_ENABLE); in i2c_int_disable()
159 writel(int_en & ~mask, idev->base + MST_INT_ENABLE); in i2c_int_disable()
166 int_en = readl(idev->base + MST_INT_ENABLE); in i2c_int_enable()
167 writel(int_en | mask, idev->base + MST_INT_ENABLE); in i2c_int_enable()
171 * ns_to_clk - Convert time (ns) to clock cycles for the given clock frequency.
180 u32 divisor = clk_get_rate(idev->i2c_clk) / idev->bus_clk_rate; in axxia_i2c_init()
181 u32 clk_mhz = clk_get_rate(idev->i2c_clk) / 1000000; in axxia_i2c_init()
188 dev_dbg(idev->dev, "rate=%uHz per_clk=%uMHz -> ratio=1:%u\n", in axxia_i2c_init()
189 idev->bus_clk_rate, clk_mhz, divisor); in axxia_i2c_init()
192 writel(0x01, idev->base + SOFT_RESET); in axxia_i2c_init()
194 while (readl(idev->base + SOFT_RESET) & 1) { in axxia_i2c_init()
196 dev_warn(idev->dev, "Soft reset failed\n"); in axxia_i2c_init()
202 writel(0x1, idev->base + GLOBAL_CONTROL); in axxia_i2c_init()
204 if (idev->bus_clk_rate <= I2C_MAX_STANDARD_MODE_FREQ) { in axxia_i2c_init()
217 writel(t_high, idev->base + SCL_HIGH_PERIOD); in axxia_i2c_init()
219 writel(t_low, idev->base + SCL_LOW_PERIOD); in axxia_i2c_init()
221 writel(t_setup, idev->base + SDA_SETUP_TIME); in axxia_i2c_init()
223 writel(ns_to_clk(300, clk_mhz), idev->base + SDA_HOLD_TIME); in axxia_i2c_init()
225 writel(ns_to_clk(50, clk_mhz), idev->base + SPIKE_FLTR_LEN); in axxia_i2c_init()
227 /* Configure Time-Out Registers */ in axxia_i2c_init()
230 /* Find prescaler value that makes tmo_clk fit in 15-bits counter. */ in axxia_i2c_init()
240 writel(prescale, idev->base + TIMER_CLOCK_DIV); in axxia_i2c_init()
242 writel(WT_EN | WT_VALUE(tmo_clk), idev->base + WAIT_TIMER_CONTROL); in axxia_i2c_init()
244 /* Mask all master interrupt bits */ in axxia_i2c_init()
248 writel(0x01, idev->base + INTERRUPT_ENABLE); in axxia_i2c_init()
255 return (msg->flags & I2C_M_RD) != 0; in i2c_m_rd()
260 return (msg->flags & I2C_M_RECV_LEN) != 0; in i2c_m_recv_len()
264 * axxia_i2c_empty_rx_fifo - Fetch data from RX FIFO and update SMBus block
265 * transfer length if this is the first byte of such a transfer.
269 struct i2c_msg *msg = idev->msg_r; in axxia_i2c_empty_rx_fifo()
270 size_t rx_fifo_avail = readl(idev->base + MST_RX_FIFO); in axxia_i2c_empty_rx_fifo()
271 int bytes_to_transfer = min(rx_fifo_avail, msg->len - idev->msg_xfrd_r); in axxia_i2c_empty_rx_fifo()
273 while (bytes_to_transfer-- > 0) { in axxia_i2c_empty_rx_fifo()
274 int c = readl(idev->base + MST_DATA); in axxia_i2c_empty_rx_fifo()
276 if (idev->msg_xfrd_r == 0 && i2c_m_recv_len(msg)) { in axxia_i2c_empty_rx_fifo()
281 idev->msg_err = -EPROTO; in axxia_i2c_empty_rx_fifo()
283 complete(&idev->msg_complete); in axxia_i2c_empty_rx_fifo()
286 msg->len = 1 + c; in axxia_i2c_empty_rx_fifo()
287 writel(msg->len, idev->base + MST_RX_XFER); in axxia_i2c_empty_rx_fifo()
289 msg->buf[idev->msg_xfrd_r++] = c; in axxia_i2c_empty_rx_fifo()
296 * axxia_i2c_fill_tx_fifo - Fill TX FIFO from current message buffer.
297 * @return: Number of bytes left to transfer.
301 struct i2c_msg *msg = idev->msg; in axxia_i2c_fill_tx_fifo()
302 size_t tx_fifo_avail = FIFO_SIZE - readl(idev->base + MST_TX_FIFO); in axxia_i2c_fill_tx_fifo()
303 int bytes_to_transfer = min(tx_fifo_avail, msg->len - idev->msg_xfrd); in axxia_i2c_fill_tx_fifo()
304 int ret = msg->len - idev->msg_xfrd - bytes_to_transfer; in axxia_i2c_fill_tx_fifo()
306 while (bytes_to_transfer-- > 0) in axxia_i2c_fill_tx_fifo()
307 writel(msg->buf[idev->msg_xfrd++], idev->base + MST_DATA); in axxia_i2c_fill_tx_fifo()
314 u32 fifo_status = readl(idev->base + SLV_RX_FIFO); in axxia_i2c_slv_fifo_event()
317 dev_dbg(idev->dev, "slave irq fifo_status=0x%x\n", fifo_status); in axxia_i2c_slv_fifo_event()
321 i2c_slave_event(idev->slave, in axxia_i2c_slv_fifo_event()
324 val = readl(idev->base + SLV_DATA); in axxia_i2c_slv_fifo_event()
325 i2c_slave_event(idev->slave, I2C_SLAVE_WRITE_RECEIVED, &val); in axxia_i2c_slv_fifo_event()
328 readl(idev->base + SLV_DATA); /* dummy read */ in axxia_i2c_slv_fifo_event()
329 i2c_slave_event(idev->slave, I2C_SLAVE_STOP, &val); in axxia_i2c_slv_fifo_event()
332 readl(idev->base + SLV_DATA); /* dummy read */ in axxia_i2c_slv_fifo_event()
337 u32 status = readl(idev->base + SLV_INT_STATUS); in axxia_i2c_slv_isr()
340 dev_dbg(idev->dev, "slave irq status=0x%x\n", status); in axxia_i2c_slv_isr()
345 i2c_slave_event(idev->slave, I2C_SLAVE_READ_REQUESTED, &val); in axxia_i2c_slv_isr()
346 writel(val, idev->base + SLV_DATA); in axxia_i2c_slv_isr()
349 i2c_slave_event(idev->slave, I2C_SLAVE_READ_PROCESSED, &val); in axxia_i2c_slv_isr()
350 writel(val, idev->base + SLV_DATA); in axxia_i2c_slv_isr()
353 i2c_slave_event(idev->slave, I2C_SLAVE_STOP, &val); in axxia_i2c_slv_isr()
355 writel(INT_SLV, idev->base + INTERRUPT_STATUS); in axxia_i2c_slv_isr()
365 status = readl(idev->base + INTERRUPT_STATUS); in axxia_i2c_isr()
372 /* Read interrupt status bits */ in axxia_i2c_isr()
373 status = readl(idev->base + MST_INT_STATUS); in axxia_i2c_isr()
375 if (!idev->msg) { in axxia_i2c_isr()
376 dev_warn(idev->dev, "unexpected interrupt\n"); in axxia_i2c_isr()
381 if (i2c_m_rd(idev->msg_r) && (status & MST_STATUS_RFL)) in axxia_i2c_isr()
385 if (!i2c_m_rd(idev->msg) && (status & MST_STATUS_TFL)) { in axxia_i2c_isr()
391 /* Transfer error */ in axxia_i2c_isr()
394 idev->msg_err = -EAGAIN; in axxia_i2c_isr()
396 idev->msg_err = -ENXIO; in axxia_i2c_isr()
398 idev->msg_err = -EIO; in axxia_i2c_isr()
399 dev_dbg(idev->dev, "error %#x, addr=%#x rx=%u/%u tx=%u/%u\n", in axxia_i2c_isr()
401 idev->msg->addr, in axxia_i2c_isr()
402 readl(idev->base + MST_RX_BYTES_XFRD), in axxia_i2c_isr()
403 readl(idev->base + MST_RX_XFER), in axxia_i2c_isr()
404 readl(idev->base + MST_TX_BYTES_XFRD), in axxia_i2c_isr()
405 readl(idev->base + MST_TX_XFER)); in axxia_i2c_isr()
406 complete(&idev->msg_complete); in axxia_i2c_isr()
410 complete(&idev->msg_complete); in axxia_i2c_isr()
412 /* Transfer done */ in axxia_i2c_isr()
413 int mask = idev->last ? ~0 : ~MST_STATUS_TSS; in axxia_i2c_isr()
416 if (i2c_m_rd(idev->msg_r) && idev->msg_xfrd_r < idev->msg_r->len) in axxia_i2c_isr()
418 complete(&idev->msg_complete); in axxia_i2c_isr()
420 /* Transfer timeout */ in axxia_i2c_isr()
421 idev->msg_err = -ETIMEDOUT; in axxia_i2c_isr()
423 complete(&idev->msg_complete); in axxia_i2c_isr()
428 writel(INT_MST, idev->base + INTERRUPT_STATUS); in axxia_i2c_isr()
437 if (msg->flags & I2C_M_TEN) { in axxia_i2c_set_addr()
445 writel(addr_1, idev->base + MST_ADDR_1); in axxia_i2c_set_addr()
446 writel(addr_2, idev->base + MST_ADDR_2); in axxia_i2c_set_addr()
458 if ((readl(idev->base + MST_COMMAND) & CMD_BUSY) == 0) in axxia_i2c_handle_seq_nak()
463 return -ETIMEDOUT; in axxia_i2c_handle_seq_nak()
474 writel(msgs[0].len, idev->base + MST_TX_XFER); in axxia_i2c_xfer_seq()
475 writel(rlen, idev->base + MST_RX_XFER); in axxia_i2c_xfer_seq()
477 idev->msg = &msgs[0]; in axxia_i2c_xfer_seq()
478 idev->msg_r = &msgs[1]; in axxia_i2c_xfer_seq()
479 idev->msg_xfrd = 0; in axxia_i2c_xfer_seq()
480 idev->msg_xfrd_r = 0; in axxia_i2c_xfer_seq()
481 idev->last = true; in axxia_i2c_xfer_seq()
484 writel(CMD_SEQUENCE, idev->base + MST_COMMAND); in axxia_i2c_xfer_seq()
486 reinit_completion(&idev->msg_complete); in axxia_i2c_xfer_seq()
489 time_left = wait_for_completion_timeout(&idev->msg_complete, in axxia_i2c_xfer_seq()
492 if (idev->msg_err == -ENXIO) { in axxia_i2c_xfer_seq()
495 } else if (readl(idev->base + MST_COMMAND) & CMD_BUSY) { in axxia_i2c_xfer_seq()
496 dev_warn(idev->dev, "busy after xfer\n"); in axxia_i2c_xfer_seq()
500 idev->msg_err = -ETIMEDOUT; in axxia_i2c_xfer_seq()
501 i2c_recover_bus(&idev->adapter); in axxia_i2c_xfer_seq()
505 if (unlikely(idev->msg_err) && idev->msg_err != -ENXIO) in axxia_i2c_xfer_seq()
508 return idev->msg_err; in axxia_i2c_xfer_seq()
519 idev->msg = msg; in axxia_i2c_xfer_msg()
520 idev->msg_r = msg; in axxia_i2c_xfer_msg()
521 idev->msg_xfrd = 0; in axxia_i2c_xfer_msg()
522 idev->msg_xfrd_r = 0; in axxia_i2c_xfer_msg()
523 idev->last = last; in axxia_i2c_xfer_msg()
524 reinit_completion(&idev->msg_complete); in axxia_i2c_xfer_msg()
529 /* I2C read transfer */ in axxia_i2c_xfer_msg()
530 rx_xfer = i2c_m_recv_len(msg) ? I2C_SMBUS_BLOCK_MAX : msg->len; in axxia_i2c_xfer_msg()
533 /* I2C write transfer */ in axxia_i2c_xfer_msg()
535 tx_xfer = msg->len; in axxia_i2c_xfer_msg()
538 writel(rx_xfer, idev->base + MST_RX_XFER); in axxia_i2c_xfer_msg()
539 writel(tx_xfer, idev->base + MST_TX_XFER); in axxia_i2c_xfer_msg()
546 wt_value = WT_VALUE(readl(idev->base + WAIT_TIMER_CONTROL)); in axxia_i2c_xfer_msg()
548 writel(wt_value, idev->base + WAIT_TIMER_CONTROL); in axxia_i2c_xfer_msg()
550 if (idev->msg_err) in axxia_i2c_xfer_msg()
554 writel(CMD_MANUAL, idev->base + MST_COMMAND); in axxia_i2c_xfer_msg()
557 writel(CMD_AUTO, idev->base + MST_COMMAND); in axxia_i2c_xfer_msg()
561 writel(WT_EN | wt_value, idev->base + WAIT_TIMER_CONTROL); in axxia_i2c_xfer_msg()
565 time_left = wait_for_completion_timeout(&idev->msg_complete, in axxia_i2c_xfer_msg()
570 if (readl(idev->base + MST_COMMAND) & CMD_BUSY) in axxia_i2c_xfer_msg()
571 dev_warn(idev->dev, "busy after xfer\n"); in axxia_i2c_xfer_msg()
574 idev->msg_err = -ETIMEDOUT; in axxia_i2c_xfer_msg()
575 i2c_recover_bus(&idev->adapter); in axxia_i2c_xfer_msg()
580 if (unlikely(idev->msg_err) && idev->msg_err != -ENXIO && in axxia_i2c_xfer_msg()
581 idev->msg_err != -ETIMEDOUT) in axxia_i2c_xfer_msg()
584 return idev->msg_err; in axxia_i2c_xfer_msg()
589 * write of non-zero length followed by exactly one read of non-zero length,
592 static bool axxia_i2c_sequence_ok(struct i2c_msg msgs[], int num) in axxia_i2c_sequence_ok() argument
594 return num == SEQ_LEN && !i2c_m_rd(&msgs[0]) && i2c_m_rd(&msgs[1]) && in axxia_i2c_sequence_ok()
600 axxia_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) in axxia_i2c_xfer() argument
606 idev->msg_err = 0; in axxia_i2c_xfer()
608 if (axxia_i2c_sequence_ok(msgs, num)) { in axxia_i2c_xfer()
615 for (i = 0; ret == 0 && i < num; ++i) in axxia_i2c_xfer()
616 ret = axxia_i2c_xfer_msg(idev, &msgs[i], i == (num - 1)); in axxia_i2c_xfer()
625 return !!(readl(idev->base + I2C_BUS_MONITOR) & BM_SCLS); in axxia_i2c_get_scl()
634 tmp = readl(idev->base + I2C_BUS_MONITOR) & BM_SDAC; in axxia_i2c_set_scl()
637 writel(tmp, idev->base + I2C_BUS_MONITOR); in axxia_i2c_set_scl()
644 return !!(readl(idev->base + I2C_BUS_MONITOR) & BM_SDAS); in axxia_i2c_get_sda()
663 struct axxia_i2c_dev *idev = i2c_get_adapdata(slave->adapter); in axxia_i2c_reg_slave()
667 if (idev->slave) in axxia_i2c_reg_slave()
668 return -EBUSY; in axxia_i2c_reg_slave()
670 idev->slave = slave; in axxia_i2c_reg_slave()
673 writel(GLOBAL_MST_EN | GLOBAL_SLV_EN, idev->base + GLOBAL_CONTROL); in axxia_i2c_reg_slave()
674 writel(INT_MST | INT_SLV, idev->base + INTERRUPT_ENABLE); in axxia_i2c_reg_slave()
678 if (slave->flags & I2C_CLIENT_TEN) in axxia_i2c_reg_slave()
681 writel(SLV_RX_ACSA1, idev->base + SLV_RX_CTL); in axxia_i2c_reg_slave()
682 writel(dec_ctl, idev->base + SLV_ADDR_DEC_CTL); in axxia_i2c_reg_slave()
683 writel(slave->addr, idev->base + SLV_ADDR_1); in axxia_i2c_reg_slave()
688 writel(slv_int_mask, idev->base + SLV_INT_ENABLE); in axxia_i2c_reg_slave()
695 struct axxia_i2c_dev *idev = i2c_get_adapdata(slave->adapter); in axxia_i2c_unreg_slave()
698 writel(GLOBAL_MST_EN, idev->base + GLOBAL_CONTROL); in axxia_i2c_unreg_slave()
699 writel(INT_MST, idev->base + INTERRUPT_ENABLE); in axxia_i2c_unreg_slave()
701 synchronize_irq(idev->irq); in axxia_i2c_unreg_slave()
703 idev->slave = NULL; in axxia_i2c_unreg_slave()
722 struct device_node *np = pdev->dev.of_node; in axxia_i2c_probe()
727 idev = devm_kzalloc(&pdev->dev, sizeof(*idev), GFP_KERNEL); in axxia_i2c_probe()
729 return -ENOMEM; in axxia_i2c_probe()
735 idev->irq = platform_get_irq(pdev, 0); in axxia_i2c_probe()
736 if (idev->irq < 0) in axxia_i2c_probe()
737 return idev->irq; in axxia_i2c_probe()
739 idev->i2c_clk = devm_clk_get(&pdev->dev, "i2c"); in axxia_i2c_probe()
740 if (IS_ERR(idev->i2c_clk)) { in axxia_i2c_probe()
741 dev_err(&pdev->dev, "missing clock\n"); in axxia_i2c_probe()
742 return PTR_ERR(idev->i2c_clk); in axxia_i2c_probe()
745 idev->base = base; in axxia_i2c_probe()
746 idev->dev = &pdev->dev; in axxia_i2c_probe()
747 init_completion(&idev->msg_complete); in axxia_i2c_probe()
749 of_property_read_u32(np, "clock-frequency", &idev->bus_clk_rate); in axxia_i2c_probe()
750 if (idev->bus_clk_rate == 0) in axxia_i2c_probe()
751 idev->bus_clk_rate = I2C_MAX_STANDARD_MODE_FREQ; /* default clock rate */ in axxia_i2c_probe()
753 ret = clk_prepare_enable(idev->i2c_clk); in axxia_i2c_probe()
755 dev_err(&pdev->dev, "failed to enable clock\n"); in axxia_i2c_probe()
761 dev_err(&pdev->dev, "failed to initialize\n"); in axxia_i2c_probe()
765 ret = devm_request_irq(&pdev->dev, idev->irq, axxia_i2c_isr, 0, in axxia_i2c_probe()
766 pdev->name, idev); in axxia_i2c_probe()
768 dev_err(&pdev->dev, "failed to claim IRQ%d\n", idev->irq); in axxia_i2c_probe()
772 i2c_set_adapdata(&idev->adapter, idev); in axxia_i2c_probe()
773 strscpy(idev->adapter.name, pdev->name, sizeof(idev->adapter.name)); in axxia_i2c_probe()
774 idev->adapter.owner = THIS_MODULE; in axxia_i2c_probe()
775 idev->adapter.algo = &axxia_i2c_algo; in axxia_i2c_probe()
776 idev->adapter.bus_recovery_info = &axxia_i2c_recovery_info; in axxia_i2c_probe()
777 idev->adapter.quirks = &axxia_i2c_quirks; in axxia_i2c_probe()
778 idev->adapter.dev.parent = &pdev->dev; in axxia_i2c_probe()
779 idev->adapter.dev.of_node = pdev->dev.of_node; in axxia_i2c_probe()
783 ret = i2c_add_adapter(&idev->adapter); in axxia_i2c_probe()
790 clk_disable_unprepare(idev->i2c_clk); in axxia_i2c_probe()
798 clk_disable_unprepare(idev->i2c_clk); in axxia_i2c_remove()
799 i2c_del_adapter(&idev->adapter); in axxia_i2c_remove()
814 .name = "axxia-i2c",