1 // SPDX-License-Identifier: GPL-2.0 OR MIT
20  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
29  * The sole reason for having to use this code is that vmware guest
33  * It's this outside-of-drawcall validation (that can happen at any time),
34  * that makes this code necessary.
46  * (unless we use deadlock-safe WW mutexes). So we use a global binding_mutex
51  * needs to be tracked by this code.
70  * struct vmw_ctx_binding_state - per context binding state
76  * @ds_view: Depth-stencil view binding.
80  * @per_shader: Per shader-type bindings.
83  * @dirty: Bitmap tracking per binding-type changes that have not yet
140  * struct vmw_binding_info - Per binding type information for the binding
273  * vmw_cbs_context - Return a pointer to the context resource of a
287 	if (list_empty(&cbs->list))  in vmw_cbs_context()
290 	return list_first_entry(&cbs->list, struct vmw_ctx_bindinfo,  in vmw_cbs_context()
291 				ctx_list)->ctx;  in vmw_cbs_context()
295  * vmw_binding_loc - determine the struct vmw_ctx_bindinfo slot location.
307 	size_t offset = b->offsets[shader_slot] + b->size*slot;  in vmw_binding_loc()
317  * Stops tracking a context binding, and re-initializes its storage.
323 	list_del(&bi->ctx_list);  in vmw_binding_drop()
324 	if (!list_empty(&bi->res_list))  in vmw_binding_drop()
325 		list_del(&bi->res_list);  in vmw_binding_drop()
326 	bi->ctx = NULL;  in vmw_binding_drop()
344 	struct vmw_ctx_bindinfo *loc =  in vmw_binding_add()  local
345 		vmw_binding_loc(cbs, bi->bt, shader_slot, slot);  in vmw_binding_add()
346 	const struct vmw_binding_info *b = &vmw_binding_infos[bi->bt];  in vmw_binding_add()
348 	if (loc->ctx != NULL)  in vmw_binding_add()
349 		vmw_binding_drop(loc);  in vmw_binding_add()
351 	memcpy(loc, bi, b->size);  in vmw_binding_add()
352 	loc->scrubbed = false;  in vmw_binding_add()
353 	list_add(&loc->ctx_list, &cbs->list);  in vmw_binding_add()
354 	INIT_LIST_HEAD(&loc->res_list);  in vmw_binding_add()
371 	struct vmw_ctx_bindinfo *loc =  in vmw_binding_cb_offset_update()  local
374 		(struct vmw_ctx_bindinfo_cb *)((u8 *) loc);  in vmw_binding_cb_offset_update()
375 	loc_cb->offset = offsetInBytes;  in vmw_binding_cb_offset_update()
379  * vmw_binding_add_uav_index - Add UAV index for tracking.
387 	cbs->ua_views[slot].index = index;  in vmw_binding_add_uav_index()
402 	size_t offset = (unsigned long)bi - (unsigned long)from;  in vmw_binding_transfer()
403 	struct vmw_ctx_bindinfo *loc = (struct vmw_ctx_bindinfo *)  in vmw_binding_transfer()  local
406 	if (loc->ctx != NULL) {  in vmw_binding_transfer()
407 		WARN_ON(bi->scrubbed);  in vmw_binding_transfer()
409 		vmw_binding_drop(loc);  in vmw_binding_transfer()
412 	if (bi->res != NULL) {  in vmw_binding_transfer()
413 		memcpy(loc, bi, vmw_binding_infos[bi->bt].size);  in vmw_binding_transfer()
414 		list_add_tail(&loc->ctx_list, &cbs->list);  in vmw_binding_transfer()
415 		list_add_tail(&loc->res_list, &loc->res->binding_head);  in vmw_binding_transfer()
420  * vmw_binding_state_kill - Kill all bindings associated with a
421  * struct vmw_ctx_binding state structure, and re-initialize the structure.
426  * context binding state tracker. Then re-initializes the whole structure.
433 	list_for_each_entry_safe(entry, next, &cbs->list, ctx_list)  in vmw_binding_state_kill()
438  * vmw_binding_state_scrub - Scrub all bindings associated with a
450 	list_for_each_entry(entry, &cbs->list, ctx_list) {  in vmw_binding_state_scrub()
451 		if (!entry->scrubbed) {  in vmw_binding_state_scrub()
452 			(void) vmw_binding_infos[entry->bt].scrub_func  in vmw_binding_state_scrub()
454 			entry->scrubbed = true;  in vmw_binding_state_scrub()
462  * vmw_binding_res_list_kill - Kill all bindings on a
480  * vmw_binding_res_list_scrub - Scrub all bindings on a
493 		if (!entry->scrubbed) {  in vmw_binding_res_list_scrub()
494 			(void) vmw_binding_infos[entry->bt].scrub_func  in vmw_binding_res_list_scrub()
496 			entry->scrubbed = true;  in vmw_binding_res_list_scrub()
502 			vmw_context_binding_state(entry->ctx);  in vmw_binding_res_list_scrub()
510  * vmw_binding_state_commit - Commit staged binding info
525 	list_for_each_entry_safe(entry, next, &from->list, ctx_list) {  in vmw_binding_state_commit()
531 	to->ua_views[0].index = from->ua_views[0].index;  in vmw_binding_state_commit()
532 	to->ua_views[1].index = from->ua_views[1].index;  in vmw_binding_state_commit()
536  * vmw_binding_rebind_all - Rebind all scrubbed bindings of a context
548 	list_for_each_entry(entry, &cbs->list, ctx_list) {  in vmw_binding_rebind_all()
549 		if (likely(!entry->scrubbed))  in vmw_binding_rebind_all()
552 		if ((entry->res == NULL || entry->res->id ==  in vmw_binding_rebind_all()
556 		ret = vmw_binding_infos[entry->bt].scrub_func(entry, true);  in vmw_binding_rebind_all()
560 		entry->scrubbed = false;  in vmw_binding_rebind_all()
567  * vmw_binding_scrub_shader - scrub a shader binding from a context.
576 	struct vmw_private *dev_priv = bi->ctx->dev_priv;  in vmw_binding_scrub_shader()
584 		return -ENOMEM;  in vmw_binding_scrub_shader()
586 	cmd->header.id = SVGA_3D_CMD_SET_SHADER;  in vmw_binding_scrub_shader()
587 	cmd->header.size = sizeof(cmd->body);  in vmw_binding_scrub_shader()
588 	cmd->body.cid = bi->ctx->id;  in vmw_binding_scrub_shader()
589 	cmd->body.type = binding->shader_slot + SVGA3D_SHADERTYPE_MIN;  in vmw_binding_scrub_shader()
590 	cmd->body.shid = ((rebind) ? bi->res->id : SVGA3D_INVALID_ID);  in vmw_binding_scrub_shader()
597  * vmw_binding_scrub_render_target - scrub a render target binding
608 	struct vmw_private *dev_priv = bi->ctx->dev_priv;  in vmw_binding_scrub_render_target()
616 		return -ENOMEM;  in vmw_binding_scrub_render_target()
618 	cmd->header.id = SVGA_3D_CMD_SETRENDERTARGET;  in vmw_binding_scrub_render_target()
619 	cmd->header.size = sizeof(cmd->body);  in vmw_binding_scrub_render_target()
620 	cmd->body.cid = bi->ctx->id;  in vmw_binding_scrub_render_target()
621 	cmd->body.type = binding->slot;  in vmw_binding_scrub_render_target()
622 	cmd->body.target.sid = ((rebind) ? bi->res->id : SVGA3D_INVALID_ID);  in vmw_binding_scrub_render_target()
623 	cmd->body.target.face = 0;  in vmw_binding_scrub_render_target()
624 	cmd->body.target.mipmap = 0;  in vmw_binding_scrub_render_target()
631  * vmw_binding_scrub_texture - scrub a texture binding from a context.
644 	struct vmw_private *dev_priv = bi->ctx->dev_priv;  in vmw_binding_scrub_texture()
655 		return -ENOMEM;  in vmw_binding_scrub_texture()
657 	cmd->header.id = SVGA_3D_CMD_SETTEXTURESTATE;  in vmw_binding_scrub_texture()
658 	cmd->header.size = sizeof(cmd->body);  in vmw_binding_scrub_texture()
659 	cmd->body.c.cid = bi->ctx->id;  in vmw_binding_scrub_texture()
660 	cmd->body.s1.stage = binding->texture_stage;  in vmw_binding_scrub_texture()
661 	cmd->body.s1.name = SVGA3D_TS_BIND_TEXTURE;  in vmw_binding_scrub_texture()
662 	cmd->body.s1.value = ((rebind) ? bi->res->id : SVGA3D_INVALID_ID);  in vmw_binding_scrub_texture()
669  * vmw_binding_scrub_dx_shader - scrub a dx shader binding from a context.
678 	struct vmw_private *dev_priv = bi->ctx->dev_priv;  in vmw_binding_scrub_dx_shader()
684 	cmd = VMW_CMD_CTX_RESERVE(dev_priv, sizeof(*cmd), bi->ctx->id);  in vmw_binding_scrub_dx_shader()
686 		return -ENOMEM;  in vmw_binding_scrub_dx_shader()
688 	cmd->header.id = SVGA_3D_CMD_DX_SET_SHADER;  in vmw_binding_scrub_dx_shader()
689 	cmd->header.size = sizeof(cmd->body);  in vmw_binding_scrub_dx_shader()
690 	cmd->body.type = binding->shader_slot + SVGA3D_SHADERTYPE_MIN;  in vmw_binding_scrub_dx_shader()
691 	cmd->body.shaderId = ((rebind) ? bi->res->id : SVGA3D_INVALID_ID);  in vmw_binding_scrub_dx_shader()
698  * vmw_binding_scrub_cb - scrub a constant buffer binding from a context.
707 	struct vmw_private *dev_priv = bi->ctx->dev_priv;  in vmw_binding_scrub_cb()
713 	cmd = VMW_CMD_CTX_RESERVE(dev_priv, sizeof(*cmd), bi->ctx->id);  in vmw_binding_scrub_cb()
715 		return -ENOMEM;  in vmw_binding_scrub_cb()
717 	cmd->header.id = SVGA_3D_CMD_DX_SET_SINGLE_CONSTANT_BUFFER;  in vmw_binding_scrub_cb()
718 	cmd->header.size = sizeof(cmd->body);  in vmw_binding_scrub_cb()
719 	cmd->body.slot = binding->slot;  in vmw_binding_scrub_cb()
720 	cmd->body.type = binding->shader_slot + SVGA3D_SHADERTYPE_MIN;  in vmw_binding_scrub_cb()
722 		cmd->body.offsetInBytes = binding->offset;  in vmw_binding_scrub_cb()
723 		cmd->body.sizeInBytes = binding->size;  in vmw_binding_scrub_cb()
724 		cmd->body.sid = bi->res->id;  in vmw_binding_scrub_cb()
726 		cmd->body.offsetInBytes = 0;  in vmw_binding_scrub_cb()
727 		cmd->body.sizeInBytes = 0;  in vmw_binding_scrub_cb()
728 		cmd->body.sid = SVGA3D_INVALID_ID;  in vmw_binding_scrub_cb()
736  * vmw_collect_view_ids - Build view id data for a view binding command
744  * Stops at the first non-existing binding in the @bi array.
745  * On output, @cbs->bind_cmd_count contains the number of bindings to be
746  * emitted, @cbs->bind_first_slot is set to zero, and @cbs->bind_cmd_buffer
755 	cbs->bind_cmd_count = 0;  in vmw_collect_view_ids()
756 	cbs->bind_first_slot = 0;  in vmw_collect_view_ids()
759 		if (!biv->bi.ctx)  in vmw_collect_view_ids()
762 		cbs->bind_cmd_buffer[cbs->bind_cmd_count++] =  in vmw_collect_view_ids()
763 			((biv->bi.scrubbed) ?  in vmw_collect_view_ids()
764 			 SVGA3D_INVALID_ID : biv->bi.res->id);  in vmw_collect_view_ids()
769  * vmw_collect_dirty_view_ids - Build view id data for a view binding command
778  * On output, @cbs->bind_cmd_count contains the number of bindings to be
779  * emitted, @cbs->bind_first_slot indicates the index of the first emitted
780  * binding, and @cbs->bind_cmd_buffer contains the command data.
791 	cbs->bind_cmd_count = 0;  in vmw_collect_dirty_view_ids()
794 	cbs->bind_first_slot = i;  in vmw_collect_dirty_view_ids()
798 		cbs->bind_cmd_buffer[cbs->bind_cmd_count++] =  in vmw_collect_dirty_view_ids()
799 			((!biv->bi.ctx || biv->bi.scrubbed) ?  in vmw_collect_dirty_view_ids()
800 			 SVGA3D_INVALID_ID : biv->bi.res->id);  in vmw_collect_dirty_view_ids()
811  * vmw_emit_set_sr - Issue delayed DX shader resource binding commands
819 	const struct vmw_ctx_bindinfo *loc =  in vmw_emit_set_sr()  local
820 		&cbs->per_shader[shader_slot].shader_res[0].bi;  in vmw_emit_set_sr()
828 	vmw_collect_dirty_view_ids(cbs, loc,  in vmw_emit_set_sr()
829 				   cbs->per_shader[shader_slot].dirty_sr,  in vmw_emit_set_sr()
831 	if (cbs->bind_cmd_count == 0)  in vmw_emit_set_sr()
834 	view_id_size = cbs->bind_cmd_count*sizeof(uint32);  in vmw_emit_set_sr()
836 	cmd = VMW_CMD_CTX_RESERVE(ctx->dev_priv, cmd_size, ctx->id);  in vmw_emit_set_sr()
838 		return -ENOMEM;  in vmw_emit_set_sr()
840 	cmd->header.id = SVGA_3D_CMD_DX_SET_SHADER_RESOURCES;  in vmw_emit_set_sr()
841 	cmd->header.size = sizeof(cmd->body) + view_id_size;  in vmw_emit_set_sr()
842 	cmd->body.type = shader_slot + SVGA3D_SHADERTYPE_MIN;  in vmw_emit_set_sr()
843 	cmd->body.startView = cbs->bind_first_slot;  in vmw_emit_set_sr()
845 	memcpy(&cmd[1], cbs->bind_cmd_buffer, view_id_size);  in vmw_emit_set_sr()
847 	vmw_cmd_commit(ctx->dev_priv, cmd_size);  in vmw_emit_set_sr()
848 	bitmap_clear(cbs->per_shader[shader_slot].dirty_sr,  in vmw_emit_set_sr()
849 		     cbs->bind_first_slot, cbs->bind_cmd_count);  in vmw_emit_set_sr()
855  * vmw_emit_set_rt - Issue delayed DX rendertarget binding commands
861 	const struct vmw_ctx_bindinfo_view *loc = &cbs->render_targets[0];  in vmw_emit_set_rt()  local
869 	vmw_collect_view_ids(cbs, loc, SVGA3D_DX_MAX_RENDER_TARGETS);  in vmw_emit_set_rt()
870 	view_id_size = cbs->bind_cmd_count*sizeof(uint32);  in vmw_emit_set_rt()
872 	cmd = VMW_CMD_CTX_RESERVE(ctx->dev_priv, cmd_size, ctx->id);  in vmw_emit_set_rt()
874 		return -ENOMEM;  in vmw_emit_set_rt()
876 	cmd->header.id = SVGA_3D_CMD_DX_SET_RENDERTARGETS;  in vmw_emit_set_rt()
877 	cmd->header.size = sizeof(cmd->body) + view_id_size;  in vmw_emit_set_rt()
879 	if (cbs->ds_view.bi.ctx && !cbs->ds_view.bi.scrubbed)  in vmw_emit_set_rt()
880 		cmd->body.depthStencilViewId = cbs->ds_view.bi.res->id;  in vmw_emit_set_rt()
882 		cmd->body.depthStencilViewId = SVGA3D_INVALID_ID;  in vmw_emit_set_rt()
884 	memcpy(&cmd[1], cbs->bind_cmd_buffer, view_id_size);  in vmw_emit_set_rt()
886 	vmw_cmd_commit(ctx->dev_priv, cmd_size);  in vmw_emit_set_rt()
893  * vmw_collect_so_targets - Build SVGA3dSoTarget data for a binding command
901  * Stops at the first non-existing binding in the @bi array.
902  * On output, @cbs->bind_cmd_count contains the number of bindings to be
903  * emitted, @cbs->bind_first_slot is set to zero, and @cbs->bind_cmd_buffer
911 	SVGA3dSoTarget *so_buffer = (SVGA3dSoTarget *) cbs->bind_cmd_buffer;  in vmw_collect_so_targets()
913 	cbs->bind_cmd_count = 0;  in vmw_collect_so_targets()
914 	cbs->bind_first_slot = 0;  in vmw_collect_so_targets()
917 		    ++cbs->bind_cmd_count) {  in vmw_collect_so_targets()
918 		if (!biso->bi.ctx)  in vmw_collect_so_targets()
921 		if (!biso->bi.scrubbed) {  in vmw_collect_so_targets()
922 			so_buffer->sid = biso->bi.res->id;  in vmw_collect_so_targets()
923 			so_buffer->offset = biso->offset;  in vmw_collect_so_targets()
924 			so_buffer->sizeInBytes = biso->size;  in vmw_collect_so_targets()
926 			so_buffer->sid = SVGA3D_INVALID_ID;  in vmw_collect_so_targets()
927 			so_buffer->offset = 0;  in vmw_collect_so_targets()
928 			so_buffer->sizeInBytes = 0;  in vmw_collect_so_targets()
934  * vmw_emit_set_so_target - Issue delayed streamout binding commands
940 	const struct vmw_ctx_bindinfo_so_target *loc = &cbs->so_targets[0];  in vmw_emit_set_so_target()  local
948 	vmw_collect_so_targets(cbs, loc, SVGA3D_DX_MAX_SOTARGETS);  in vmw_emit_set_so_target()
949 	if (cbs->bind_cmd_count == 0)  in vmw_emit_set_so_target()
952 	so_target_size = cbs->bind_cmd_count*sizeof(SVGA3dSoTarget);  in vmw_emit_set_so_target()
954 	cmd = VMW_CMD_CTX_RESERVE(ctx->dev_priv, cmd_size, ctx->id);  in vmw_emit_set_so_target()
956 		return -ENOMEM;  in vmw_emit_set_so_target()
958 	cmd->header.id = SVGA_3D_CMD_DX_SET_SOTARGETS;  in vmw_emit_set_so_target()
959 	cmd->header.size = sizeof(cmd->body) + so_target_size;  in vmw_emit_set_so_target()
960 	memcpy(&cmd[1], cbs->bind_cmd_buffer, so_target_size);  in vmw_emit_set_so_target()
962 	vmw_cmd_commit(ctx->dev_priv, cmd_size);  in vmw_emit_set_so_target()
969  * vmw_binding_emit_dirty_ps - Issue delayed per shader binding commands
976 	struct vmw_dx_shader_bindings *sb = &cbs->per_shader[0];  in vmw_binding_emit_dirty_ps()
981 		if (!test_bit(VMW_BINDING_PS_SR_BIT, &sb->dirty))  in vmw_binding_emit_dirty_ps()
988 		__clear_bit(VMW_BINDING_PS_SR_BIT, &sb->dirty);  in vmw_binding_emit_dirty_ps()
995  * vmw_collect_dirty_vbs - Build SVGA3dVertexBuffer data for a
1005  * On output, @cbs->bind_cmd_count contains the number of bindings to be
1006  * emitted, @cbs->bind_first_slot indicates the index of the first emitted
1007  * binding, and @cbs->bind_cmd_buffer contains the command data.
1017 	SVGA3dVertexBuffer *vbs = (SVGA3dVertexBuffer *) &cbs->bind_cmd_buffer;  in vmw_collect_dirty_vbs()
1019 	cbs->bind_cmd_count = 0;  in vmw_collect_dirty_vbs()
1022 	cbs->bind_first_slot = i;  in vmw_collect_dirty_vbs()
1026 		if (!biv->bi.ctx || biv->bi.scrubbed) {  in vmw_collect_dirty_vbs()
1027 			vbs->sid = SVGA3D_INVALID_ID;  in vmw_collect_dirty_vbs()
1028 			vbs->stride = 0;  in vmw_collect_dirty_vbs()
1029 			vbs->offset = 0;  in vmw_collect_dirty_vbs()
1031 			vbs->sid = biv->bi.res->id;  in vmw_collect_dirty_vbs()
1032 			vbs->stride = biv->stride;  in vmw_collect_dirty_vbs()
1033 			vbs->offset = biv->offset;  in vmw_collect_dirty_vbs()
1035 		cbs->bind_cmd_count++;  in vmw_collect_dirty_vbs()
1045  * vmw_emit_set_vb - Issue delayed vertex buffer binding commands
1052 	const struct vmw_ctx_bindinfo *loc =  in vmw_emit_set_vb()  local
1053 		&cbs->vertex_buffers[0].bi;  in vmw_emit_set_vb()
1061 	vmw_collect_dirty_vbs(cbs, loc, cbs->dirty_vb,  in vmw_emit_set_vb()
1063 	if (cbs->bind_cmd_count == 0)  in vmw_emit_set_vb()
1066 	set_vb_size = cbs->bind_cmd_count*sizeof(SVGA3dVertexBuffer);  in vmw_emit_set_vb()
1068 	cmd = VMW_CMD_CTX_RESERVE(ctx->dev_priv, cmd_size, ctx->id);  in vmw_emit_set_vb()
1070 		return -ENOMEM;  in vmw_emit_set_vb()
1072 	cmd->header.id = SVGA_3D_CMD_DX_SET_VERTEX_BUFFERS;  in vmw_emit_set_vb()
1073 	cmd->header.size = sizeof(cmd->body) + set_vb_size;  in vmw_emit_set_vb()
1074 	cmd->body.startBuffer = cbs->bind_first_slot;  in vmw_emit_set_vb()
1076 	memcpy(&cmd[1], cbs->bind_cmd_buffer, set_vb_size);  in vmw_emit_set_vb()
1078 	vmw_cmd_commit(ctx->dev_priv, cmd_size);  in vmw_emit_set_vb()
1079 	bitmap_clear(cbs->dirty_vb,  in vmw_emit_set_vb()
1080 		     cbs->bind_first_slot, cbs->bind_cmd_count);  in vmw_emit_set_vb()
1087 	const struct vmw_ctx_bindinfo_view *loc = &cbs->ua_views[0].views[0];  in vmw_emit_set_uav()  local
1095 	vmw_collect_view_ids(cbs, loc, vmw_max_num_uavs(cbs->dev_priv));  in vmw_emit_set_uav()
1096 	view_id_size = cbs->bind_cmd_count*sizeof(uint32);  in vmw_emit_set_uav()
1098 	cmd = VMW_CMD_CTX_RESERVE(ctx->dev_priv, cmd_size, ctx->id);  in vmw_emit_set_uav()
1100 		return -ENOMEM;  in vmw_emit_set_uav()
1102 	cmd->header.id = SVGA_3D_CMD_DX_SET_UA_VIEWS;  in vmw_emit_set_uav()
1103 	cmd->header.size = sizeof(cmd->body) + view_id_size;  in vmw_emit_set_uav()
1105 	/* Splice index is specified user-space   */  in vmw_emit_set_uav()
1106 	cmd->body.uavSpliceIndex = cbs->ua_views[0].index;  in vmw_emit_set_uav()
1108 	memcpy(&cmd[1], cbs->bind_cmd_buffer, view_id_size);  in vmw_emit_set_uav()
1110 	vmw_cmd_commit(ctx->dev_priv, cmd_size);  in vmw_emit_set_uav()
1117 	const struct vmw_ctx_bindinfo_view *loc = &cbs->ua_views[1].views[0];  in vmw_emit_set_cs_uav()  local
1125 	vmw_collect_view_ids(cbs, loc, vmw_max_num_uavs(cbs->dev_priv));  in vmw_emit_set_cs_uav()
1126 	view_id_size = cbs->bind_cmd_count*sizeof(uint32);  in vmw_emit_set_cs_uav()
1128 	cmd = VMW_CMD_CTX_RESERVE(ctx->dev_priv, cmd_size, ctx->id);  in vmw_emit_set_cs_uav()
1130 		return -ENOMEM;  in vmw_emit_set_cs_uav()
1132 	cmd->header.id = SVGA_3D_CMD_DX_SET_CS_UA_VIEWS;  in vmw_emit_set_cs_uav()
1133 	cmd->header.size = sizeof(cmd->body) + view_id_size;  in vmw_emit_set_cs_uav()
1135 	/* Start index is specified user-space */  in vmw_emit_set_cs_uav()
1136 	cmd->body.startIndex = cbs->ua_views[1].index;  in vmw_emit_set_cs_uav()
1138 	memcpy(&cmd[1], cbs->bind_cmd_buffer, view_id_size);  in vmw_emit_set_cs_uav()
1140 	vmw_cmd_commit(ctx->dev_priv, cmd_size);  in vmw_emit_set_cs_uav()
1146  * vmw_binding_emit_dirty - Issue delayed binding commands
1160 	while ((hit = find_next_bit(&cbs->dirty, VMW_BINDING_NUM_BITS, hit))  in vmw_binding_emit_dirty()
1188 		__clear_bit(hit, &cbs->dirty);  in vmw_binding_emit_dirty()
1196  * vmw_binding_scrub_sr - Schedule a dx shaderresource binding
1207 		vmw_context_binding_state(bi->ctx);  in vmw_binding_scrub_sr()
1209 	__set_bit(biv->slot, cbs->per_shader[biv->shader_slot].dirty_sr);  in vmw_binding_scrub_sr()
1211 		  &cbs->per_shader[biv->shader_slot].dirty);  in vmw_binding_scrub_sr()
1212 	__set_bit(VMW_BINDING_PS_BIT, &cbs->dirty);  in vmw_binding_scrub_sr()
1218  * vmw_binding_scrub_dx_rt - Schedule a dx rendertarget binding
1227 		vmw_context_binding_state(bi->ctx);  in vmw_binding_scrub_dx_rt()
1229 	__set_bit(VMW_BINDING_RT_BIT, &cbs->dirty);  in vmw_binding_scrub_dx_rt()
1235  * vmw_binding_scrub_so_target - Schedule a dx streamoutput buffer binding
1244 		vmw_context_binding_state(bi->ctx);  in vmw_binding_scrub_so_target()
1246 	__set_bit(VMW_BINDING_SO_T_BIT, &cbs->dirty);  in vmw_binding_scrub_so_target()
1252  * vmw_binding_scrub_vb - Schedule a dx vertex buffer binding
1263 		vmw_context_binding_state(bi->ctx);  in vmw_binding_scrub_vb()
1265 	__set_bit(bivb->slot, cbs->dirty_vb);  in vmw_binding_scrub_vb()
1266 	__set_bit(VMW_BINDING_VB_BIT, &cbs->dirty);  in vmw_binding_scrub_vb()
1272  * vmw_binding_scrub_ib - scrub a dx index buffer binding from a context
1281 	struct vmw_private *dev_priv = bi->ctx->dev_priv;  in vmw_binding_scrub_ib()
1287 	cmd = VMW_CMD_CTX_RESERVE(dev_priv, sizeof(*cmd), bi->ctx->id);  in vmw_binding_scrub_ib()
1289 		return -ENOMEM;  in vmw_binding_scrub_ib()
1291 	cmd->header.id = SVGA_3D_CMD_DX_SET_INDEX_BUFFER;  in vmw_binding_scrub_ib()
1292 	cmd->header.size = sizeof(cmd->body);  in vmw_binding_scrub_ib()
1294 		cmd->body.sid = bi->res->id;  in vmw_binding_scrub_ib()
1295 		cmd->body.format = binding->format;  in vmw_binding_scrub_ib()
1296 		cmd->body.offset = binding->offset;  in vmw_binding_scrub_ib()
1298 		cmd->body.sid = SVGA3D_INVALID_ID;  in vmw_binding_scrub_ib()
1299 		cmd->body.format = 0;  in vmw_binding_scrub_ib()
1300 		cmd->body.offset = 0;  in vmw_binding_scrub_ib()
1310 	struct vmw_ctx_binding_state *cbs = vmw_context_binding_state(bi->ctx);  in vmw_binding_scrub_uav()
1312 	__set_bit(VMW_BINDING_UAV_BIT, &cbs->dirty);  in vmw_binding_scrub_uav()
1318 	struct vmw_ctx_binding_state *cbs = vmw_context_binding_state(bi->ctx);  in vmw_binding_scrub_cs_uav()
1320 	__set_bit(VMW_BINDING_CS_UAV_BIT, &cbs->dirty);  in vmw_binding_scrub_cs_uav()
1325  * vmw_binding_scrub_so - Scrub a streamoutput binding from context.
1333 	struct vmw_private *dev_priv = bi->ctx->dev_priv;  in vmw_binding_scrub_so()
1339 	cmd = VMW_CMD_CTX_RESERVE(dev_priv, sizeof(*cmd), bi->ctx->id);  in vmw_binding_scrub_so()
1341 		return -ENOMEM;  in vmw_binding_scrub_so()
1343 	cmd->header.id = SVGA_3D_CMD_DX_SET_STREAMOUTPUT;  in vmw_binding_scrub_so()
1344 	cmd->header.size = sizeof(cmd->body);  in vmw_binding_scrub_so()
1345 	cmd->body.soid = rebind ? bi->res->id : SVGA3D_INVALID_ID;  in vmw_binding_scrub_so()
1352  * vmw_binding_state_alloc - Allocate a struct vmw_ctx_binding_state.
1365 		return ERR_PTR(-ENOMEM);  in vmw_binding_state_alloc()
1368 	cbs->dev_priv = dev_priv;  in vmw_binding_state_alloc()
1369 	INIT_LIST_HEAD(&cbs->list);  in vmw_binding_state_alloc()
1375  * vmw_binding_state_free - Free a struct vmw_ctx_binding_state.
1385  * vmw_binding_state_list - Get the binding list of a
1395 	return &cbs->list;  in vmw_binding_state_list()
1399  * vmw_binding_state_reset - clear a struct vmw_ctx_binding_state
1410 	list_for_each_entry_safe(entry, next, &cbs->list, ctx_list)  in vmw_binding_state_reset()
1415  * vmw_binding_dirtying - Return whether a binding type is dirtying its resource
1421  * GPU operation. Currently rendertarget-, depth-stencil-, stream-output-target
1443  * This function is unused at run-time, and only used to hold various build
1444  * asserts important for code optimization assumptions.