1 /* SPDX-License-Identifier: GPL-2.0-only */
4  * Author:Mark Yao <mark.yao@rock-chips.com>
12 #include <dt-bindings/soc/rockchip,vop2.h>
49 	VOP2_DLY_LAYER_MIX,     /** Layer Mix delay cycle for this VP */
171 	u32 base;  member
182 	u32 base;  member
208 	struct drm_plane base;  member
218 	u32 offset;  member
230 	unsigned int offset;  member
259  * struct vop2_ops - helper operations for vop2 hardware
520 /* Cluster register definition, offset relative to window base */
558 /* (E)smart register definition, offset relative to window base */
732 #define RK3568_OVL_LAYER_SEL__LAYER(layer, x)		((x) << ((layer) * 4))  argument
780 	ROCKCHIP_VOP2_PHY_ID_INVALID = -1,
785 static inline void vop2_writel(struct vop2 *vop2, u32 offset, u32 v)  in vop2_writel()  argument
787 	regmap_write(vop2->map, offset, v);  in vop2_writel()
790 static inline void vop2_vp_write(struct vop2_video_port *vp, u32 offset, u32 v)  in vop2_vp_write()  argument
792 	regmap_write(vp->vop2->map, vp->data->offset + offset, v);  in vop2_vp_write()
795 static inline u32 vop2_readl(struct vop2 *vop2, u32 offset)  in vop2_readl()  argument
799 	regmap_read(vop2->map, offset, &val);  in vop2_readl()
804 static inline u32 vop2_vp_read(struct vop2_video_port *vp, u32 offset)  in vop2_vp_read()  argument
808 	regmap_read(vp->vop2->map, vp->data->offset + offset, &val);  in vop2_vp_read()
815 	regmap_field_write(win->reg[reg], v);  in vop2_win_write()
820 	return win->data->feature & WIN_FEATURE_CLUSTER;  in vop2_cluster_window()
830 	return container_of(p, struct vop2_win, base);  in to_vop2_win()