renesas/rcar-du/rcar_du_drv.c

1 // SPDX-License-Identifier: GPL-2.0+
3  * R-Car Display Unit DRM driver
5  * Copyright (C) 2013-2015 Renesas Electronics Corporation
11 #include <linux/dma-mapping.h>
32 /* -----------------------------------------------------------------------------
42 	.channels_mask = BIT(1) | BIT(0),
48 			.possible_crtcs = BIT(1) | BIT(0),
52 			.possible_crtcs = BIT(0),
53 			.port = 1,
56 	.num_lvds = 1,
66 	.channels_mask = BIT(1) | BIT(0),
72 			.possible_crtcs = BIT(0),
76 			.possible_crtcs = BIT(1),
77 			.port = 1,
89 	.channels_mask = BIT(1) | BIT(0),
96 			.possible_crtcs = BIT(0),
100 			.possible_crtcs = BIT(1),
101 			.port = 1,
104 			.possible_crtcs = BIT(0) | BIT(1),
118 	.channels_mask = BIT(2) | BIT(1) | BIT(0),
125 			.possible_crtcs = BIT(2),
129 			.possible_crtcs = BIT(1),
130 			.port = 1,
133 			.possible_crtcs = BIT(0),
137 	.num_lvds = 1,
139 	.dpll_mask =  BIT(1),
149 	.channels_mask = BIT(3) | BIT(1) | BIT(0),
156 			.possible_crtcs = BIT(2),
160 			.possible_crtcs = BIT(1),
161 			.port = 1,
164 			.possible_crtcs = BIT(0),
168 	.num_lvds = 1,
170 	.dpll_mask =  BIT(1),
178 	.channels_mask = BIT(1) | BIT(0),
184 			.possible_crtcs = BIT(0) | BIT(1),
188 			.possible_crtcs = BIT(0),
189 			.port = 1,
192 			.possible_crtcs = BIT(1),
198 	.lvds_clk_mask =  BIT(1) | BIT(0),
208 	.channels_mask = BIT(3) | BIT(1) | BIT(0),
215 			.possible_crtcs = BIT(2),
219 			.possible_crtcs = BIT(1),
220 			.port = 1,
223 			.possible_crtcs = BIT(0),
227 	.num_lvds = 1,
229 	.dpll_mask =  BIT(1),
233 	.gen = 1,
236 	.channels_mask = BIT(1) | BIT(0),
243 			.possible_crtcs = BIT(0),
247 			.possible_crtcs = BIT(1) | BIT(0),
248 			.port = 1,
260 	.channels_mask = BIT(2) | BIT(1) | BIT(0),
268 			.possible_crtcs = BIT(2) | BIT(1) | BIT(0),
272 			.possible_crtcs = BIT(0),
273 			.port = 1,
276 			.possible_crtcs = BIT(2) | BIT(1),
284 /* M2-W (r8a7791) and M2-N (r8a7793) are identical */
291 	.channels_mask = BIT(1) | BIT(0),
298 			.possible_crtcs = BIT(1) | BIT(0),
302 			.possible_crtcs = BIT(0),
303 			.port = 1,
306 	.num_lvds = 1,
316 	.channels_mask = BIT(1) | BIT(0),
320 			.possible_crtcs = BIT(0),
324 			.possible_crtcs = BIT(1),
325 			.port = 1,
337 	.channels_mask = BIT(1) | BIT(0),
344 			.possible_crtcs = BIT(0),
348 			.possible_crtcs = BIT(1),
349 			.port = 1,
362 	.channels_mask = BIT(3) | BIT(2) | BIT(1) | BIT(0),
369 			.possible_crtcs = BIT(3),
373 			.possible_crtcs = BIT(1),
374 			.port = 1,
377 			.possible_crtcs = BIT(2),
381 			.possible_crtcs = BIT(0),
385 	.num_lvds = 1,
387 	.dpll_mask =  BIT(2) | BIT(1),
397 	.channels_mask = BIT(2) | BIT(1) | BIT(0),
404 			.possible_crtcs = BIT(2),
408 			.possible_crtcs = BIT(1),
409 			.port = 1,
412 			.possible_crtcs = BIT(0),
416 	.num_lvds = 1,
418 	.dpll_mask =  BIT(1),
428 	.channels_mask = BIT(3) | BIT(1) | BIT(0),
435 			.possible_crtcs = BIT(2),
439 			.possible_crtcs = BIT(1),
440 			.port = 1,
443 			.possible_crtcs = BIT(0),
447 	.num_lvds = 1,
449 	.dpll_mask =  BIT(1),
459 	.channels_mask = BIT(0),
466 			.possible_crtcs = BIT(0),
470 			.possible_crtcs = BIT(0),
471 			.port = 1,
474 	.num_lvds = 1,
483 	.channels_mask = BIT(1) | BIT(0),
490 			.possible_crtcs = BIT(0) | BIT(1),
494 			.possible_crtcs = BIT(0),
495 			.port = 1,
498 			.possible_crtcs = BIT(1),
504 	.lvds_clk_mask =  BIT(1) | BIT(0),
512 	.channels_mask = BIT(1) | BIT(0),
516 			.possible_crtcs = BIT(0),
520 			.possible_crtcs = BIT(1),
521 			.port = 1,
525 	.dsi_clk_mask =  BIT(1) | BIT(0),
533 	.channels_mask = BIT(1) | BIT(0),
537 			.possible_crtcs = BIT(0),
541 			.possible_crtcs = BIT(1),
542 			.port = 1,
546 	.dsi_clk_mask =  BIT(1) | BIT(0),
554 	.channels_mask = BIT(0),
558 			.possible_crtcs = BIT(0),
563 	.dsi_clk_mask = BIT(0),
567 	{ .compatible = "renesas,du-r8a7742", .data = &rcar_du_r8a7790_info },
568 	{ .compatible = "renesas,du-r8a7743", .data = &rzg1_du_r8a7743_info },
569 	{ .compatible = "renesas,du-r8a7744", .data = &rzg1_du_r8a7743_info },
570 	{ .compatible = "renesas,du-r8a7745", .data = &rzg1_du_r8a7745_info },
571 	{ .compatible = "renesas,du-r8a77470", .data = &rzg1_du_r8a77470_info },
572 	{ .compatible = "renesas,du-r8a774a1", .data = &rcar_du_r8a774a1_info },
573 	{ .compatible = "renesas,du-r8a774b1", .data = &rcar_du_r8a774b1_info },
574 	{ .compatible = "renesas,du-r8a774c0", .data = &rcar_du_r8a774c0_info },
575 	{ .compatible = "renesas,du-r8a774e1", .data = &rcar_du_r8a774e1_info },
576 	{ .compatible = "renesas,du-r8a7779", .data = &rcar_du_r8a7779_info },
577 	{ .compatible = "renesas,du-r8a7790", .data = &rcar_du_r8a7790_info },
578 	{ .compatible = "renesas,du-r8a7791", .data = &rcar_du_r8a7791_info },
579 	{ .compatible = "renesas,du-r8a7792", .data = &rcar_du_r8a7792_info },
580 	{ .compatible = "renesas,du-r8a7793", .data = &rcar_du_r8a7791_info },
581 	{ .compatible = "renesas,du-r8a7794", .data = &rcar_du_r8a7794_info },
582 	{ .compatible = "renesas,du-r8a7795", .data = &rcar_du_r8a7795_info },
583 	{ .compatible = "renesas,du-r8a7796", .data = &rcar_du_r8a7796_info },
584 	{ .compatible = "renesas,du-r8a77961", .data = &rcar_du_r8a7796_info },
585 	{ .compatible = "renesas,du-r8a77965", .data = &rcar_du_r8a77965_info },
586 	{ .compatible = "renesas,du-r8a77970", .data = &rcar_du_r8a77970_info },
587 	{ .compatible = "renesas,du-r8a77980", .data = &rcar_du_r8a77970_info },
588 	{ .compatible = "renesas,du-r8a77990", .data = &rcar_du_r8a7799x_info },
589 	{ .compatible = "renesas,du-r8a77995", .data = &rcar_du_r8a7799x_info },
590 	{ .compatible = "renesas,du-r8a779a0", .data = &rcar_du_r8a779a0_info },
591 	{ .compatible = "renesas,du-r8a779g0", .data = &rcar_du_r8a779g0_info },
592 	{ .compatible = "renesas,du-r8a779h0", .data = &rcar_du_r8a779h0_info },
618 /* -----------------------------------------------------------------------------
630 	.name			= "rcar-du",
631 	.desc			= "Renesas R-Car Display Unit",
632 	.major			= 1,
636 /* -----------------------------------------------------------------------------
644 	return drm_mode_config_helper_suspend(&rcdu->ddev);  in rcar_du_pm_suspend()
651 	return drm_mode_config_helper_resume(&rcdu->ddev);  in rcar_du_pm_resume()
657 /* -----------------------------------------------------------------------------
664 	struct drm_device *ddev = &rcdu->ddev;  in rcar_du_remove()
676 	drm_atomic_helper_shutdown(&rcdu->ddev);  in rcar_du_shutdown()
686 		return -ENODEV;  in rcar_du_probe()
688 	/* Allocate and initialize the R-Car device structure. */  in rcar_du_probe()
689 	rcdu = devm_drm_dev_alloc(&pdev->dev, &rcar_du_driver,  in rcar_du_probe()
694 	rcdu->dev = &pdev->dev;  in rcar_du_probe()
696 	rcdu->info = of_device_get_match_data(rcdu->dev);  in rcar_du_probe()
701 	rcdu->mmio = devm_platform_ioremap_resource(pdev, 0);  in rcar_du_probe()
702 	if (IS_ERR(rcdu->mmio))  in rcar_du_probe()
703 		return PTR_ERR(rcdu->mmio);  in rcar_du_probe()
706 	 * Set the DMA coherent mask to reflect the DU 32-bit DMA address space  in rcar_du_probe()
711 	ret = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(mask));  in rcar_du_probe()
722 		if (ret != -EPROBE_DEFER)  in rcar_du_probe()
723 			dev_err(&pdev->dev,  in rcar_du_probe()
732 	ret = drm_dev_register(&rcdu->ddev, 0);  in rcar_du_probe()
736 	drm_info(&rcdu->ddev, "Device %s probed\n", dev_name(&pdev->dev));  in rcar_du_probe()
738 	drm_client_setup(&rcdu->ddev, NULL);  in rcar_du_probe()
743 	drm_kms_helper_poll_fini(&rcdu->ddev);  in rcar_du_probe()
752 		.name	= "rcar-du",
761 MODULE_DESCRIPTION("Renesas R-Car Display Unit DRM Driver");