Lines Matching +full:0 +full:x1e
24 #define HX83102_SETPOWER 0xb1
25 #define HX83102_SETDISP 0xb2
26 #define HX83102_SETCYC 0xb4
27 #define HX83102_UNKNOWN_B6 0xb6
28 #define HX83102_UNKNOWN_B8 0xb8
29 #define HX83102_SETEXTC 0xb9
30 #define HX83102_SETMIPI 0xba
31 #define HX83102_SETVDC 0xbc
32 #define HX83102_SETBANK 0xbd
33 #define HX83102_UNKNOWN_BE 0xbe
34 #define HX83102_SETPTBA 0xbf
35 #define HX83102_SETSTBA 0xc0
36 #define HX83102_SETTCON 0xc7
37 #define HX83102_SETRAMDMY 0xc8
38 #define HX83102_SETPWM 0xc9
39 #define HX83102_SETCLOCK 0xcb
40 #define HX83102_SETPANEL 0xcc
41 #define HX83102_SETCASCADE 0xd0
42 #define HX83102_SETPCTRL 0xd1
43 #define HX83102_UNKNOWN_D2 0xd2
44 #define HX83102_SETGIP0 0xd3
45 #define HX83102_SETGIP1 0xd5
46 #define HX83102_SETGIP2 0xd6
47 #define HX83102_SETGIP3 0xd8
48 #define HX83102_UNKNOWN_D9 0xd9
49 #define HX83102_SETGMA 0xe0
50 #define HX83102_UNKNOWN_E1 0xe1
51 #define HX83102_SETTP1 0xe7
52 #define HX83102_SETSPCCMD 0xe9
90 mipi_dsi_dcs_write_seq_multi(dsi_ctx, HX83102_SETEXTC, 0x83, 0x10, 0x21, 0x55, 0x00); in hx83102_enable_extended_cmds()
92 mipi_dsi_dcs_write_seq_multi(dsi_ctx, HX83102_SETEXTC, 0x00, 0x00, 0x00); in hx83102_enable_extended_cmds()
100 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPOWER, 0x2c, 0xb5, 0xb5, 0x31, 0xf1, in starry_himax83102_j02_init()
101 0x31, 0xd7, 0x2f, 0x36, 0x36, 0x36, 0x36, 0x1a, 0x8b, 0x11, in starry_himax83102_j02_init()
102 0x65, 0x00, 0x88, 0xfa, 0xff, 0xff, 0x8f, 0xff, 0x08, 0x74, in starry_himax83102_j02_init()
103 0x33); in starry_himax83102_j02_init()
104 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETDISP, 0x00, 0x47, 0xb0, 0x80, 0x00, in starry_himax83102_j02_init()
105 0x12, 0x72, 0x3c, 0xa3, 0x03, 0x03, 0x00, 0x00, 0x88, 0xf5); in starry_himax83102_j02_init()
106 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCYC, 0x76, 0x76, 0x76, 0x76, 0x76, in starry_himax83102_j02_init()
107 0x76, 0x63, 0x5c, 0x63, 0x5c, 0x01, 0x9e); in starry_himax83102_j02_init()
108 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xcd); in starry_himax83102_j02_init()
109 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETMIPI, 0x84); in starry_himax83102_j02_init()
110 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in starry_himax83102_j02_init()
111 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETVDC, 0x1b, 0x04); in starry_himax83102_j02_init()
112 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_UNKNOWN_BE, 0x20); in starry_himax83102_j02_init()
113 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPTBA, 0xfc, 0xc4); in starry_himax83102_j02_init()
114 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSTBA, 0x36, 0x36, 0x22, 0x11, 0x22, in starry_himax83102_j02_init()
115 0xa0, 0x61, 0x08, 0xf5, 0x03); in starry_himax83102_j02_init()
116 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xcc); in starry_himax83102_j02_init()
117 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETTCON, 0x80); in starry_himax83102_j02_init()
118 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in starry_himax83102_j02_init()
119 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xc6); in starry_himax83102_j02_init()
120 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETRAMDMY, 0x97); in starry_himax83102_j02_init()
121 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in starry_himax83102_j02_init()
122 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPWM, 0x00, 0x1e, 0x13, 0x88, 0x01); in starry_himax83102_j02_init()
123 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCLOCK, 0x08, 0x13, 0x07, 0x00, 0x0f, 0x33); in starry_himax83102_j02_init()
124 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPANEL, 0x02); in starry_himax83102_j02_init()
125 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xc4); in starry_himax83102_j02_init()
126 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCASCADE, 0x03); in starry_himax83102_j02_init()
127 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in starry_himax83102_j02_init()
128 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPCTRL, 0x37, 0x06, 0x00, 0x02, 0x04, 0x0c, in starry_himax83102_j02_init()
129 0xff); in starry_himax83102_j02_init()
130 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_UNKNOWN_D2, 0x1f, 0x11, 0x1f); in starry_himax83102_j02_init()
131 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP0, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, in starry_himax83102_j02_init()
132 0x08, 0x00, 0x08, 0x37, 0x47, 0x34, 0x3b, 0x12, 0x12, 0x03, 0x03, in starry_himax83102_j02_init()
133 0x32, 0x10, 0x10, 0x00, 0x10, 0x32, 0x10, 0x08, 0x00, 0x08, 0x32, in starry_himax83102_j02_init()
134 0x17, 0x94, 0x07, 0x94, 0x00, 0x00); in starry_himax83102_j02_init()
135 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP1, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, in starry_himax83102_j02_init()
136 0x18, 0x18, 0x18, 0x18, 0x19, 0x19, 0x40, 0x40, 0x1a, 0x1a, 0x1b, in starry_himax83102_j02_init()
137 0x1b, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x20, 0x21, in starry_himax83102_j02_init()
138 0x28, 0x29, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, in starry_himax83102_j02_init()
139 0x18, 0x18, 0x18, 0x18, 0x18); in starry_himax83102_j02_init()
140 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP2, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, in starry_himax83102_j02_init()
141 0x18, 0x18, 0x18, 0x18, 0x40, 0x40, 0x19, 0x19, 0x1a, 0x1a, 0x1b, in starry_himax83102_j02_init()
142 0x1b, 0x07, 0x06, 0x05, 0x04, 0x03, 0x02, 0x01, 0x00, 0x29, 0x28, in starry_himax83102_j02_init()
143 0x21, 0x20, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, in starry_himax83102_j02_init()
144 0x18, 0x18, 0x18, 0x18, 0x18); in starry_himax83102_j02_init()
145 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP3, 0xaa, 0xba, 0xea, 0xaa, 0xaa, 0xa0, in starry_himax83102_j02_init()
146 0xaa, 0xba, 0xea, 0xaa, 0xaa, 0xa0, 0xaa, 0xba, 0xea, 0xaa, 0xaa, in starry_himax83102_j02_init()
147 0xa0, 0xaa, 0xba, 0xea, 0xaa, 0xaa, 0xa0, 0xaa, 0xba, 0xea, 0xaa, in starry_himax83102_j02_init()
148 0xaa, 0xa0, 0xaa, 0xba, 0xea, 0xaa, 0xaa, 0xa0); in starry_himax83102_j02_init()
149 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGMA, 0x00, 0x09, 0x14, 0x1e, 0x26, 0x48, in starry_himax83102_j02_init()
150 0x61, 0x67, 0x6c, 0x67, 0x7d, 0x7f, 0x80, 0x8b, 0x87, 0x8f, 0x98, in starry_himax83102_j02_init()
151 0xab, 0xab, 0x55, 0x5c, 0x68, 0x73, 0x00, 0x09, 0x14, 0x1e, 0x26, in starry_himax83102_j02_init()
152 0x48, 0x61, 0x67, 0x6c, 0x67, 0x7d, 0x7f, 0x80, 0x8b, 0x87, 0x8f, in starry_himax83102_j02_init()
153 0x98, 0xab, 0xab, 0x55, 0x5c, 0x68, 0x73); in starry_himax83102_j02_init()
154 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETTP1, 0x0e, 0x10, 0x10, 0x21, 0x2b, 0x9a, in starry_himax83102_j02_init()
155 0x02, 0x54, 0x9a, 0x14, 0x14, 0x00, 0x00, 0x00, 0x00, 0x12, 0x05, in starry_himax83102_j02_init()
156 0x02, 0x02, 0x10); in starry_himax83102_j02_init()
157 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x01); in starry_himax83102_j02_init()
158 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPOWER, 0x01, 0xbf, 0x11); in starry_himax83102_j02_init()
159 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCLOCK, 0x86); in starry_himax83102_j02_init()
160 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_UNKNOWN_D2, 0x3c, 0xfa); in starry_himax83102_j02_init()
161 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP0, 0x00, 0x00, 0x44, 0x00, 0x00, 0x00, in starry_himax83102_j02_init()
162 0x00, 0x00, 0x80, 0x0c, 0x01); in starry_himax83102_j02_init()
163 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETTP1, 0x02, 0x00, 0x28, 0x01, 0x7e, 0x0f, in starry_himax83102_j02_init()
164 0x7e, 0x10, 0xa0, 0x00, 0x00, 0x20, 0x40, 0x50, 0x40); in starry_himax83102_j02_init()
165 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x02); in starry_himax83102_j02_init()
166 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP3, 0xff, 0xff, 0xbf, 0xfe, 0xaa, 0xa0, in starry_himax83102_j02_init()
167 0xff, 0xff, 0xbf, 0xfe, 0xaa, 0xa0); in starry_himax83102_j02_init()
168 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETTP1, 0xfe, 0x04, 0xfe, 0x04, 0xfe, 0x04, in starry_himax83102_j02_init()
169 0x03, 0x03, 0x03, 0x26, 0x00, 0x26, 0x81, 0x02, 0x40, 0x00, 0x20, in starry_himax83102_j02_init()
170 0x9e, 0x04, 0x03, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00); in starry_himax83102_j02_init()
171 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x03); in starry_himax83102_j02_init()
172 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xc6); in starry_himax83102_j02_init()
173 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCYC, 0x03, 0xff, 0xf8); in starry_himax83102_j02_init()
174 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in starry_himax83102_j02_init()
175 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP3, 0x00, 0x2a, 0xaa, 0xa8, 0x00, 0x00, in starry_himax83102_j02_init()
176 0x00, 0x2a, 0xaa, 0xa8, 0x00, 0x00, 0x00, 0x3f, 0xff, 0xfc, 0x00, in starry_himax83102_j02_init()
177 0x00, 0x00, 0x3f, 0xff, 0xfc, 0x00, 0x00, 0x00, 0x2a, 0xaa, 0xa8, in starry_himax83102_j02_init()
178 0x00, 0x00, 0x00, 0x2a, 0xaa, 0xa8, 0x00, 0x00); in starry_himax83102_j02_init()
179 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x00); in starry_himax83102_j02_init()
180 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xc4); in starry_himax83102_j02_init()
181 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETMIPI, 0x96); in starry_himax83102_j02_init()
182 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in starry_himax83102_j02_init()
183 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x01); in starry_himax83102_j02_init()
184 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xc5); in starry_himax83102_j02_init()
185 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETMIPI, 0x4f); in starry_himax83102_j02_init()
186 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in starry_himax83102_j02_init()
187 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x00); in starry_himax83102_j02_init()
199 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPOWER, 0x2c, 0xaf, 0xaf, 0x2b, 0xeb, 0x42, in boe_nv110wum_init()
200 0xe1, 0x4d, 0x36, 0x36, 0x36, 0x36, 0x1a, 0x8b, 0x11, 0x65, 0x00, in boe_nv110wum_init()
201 0x88, 0xfa, 0xff, 0xff, 0x8f, 0xff, 0x08, 0x9a, 0x33); in boe_nv110wum_init()
202 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETDISP, 0x00, 0x47, 0xb0, 0x80, 0x00, 0x12, in boe_nv110wum_init()
203 0x71, 0x3c, 0xa3, 0x11, 0x00, 0x00, 0x00, 0x88, 0xf5, 0x22, 0x8f); in boe_nv110wum_init()
204 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCYC, 0x49, 0x49, 0x32, 0x32, 0x14, 0x32, in boe_nv110wum_init()
205 0x84, 0x6e, 0x84, 0x6e, 0x01, 0x9c); in boe_nv110wum_init()
206 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xcd); in boe_nv110wum_init()
207 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETMIPI, 0x84); in boe_nv110wum_init()
208 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in boe_nv110wum_init()
209 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETVDC, 0x1b, 0x04); in boe_nv110wum_init()
210 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_UNKNOWN_BE, 0x20); in boe_nv110wum_init()
211 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPTBA, 0xfc, 0x84); in boe_nv110wum_init()
212 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSTBA, 0x36, 0x36, 0x22, 0x00, 0x00, 0xa0, in boe_nv110wum_init()
213 0x61, 0x08, 0xf5, 0x03); in boe_nv110wum_init()
214 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xcc); in boe_nv110wum_init()
215 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETTCON, 0x80); in boe_nv110wum_init()
216 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in boe_nv110wum_init()
217 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xc6); in boe_nv110wum_init()
218 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETRAMDMY, 0x97); in boe_nv110wum_init()
219 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in boe_nv110wum_init()
220 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPWM, 0x00, 0x1e, 0x30, 0xd4, 0x01); in boe_nv110wum_init()
221 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCLOCK, 0x08, 0x13, 0x07, 0x00, 0x0f, 0x34); in boe_nv110wum_init()
222 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPANEL, 0x02, 0x03, 0x44); in boe_nv110wum_init()
223 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xc4); in boe_nv110wum_init()
224 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCASCADE, 0x03); in boe_nv110wum_init()
225 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in boe_nv110wum_init()
226 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPCTRL, 0x37, 0x06, 0x00, 0x02, 0x04, 0x0c, 0xff); in boe_nv110wum_init()
227 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_UNKNOWN_D2, 0x1f, 0x11, 0x1f, 0x11); in boe_nv110wum_init()
228 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP0, 0x06, 0x00, 0x00, 0x00, 0x00, 0x04, in boe_nv110wum_init()
229 0x08, 0x04, 0x08, 0x37, 0x37, 0x64, 0x4b, 0x11, 0x11, 0x03, 0x03, 0x32, in boe_nv110wum_init()
230 0x10, 0x0e, 0x00, 0x0e, 0x32, 0x10, 0x0a, 0x00, 0x0a, 0x32, 0x17, 0x98, in boe_nv110wum_init()
231 0x07, 0x98, 0x00, 0x00); in boe_nv110wum_init()
232 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP1, 0x18, 0x18, 0x18, 0x18, 0x1e, 0x1e, in boe_nv110wum_init()
233 0x1e, 0x1e, 0x1f, 0x1f, 0x1f, 0x1f, 0x24, 0x24, 0x24, 0x24, 0x07, 0x06, in boe_nv110wum_init()
234 0x07, 0x06, 0x05, 0x04, 0x05, 0x04, 0x03, 0x02, 0x03, 0x02, 0x01, 0x00, in boe_nv110wum_init()
235 0x01, 0x00, 0x21, 0x20, 0x21, 0x20, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, in boe_nv110wum_init()
236 0x18, 0x18); in boe_nv110wum_init()
237 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP3, 0xaf, 0xaa, 0xaa, 0xaa, 0xaa, 0xa0, in boe_nv110wum_init()
238 0xaf, 0xaa, 0xaa, 0xaa, 0xaa, 0xa0); in boe_nv110wum_init()
239 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGMA, 0x00, 0x05, 0x0d, 0x14, 0x1b, 0x2c, in boe_nv110wum_init()
240 0x44, 0x49, 0x51, 0x4c, 0x67, 0x6c, 0x71, 0x80, 0x7d, 0x84, 0x8d, 0xa0, in boe_nv110wum_init()
241 0xa0, 0x4f, 0x58, 0x64, 0x73, 0x00, 0x05, 0x0d, 0x14, 0x1b, 0x2c, 0x44, in boe_nv110wum_init()
242 0x49, 0x51, 0x4c, 0x67, 0x6c, 0x71, 0x80, 0x7d, 0x84, 0x8d, 0xa0, 0xa0, in boe_nv110wum_init()
243 0x4f, 0x58, 0x64, 0x73); in boe_nv110wum_init()
244 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETTP1, 0x07, 0x10, 0x10, 0x1a, 0x26, 0x9e, in boe_nv110wum_init()
245 0x00, 0x53, 0x9b, 0x14, 0x14); in boe_nv110wum_init()
246 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_UNKNOWN_E1, 0x11, 0x00, 0x00, 0x89, 0x30, 0x80, in boe_nv110wum_init()
247 0x07, 0x80, 0x02, 0x58, 0x00, 0x14, 0x02, 0x58, 0x02, 0x58, 0x02, 0x00, in boe_nv110wum_init()
248 0x02, 0x2c, 0x00, 0x20, 0x02, 0x02, 0x00, 0x08, 0x00, 0x0c, 0x05, 0x0e, in boe_nv110wum_init()
249 0x04, 0x94, 0x18, 0x00, 0x10, 0xf0, 0x03, 0x0c, 0x20, 0x00, 0x06, 0x0b, in boe_nv110wum_init()
250 0x0b, 0x33, 0x0e); in boe_nv110wum_init()
251 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x01); in boe_nv110wum_init()
252 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP3, 0xff, 0xff, 0xff, 0xff, 0xfa, 0xa0, in boe_nv110wum_init()
253 0xff, 0xff, 0xff, 0xff, 0xfa, 0xa0); in boe_nv110wum_init()
254 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPOWER, 0x01, 0xbf, 0x11); in boe_nv110wum_init()
255 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCLOCK, 0x86); in boe_nv110wum_init()
256 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_UNKNOWN_D2, 0x96); in boe_nv110wum_init()
257 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xc9); in boe_nv110wum_init()
258 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP0, 0x84); in boe_nv110wum_init()
259 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in boe_nv110wum_init()
260 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xd1); in boe_nv110wum_init()
261 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_UNKNOWN_E1, 0xf6, 0x2b, 0x34, 0x2b, 0x74, 0x3b, in boe_nv110wum_init()
262 0x74, 0x6b, 0x74); in boe_nv110wum_init()
263 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in boe_nv110wum_init()
264 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETTP1, 0x02, 0x00, 0x2b, 0x01, 0x7e, 0x0f, in boe_nv110wum_init()
265 0x7e, 0x10, 0xa0, 0x00, 0x00); in boe_nv110wum_init()
266 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x02); in boe_nv110wum_init()
267 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCYC, 0x02, 0x00, 0xbb, 0x11); in boe_nv110wum_init()
268 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP3, 0xff, 0xaf, 0xff, 0xff, 0xfa, 0xa0, in boe_nv110wum_init()
269 0xff, 0xaf, 0xff, 0xff, 0xfa, 0xa0); in boe_nv110wum_init()
270 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETTP1, 0xfe, 0x01, 0xfe, 0x01, 0xfe, 0x01, in boe_nv110wum_init()
271 0x00, 0x00, 0x00, 0x23, 0x00, 0x23, 0x81, 0x02, 0x40, 0x00, 0x20, 0x65, in boe_nv110wum_init()
272 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00); in boe_nv110wum_init()
273 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x03); in boe_nv110wum_init()
274 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP3, 0xaa, 0xaf, 0xaa, 0xaa, 0xa0, 0x00, in boe_nv110wum_init()
275 0xaa, 0xaf, 0xaa, 0xaa, 0xa0, 0x00, 0xaa, 0xaf, 0xaa, 0xaa, 0xa0, 0x00, in boe_nv110wum_init()
276 0xaa, 0xaf, 0xaa, 0xaa, 0xa0, 0x00); in boe_nv110wum_init()
277 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xc6); in boe_nv110wum_init()
278 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCYC, 0x03, 0xff, 0xf8); in boe_nv110wum_init()
279 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in boe_nv110wum_init()
280 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_UNKNOWN_E1, 0x00); in boe_nv110wum_init()
281 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x00); in boe_nv110wum_init()
282 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xc4); in boe_nv110wum_init()
283 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETMIPI, 0x96); in boe_nv110wum_init()
284 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in boe_nv110wum_init()
285 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x01); in boe_nv110wum_init()
286 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xc5); in boe_nv110wum_init()
287 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETMIPI, 0x4f); in boe_nv110wum_init()
288 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in boe_nv110wum_init()
289 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x00); in boe_nv110wum_init()
304 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xc4); in csot_pna957qt1_1_init()
305 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_UNKNOWN_D9, 0xd2); in csot_pna957qt1_1_init()
306 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in csot_pna957qt1_1_init()
307 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPOWER, 0x2c, 0xb3, 0xb3, 0x31, 0xf1, 0x33, in csot_pna957qt1_1_init()
308 0xe0, 0x54, 0x36, 0x36, 0x3a, 0x3a, 0x32, 0x8b, 0x11, 0xe5, in csot_pna957qt1_1_init()
309 0x98); in csot_pna957qt1_1_init()
310 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xd9); in csot_pna957qt1_1_init()
311 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPOWER, 0x8b, 0x33); in csot_pna957qt1_1_init()
312 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in csot_pna957qt1_1_init()
313 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETDISP, 0x00, 0x47, 0xb0, 0x80, 0x00, 0x2c, in csot_pna957qt1_1_init()
314 0x80, 0x3c, 0x9f, 0x22, 0x20, 0x00, 0x00, 0x98, 0x51); in csot_pna957qt1_1_init()
315 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCYC, 0x41, 0x41, 0x41, 0x41, 0x64, 0x64, in csot_pna957qt1_1_init()
316 0x40, 0x84, 0x64, 0x84, 0x01, 0x9d, 0x01, 0x02, 0x01, 0x00, in csot_pna957qt1_1_init()
317 0x00); in csot_pna957qt1_1_init()
318 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETVDC, 0x1b, 0x04); in csot_pna957qt1_1_init()
319 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_UNKNOWN_BE, 0x20); in csot_pna957qt1_1_init()
320 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPTBA, 0xfc, 0xc4, 0x80, 0x9c, 0x36, 0x00, in csot_pna957qt1_1_init()
321 0x0d, 0x04); in csot_pna957qt1_1_init()
322 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSTBA, 0x32, 0x32, 0x22, 0x11, 0x22, 0xa0, in csot_pna957qt1_1_init()
323 0x31, 0x08, 0xf5, 0x03); in csot_pna957qt1_1_init()
324 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xcc); in csot_pna957qt1_1_init()
325 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETTCON, 0x80); in csot_pna957qt1_1_init()
326 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in csot_pna957qt1_1_init()
327 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xc6); in csot_pna957qt1_1_init()
328 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETRAMDMY, 0x97); in csot_pna957qt1_1_init()
329 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in csot_pna957qt1_1_init()
330 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPWM, 0x00, 0x1e, 0x13, 0x88, 0x01); in csot_pna957qt1_1_init()
331 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCLOCK, 0x08, 0x13, 0x07, 0x00, 0x0f, in csot_pna957qt1_1_init()
332 0x36); in csot_pna957qt1_1_init()
333 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPANEL, 0x02, 0x03, 0x44); in csot_pna957qt1_1_init()
334 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPCTRL, 0x07, 0x06, 0x00, 0x02, 0x04, 0x2c, in csot_pna957qt1_1_init()
335 0xff); in csot_pna957qt1_1_init()
336 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP0, 0x06, 0x00, 0x00, 0x00, 0x40, 0x04, in csot_pna957qt1_1_init()
337 0x08, 0x04, 0x08, 0x37, 0x07, 0x44, 0x37, 0x2b, 0x2b, 0x03, in csot_pna957qt1_1_init()
338 0x03, 0x32, 0x10, 0x22, 0x00, 0x25, 0x32, 0x10, 0x29, 0x00, in csot_pna957qt1_1_init()
339 0x29, 0x32, 0x10, 0x08, 0x00, 0x08, 0x00, 0x00); in csot_pna957qt1_1_init()
340 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP1, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, in csot_pna957qt1_1_init()
341 0x18, 0x18, 0x18, 0x18, 0x07, 0x06, 0x07, 0x06, 0x05, 0x04, in csot_pna957qt1_1_init()
342 0x05, 0x04, 0x03, 0x02, 0x03, 0x02, 0x01, 0x00, 0x01, 0x00, in csot_pna957qt1_1_init()
343 0x18, 0x18, 0x25, 0x24, 0x25, 0x24, 0x1f, 0x1f, 0x1f, 0x1f, in csot_pna957qt1_1_init()
344 0x1e, 0x1e, 0x1e, 0x1e, 0x20, 0x20, 0x20, 0x20); in csot_pna957qt1_1_init()
345 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP3, 0x0a, 0x2a, 0xaa, 0x8a, 0xaa, 0xa0, in csot_pna957qt1_1_init()
346 0x0a, 0x2a, 0xaa, 0x8a, 0xaa, 0xa0); in csot_pna957qt1_1_init()
347 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGMA, 0x0a, 0x0e, 0x1a, 0x21, 0x28, 0x46, in csot_pna957qt1_1_init()
348 0x5c, 0x61, 0x63, 0x5e, 0x78, 0x7d, 0x80, 0x8e, 0x89, 0x90, in csot_pna957qt1_1_init()
349 0x98, 0xaa, 0xa8, 0x52, 0x59, 0x60, 0x6f, 0x06, 0x0a, 0x16, in csot_pna957qt1_1_init()
350 0x1d, 0x24, 0x46, 0x5c, 0x61, 0x6b, 0x66, 0x7c, 0x7d, 0x80, in csot_pna957qt1_1_init()
351 0x8e, 0x89, 0x90, 0x98, 0xaa, 0xa8, 0x52, 0x59, 0x60, 0x6f); in csot_pna957qt1_1_init()
352 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETTP1, 0xe0, 0x10, 0x10, 0x0d, 0x1e, 0x9d, in csot_pna957qt1_1_init()
353 0x02, 0x52, 0x9d, 0x14, 0x14); in csot_pna957qt1_1_init()
354 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x01); in csot_pna957qt1_1_init()
355 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPOWER, 0x01, 0x7f, 0x11, 0xfd); in csot_pna957qt1_1_init()
356 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xc5); in csot_pna957qt1_1_init()
357 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETMIPI, 0x4f); in csot_pna957qt1_1_init()
358 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in csot_pna957qt1_1_init()
359 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCLOCK, 0x86); in csot_pna957qt1_1_init()
360 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_UNKNOWN_D2, 0x64); in csot_pna957qt1_1_init()
361 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xc5); in csot_pna957qt1_1_init()
362 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP0, 0x00); in csot_pna957qt1_1_init()
363 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in csot_pna957qt1_1_init()
364 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP3, 0x0a, 0x2a, 0xaa, 0x8a, 0xaa, 0xa0, in csot_pna957qt1_1_init()
365 0x0a, 0x2a, 0xaa, 0x8a, 0xaa, 0xa0, 0x05, 0x15, 0x55, 0x45, in csot_pna957qt1_1_init()
366 0x55, 0x50, 0x05, 0x15, 0x55, 0x45, 0x55, 0x50); in csot_pna957qt1_1_init()
367 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETTP1, 0x02, 0x00, 0x24, 0x01, 0x7e, 0x0f, in csot_pna957qt1_1_init()
368 0x7c, 0x10, 0xa0, 0x00, 0x00); in csot_pna957qt1_1_init()
369 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x02); in csot_pna957qt1_1_init()
370 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCLOCK, 0x03, 0x07, 0x00, 0x10, 0x7b); in csot_pna957qt1_1_init()
371 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP3, 0x0f, 0x3f, 0xff, 0xcf, 0xff, 0xf0, in csot_pna957qt1_1_init()
372 0x0f, 0x3f, 0xff, 0xcf, 0xff, 0xf0); in csot_pna957qt1_1_init()
373 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETTP1, 0xfe, 0x01, 0xfe, 0x01, 0xfe, 0x01, in csot_pna957qt1_1_init()
374 0x00, 0x00, 0x00, 0x23, 0x00, 0x23, 0x81, 0x02, 0x40, 0x00, in csot_pna957qt1_1_init()
375 0x20, 0x9d, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, in csot_pna957qt1_1_init()
376 0x01, 0x00); in csot_pna957qt1_1_init()
377 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x03); in csot_pna957qt1_1_init()
378 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETDISP, 0x66, 0x81); in csot_pna957qt1_1_init()
379 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xc6); in csot_pna957qt1_1_init()
380 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCYC, 0x03, 0xff, 0xf8); in csot_pna957qt1_1_init()
381 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in csot_pna957qt1_1_init()
382 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP3, 0x0a, 0x2a, 0xaa, 0x8a, 0xaa, 0xa0, in csot_pna957qt1_1_init()
383 0x0a, 0x2a, 0xaa, 0x8a, 0xaa, 0xa0, 0x0f, 0x2a, 0xaa, 0x8a, in csot_pna957qt1_1_init()
384 0xaa, 0xf0, 0x0f, 0x2a, 0xaa, 0x8a, 0xaa, 0xf0, 0x0a, 0x2a, in csot_pna957qt1_1_init()
385 0xaa, 0x8a, 0xaa, 0xa0, 0x0a, 0x2a, 0xaa, 0x8a, 0xaa, 0xa0); in csot_pna957qt1_1_init()
386 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x00); in csot_pna957qt1_1_init()
401 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPOWER, 0x2c, 0xed, 0xed, 0x27, 0xe7, 0x52, in ivo_t109nw41_init()
402 0xf5, 0x39, 0x36, 0x36, 0x36, 0x36, 0x32, 0x8b, 0x11, 0x65, 0x00, 0x88, in ivo_t109nw41_init()
403 0xfa, 0xff, 0xff, 0x8f, 0xff, 0x08, 0xd6, 0x33); in ivo_t109nw41_init()
404 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETDISP, 0x00, 0x47, 0xb0, 0x80, 0x00, 0x12, in ivo_t109nw41_init()
405 0x71, 0x3c, 0xa3, 0x22, 0x20, 0x00, 0x00, 0x88, 0x01); in ivo_t109nw41_init()
406 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCYC, 0x35, 0x35, 0x43, 0x43, 0x35, 0x35, in ivo_t109nw41_init()
407 0x30, 0x7a, 0x30, 0x7a, 0x01, 0x9d); in ivo_t109nw41_init()
408 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xcd); in ivo_t109nw41_init()
409 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETMIPI, 0x84); in ivo_t109nw41_init()
410 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in ivo_t109nw41_init()
411 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETVDC, 0x1b, 0x04); in ivo_t109nw41_init()
412 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_UNKNOWN_BE, 0x20); in ivo_t109nw41_init()
413 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPTBA, 0xfc, 0xc4); in ivo_t109nw41_init()
414 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSTBA, 0x34, 0x34, 0x22, 0x11, 0x22, 0xa0, in ivo_t109nw41_init()
415 0x31, 0x08, 0xf5, 0x03); in ivo_t109nw41_init()
416 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xcc); in ivo_t109nw41_init()
417 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETTCON, 0x80); in ivo_t109nw41_init()
418 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in ivo_t109nw41_init()
419 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xd3); in ivo_t109nw41_init()
420 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETTCON, 0x22); in ivo_t109nw41_init()
421 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in ivo_t109nw41_init()
422 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xc6); in ivo_t109nw41_init()
423 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETRAMDMY, 0x97); in ivo_t109nw41_init()
424 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in ivo_t109nw41_init()
425 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPWM, 0x00, 0x1e, 0x13, 0x88, 0x01); in ivo_t109nw41_init()
426 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCLOCK, 0x08, 0x13, 0x07, 0x00, 0x0f, 0x34); in ivo_t109nw41_init()
427 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPANEL, 0x02, 0x03, 0x44); in ivo_t109nw41_init()
428 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xc4); in ivo_t109nw41_init()
429 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCASCADE, 0x03); in ivo_t109nw41_init()
430 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in ivo_t109nw41_init()
431 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPCTRL, 0x07, 0x06, 0x00, 0x02, 0x04, 0x2c, in ivo_t109nw41_init()
432 0xff); in ivo_t109nw41_init()
433 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP0, 0x06, 0x00, 0x00, 0x00, 0x00, 0x08, in ivo_t109nw41_init()
434 0x08, 0x08, 0x08, 0x37, 0x07, 0x64, 0x7c, 0x11, 0x11, 0x03, 0x03, 0x32, in ivo_t109nw41_init()
435 0x10, 0x0e, 0x00, 0x0e, 0x32, 0x17, 0x97, 0x07, 0x97, 0x32, 0x00, 0x02, in ivo_t109nw41_init()
436 0x00, 0x02, 0x00, 0x00); in ivo_t109nw41_init()
437 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP1, 0x25, 0x24, 0x25, 0x24, 0x18, 0x18, in ivo_t109nw41_init()
438 0x18, 0x18, 0x07, 0x06, 0x07, 0x06, 0x05, 0x04, 0x05, 0x04, 0x03, 0x02, in ivo_t109nw41_init()
439 0x03, 0x02, 0x01, 0x00, 0x01, 0x00, 0x1e, 0x1e, 0x1e, 0x1e, 0x1f, 0x1f, in ivo_t109nw41_init()
440 0x1f, 0x1f, 0x21, 0x20, 0x21, 0x20, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, in ivo_t109nw41_init()
441 0x18, 0x18); in ivo_t109nw41_init()
442 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP3, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xa0, in ivo_t109nw41_init()
443 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xa0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, in ivo_t109nw41_init()
444 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, in ivo_t109nw41_init()
445 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); in ivo_t109nw41_init()
446 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGMA, 0x00, 0x07, 0x10, 0x17, 0x1c, 0x33, in ivo_t109nw41_init()
447 0x48, 0x50, 0x57, 0x50, 0x68, 0x6e, 0x71, 0x7f, 0x81, 0x8a, 0x8e, 0x9b, in ivo_t109nw41_init()
448 0x9c, 0x4d, 0x56, 0x5d, 0x73, 0x00, 0x07, 0x10, 0x17, 0x1c, 0x33, 0x48, in ivo_t109nw41_init()
449 0x50, 0x57, 0x50, 0x68, 0x6e, 0x71, 0x7f, 0x81, 0x8a, 0x8e, 0x9b, 0x9c, in ivo_t109nw41_init()
450 0x4d, 0x56, 0x5d, 0x73); in ivo_t109nw41_init()
451 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETTP1, 0x07, 0x10, 0x10, 0x1a, 0x26, 0x9e, in ivo_t109nw41_init()
452 0x00, 0x4f, 0xa0, 0x14, 0x14, 0x00, 0x00, 0x00, 0x00, 0x12, 0x0a, 0x02, in ivo_t109nw41_init()
453 0x02, 0x00, 0x33, 0x02, 0x04, 0x18, 0x01); in ivo_t109nw41_init()
454 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x01); in ivo_t109nw41_init()
455 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPOWER, 0x01, 0x7f, 0x11, 0xfd); in ivo_t109nw41_init()
456 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCLOCK, 0x86); in ivo_t109nw41_init()
457 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP0, 0x00, 0x00, 0x04, 0x00, 0x00); in ivo_t109nw41_init()
458 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP3, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, in ivo_t109nw41_init()
459 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xa0, in ivo_t109nw41_init()
460 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xa0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, in ivo_t109nw41_init()
461 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); in ivo_t109nw41_init()
462 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETTP1, 0x02, 0x00, 0x2b, 0x01, 0x7e, 0x0f, in ivo_t109nw41_init()
463 0x7e, 0x10, 0xa0, 0x00, 0x00, 0x77, 0x00, 0x00, 0x00); in ivo_t109nw41_init()
464 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x02); in ivo_t109nw41_init()
465 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPTBA, 0xf2); in ivo_t109nw41_init()
466 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCLOCK, 0x03, 0x07, 0x00, 0x10, 0x79); in ivo_t109nw41_init()
467 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP3, 0xff, 0xff, 0xff, 0xff, 0xfa, 0xa0, in ivo_t109nw41_init()
468 0xff, 0xff, 0xff, 0xff, 0xfa, 0xa0); in ivo_t109nw41_init()
469 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETTP1, 0xfe, 0x01, 0xfe, 0x01, 0xfe, 0x01, in ivo_t109nw41_init()
470 0x00, 0x00, 0x00, 0x23, 0x00, 0x23, 0x81, 0x02, 0x40, 0x00, 0x20, 0x6e, in ivo_t109nw41_init()
471 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); in ivo_t109nw41_init()
472 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x03); in ivo_t109nw41_init()
473 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xa0, in ivo_t109nw41_init()
474 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xa0, 0xff, 0xff, 0xff, 0xff, 0xfa, 0xa0, in ivo_t109nw41_init()
475 0xff, 0xff, 0xff, 0xff, 0xfa, 0xa0, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xa0, in ivo_t109nw41_init()
476 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xa0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, in ivo_t109nw41_init()
477 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); in ivo_t109nw41_init()
478 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xc6); in ivo_t109nw41_init()
479 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCYC, 0x03, 0xff, 0xf8); in ivo_t109nw41_init()
480 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in ivo_t109nw41_init()
481 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_UNKNOWN_E1, 0x00); in ivo_t109nw41_init()
482 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x00); in ivo_t109nw41_init()
483 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_UNKNOWN_D2, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff); in ivo_t109nw41_init()
484 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xc4); in ivo_t109nw41_init()
485 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETMIPI, 0x96); in ivo_t109nw41_init()
486 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in ivo_t109nw41_init()
487 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x01); in ivo_t109nw41_init()
488 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xc5); in ivo_t109nw41_init()
489 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETMIPI, 0x4f); in ivo_t109nw41_init()
490 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in ivo_t109nw41_init()
491 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x00); in ivo_t109nw41_init()
506 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xc4); in kingdisplay_kd110n11_51ie_init()
507 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_UNKNOWN_D9, 0xd1); in kingdisplay_kd110n11_51ie_init()
508 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in kingdisplay_kd110n11_51ie_init()
509 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPOWER, 0x2c, 0xb3, 0xb3, 0x31, 0xf1, in kingdisplay_kd110n11_51ie_init()
510 0x33, 0xe0, 0x54, 0x36, 0x36, 0x3a, 0x3a, 0x32, 0x8b, in kingdisplay_kd110n11_51ie_init()
511 0x11, 0xe5, 0x98); in kingdisplay_kd110n11_51ie_init()
512 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xd9); in kingdisplay_kd110n11_51ie_init()
513 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPOWER, 0x8b, 0x33); in kingdisplay_kd110n11_51ie_init()
514 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in kingdisplay_kd110n11_51ie_init()
515 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETDISP, 0x00, 0x47, 0xb0, 0x80, 0x00, 0x2c, in kingdisplay_kd110n11_51ie_init()
516 0x80, 0x3c, 0x9f, 0x22, 0x20, 0x00, 0x00, 0x98, 0x51); in kingdisplay_kd110n11_51ie_init()
517 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCYC, 0x64, 0x64, 0x64, 0x64, 0x64, 0x64, in kingdisplay_kd110n11_51ie_init()
518 0x40, 0x84, 0x64, 0x84, 0x01, 0x9d, 0x01, 0x02, 0x01, 0x00, in kingdisplay_kd110n11_51ie_init()
519 0x00); in kingdisplay_kd110n11_51ie_init()
520 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETVDC, 0x1b, 0x04); in kingdisplay_kd110n11_51ie_init()
521 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_UNKNOWN_BE, 0x20); in kingdisplay_kd110n11_51ie_init()
522 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPTBA, 0xfc, 0xc4, 0x80, 0x9c, 0x36, 0x00, in kingdisplay_kd110n11_51ie_init()
523 0x0d, 0x04); in kingdisplay_kd110n11_51ie_init()
524 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSTBA, 0x32, 0x32, 0x22, 0x11, 0x22, 0xa0, in kingdisplay_kd110n11_51ie_init()
525 0x31, 0x08, 0xf5, 0x03); in kingdisplay_kd110n11_51ie_init()
526 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xcc); in kingdisplay_kd110n11_51ie_init()
527 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETTCON, 0x80); in kingdisplay_kd110n11_51ie_init()
528 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in kingdisplay_kd110n11_51ie_init()
529 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xc6); in kingdisplay_kd110n11_51ie_init()
530 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETRAMDMY, 0x97); in kingdisplay_kd110n11_51ie_init()
531 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in kingdisplay_kd110n11_51ie_init()
532 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPWM, 0x00, 0x1e, 0x13, 0x88, 0x01); in kingdisplay_kd110n11_51ie_init()
533 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCLOCK, 0x08, 0x13, 0x07, 0x00, in kingdisplay_kd110n11_51ie_init()
534 0x0f, 0x36); in kingdisplay_kd110n11_51ie_init()
535 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPANEL, 0x02, 0x03, 0x44); in kingdisplay_kd110n11_51ie_init()
536 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPCTRL, 0x07, 0x06, 0x00, 0x02, in kingdisplay_kd110n11_51ie_init()
537 0x04, 0x2c, 0xff); in kingdisplay_kd110n11_51ie_init()
538 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP0, 0x06, 0x00, 0x00, 0x00, 0x40, 0x04, in kingdisplay_kd110n11_51ie_init()
539 0x08, 0x04, 0x08, 0x37, 0x07, 0x44, 0x37, 0x2b, 0x2b, 0x03, in kingdisplay_kd110n11_51ie_init()
540 0x03, 0x32, 0x10, 0x22, 0x00, 0x25, 0x32, 0x10, 0x29, 0x00, in kingdisplay_kd110n11_51ie_init()
541 0x29, 0x32, 0x10, 0x08, 0x00, 0x08, 0x00, 0x00); in kingdisplay_kd110n11_51ie_init()
542 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP1, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, in kingdisplay_kd110n11_51ie_init()
543 0x18, 0x18, 0x18, 0x18, 0x07, 0x06, 0x07, 0x06, 0x05, 0x04, in kingdisplay_kd110n11_51ie_init()
544 0x05, 0x04, 0x03, 0x02, 0x03, 0x02, 0x01, 0x00, 0x01, 0x00, in kingdisplay_kd110n11_51ie_init()
545 0x18, 0x18, 0x25, 0x24, 0x25, 0x24, 0x1f, 0x1f, 0x1f, 0x1f, in kingdisplay_kd110n11_51ie_init()
546 0x1e, 0x1e, 0x1e, 0x1e, 0x20, 0x20, 0x20, 0x20); in kingdisplay_kd110n11_51ie_init()
547 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP3, 0x0a, 0x2a, 0xaa, 0x8a, 0xaa, 0xa0, in kingdisplay_kd110n11_51ie_init()
548 0x0a, 0x2a, 0xaa, 0x8a, 0xaa, 0xa0); in kingdisplay_kd110n11_51ie_init()
549 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETTP1, 0xe0, 0x10, 0x10, 0x0d, 0x1e, 0x9d, in kingdisplay_kd110n11_51ie_init()
550 0x02, 0x52, 0x9d, 0x14, 0x14); in kingdisplay_kd110n11_51ie_init()
551 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x01); in kingdisplay_kd110n11_51ie_init()
552 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPOWER, 0x01, 0x7f, 0x11, 0xfd); in kingdisplay_kd110n11_51ie_init()
553 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xc5); in kingdisplay_kd110n11_51ie_init()
554 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETMIPI, 0x4f); in kingdisplay_kd110n11_51ie_init()
555 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in kingdisplay_kd110n11_51ie_init()
556 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCLOCK, 0x86); in kingdisplay_kd110n11_51ie_init()
557 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_UNKNOWN_D2, 0x64); in kingdisplay_kd110n11_51ie_init()
558 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xc5); in kingdisplay_kd110n11_51ie_init()
559 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP0, 0x00); in kingdisplay_kd110n11_51ie_init()
560 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in kingdisplay_kd110n11_51ie_init()
561 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP3, 0x0a, 0x2a, 0xaa, 0x8a, 0xaa, 0xa0, in kingdisplay_kd110n11_51ie_init()
562 0x0a, 0x2a, 0xaa, 0x8a, 0xaa, 0xa0, 0x05, 0x15, 0x55, 0x45, in kingdisplay_kd110n11_51ie_init()
563 0x55, 0x50, 0x05, 0x15, 0x55, 0x45, 0x55, 0x50); in kingdisplay_kd110n11_51ie_init()
564 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETTP1, 0x02, 0x00, 0x24, 0x01, 0x7e, 0x0f, in kingdisplay_kd110n11_51ie_init()
565 0x7c, 0x10, 0xa0, 0x00, 0x00); in kingdisplay_kd110n11_51ie_init()
566 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x02); in kingdisplay_kd110n11_51ie_init()
567 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCLOCK, 0x03, 0x07, 0x00, 0x10, 0x7b); in kingdisplay_kd110n11_51ie_init()
568 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP3, 0x0f, 0x3f, 0xff, 0xcf, 0xff, 0xf0, in kingdisplay_kd110n11_51ie_init()
569 0x0f, 0x3f, 0xff, 0xcf, 0xff, 0xf0); in kingdisplay_kd110n11_51ie_init()
570 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETTP1, 0xfe, 0x01, 0xfe, 0x01, 0xfe, 0x01, in kingdisplay_kd110n11_51ie_init()
571 0x00, 0x00, 0x00, 0x23, 0x00, 0x23, 0x81, 0x02, 0x40, 0x00, in kingdisplay_kd110n11_51ie_init()
572 0x20, 0x9d, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, in kingdisplay_kd110n11_51ie_init()
573 0x01, 0x00); in kingdisplay_kd110n11_51ie_init()
574 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x03); in kingdisplay_kd110n11_51ie_init()
575 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETDISP, 0x66, 0x81); in kingdisplay_kd110n11_51ie_init()
576 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xc6); in kingdisplay_kd110n11_51ie_init()
577 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCYC, 0x03, 0xff, 0xf8); in kingdisplay_kd110n11_51ie_init()
578 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in kingdisplay_kd110n11_51ie_init()
579 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP3, 0x0a, 0x2a, 0xaa, 0x8a, 0xaa, 0xa0, in kingdisplay_kd110n11_51ie_init()
580 0x0a, 0x2a, 0xaa, 0x8a, 0xaa, 0xa0, 0x0f, 0x2a, 0xaa, 0x8a, in kingdisplay_kd110n11_51ie_init()
581 0xaa, 0xf0, 0x0f, 0x2a, 0xaa, 0x8a, 0xaa, 0xf0, 0x0a, 0x2a, in kingdisplay_kd110n11_51ie_init()
582 0xaa, 0x8a, 0xaa, 0xa0, 0x0a, 0x2a, 0xaa, 0x8a, 0xaa, 0xa0); in kingdisplay_kd110n11_51ie_init()
583 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x00); in kingdisplay_kd110n11_51ie_init()
596 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xc4); in starry_2082109qfh040022_50e_init()
597 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_UNKNOWN_D9, 0xd1); in starry_2082109qfh040022_50e_init()
598 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in starry_2082109qfh040022_50e_init()
599 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPOWER, 0x2c, 0xb5, 0xb5, 0x31, 0xf1, 0x33, in starry_2082109qfh040022_50e_init()
600 0xc3, 0x57, 0x36, 0x36, 0x36, 0x36, 0x1a, 0x8b, 0x11, 0x65, in starry_2082109qfh040022_50e_init()
601 0x00, 0x88, 0xfa, 0xff, 0xff, 0x8f, 0xff, 0x08, 0x3c, 0x33); in starry_2082109qfh040022_50e_init()
602 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETDISP, 0x00, 0x47, 0xb0, 0x80, 0x00, 0x22, in starry_2082109qfh040022_50e_init()
603 0x70, 0x3c, 0xa1, 0x22, 0x00, 0x00, 0x00, 0x88, 0xf4); in starry_2082109qfh040022_50e_init()
604 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCYC, 0x14, 0x16, 0x14, 0x50, 0x14, 0x50, in starry_2082109qfh040022_50e_init()
605 0x0d, 0x6a, 0x0d, 0x6a, 0x01, 0x9e); in starry_2082109qfh040022_50e_init()
606 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_UNKNOWN_B6, 0x34, 0x34, 0x03); in starry_2082109qfh040022_50e_init()
607 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_UNKNOWN_B8, 0x40); in starry_2082109qfh040022_50e_init()
608 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xcd); in starry_2082109qfh040022_50e_init()
609 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETMIPI, 0x84); in starry_2082109qfh040022_50e_init()
610 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in starry_2082109qfh040022_50e_init()
611 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETVDC, 0x1b, 0x04); in starry_2082109qfh040022_50e_init()
612 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_UNKNOWN_BE, 0x20); in starry_2082109qfh040022_50e_init()
613 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPTBA, 0xfc, 0xc4); in starry_2082109qfh040022_50e_init()
614 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSTBA, 0x38, 0x38, 0x22, 0x11, 0x33, 0xa0, in starry_2082109qfh040022_50e_init()
615 0x61, 0x08, 0xf5, 0x03); in starry_2082109qfh040022_50e_init()
616 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xcc); in starry_2082109qfh040022_50e_init()
617 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETTCON, 0x80); in starry_2082109qfh040022_50e_init()
618 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in starry_2082109qfh040022_50e_init()
619 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xc6); in starry_2082109qfh040022_50e_init()
620 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETRAMDMY, 0x97); in starry_2082109qfh040022_50e_init()
621 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in starry_2082109qfh040022_50e_init()
622 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPWM, 0x00, 0x1e, 0x30, 0xd4, 0x01); in starry_2082109qfh040022_50e_init()
623 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCLOCK, 0x08, 0x13, 0x07, 0x00, 0x0f, in starry_2082109qfh040022_50e_init()
624 0x16); in starry_2082109qfh040022_50e_init()
625 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPANEL, 0x02, 0x03, 0x44); in starry_2082109qfh040022_50e_init()
626 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xc4); in starry_2082109qfh040022_50e_init()
627 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCASCADE, 0x03); in starry_2082109qfh040022_50e_init()
628 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in starry_2082109qfh040022_50e_init()
629 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPCTRL, 0x37, 0x06, 0x00, 0x02, 0x04, in starry_2082109qfh040022_50e_init()
630 0x2c, 0xff); in starry_2082109qfh040022_50e_init()
631 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP0, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, in starry_2082109qfh040022_50e_init()
632 0x00, 0x00, 0x00, 0x3b, 0x03, 0x73, 0x3b, 0x21, 0x21, 0x03, in starry_2082109qfh040022_50e_init()
633 0x03, 0x98, 0x10, 0x1d, 0x00, 0x1d, 0x32, 0x17, 0xa1, 0x07, in starry_2082109qfh040022_50e_init()
634 0xa1, 0x43, 0x17, 0xa6, 0x07, 0xa6, 0x00, 0x00); in starry_2082109qfh040022_50e_init()
635 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP1, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, in starry_2082109qfh040022_50e_init()
636 0x40, 0x40, 0x18, 0x18, 0x18, 0x18, 0x2a, 0x2b, 0x1f, 0x1f, in starry_2082109qfh040022_50e_init()
637 0x1e, 0x1e, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b, in starry_2082109qfh040022_50e_init()
638 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, in starry_2082109qfh040022_50e_init()
639 0x0a, 0x0b, 0x20, 0x21, 0x18, 0x18, 0x18, 0x18); in starry_2082109qfh040022_50e_init()
640 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP3, 0x02, 0xaa, 0xea, 0xaa, 0xaa, 0x00, in starry_2082109qfh040022_50e_init()
641 0x02, 0xaa, 0xea, 0xaa, 0xaa, 0x00, 0x00, 0x00, 0x00, 0x00, in starry_2082109qfh040022_50e_init()
642 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, in starry_2082109qfh040022_50e_init()
643 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); in starry_2082109qfh040022_50e_init()
644 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETTP1, 0x07, 0x10, 0x10, 0x2a, 0x32, 0x9f, in starry_2082109qfh040022_50e_init()
645 0x01, 0x5a, 0x91, 0x14, 0x14, 0x00, 0x00, 0x00, 0x00, 0x12, in starry_2082109qfh040022_50e_init()
646 0x05, 0x02, 0x02, 0x10, 0x33, 0x02, 0x04, 0x18, 0x01); in starry_2082109qfh040022_50e_init()
647 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x01); in starry_2082109qfh040022_50e_init()
648 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPOWER, 0x01, 0x7f, 0x11, 0xfd); in starry_2082109qfh040022_50e_init()
649 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCLOCK, 0x86); in starry_2082109qfh040022_50e_init()
650 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_UNKNOWN_D2, 0x3d); in starry_2082109qfh040022_50e_init()
651 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xc5); in starry_2082109qfh040022_50e_init()
652 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP0, 0x00, 0x00, 0x00, 0x80, 0x80, 0x0c, in starry_2082109qfh040022_50e_init()
653 0xa1); in starry_2082109qfh040022_50e_init()
654 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in starry_2082109qfh040022_50e_init()
655 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP3, 0x03, 0xff, 0xff, 0xff, 0xff, 0x00, in starry_2082109qfh040022_50e_init()
656 0x03, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, in starry_2082109qfh040022_50e_init()
657 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, in starry_2082109qfh040022_50e_init()
658 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); in starry_2082109qfh040022_50e_init()
659 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETTP1, 0x02, 0x00, 0x2d, 0x01, 0x7f, 0x0f, in starry_2082109qfh040022_50e_init()
660 0x7c, 0x10, 0xa0, 0x00, 0x00, 0x77, 0x00, 0x00, 0x00); in starry_2082109qfh040022_50e_init()
661 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x02); in starry_2082109qfh040022_50e_init()
662 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPTBA, 0xf2); in starry_2082109qfh040022_50e_init()
663 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCLOCK, 0x02, 0x00, 0x00, 0x10, 0x58); in starry_2082109qfh040022_50e_init()
664 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_UNKNOWN_D2, 0x0a, 0x0a, 0x05, 0x03, 0x0a, in starry_2082109qfh040022_50e_init()
665 0x0a, 0x01, 0x03, 0x01, 0x01, 0x05, 0x0e); in starry_2082109qfh040022_50e_init()
666 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xcc); in starry_2082109qfh040022_50e_init()
667 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP0, 0x03, 0x1f, 0xe0, 0x11, 0x70); in starry_2082109qfh040022_50e_init()
668 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in starry_2082109qfh040022_50e_init()
669 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP3, 0xab, 0xff, 0xff, 0xff, 0xff, 0xa0, in starry_2082109qfh040022_50e_init()
670 0xab, 0xff, 0xff, 0xff, 0xff, 0xa0); in starry_2082109qfh040022_50e_init()
671 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETTP1, 0xfe, 0x01, 0xfe, 0x01, 0xfe, 0x01, in starry_2082109qfh040022_50e_init()
672 0x00, 0x00, 0x00, 0x03, 0x00, 0x03, 0x81, 0x02, 0x40, 0x00, in starry_2082109qfh040022_50e_init()
673 0x20, 0x9e, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, in starry_2082109qfh040022_50e_init()
674 0x00, 0x00); in starry_2082109qfh040022_50e_init()
675 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x03); in starry_2082109qfh040022_50e_init()
676 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xc6); in starry_2082109qfh040022_50e_init()
677 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETCYC, 0x03, 0xff, 0xf8); in starry_2082109qfh040022_50e_init()
678 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in starry_2082109qfh040022_50e_init()
679 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETGIP3, 0xaa, 0xab, 0xea, 0xaa, 0xaa, 0xa0, in starry_2082109qfh040022_50e_init()
680 0xaa, 0xab, 0xea, 0xaa, 0xaa, 0xa0, 0xaa, 0xbf, 0xff, 0xff, in starry_2082109qfh040022_50e_init()
681 0xfe, 0xa0, 0xaa, 0xbf, 0xff, 0xff, 0xfe, 0xa0, 0xaa, 0xaa, in starry_2082109qfh040022_50e_init()
682 0xaa, 0xaa, 0xaa, 0xa0, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xa0); in starry_2082109qfh040022_50e_init()
683 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_UNKNOWN_E1, 0x00); in starry_2082109qfh040022_50e_init()
684 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x00); in starry_2082109qfh040022_50e_init()
685 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xc4); in starry_2082109qfh040022_50e_init()
686 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETMIPI, 0x96); in starry_2082109qfh040022_50e_init()
687 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in starry_2082109qfh040022_50e_init()
688 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x01); in starry_2082109qfh040022_50e_init()
689 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xc5); in starry_2082109qfh040022_50e_init()
690 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETMIPI, 0x4f); in starry_2082109qfh040022_50e_init()
691 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in starry_2082109qfh040022_50e_init()
692 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x02); in starry_2082109qfh040022_50e_init()
693 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xcc); in starry_2082109qfh040022_50e_init()
694 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETMIPI, 0x84); in starry_2082109qfh040022_50e_init()
695 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in starry_2082109qfh040022_50e_init()
696 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x00); in starry_2082109qfh040022_50e_init()
839 return 0; in hx83102_enable()
862 gpiod_set_value(ctx->enable_gpio, 0); in hx83102_unprepare()
869 return 0; in hx83102_unprepare()
878 gpiod_set_value(ctx->enable_gpio, 0); in hx83102_prepare()
904 gpiod_set_value(ctx->enable_gpio, 0); in hx83102_prepare()
917 return 0; in hx83102_prepare()
920 gpiod_set_value(ctx->enable_gpio, 0); in hx83102_prepare()
995 if (err < 0) in hx83102_panel_add()
1007 return 0; in hx83102_panel_add()
1028 if (ret < 0) in hx83102_probe()
1046 if (ret < 0) in hx83102_remove()