28 #include <nvfw/sec2.h>
31 ga102_sec2_initmsg(struct nvkm_sec2 *sec2)  in ga102_sec2_initmsg()  argument
36 	ret = nvkm_falcon_msgq_recv_initmsg(sec2->msgq, &msg, sizeof(msg));  in ga102_sec2_initmsg()
46 			nvkm_falcon_msgq_init(sec2->msgq, msg.queue_info[i].index,  in ga102_sec2_initmsg()
50 			nvkm_falcon_cmdq_init(sec2->cmdq, msg.queue_info[i].index,  in ga102_sec2_initmsg()
60 ga102_sec2_intr_vector(struct nvkm_sec2 *sec2, enum nvkm_intr_type *pvector)  in ga102_sec2_intr_vector()  argument
62 	struct nvkm_device *device = sec2->engine.subdev.device;  in ga102_sec2_intr_vector()
63 	struct nvkm_falcon *falcon = &sec2->falcon;  in ga102_sec2_intr_vector()
95 	struct nvkm_sec2 *sec2 = container_of(falcon, typeof(*sec2), falcon);  in ga102_sec2_acr_bootstrap_falcon()  local
97 		.cmd.hdr.unit_id = sec2->func->unit_acr,  in ga102_sec2_acr_bootstrap_falcon()
104 	return nvkm_falcon_cmdq_send(sec2->cmdq, &cmd.cmd.hdr,  in ga102_sec2_acr_bootstrap_falcon()
106 				     &sec2->engine.subdev,  in ga102_sec2_acr_bootstrap_falcon()
151 MODULE_FIRMWARE("nvidia/ga102/sec2/desc.bin");
152 MODULE_FIRMWARE("nvidia/ga102/sec2/image.bin");
153 MODULE_FIRMWARE("nvidia/ga102/sec2/sig.bin");
154 MODULE_FIRMWARE("nvidia/ga102/sec2/hs_bl_sig.bin");
156 MODULE_FIRMWARE("nvidia/ga103/sec2/desc.bin");
157 MODULE_FIRMWARE("nvidia/ga103/sec2/image.bin");
158 MODULE_FIRMWARE("nvidia/ga103/sec2/sig.bin");
159 MODULE_FIRMWARE("nvidia/ga103/sec2/hs_bl_sig.bin");
161 MODULE_FIRMWARE("nvidia/ga104/sec2/desc.bin");
162 MODULE_FIRMWARE("nvidia/ga104/sec2/image.bin");
163 MODULE_FIRMWARE("nvidia/ga104/sec2/sig.bin");
164 MODULE_FIRMWARE("nvidia/ga104/sec2/hs_bl_sig.bin");
166 MODULE_FIRMWARE("nvidia/ga106/sec2/desc.bin");
167 MODULE_FIRMWARE("nvidia/ga106/sec2/image.bin");
168 MODULE_FIRMWARE("nvidia/ga106/sec2/sig.bin");
169 MODULE_FIRMWARE("nvidia/ga106/sec2/hs_bl_sig.bin");
171 MODULE_FIRMWARE("nvidia/ga107/sec2/desc.bin");
172 MODULE_FIRMWARE("nvidia/ga107/sec2/image.bin");
173 MODULE_FIRMWARE("nvidia/ga107/sec2/sig.bin");
174 MODULE_FIRMWARE("nvidia/ga107/sec2/hs_bl_sig.bin");
177 ga102_sec2_load(struct nvkm_sec2 *sec2, int ver,  in ga102_sec2_load()  argument
180 	return nvkm_acr_lsfw_load_sig_image_desc_v2(&sec2->engine.subdev, &sec2->falcon,  in ga102_sec2_load()
181 						    NVKM_ACR_LSF_SEC2, "sec2/", ver, fwif->acr);  in ga102_sec2_load()