Lines Matching full:gpu
25 static int enable_pwrrail(struct msm_gpu *gpu) in enable_pwrrail() argument
27 struct drm_device *dev = gpu->dev; in enable_pwrrail()
30 if (gpu->gpu_reg) { in enable_pwrrail()
31 ret = regulator_enable(gpu->gpu_reg); in enable_pwrrail()
38 if (gpu->gpu_cx) { in enable_pwrrail()
39 ret = regulator_enable(gpu->gpu_cx); in enable_pwrrail()
49 static int disable_pwrrail(struct msm_gpu *gpu) in disable_pwrrail() argument
51 if (gpu->gpu_cx) in disable_pwrrail()
52 regulator_disable(gpu->gpu_cx); in disable_pwrrail()
53 if (gpu->gpu_reg) in disable_pwrrail()
54 regulator_disable(gpu->gpu_reg); in disable_pwrrail()
58 static int enable_clk(struct msm_gpu *gpu) in enable_clk() argument
60 if (gpu->core_clk && gpu->fast_rate) in enable_clk()
61 dev_pm_opp_set_rate(&gpu->pdev->dev, gpu->fast_rate); in enable_clk()
64 if (gpu->rbbmtimer_clk) in enable_clk()
65 clk_set_rate(gpu->rbbmtimer_clk, 19200000); in enable_clk()
67 return clk_bulk_prepare_enable(gpu->nr_clocks, gpu->grp_clks); in enable_clk()
70 static int disable_clk(struct msm_gpu *gpu) in disable_clk() argument
72 clk_bulk_disable_unprepare(gpu->nr_clocks, gpu->grp_clks); in disable_clk()
79 if (gpu->core_clk) in disable_clk()
80 dev_pm_opp_set_rate(&gpu->pdev->dev, 27000000); in disable_clk()
82 if (gpu->rbbmtimer_clk) in disable_clk()
83 clk_set_rate(gpu->rbbmtimer_clk, 0); in disable_clk()
88 static int enable_axi(struct msm_gpu *gpu) in enable_axi() argument
90 return clk_prepare_enable(gpu->ebi1_clk); in enable_axi()
93 static int disable_axi(struct msm_gpu *gpu) in disable_axi() argument
95 clk_disable_unprepare(gpu->ebi1_clk); in disable_axi()
99 int msm_gpu_pm_resume(struct msm_gpu *gpu) in msm_gpu_pm_resume() argument
103 DBG("%s", gpu->name); in msm_gpu_pm_resume()
106 ret = enable_pwrrail(gpu); in msm_gpu_pm_resume()
110 ret = enable_clk(gpu); in msm_gpu_pm_resume()
114 ret = enable_axi(gpu); in msm_gpu_pm_resume()
118 msm_devfreq_resume(gpu); in msm_gpu_pm_resume()
120 gpu->needs_hw_init = true; in msm_gpu_pm_resume()
125 int msm_gpu_pm_suspend(struct msm_gpu *gpu) in msm_gpu_pm_suspend() argument
129 DBG("%s", gpu->name); in msm_gpu_pm_suspend()
132 msm_devfreq_suspend(gpu); in msm_gpu_pm_suspend()
134 ret = disable_axi(gpu); in msm_gpu_pm_suspend()
138 ret = disable_clk(gpu); in msm_gpu_pm_suspend()
142 ret = disable_pwrrail(gpu); in msm_gpu_pm_suspend()
146 gpu->suspend_count++; in msm_gpu_pm_suspend()
151 void msm_gpu_show_fdinfo(struct msm_gpu *gpu, struct msm_file_private *ctx, in msm_gpu_show_fdinfo() argument
154 drm_printf(p, "drm-engine-gpu:\t%llu ns\n", ctx->elapsed_ns); in msm_gpu_show_fdinfo()
155 drm_printf(p, "drm-cycles-gpu:\t%llu\n", ctx->cycles); in msm_gpu_show_fdinfo()
156 drm_printf(p, "drm-maxfreq-gpu:\t%u Hz\n", gpu->fast_rate); in msm_gpu_show_fdinfo()
159 int msm_gpu_hw_init(struct msm_gpu *gpu) in msm_gpu_hw_init() argument
163 WARN_ON(!mutex_is_locked(&gpu->lock)); in msm_gpu_hw_init()
165 if (!gpu->needs_hw_init) in msm_gpu_hw_init()
168 disable_irq(gpu->irq); in msm_gpu_hw_init()
169 ret = gpu->funcs->hw_init(gpu); in msm_gpu_hw_init()
171 gpu->needs_hw_init = false; in msm_gpu_hw_init()
172 enable_irq(gpu->irq); in msm_gpu_hw_init()
181 struct msm_gpu *gpu = data; in msm_gpu_devcoredump_read() local
186 state = msm_gpu_crashstate_get(gpu); in msm_gpu_devcoredump_read()
207 gpu->funcs->show(gpu, state, &p); in msm_gpu_devcoredump_read()
209 msm_gpu_crashstate_put(gpu); in msm_gpu_devcoredump_read()
216 struct msm_gpu *gpu = data; in msm_gpu_devcoredump_free() local
218 msm_gpu_crashstate_put(gpu); in msm_gpu_devcoredump_free()
259 static void msm_gpu_crashstate_capture(struct msm_gpu *gpu, in msm_gpu_crashstate_capture() argument
265 if (!gpu->funcs->gpu_state_get) in msm_gpu_crashstate_capture()
269 if (gpu->crashstate) in msm_gpu_crashstate_capture()
272 state = gpu->funcs->gpu_state_get(gpu); in msm_gpu_crashstate_capture()
279 state->fault_info = gpu->fault_info; in msm_gpu_crashstate_capture()
304 gpu->crashstate = state; in msm_gpu_crashstate_capture()
306 dev_coredumpm(&gpu->pdev->dev, THIS_MODULE, gpu, 0, GFP_KERNEL, in msm_gpu_crashstate_capture()
310 static void msm_gpu_crashstate_capture(struct msm_gpu *gpu, in msm_gpu_crashstate_capture() argument
317 * Hangcheck detection for locked gpu:
338 static void retire_submits(struct msm_gpu *gpu);
345 WARN_ON(!mutex_is_locked(&submit->gpu->lock)); in get_comm_cmdline()
366 struct msm_gpu *gpu = container_of(work, struct msm_gpu, recover_work); in recover_worker() local
367 struct drm_device *dev = gpu->dev; in recover_worker()
370 struct msm_ringbuffer *cur_ring = gpu->funcs->active_ring(gpu); in recover_worker()
374 mutex_lock(&gpu->lock); in recover_worker()
376 DRM_DEV_ERROR(dev->dev, "%s: hangcheck recover!\n", gpu->name); in recover_worker()
382 * or waiting to acquire the gpu lock, then nothing more to do. in recover_worker()
396 gpu->name, comm, cmd); in recover_worker()
401 DRM_DEV_ERROR(dev->dev, "%s: offending task: unknown\n", gpu->name); in recover_worker()
407 pm_runtime_get_sync(&gpu->pdev->dev); in recover_worker()
408 msm_gpu_crashstate_capture(gpu, submit, comm, cmd); in recover_worker()
418 for (i = 0; i < gpu->nr_rings; i++) { in recover_worker()
419 struct msm_ringbuffer *ring = gpu->rb[i]; in recover_worker()
433 if (msm_gpu_active(gpu)) { in recover_worker()
435 retire_submits(gpu); in recover_worker()
437 gpu->funcs->recover(gpu); in recover_worker()
443 for (i = 0; i < gpu->nr_rings; i++) { in recover_worker()
444 struct msm_ringbuffer *ring = gpu->rb[i]; in recover_worker()
449 gpu->funcs->submit(gpu, submit); in recover_worker()
454 pm_runtime_put(&gpu->pdev->dev); in recover_worker()
457 mutex_unlock(&gpu->lock); in recover_worker()
459 msm_gpu_retire(gpu); in recover_worker()
464 struct msm_gpu *gpu = container_of(work, struct msm_gpu, fault_work); in fault_worker() local
466 struct msm_ringbuffer *cur_ring = gpu->funcs->active_ring(gpu); in fault_worker()
469 mutex_lock(&gpu->lock); in fault_worker()
479 * When we get GPU iova faults, we can get 1000s of them, in fault_worker()
486 pm_runtime_get_sync(&gpu->pdev->dev); in fault_worker()
487 msm_gpu_crashstate_capture(gpu, submit, comm, cmd); in fault_worker()
488 pm_runtime_put_sync(&gpu->pdev->dev); in fault_worker()
494 memset(&gpu->fault_info, 0, sizeof(gpu->fault_info)); in fault_worker()
495 gpu->aspace->mmu->funcs->resume_translation(gpu->aspace->mmu); in fault_worker()
497 mutex_unlock(&gpu->lock); in fault_worker()
500 static void hangcheck_timer_reset(struct msm_gpu *gpu) in hangcheck_timer_reset() argument
502 struct msm_drm_private *priv = gpu->dev->dev_private; in hangcheck_timer_reset()
503 mod_timer(&gpu->hangcheck_timer, in hangcheck_timer_reset()
507 static bool made_progress(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in made_progress() argument
512 if (!gpu->funcs->progress) in made_progress()
515 if (!gpu->funcs->progress(gpu, ring)) in made_progress()
524 struct msm_gpu *gpu = from_timer(gpu, t, hangcheck_timer); in hangcheck_handler() local
525 struct drm_device *dev = gpu->dev; in hangcheck_handler()
526 struct msm_ringbuffer *ring = gpu->funcs->active_ring(gpu); in hangcheck_handler()
534 !made_progress(gpu, ring)) { in hangcheck_handler()
538 DRM_DEV_ERROR(dev->dev, "%s: hangcheck detected gpu lockup rb %d!\n", in hangcheck_handler()
539 gpu->name, ring->id); in hangcheck_handler()
541 gpu->name, fence); in hangcheck_handler()
543 gpu->name, ring->fctx->last_fence); in hangcheck_handler()
545 kthread_queue_work(gpu->worker, &gpu->recover_work); in hangcheck_handler()
550 hangcheck_timer_reset(gpu); in hangcheck_handler()
553 msm_gpu_retire(gpu); in hangcheck_handler()
561 static int update_hw_cntrs(struct msm_gpu *gpu, uint32_t ncntrs, uint32_t *cntrs) in update_hw_cntrs() argument
563 uint32_t current_cntrs[ARRAY_SIZE(gpu->last_cntrs)]; in update_hw_cntrs()
564 int i, n = min(ncntrs, gpu->num_perfcntrs); in update_hw_cntrs()
567 for (i = 0; i < gpu->num_perfcntrs; i++) in update_hw_cntrs()
568 current_cntrs[i] = gpu_read(gpu, gpu->perfcntrs[i].sample_reg); in update_hw_cntrs()
572 cntrs[i] = current_cntrs[i] - gpu->last_cntrs[i]; in update_hw_cntrs()
575 for (i = 0; i < gpu->num_perfcntrs; i++) in update_hw_cntrs()
576 gpu->last_cntrs[i] = current_cntrs[i]; in update_hw_cntrs()
581 static void update_sw_cntrs(struct msm_gpu *gpu) in update_sw_cntrs() argument
587 spin_lock_irqsave(&gpu->perf_lock, flags); in update_sw_cntrs()
588 if (!gpu->perfcntr_active) in update_sw_cntrs()
592 elapsed = ktime_to_us(ktime_sub(time, gpu->last_sample.time)); in update_sw_cntrs()
594 gpu->totaltime += elapsed; in update_sw_cntrs()
595 if (gpu->last_sample.active) in update_sw_cntrs()
596 gpu->activetime += elapsed; in update_sw_cntrs()
598 gpu->last_sample.active = msm_gpu_active(gpu); in update_sw_cntrs()
599 gpu->last_sample.time = time; in update_sw_cntrs()
602 spin_unlock_irqrestore(&gpu->perf_lock, flags); in update_sw_cntrs()
605 void msm_gpu_perfcntr_start(struct msm_gpu *gpu) in msm_gpu_perfcntr_start() argument
609 pm_runtime_get_sync(&gpu->pdev->dev); in msm_gpu_perfcntr_start()
611 spin_lock_irqsave(&gpu->perf_lock, flags); in msm_gpu_perfcntr_start()
613 gpu->last_sample.active = msm_gpu_active(gpu); in msm_gpu_perfcntr_start()
614 gpu->last_sample.time = ktime_get(); in msm_gpu_perfcntr_start()
615 gpu->activetime = gpu->totaltime = 0; in msm_gpu_perfcntr_start()
616 gpu->perfcntr_active = true; in msm_gpu_perfcntr_start()
617 update_hw_cntrs(gpu, 0, NULL); in msm_gpu_perfcntr_start()
618 spin_unlock_irqrestore(&gpu->perf_lock, flags); in msm_gpu_perfcntr_start()
621 void msm_gpu_perfcntr_stop(struct msm_gpu *gpu) in msm_gpu_perfcntr_stop() argument
623 gpu->perfcntr_active = false; in msm_gpu_perfcntr_stop()
624 pm_runtime_put_sync(&gpu->pdev->dev); in msm_gpu_perfcntr_stop()
628 int msm_gpu_perfcntr_sample(struct msm_gpu *gpu, uint32_t *activetime, in msm_gpu_perfcntr_sample() argument
634 spin_lock_irqsave(&gpu->perf_lock, flags); in msm_gpu_perfcntr_sample()
636 if (!gpu->perfcntr_active) { in msm_gpu_perfcntr_sample()
641 *activetime = gpu->activetime; in msm_gpu_perfcntr_sample()
642 *totaltime = gpu->totaltime; in msm_gpu_perfcntr_sample()
644 gpu->activetime = gpu->totaltime = 0; in msm_gpu_perfcntr_sample()
646 ret = update_hw_cntrs(gpu, ncntrs, cntrs); in msm_gpu_perfcntr_sample()
649 spin_unlock_irqrestore(&gpu->perf_lock, flags); in msm_gpu_perfcntr_sample()
658 static void retire_submit(struct msm_gpu *gpu, struct msm_ringbuffer *ring, in retire_submit() argument
687 pm_runtime_mark_last_busy(&gpu->pdev->dev); in retire_submit()
694 mutex_lock(&gpu->active_lock); in retire_submit()
695 gpu->active_submits--; in retire_submit()
696 WARN_ON(gpu->active_submits < 0); in retire_submit()
697 if (!gpu->active_submits) { in retire_submit()
698 msm_devfreq_idle(gpu); in retire_submit()
699 pm_runtime_put_autosuspend(&gpu->pdev->dev); in retire_submit()
702 mutex_unlock(&gpu->active_lock); in retire_submit()
707 static void retire_submits(struct msm_gpu *gpu) in retire_submits() argument
712 for (i = 0; i < gpu->nr_rings; i++) { in retire_submits()
713 struct msm_ringbuffer *ring = gpu->rb[i]; in retire_submits()
730 retire_submit(gpu, ring, submit); in retire_submits()
737 wake_up_all(&gpu->retire_event); in retire_submits()
742 struct msm_gpu *gpu = container_of(work, struct msm_gpu, retire_work); in retire_worker() local
744 retire_submits(gpu); in retire_worker()
748 void msm_gpu_retire(struct msm_gpu *gpu) in msm_gpu_retire() argument
752 for (i = 0; i < gpu->nr_rings; i++) in msm_gpu_retire()
753 msm_update_fence(gpu->rb[i]->fctx, gpu->rb[i]->memptrs->fence); in msm_gpu_retire()
755 kthread_queue_work(gpu->worker, &gpu->retire_work); in msm_gpu_retire()
756 update_sw_cntrs(gpu); in msm_gpu_retire()
759 /* add bo's to gpu's ring, and kick gpu: */
760 void msm_gpu_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) in msm_gpu_submit() argument
765 WARN_ON(!mutex_is_locked(&gpu->lock)); in msm_gpu_submit()
767 pm_runtime_get_sync(&gpu->pdev->dev); in msm_gpu_submit()
769 msm_gpu_hw_init(gpu); in msm_gpu_submit()
773 update_sw_cntrs(gpu); in msm_gpu_submit()
786 mutex_lock(&gpu->active_lock); in msm_gpu_submit()
787 if (!gpu->active_submits) { in msm_gpu_submit()
788 pm_runtime_get(&gpu->pdev->dev); in msm_gpu_submit()
789 msm_devfreq_active(gpu); in msm_gpu_submit()
791 gpu->active_submits++; in msm_gpu_submit()
792 mutex_unlock(&gpu->active_lock); in msm_gpu_submit()
794 gpu->funcs->submit(gpu, submit); in msm_gpu_submit()
797 pm_runtime_put(&gpu->pdev->dev); in msm_gpu_submit()
798 hangcheck_timer_reset(gpu); in msm_gpu_submit()
807 struct msm_gpu *gpu = data; in irq_handler() local
808 return gpu->funcs->irq(gpu); in irq_handler()
811 static int get_clocks(struct platform_device *pdev, struct msm_gpu *gpu) in get_clocks() argument
813 int ret = devm_clk_bulk_get_all(&pdev->dev, &gpu->grp_clks); in get_clocks()
816 gpu->nr_clocks = 0; in get_clocks()
820 gpu->nr_clocks = ret; in get_clocks()
822 gpu->core_clk = msm_clk_bulk_get_clock(gpu->grp_clks, in get_clocks()
823 gpu->nr_clocks, "core"); in get_clocks()
825 gpu->rbbmtimer_clk = msm_clk_bulk_get_clock(gpu->grp_clks, in get_clocks()
826 gpu->nr_clocks, "rbbmtimer"); in get_clocks()
833 msm_gpu_create_private_address_space(struct msm_gpu *gpu, struct task_struct *task) in msm_gpu_create_private_address_space() argument
836 if (!gpu) in msm_gpu_create_private_address_space()
843 if (gpu->funcs->create_private_address_space) { in msm_gpu_create_private_address_space()
844 aspace = gpu->funcs->create_private_address_space(gpu); in msm_gpu_create_private_address_space()
850 aspace = msm_gem_address_space_get(gpu->aspace); in msm_gpu_create_private_address_space()
856 struct msm_gpu *gpu, const struct msm_gpu_funcs *funcs, in msm_gpu_init() argument
864 if (WARN_ON(gpu->num_perfcntrs > ARRAY_SIZE(gpu->last_cntrs))) in msm_gpu_init()
865 gpu->num_perfcntrs = ARRAY_SIZE(gpu->last_cntrs); in msm_gpu_init()
867 gpu->dev = drm; in msm_gpu_init()
868 gpu->funcs = funcs; in msm_gpu_init()
869 gpu->name = name; in msm_gpu_init()
871 gpu->worker = kthread_run_worker(0, "gpu-worker"); in msm_gpu_init()
872 if (IS_ERR(gpu->worker)) { in msm_gpu_init()
873 ret = PTR_ERR(gpu->worker); in msm_gpu_init()
874 gpu->worker = NULL; in msm_gpu_init()
878 sched_set_fifo_low(gpu->worker->task); in msm_gpu_init()
880 mutex_init(&gpu->active_lock); in msm_gpu_init()
881 mutex_init(&gpu->lock); in msm_gpu_init()
882 init_waitqueue_head(&gpu->retire_event); in msm_gpu_init()
883 kthread_init_work(&gpu->retire_work, retire_worker); in msm_gpu_init()
884 kthread_init_work(&gpu->recover_work, recover_worker); in msm_gpu_init()
885 kthread_init_work(&gpu->fault_work, fault_worker); in msm_gpu_init()
897 timer_setup(&gpu->hangcheck_timer, hangcheck_handler, 0); in msm_gpu_init()
899 spin_lock_init(&gpu->perf_lock); in msm_gpu_init()
903 gpu->mmio = msm_ioremap(pdev, config->ioname); in msm_gpu_init()
904 if (IS_ERR(gpu->mmio)) { in msm_gpu_init()
905 ret = PTR_ERR(gpu->mmio); in msm_gpu_init()
910 gpu->irq = platform_get_irq(pdev, 0); in msm_gpu_init()
911 if (gpu->irq < 0) { in msm_gpu_init()
912 ret = gpu->irq; in msm_gpu_init()
916 ret = devm_request_irq(&pdev->dev, gpu->irq, irq_handler, in msm_gpu_init()
917 IRQF_TRIGGER_HIGH, "gpu-irq", gpu); in msm_gpu_init()
919 DRM_DEV_ERROR(drm->dev, "failed to request IRQ%u: %d\n", gpu->irq, ret); in msm_gpu_init()
923 ret = get_clocks(pdev, gpu); in msm_gpu_init()
927 gpu->ebi1_clk = msm_clk_get(pdev, "bus"); in msm_gpu_init()
928 DBG("ebi1_clk: %p", gpu->ebi1_clk); in msm_gpu_init()
929 if (IS_ERR(gpu->ebi1_clk)) in msm_gpu_init()
930 gpu->ebi1_clk = NULL; in msm_gpu_init()
933 gpu->gpu_reg = devm_regulator_get(&pdev->dev, "vdd"); in msm_gpu_init()
934 DBG("gpu_reg: %p", gpu->gpu_reg); in msm_gpu_init()
935 if (IS_ERR(gpu->gpu_reg)) in msm_gpu_init()
936 gpu->gpu_reg = NULL; in msm_gpu_init()
938 gpu->gpu_cx = devm_regulator_get(&pdev->dev, "vddcx"); in msm_gpu_init()
939 DBG("gpu_cx: %p", gpu->gpu_cx); in msm_gpu_init()
940 if (IS_ERR(gpu->gpu_cx)) in msm_gpu_init()
941 gpu->gpu_cx = NULL; in msm_gpu_init()
943 platform_set_drvdata(pdev, &gpu->adreno_smmu); in msm_gpu_init()
945 msm_devfreq_init(gpu); in msm_gpu_init()
948 gpu->aspace = gpu->funcs->create_address_space(gpu, pdev); in msm_gpu_init()
950 if (gpu->aspace == NULL) in msm_gpu_init()
952 else if (IS_ERR(gpu->aspace)) { in msm_gpu_init()
953 ret = PTR_ERR(gpu->aspace); in msm_gpu_init()
959 check_apriv(gpu, MSM_BO_WC), gpu->aspace, &gpu->memptrs_bo, in msm_gpu_init()
968 msm_gem_object_set_name(gpu->memptrs_bo, "memptrs"); in msm_gpu_init()
970 if (nr_rings > ARRAY_SIZE(gpu->rb)) { in msm_gpu_init()
972 ARRAY_SIZE(gpu->rb)); in msm_gpu_init()
973 nr_rings = ARRAY_SIZE(gpu->rb); in msm_gpu_init()
978 gpu->rb[i] = msm_ringbuffer_new(gpu, i, memptrs, memptrs_iova); in msm_gpu_init()
980 if (IS_ERR(gpu->rb[i])) { in msm_gpu_init()
981 ret = PTR_ERR(gpu->rb[i]); in msm_gpu_init()
991 gpu->nr_rings = nr_rings; in msm_gpu_init()
993 refcount_set(&gpu->sysprof_active, 1); in msm_gpu_init()
998 for (i = 0; i < ARRAY_SIZE(gpu->rb); i++) { in msm_gpu_init()
999 msm_ringbuffer_destroy(gpu->rb[i]); in msm_gpu_init()
1000 gpu->rb[i] = NULL; in msm_gpu_init()
1003 msm_gem_kernel_put(gpu->memptrs_bo, gpu->aspace); in msm_gpu_init()
1009 void msm_gpu_cleanup(struct msm_gpu *gpu) in msm_gpu_cleanup() argument
1013 DBG("%s", gpu->name); in msm_gpu_cleanup()
1015 for (i = 0; i < ARRAY_SIZE(gpu->rb); i++) { in msm_gpu_cleanup()
1016 msm_ringbuffer_destroy(gpu->rb[i]); in msm_gpu_cleanup()
1017 gpu->rb[i] = NULL; in msm_gpu_cleanup()
1020 msm_gem_kernel_put(gpu->memptrs_bo, gpu->aspace); in msm_gpu_cleanup()
1022 if (!IS_ERR_OR_NULL(gpu->aspace)) { in msm_gpu_cleanup()
1023 gpu->aspace->mmu->funcs->detach(gpu->aspace->mmu); in msm_gpu_cleanup()
1024 msm_gem_address_space_put(gpu->aspace); in msm_gpu_cleanup()
1027 if (gpu->worker) { in msm_gpu_cleanup()
1028 kthread_destroy_worker(gpu->worker); in msm_gpu_cleanup()
1031 msm_devfreq_cleanup(gpu); in msm_gpu_cleanup()
1033 platform_set_drvdata(gpu->pdev, NULL); in msm_gpu_cleanup()