Lines Matching +full:syscon +full:- +full:sfpb
1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/dma-mapping.h>
11 #include <linux/mfd/syscon.h>
28 #include "sfpb.xml.h"
44 return -EINVAL; in dsi_get_version()
48 * makes all other registers 4-byte shifted down. in dsi_get_version()
52 * 0x1f0). In the case of DSIv2, this hast to be a non-zero value. In in dsi_get_version()
67 return -EINVAL; in dsi_get_version()
83 return -EINVAL; in dsi_get_version()
156 struct regmap *sfpb; member
184 return readl(msm_host->ctrl_base + reg); in dsi_read()
189 writel(data, msm_host->ctrl_base + reg); in dsi_write()
196 struct device *dev = &msm_host->pdev->dev; in dsi_get_config()
201 ahb_clk = msm_clk_get(msm_host->pdev, "iface"); in dsi_get_config()
216 ret = dsi_get_version(msm_host->ctrl_base, &major, &minor); in dsi_get_config()
241 struct platform_device *pdev = msm_host->pdev; in dsi_clk_init_v2()
244 msm_host->src_clk = msm_clk_get(pdev, "src"); in dsi_clk_init_v2()
246 if (IS_ERR(msm_host->src_clk)) { in dsi_clk_init_v2()
247 ret = PTR_ERR(msm_host->src_clk); in dsi_clk_init_v2()
250 msm_host->src_clk = NULL; in dsi_clk_init_v2()
259 struct platform_device *pdev = msm_host->pdev; in dsi_clk_init_6g_v2()
262 msm_host->byte_intf_clk = msm_clk_get(pdev, "byte_intf"); in dsi_clk_init_6g_v2()
263 if (IS_ERR(msm_host->byte_intf_clk)) { in dsi_clk_init_6g_v2()
264 ret = PTR_ERR(msm_host->byte_intf_clk); in dsi_clk_init_6g_v2()
274 struct platform_device *pdev = msm_host->pdev; in dsi_clk_init()
275 const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd; in dsi_clk_init()
276 const struct msm_dsi_config *cfg = cfg_hnd->cfg; in dsi_clk_init()
280 for (i = 0; i < cfg->num_bus_clks; i++) in dsi_clk_init()
281 msm_host->bus_clks[i].id = cfg->bus_clk_names[i]; in dsi_clk_init()
282 msm_host->num_bus_clks = cfg->num_bus_clks; in dsi_clk_init()
284 ret = devm_clk_bulk_get(&pdev->dev, msm_host->num_bus_clks, msm_host->bus_clks); in dsi_clk_init()
286 return dev_err_probe(&pdev->dev, ret, "Unable to get clocks\n"); in dsi_clk_init()
289 msm_host->byte_clk = msm_clk_get(pdev, "byte"); in dsi_clk_init()
290 if (IS_ERR(msm_host->byte_clk)) in dsi_clk_init()
291 return dev_err_probe(&pdev->dev, PTR_ERR(msm_host->byte_clk), in dsi_clk_init()
295 msm_host->pixel_clk = msm_clk_get(pdev, "pixel"); in dsi_clk_init()
296 if (IS_ERR(msm_host->pixel_clk)) in dsi_clk_init()
297 return dev_err_probe(&pdev->dev, PTR_ERR(msm_host->pixel_clk), in dsi_clk_init()
301 msm_host->esc_clk = msm_clk_get(pdev, "core"); in dsi_clk_init()
302 if (IS_ERR(msm_host->esc_clk)) in dsi_clk_init()
303 return dev_err_probe(&pdev->dev, PTR_ERR(msm_host->esc_clk), in dsi_clk_init()
307 if (cfg_hnd->ops->clk_init_ver) in dsi_clk_init()
308 ret = cfg_hnd->ops->clk_init_ver(msm_host); in dsi_clk_init()
317 struct mipi_dsi_host *host = msm_dsi->host; in msm_dsi_runtime_suspend()
320 if (!msm_host->cfg_hnd) in msm_dsi_runtime_suspend()
323 clk_bulk_disable_unprepare(msm_host->num_bus_clks, msm_host->bus_clks); in msm_dsi_runtime_suspend()
332 struct mipi_dsi_host *host = msm_dsi->host; in msm_dsi_runtime_resume()
335 if (!msm_host->cfg_hnd) in msm_dsi_runtime_resume()
338 return clk_bulk_prepare_enable(msm_host->num_bus_clks, msm_host->bus_clks); in msm_dsi_runtime_resume()
346 msm_host->pixel_clk_rate, msm_host->byte_clk_rate); in dsi_link_clk_set_rate_6g()
348 ret = dev_pm_opp_set_rate(&msm_host->pdev->dev, in dsi_link_clk_set_rate_6g()
349 msm_host->byte_clk_rate); in dsi_link_clk_set_rate_6g()
355 ret = clk_set_rate(msm_host->pixel_clk, msm_host->pixel_clk_rate); in dsi_link_clk_set_rate_6g()
361 if (msm_host->byte_intf_clk) { in dsi_link_clk_set_rate_6g()
362 ret = clk_set_rate(msm_host->byte_intf_clk, msm_host->byte_intf_clk_rate); in dsi_link_clk_set_rate_6g()
377 ret = clk_prepare_enable(msm_host->esc_clk); in dsi_link_clk_enable_6g()
383 ret = clk_prepare_enable(msm_host->byte_clk); in dsi_link_clk_enable_6g()
389 ret = clk_prepare_enable(msm_host->pixel_clk); in dsi_link_clk_enable_6g()
395 ret = clk_prepare_enable(msm_host->byte_intf_clk); in dsi_link_clk_enable_6g()
405 clk_disable_unprepare(msm_host->pixel_clk); in dsi_link_clk_enable_6g()
407 clk_disable_unprepare(msm_host->byte_clk); in dsi_link_clk_enable_6g()
409 clk_disable_unprepare(msm_host->esc_clk); in dsi_link_clk_enable_6g()
419 msm_host->pixel_clk_rate, msm_host->byte_clk_rate, in dsi_link_clk_set_rate_v2()
420 msm_host->esc_clk_rate, msm_host->src_clk_rate); in dsi_link_clk_set_rate_v2()
422 ret = clk_set_rate(msm_host->byte_clk, msm_host->byte_clk_rate); in dsi_link_clk_set_rate_v2()
428 ret = clk_set_rate(msm_host->esc_clk, msm_host->esc_clk_rate); in dsi_link_clk_set_rate_v2()
434 ret = clk_set_rate(msm_host->src_clk, msm_host->src_clk_rate); in dsi_link_clk_set_rate_v2()
440 ret = clk_set_rate(msm_host->pixel_clk, msm_host->pixel_clk_rate); in dsi_link_clk_set_rate_v2()
453 ret = clk_prepare_enable(msm_host->byte_clk); in dsi_link_clk_enable_v2()
459 ret = clk_prepare_enable(msm_host->esc_clk); in dsi_link_clk_enable_v2()
465 ret = clk_prepare_enable(msm_host->src_clk); in dsi_link_clk_enable_v2()
471 ret = clk_prepare_enable(msm_host->pixel_clk); in dsi_link_clk_enable_v2()
480 clk_disable_unprepare(msm_host->src_clk); in dsi_link_clk_enable_v2()
482 clk_disable_unprepare(msm_host->esc_clk); in dsi_link_clk_enable_v2()
484 clk_disable_unprepare(msm_host->byte_clk); in dsi_link_clk_enable_v2()
492 dev_pm_opp_set_rate(&msm_host->pdev->dev, 0); in dsi_link_clk_disable_6g()
493 clk_disable_unprepare(msm_host->esc_clk); in dsi_link_clk_disable_6g()
494 clk_disable_unprepare(msm_host->pixel_clk); in dsi_link_clk_disable_6g()
495 clk_disable_unprepare(msm_host->byte_intf_clk); in dsi_link_clk_disable_6g()
496 clk_disable_unprepare(msm_host->byte_clk); in dsi_link_clk_disable_6g()
501 clk_disable_unprepare(msm_host->pixel_clk); in dsi_link_clk_disable_v2()
502 clk_disable_unprepare(msm_host->src_clk); in dsi_link_clk_disable_v2()
503 clk_disable_unprepare(msm_host->esc_clk); in dsi_link_clk_disable_v2()
504 clk_disable_unprepare(msm_host->byte_clk); in dsi_link_clk_disable_v2()
508 * dsi_adjust_pclk_for_compression() - Adjust the pclk rate for compression case
517 * - For VIDEO mode they are not compressed by DSC and are passed as is.
518 * - For CMD mode there are no actual porches. Instead these fields
529 int new_hdisplay = DIV_ROUND_UP(mode->hdisplay * drm_dsc_get_bpp_int(dsc), in dsi_adjust_pclk_for_compression()
530 dsc->bits_per_component * 3); in dsi_adjust_pclk_for_compression()
532 int new_htotal = mode->htotal - mode->hdisplay + new_hdisplay; in dsi_adjust_pclk_for_compression()
534 return mult_frac(mode->clock * 1000u, new_htotal, mode->htotal); in dsi_adjust_pclk_for_compression()
542 pclk_rate = mode->clock * 1000u; in dsi_get_pclk_rate()
563 u8 lanes = msm_host->lanes; in dsi_byte_clk_get_rate()
564 u32 bpp = mipi_dsi_pixel_format_to_bpp(msm_host->format); in dsi_byte_clk_get_rate()
565 unsigned long pclk_rate = dsi_get_pclk_rate(mode, msm_host->dsc, is_bonded_dsi); in dsi_byte_clk_get_rate()
574 if (msm_host->cphy_mode) in dsi_byte_clk_get_rate()
584 msm_host->pixel_clk_rate = dsi_get_pclk_rate(msm_host->mode, msm_host->dsc, is_bonded_dsi); in dsi_calc_pclk()
585 msm_host->byte_clk_rate = dsi_byte_clk_get_rate(&msm_host->base, is_bonded_dsi, in dsi_calc_pclk()
586 msm_host->mode); in dsi_calc_pclk()
588 DBG("pclk=%lu, bclk=%lu", msm_host->pixel_clk_rate, in dsi_calc_pclk()
589 msm_host->byte_clk_rate); in dsi_calc_pclk()
594 if (!msm_host->mode) { in dsi_calc_clk_rate_6g()
596 return -EINVAL; in dsi_calc_clk_rate_6g()
600 msm_host->esc_clk_rate = clk_get_rate(msm_host->esc_clk); in dsi_calc_clk_rate_6g()
606 u32 bpp = mipi_dsi_pixel_format_to_bpp(msm_host->format); in dsi_calc_clk_rate_v2()
612 msm_host->src_clk_rate = mult_frac(msm_host->pixel_clk_rate, bpp, 8); in dsi_calc_clk_rate_v2()
623 byte_mhz = msm_host->byte_clk_rate / 1000000; in dsi_calc_clk_rate_v2()
625 for (esc_mhz = 20; esc_mhz >= 5; esc_mhz--) { in dsi_calc_clk_rate_v2()
639 return -EINVAL; in dsi_calc_clk_rate_v2()
641 msm_host->esc_clk_rate = msm_host->byte_clk_rate / esc_div; in dsi_calc_clk_rate_v2()
643 DBG("esc=%lu, src=%lu", msm_host->esc_clk_rate, in dsi_calc_clk_rate_v2()
644 msm_host->src_clk_rate); in dsi_calc_clk_rate_v2()
654 spin_lock_irqsave(&msm_host->intr_lock, flags); in dsi_intr_ctrl()
665 spin_unlock_irqrestore(&msm_host->intr_lock, flags); in dsi_intr_ctrl()
711 return msm_host->dsc && in msm_dsi_host_is_wide_bus_enabled()
712 (msm_host->cfg_hnd->major == MSM_DSI_VER_MAJOR_6G && in msm_dsi_host_is_wide_bus_enabled()
713 msm_host->cfg_hnd->minor >= MSM_DSI_6G_VER_MINOR_V2_5_0); in msm_dsi_host_is_wide_bus_enabled()
719 u32 flags = msm_host->mode_flags; in dsi_ctrl_enable()
720 enum mipi_dsi_pixel_format mipi_fmt = msm_host->format; in dsi_ctrl_enable()
721 const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd; in dsi_ctrl_enable()
740 data |= DSI_VID_CFG0_VIRT_CHANNEL(msm_host->channel); in dsi_ctrl_enable()
741 if (msm_dsi_host_is_wide_bus_enabled(&msm_host->base)) in dsi_ctrl_enable()
761 if (cfg_hnd->major == MSM_DSI_VER_MAJOR_6G) { in dsi_ctrl_enable()
764 if (cfg_hnd->minor >= MSM_DSI_6G_VER_MINOR_V1_3) in dsi_ctrl_enable()
767 if (msm_dsi_host_is_wide_bus_enabled(&msm_host->base)) in dsi_ctrl_enable()
783 data |= DSI_TRIG_CTRL_STREAM(msm_host->channel); in dsi_ctrl_enable()
784 if ((cfg_hnd->major == MSM_DSI_VER_MAJOR_6G) && in dsi_ctrl_enable()
785 (cfg_hnd->minor >= MSM_DSI_6G_VER_MINOR_V1_2)) in dsi_ctrl_enable()
789 data = DSI_CLKOUT_TIMING_CTRL_T_CLK_POST(phy_shared_timings->clk_post) | in dsi_ctrl_enable()
790 DSI_CLKOUT_TIMING_CTRL_T_CLK_PRE(phy_shared_timings->clk_pre); in dsi_ctrl_enable()
793 if ((cfg_hnd->major == MSM_DSI_VER_MAJOR_6G) && in dsi_ctrl_enable()
794 (cfg_hnd->minor > MSM_DSI_6G_VER_MINOR_V1_0) && in dsi_ctrl_enable()
795 phy_shared_timings->clk_pre_inc_by_2) in dsi_ctrl_enable()
804 /* allow only ack-err-status to generate interrupt */ in dsi_ctrl_enable()
813 DBG("lane number=%d", msm_host->lanes); in dsi_ctrl_enable()
814 data |= ((DSI_CTRL_LANE0 << msm_host->lanes) - DSI_CTRL_LANE0); in dsi_ctrl_enable()
817 DSI_LANE_SWAP_CTRL_DLN_SWAP_SEL(msm_host->dlane_swap)); in dsi_ctrl_enable()
833 if (msm_host->cphy_mode) in dsi_ctrl_enable()
839 struct drm_dsc_config *dsc = msm_host->dsc; in dsi_update_dsc_timing()
849 slice_per_intf = dsc->slice_count; in dsi_update_dsc_timing()
851 total_bytes_per_intf = dsc->slice_chunk_size * slice_per_intf; in dsi_update_dsc_timing()
852 bytes_per_pkt = dsc->slice_chunk_size; /* * slice_per_pkt; */ in dsi_update_dsc_timing()
876 drm_warn_once(msm_host->dev, "pkt_per_line too big"); in dsi_update_dsc_timing()
889 reg_ctrl2 |= DSI_COMMAND_COMPRESSION_MODE_CTRL2_STREAM0_SLICE_WIDTH(dsc->slice_chunk_size); in dsi_update_dsc_timing()
901 struct drm_display_mode *mode = msm_host->mode; in dsi_timing_setup()
903 u32 h_total = mode->htotal; in dsi_timing_setup()
904 u32 v_total = mode->vtotal; in dsi_timing_setup()
905 u32 hs_end = mode->hsync_end - mode->hsync_start; in dsi_timing_setup()
906 u32 vs_end = mode->vsync_end - mode->vsync_start; in dsi_timing_setup()
907 u32 ha_start = h_total - mode->hsync_start; in dsi_timing_setup()
908 u32 ha_end = ha_start + mode->hdisplay; in dsi_timing_setup()
909 u32 va_start = v_total - mode->vsync_start; in dsi_timing_setup()
910 u32 va_end = va_start + mode->vdisplay; in dsi_timing_setup()
911 u32 hdisplay = mode->hdisplay; in dsi_timing_setup()
914 bool wide_bus_enabled = msm_dsi_host_is_wide_bus_enabled(&msm_host->base); in dsi_timing_setup()
933 if (msm_host->dsc) { in dsi_timing_setup()
934 struct drm_dsc_config *dsc = msm_host->dsc; in dsi_timing_setup()
938 if (!dsc || !mode->hdisplay || !mode->vdisplay) { in dsi_timing_setup()
940 mode->hdisplay, mode->vdisplay); in dsi_timing_setup()
944 dsc->pic_width = mode->hdisplay; in dsi_timing_setup()
945 dsc->pic_height = mode->vdisplay; in dsi_timing_setup()
946 DBG("Mode %dx%d\n", dsc->pic_width, dsc->pic_height); in dsi_timing_setup()
968 h_total -= hdisplay; in dsi_timing_setup()
969 if (wide_bus_enabled && !(msm_host->mode_flags & MIPI_DSI_MODE_VIDEO)) in dsi_timing_setup()
974 hdisplay = DIV_ROUND_UP(msm_dsc_get_bytes_per_line(msm_host->dsc), bytes_per_pclk); in dsi_timing_setup()
980 if (msm_host->mode_flags & MIPI_DSI_MODE_VIDEO) { in dsi_timing_setup()
981 if (msm_host->dsc) in dsi_timing_setup()
991 DSI_TOTAL_H_TOTAL(h_total - 1) | in dsi_timing_setup()
992 DSI_TOTAL_V_TOTAL(v_total - 1)); in dsi_timing_setup()
1002 if (msm_host->dsc) in dsi_timing_setup()
1006 if (!msm_host->dsc) in dsi_timing_setup()
1007 wc = hdisplay * mipi_dsi_pixel_format_to_bpp(msm_host->format) / 8 + 1; in dsi_timing_setup()
1016 wc = msm_host->dsc->slice_chunk_size + 1; in dsi_timing_setup()
1021 msm_host->channel) | in dsi_timing_setup()
1027 DSI_CMD_MDP_STREAM0_TOTAL_V_TOTAL(mode->vdisplay)); in dsi_timing_setup()
1103 struct device *dev = &msm_host->pdev->dev; in dsi_wait4video_done()
1107 reinit_completion(&msm_host->video_comp); in dsi_wait4video_done()
1109 ret = wait_for_completion_timeout(&msm_host->video_comp, in dsi_wait4video_done()
1122 if (!(msm_host->mode_flags & MIPI_DSI_MODE_VIDEO)) in dsi_wait4video_eng_busy()
1135 if (msm_host->power_on && msm_host->enabled) { in dsi_wait4video_eng_busy()
1144 struct drm_device *dev = msm_host->dev; in dsi_tx_buf_alloc_6g()
1145 struct msm_drm_private *priv = dev->dev_private; in dsi_tx_buf_alloc_6g()
1149 msm_host->aspace = msm_gem_address_space_get(priv->kms->aspace); in dsi_tx_buf_alloc_6g()
1152 msm_host->aspace, in dsi_tx_buf_alloc_6g()
1153 &msm_host->tx_gem_obj, &iova); in dsi_tx_buf_alloc_6g()
1156 msm_host->tx_gem_obj = NULL; in dsi_tx_buf_alloc_6g()
1160 msm_gem_object_set_name(msm_host->tx_gem_obj, "tx_gem"); in dsi_tx_buf_alloc_6g()
1162 msm_host->tx_size = msm_host->tx_gem_obj->size; in dsi_tx_buf_alloc_6g()
1169 struct drm_device *dev = msm_host->dev; in dsi_tx_buf_alloc_v2()
1171 msm_host->tx_buf = dma_alloc_coherent(dev->dev, size, in dsi_tx_buf_alloc_v2()
1172 &msm_host->tx_buf_paddr, GFP_KERNEL); in dsi_tx_buf_alloc_v2()
1173 if (!msm_host->tx_buf) in dsi_tx_buf_alloc_v2()
1174 return -ENOMEM; in dsi_tx_buf_alloc_v2()
1176 msm_host->tx_size = size; in dsi_tx_buf_alloc_v2()
1184 struct drm_device *dev = msm_host->dev; in msm_dsi_tx_buf_free()
1195 if (msm_host->tx_gem_obj) { in msm_dsi_tx_buf_free()
1196 msm_gem_kernel_put(msm_host->tx_gem_obj, msm_host->aspace); in msm_dsi_tx_buf_free()
1197 msm_gem_address_space_put(msm_host->aspace); in msm_dsi_tx_buf_free()
1198 msm_host->tx_gem_obj = NULL; in msm_dsi_tx_buf_free()
1199 msm_host->aspace = NULL; in msm_dsi_tx_buf_free()
1202 if (msm_host->tx_buf) in msm_dsi_tx_buf_free()
1203 dma_free_coherent(dev->dev, msm_host->tx_size, msm_host->tx_buf, in msm_dsi_tx_buf_free()
1204 msm_host->tx_buf_paddr); in msm_dsi_tx_buf_free()
1209 return msm_gem_get_vaddr(msm_host->tx_gem_obj); in dsi_tx_buf_get_6g()
1214 return msm_host->tx_buf; in dsi_tx_buf_get_v2()
1219 msm_gem_put_vaddr(msm_host->tx_gem_obj); in dsi_tx_buf_put_6g()
1228 const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd; in dsi_cmd_dma_add()
1241 if (len > msm_host->tx_size) { in dsi_cmd_dma_add()
1243 return -EINVAL; in dsi_cmd_dma_add()
1246 data = cfg_hnd->ops->tx_buf_get(msm_host); in dsi_cmd_dma_add()
1258 if (mipi_dsi_packet_format_is_long(msg->type)) in dsi_cmd_dma_add()
1260 if (msg->rx_buf && msg->rx_len) in dsi_cmd_dma_add()
1269 memset(data + packet.size, 0xff, len - packet.size); in dsi_cmd_dma_add()
1271 if (cfg_hnd->ops->tx_buf_put) in dsi_cmd_dma_add()
1272 cfg_hnd->ops->tx_buf_put(msm_host); in dsi_cmd_dma_add()
1282 u8 *data = msg->rx_buf; in dsi_short_read1_resp()
1284 if (data && (msg->rx_len >= 1)) { in dsi_short_read1_resp()
1290 __func__, msg->rx_len); in dsi_short_read1_resp()
1291 return -EINVAL; in dsi_short_read1_resp()
1299 u8 *data = msg->rx_buf; in dsi_short_read2_resp()
1301 if (data && (msg->rx_len >= 2)) { in dsi_short_read2_resp()
1308 __func__, msg->rx_len); in dsi_short_read2_resp()
1309 return -EINVAL; in dsi_short_read2_resp()
1315 if (msg->rx_buf && msg->rx_len) in dsi_long_read_resp()
1316 memcpy(msg->rx_buf, buf + 4, msg->rx_len); in dsi_long_read_resp()
1318 return msg->rx_len; in dsi_long_read_resp()
1323 struct drm_device *dev = msm_host->dev; in dsi_dma_base_get_6g()
1324 struct msm_drm_private *priv = dev->dev_private; in dsi_dma_base_get_6g()
1327 return -EINVAL; in dsi_dma_base_get_6g()
1329 return msm_gem_get_and_pin_iova(msm_host->tx_gem_obj, in dsi_dma_base_get_6g()
1330 priv->kms->aspace, dma_base); in dsi_dma_base_get_6g()
1336 return -EINVAL; in dsi_dma_base_get_v2()
1338 *dma_base = msm_host->tx_buf_paddr; in dsi_dma_base_get_v2()
1344 const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd; in dsi_cmd_dma_tx()
1349 ret = cfg_hnd->ops->dma_base_get(msm_host, &dma_base); in dsi_cmd_dma_tx()
1355 reinit_completion(&msm_host->dma_comp); in dsi_cmd_dma_tx()
1360 msm_host->id, dma_base, len); in dsi_cmd_dma_tx()
1362 ret = wait_for_completion_timeout(&msm_host->dma_comp, in dsi_cmd_dma_tx()
1366 ret = -ETIMEDOUT; in dsi_cmd_dma_tx()
1384 int buf_offset = buf - msm_host->rx_buf; in dsi_cmd_dma_rx()
1409 bytes_shifted = read_cnt - 16; in dsi_cmd_dma_rx()
1410 repeated_bytes = buf_offset - bytes_shifted; in dsi_cmd_dma_rx()
1413 for (i = cnt - 1; i >= 0; i--) { in dsi_cmd_dma_rx()
1429 int bllp_len = msm_host->mode->hdisplay * in dsi_cmds2buf_tx()
1430 mipi_dsi_pixel_format_to_bpp(msm_host->format) / 8; in dsi_cmds2buf_tx()
1435 __func__, msg->type); in dsi_cmds2buf_tx()
1449 if ((msm_host->mode_flags & MIPI_DSI_MODE_VIDEO) && (len > bllp_len)) { in dsi_cmds2buf_tx()
1452 return -EINVAL; in dsi_cmds2buf_tx()
1458 __func__, msg->type, (*(u8 *)(msg->tx_buf)), len, ret); in dsi_cmds2buf_tx()
1462 __func__, msg->type, (*(u8 *)(msg->tx_buf)), ret, len); in dsi_cmds2buf_tx()
1463 return -EIO; in dsi_cmds2buf_tx()
1473 u32 status = msm_host->err_work_state; in dsi_err_worker()
1480 msm_host->err_work_state = 0; in dsi_err_worker()
1496 msm_host->err_work_state |= DSI_ERR_STATE_ACK; in dsi_ack_err_status()
1508 msm_host->err_work_state |= DSI_ERR_STATE_TIMEOUT; in dsi_timeout_status()
1524 msm_host->err_work_state |= DSI_ERR_STATE_DLN0_PHY; in dsi_dln0_phy_err()
1537 msm_host->err_work_state |= DSI_ERR_STATE_FIFO; in dsi_fifo_status()
1539 msm_host->err_work_state |= in dsi_fifo_status()
1552 msm_host->err_work_state |= in dsi_status()
1565 msm_host->err_work_state |= DSI_ERR_STATE_PLL_UNLOCKED; in dsi_clk_status()
1581 queue_work(msm_host->workqueue, &msm_host->err_work); in dsi_error()
1590 if (!msm_host->ctrl_base) in dsi_host_irq()
1593 spin_lock_irqsave(&msm_host->intr_lock, flags); in dsi_host_irq()
1596 spin_unlock_irqrestore(&msm_host->intr_lock, flags); in dsi_host_irq()
1598 DBG("isr=0x%x, id=%d", isr, msm_host->id); in dsi_host_irq()
1604 complete(&msm_host->video_comp); in dsi_host_irq()
1607 complete(&msm_host->dma_comp); in dsi_host_irq()
1618 if (dsi->lanes > msm_host->num_data_lanes) in dsi_host_attach()
1619 return -EINVAL; in dsi_host_attach()
1621 msm_host->channel = dsi->channel; in dsi_host_attach()
1622 msm_host->lanes = dsi->lanes; in dsi_host_attach()
1623 msm_host->format = dsi->format; in dsi_host_attach()
1624 msm_host->mode_flags = dsi->mode_flags; in dsi_host_attach()
1625 if (dsi->dsc) in dsi_host_attach()
1626 msm_host->dsc = dsi->dsc; in dsi_host_attach()
1628 ret = dsi_dev_attach(msm_host->pdev); in dsi_host_attach()
1632 DBG("id=%d", msm_host->id); in dsi_host_attach()
1642 dsi_dev_detach(msm_host->pdev); in dsi_host_detach()
1644 DBG("id=%d", msm_host->id); in dsi_host_detach()
1655 if (!msg || !msm_host->power_on) in dsi_host_transfer()
1656 return -EINVAL; in dsi_host_transfer()
1658 mutex_lock(&msm_host->cmd_mutex); in dsi_host_transfer()
1659 ret = msm_dsi_manager_cmd_xfer(msm_host->id, msg); in dsi_host_transfer()
1660 mutex_unlock(&msm_host->cmd_mutex); in dsi_host_transfer()
1675 * "3012": Logic 3->Phys 0; Logic 0->Phys 1; Logic 1->Phys 2; Logic 2->Phys 3;
1691 struct device *dev = &msm_host->pdev->dev; in dsi_host_parse_lane_data()
1696 prop = of_find_property(ep, "data-lanes", &len); in dsi_host_parse_lane_data()
1701 msm_host->num_data_lanes = 4; in dsi_host_parse_lane_data()
1711 msm_host->num_data_lanes = num_lanes; in dsi_host_parse_lane_data()
1713 ret = of_property_read_u32_array(ep, "data-lanes", lane_map, in dsi_host_parse_lane_data()
1721 * compare DT specified physical-logical lane mappings with the ones in dsi_host_parse_lane_data()
1729 * the data-lanes array we get from DT has a logical->physical in dsi_host_parse_lane_data()
1731 * supported configurations in a physical->logical mapping. in dsi_host_parse_lane_data()
1745 msm_host->dlane_swap = i; in dsi_host_parse_lane_data()
1750 return -EINVAL; in dsi_host_parse_lane_data()
1757 if (dsc->bits_per_pixel & 0xf) { in dsi_populate_dsc_params()
1758 DRM_DEV_ERROR(&msm_host->pdev->dev, "DSI does not support fractional bits_per_pixel\n"); in dsi_populate_dsc_params()
1759 return -EINVAL; in dsi_populate_dsc_params()
1762 switch (dsc->bits_per_component) { in dsi_populate_dsc_params()
1773 DRM_DEV_ERROR(&msm_host->pdev->dev, in dsi_populate_dsc_params()
1775 dsc->bits_per_component); in dsi_populate_dsc_params()
1776 return -EOPNOTSUPP; in dsi_populate_dsc_params()
1779 dsc->simple_422 = 0; in dsi_populate_dsc_params()
1780 dsc->convert_rgb = 1; in dsi_populate_dsc_params()
1781 dsc->vbr_enable = 0; in dsi_populate_dsc_params()
1786 /* DPU supports only pre-SCR panels */ in dsi_populate_dsc_params()
1789 DRM_DEV_ERROR(&msm_host->pdev->dev, "could not find DSC RC parameters\n"); in dsi_populate_dsc_params()
1793 dsc->initial_scale_value = drm_dsc_initial_scale_value(dsc); in dsi_populate_dsc_params()
1794 dsc->line_buf_depth = dsc->bits_per_component + 1; in dsi_populate_dsc_params()
1801 struct msm_dsi *msm_dsi = platform_get_drvdata(msm_host->pdev); in dsi_host_parse_dt()
1802 struct device *dev = &msm_host->pdev->dev; in dsi_host_parse_dt()
1803 struct device_node *np = dev->of_node; in dsi_host_parse_dt()
1814 endpoint = of_graph_get_endpoint_by_regs(np, 1, -1); in dsi_host_parse_dt()
1824 ret = -EINVAL; in dsi_host_parse_dt()
1828 ret = of_property_read_string(endpoint, "qcom,te-source", &te_source); in dsi_host_parse_dt()
1829 if (ret && ret != -EINVAL) { in dsi_host_parse_dt()
1835 msm_dsi->te_source = devm_kstrdup(dev, te_source, GFP_KERNEL); in dsi_host_parse_dt()
1836 if (!msm_dsi->te_source) { in dsi_host_parse_dt()
1839 ret = -ENOMEM; in dsi_host_parse_dt()
1845 if (of_property_present(np, "syscon-sfpb")) { in dsi_host_parse_dt()
1846 msm_host->sfpb = syscon_regmap_lookup_by_phandle(np, in dsi_host_parse_dt()
1847 "syscon-sfpb"); in dsi_host_parse_dt()
1848 if (IS_ERR(msm_host->sfpb)) { in dsi_host_parse_dt()
1849 DRM_DEV_ERROR(dev, "%s: failed to get sfpb regmap\n", in dsi_host_parse_dt()
1851 ret = PTR_ERR(msm_host->sfpb); in dsi_host_parse_dt()
1863 struct platform_device *pdev = msm_host->pdev; in dsi_host_get_id()
1864 const struct msm_dsi_config *cfg = msm_host->cfg_hnd->cfg; in dsi_host_get_id()
1870 return -EINVAL; in dsi_host_get_id()
1874 if (cfg->io_start[i][j] == res->start) in dsi_host_get_id()
1877 return -EINVAL; in dsi_host_get_id()
1883 struct platform_device *pdev = msm_dsi->pdev; in msm_dsi_host_init()
1887 msm_host = devm_kzalloc(&pdev->dev, sizeof(*msm_host), GFP_KERNEL); in msm_dsi_host_init()
1889 return -ENOMEM; in msm_dsi_host_init()
1891 msm_host->pdev = pdev; in msm_dsi_host_init()
1892 msm_dsi->host = &msm_host->base; in msm_dsi_host_init()
1896 return dev_err_probe(&pdev->dev, ret, "%s: failed to parse dt\n", in msm_dsi_host_init()
1899 msm_host->ctrl_base = msm_ioremap_size(pdev, "dsi_ctrl", &msm_host->ctrl_size); in msm_dsi_host_init()
1900 if (IS_ERR(msm_host->ctrl_base)) in msm_dsi_host_init()
1901 return dev_err_probe(&pdev->dev, PTR_ERR(msm_host->ctrl_base), in msm_dsi_host_init()
1904 pm_runtime_enable(&pdev->dev); in msm_dsi_host_init()
1906 msm_host->cfg_hnd = dsi_get_config(msm_host); in msm_dsi_host_init()
1907 if (!msm_host->cfg_hnd) in msm_dsi_host_init()
1908 return dev_err_probe(&pdev->dev, -EINVAL, in msm_dsi_host_init()
1910 cfg = msm_host->cfg_hnd->cfg; in msm_dsi_host_init()
1912 msm_host->id = dsi_host_get_id(msm_host); in msm_dsi_host_init()
1913 if (msm_host->id < 0) in msm_dsi_host_init()
1914 return dev_err_probe(&pdev->dev, msm_host->id, in msm_dsi_host_init()
1919 msm_host->ctrl_base += cfg->io_offset; in msm_dsi_host_init()
1921 ret = devm_regulator_bulk_get_const(&pdev->dev, cfg->num_regulators, in msm_dsi_host_init()
1922 cfg->regulator_data, in msm_dsi_host_init()
1923 &msm_host->supplies); in msm_dsi_host_init()
1929 return dev_err_probe(&pdev->dev, ret, "%s: unable to initialize dsi clks\n", __func__); in msm_dsi_host_init()
1931 msm_host->rx_buf = devm_kzalloc(&pdev->dev, SZ_4K, GFP_KERNEL); in msm_dsi_host_init()
1932 if (!msm_host->rx_buf) in msm_dsi_host_init()
1933 return -ENOMEM; in msm_dsi_host_init()
1935 ret = devm_pm_opp_set_clkname(&pdev->dev, "byte"); in msm_dsi_host_init()
1939 ret = devm_pm_opp_of_add_table(&pdev->dev); in msm_dsi_host_init()
1940 if (ret && ret != -ENODEV) in msm_dsi_host_init()
1941 return dev_err_probe(&pdev->dev, ret, "invalid OPP table in device tree\n"); in msm_dsi_host_init()
1943 msm_host->irq = irq_of_parse_and_map(pdev->dev.of_node, 0); in msm_dsi_host_init()
1944 if (!msm_host->irq) in msm_dsi_host_init()
1945 return dev_err_probe(&pdev->dev, -EINVAL, "failed to get irq\n"); in msm_dsi_host_init()
1948 ret = devm_request_irq(&pdev->dev, msm_host->irq, dsi_host_irq, in msm_dsi_host_init()
1952 return dev_err_probe(&pdev->dev, ret, "failed to request IRQ%u\n", in msm_dsi_host_init()
1953 msm_host->irq); in msm_dsi_host_init()
1955 init_completion(&msm_host->dma_comp); in msm_dsi_host_init()
1956 init_completion(&msm_host->video_comp); in msm_dsi_host_init()
1957 mutex_init(&msm_host->dev_mutex); in msm_dsi_host_init()
1958 mutex_init(&msm_host->cmd_mutex); in msm_dsi_host_init()
1959 spin_lock_init(&msm_host->intr_lock); in msm_dsi_host_init()
1962 msm_host->workqueue = alloc_ordered_workqueue("dsi_drm_work", 0); in msm_dsi_host_init()
1963 if (!msm_host->workqueue) in msm_dsi_host_init()
1964 return -ENOMEM; in msm_dsi_host_init()
1966 INIT_WORK(&msm_host->err_work, dsi_err_worker); in msm_dsi_host_init()
1968 msm_dsi->id = msm_host->id; in msm_dsi_host_init()
1970 DBG("Dsi Host %d initialized", msm_host->id); in msm_dsi_host_init()
1979 if (msm_host->workqueue) { in msm_dsi_host_destroy()
1980 destroy_workqueue(msm_host->workqueue); in msm_dsi_host_destroy()
1981 msm_host->workqueue = NULL; in msm_dsi_host_destroy()
1984 mutex_destroy(&msm_host->cmd_mutex); in msm_dsi_host_destroy()
1985 mutex_destroy(&msm_host->dev_mutex); in msm_dsi_host_destroy()
1987 pm_runtime_disable(&msm_host->pdev->dev); in msm_dsi_host_destroy()
1994 const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd; in msm_dsi_host_modeset_init()
1997 msm_host->dev = dev; in msm_dsi_host_modeset_init()
1999 ret = cfg_hnd->ops->tx_buf_alloc(msm_host, SZ_4K); in msm_dsi_host_modeset_init()
2014 if (!msm_host->registered) { in msm_dsi_host_register()
2015 host->dev = &msm_host->pdev->dev; in msm_dsi_host_register()
2016 host->ops = &dsi_host_ops; in msm_dsi_host_register()
2021 msm_host->registered = true; in msm_dsi_host_register()
2031 if (msm_host->registered) { in msm_dsi_host_unregister()
2033 host->dev = NULL; in msm_dsi_host_unregister()
2034 host->ops = NULL; in msm_dsi_host_unregister()
2035 msm_host->registered = false; in msm_dsi_host_unregister()
2043 const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd; in msm_dsi_host_xfer_prepare()
2055 pm_runtime_get_sync(&msm_host->pdev->dev); in msm_dsi_host_xfer_prepare()
2056 cfg_hnd->ops->link_clk_set_rate(msm_host); in msm_dsi_host_xfer_prepare()
2057 cfg_hnd->ops->link_clk_enable(msm_host); in msm_dsi_host_xfer_prepare()
2061 if (!(msg->flags & MIPI_DSI_MSG_USE_LPM)) in msm_dsi_host_xfer_prepare()
2064 msm_host->dma_cmd_ctrl_restore = dsi_read(msm_host, REG_DSI_CTRL); in msm_dsi_host_xfer_prepare()
2066 msm_host->dma_cmd_ctrl_restore | in msm_dsi_host_xfer_prepare()
2078 const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd; in msm_dsi_host_xfer_restore()
2081 dsi_write(msm_host, REG_DSI_CTRL, msm_host->dma_cmd_ctrl_restore); in msm_dsi_host_xfer_restore()
2083 if (!(msg->flags & MIPI_DSI_MSG_USE_LPM)) in msm_dsi_host_xfer_restore()
2088 cfg_hnd->ops->link_clk_disable(msm_host); in msm_dsi_host_xfer_restore()
2089 pm_runtime_put(&msm_host->pdev->dev); in msm_dsi_host_xfer_restore()
2104 const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd; in msm_dsi_host_cmd_rx()
2108 int rlen = msg->rx_len; in msm_dsi_host_cmd_rx()
2125 buf = msm_host->rx_buf; in msm_dsi_host_cmd_rx()
2130 .channel = msg->channel, in msm_dsi_host_cmd_rx()
2143 return -EINVAL; in msm_dsi_host_cmd_rx()
2146 if ((cfg_hnd->major == MSM_DSI_VER_MAJOR_6G) && in msm_dsi_host_cmd_rx()
2147 (cfg_hnd->minor >= MSM_DSI_6G_VER_MINOR_V1_1)) { in msm_dsi_host_cmd_rx()
2160 } else if (ret < msg->tx_len) { in msm_dsi_host_cmd_rx()
2162 return -ECOMM; in msm_dsi_host_cmd_rx()
2181 diff = data_byte - rlen; in msm_dsi_host_cmd_rx()
2185 rlen -= data_byte; in msm_dsi_host_cmd_rx()
2189 dlen -= 2; /* 2 crc */ in msm_dsi_host_cmd_rx()
2190 dlen -= diff; in msm_dsi_host_cmd_rx()
2208 buf = msm_host->rx_buf + (10 - rlen); in msm_dsi_host_cmd_rx()
2210 buf = msm_host->rx_buf; in msm_dsi_host_cmd_rx()
2256 msm_host->cphy_mode = src_phy->cphy_mode; in msm_dsi_host_set_phy_mode()
2277 const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd; in msm_dsi_host_get_phy_clk_req()
2280 ret = cfg_hnd->ops->calc_clk_rate(msm_host, is_bonded_dsi); in msm_dsi_host_get_phy_clk_req()
2287 * "byte_clk" is in units of 16-bits (see dsi_calc_pclk), in msm_dsi_host_get_phy_clk_req()
2290 if (msm_host->cphy_mode) in msm_dsi_host_get_phy_clk_req()
2291 clk_req->bitclk_rate = msm_host->byte_clk_rate * 7; in msm_dsi_host_get_phy_clk_req()
2293 clk_req->bitclk_rate = msm_host->byte_clk_rate * 8; in msm_dsi_host_get_phy_clk_req()
2294 clk_req->escclk_rate = msm_host->esc_clk_rate; in msm_dsi_host_get_phy_clk_req()
2301 enable_irq(msm_host->irq); in msm_dsi_host_enable_irq()
2308 disable_irq(msm_host->irq); in msm_dsi_host_disable_irq()
2316 !!(msm_host->mode_flags & MIPI_DSI_MODE_VIDEO), true); in msm_dsi_host_enable()
2322 /* if (msm_panel->mode == MSM_DSI_CMD_MODE) { in msm_dsi_host_enable()
2324 * pm_runtime_put(&msm_host->pdev->dev); in msm_dsi_host_enable()
2327 msm_host->enabled = true; in msm_dsi_host_enable()
2335 msm_host->enabled = false; in msm_dsi_host_disable()
2337 !!(msm_host->mode_flags & MIPI_DSI_MODE_VIDEO), false); in msm_dsi_host_disable()
2352 if (!msm_host->sfpb) in msm_dsi_sfpb_config()
2357 regmap_update_bits(msm_host->sfpb, REG_SFPB_GPREG, in msm_dsi_sfpb_config()
2367 const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd; in msm_dsi_host_power_on()
2370 mutex_lock(&msm_host->dev_mutex); in msm_dsi_host_power_on()
2371 if (msm_host->power_on) { in msm_dsi_host_power_on()
2376 msm_host->byte_intf_clk_rate = msm_host->byte_clk_rate; in msm_dsi_host_power_on()
2377 if (phy_shared_timings->byte_intf_clk_div_2) in msm_dsi_host_power_on()
2378 msm_host->byte_intf_clk_rate /= 2; in msm_dsi_host_power_on()
2382 ret = regulator_bulk_enable(msm_host->cfg_hnd->cfg->num_regulators, in msm_dsi_host_power_on()
2383 msm_host->supplies); in msm_dsi_host_power_on()
2390 pm_runtime_get_sync(&msm_host->pdev->dev); in msm_dsi_host_power_on()
2391 ret = cfg_hnd->ops->link_clk_set_rate(msm_host); in msm_dsi_host_power_on()
2393 ret = cfg_hnd->ops->link_clk_enable(msm_host); in msm_dsi_host_power_on()
2400 ret = pinctrl_pm_select_default_state(&msm_host->pdev->dev); in msm_dsi_host_power_on()
2411 msm_host->power_on = true; in msm_dsi_host_power_on()
2412 mutex_unlock(&msm_host->dev_mutex); in msm_dsi_host_power_on()
2417 cfg_hnd->ops->link_clk_disable(msm_host); in msm_dsi_host_power_on()
2418 pm_runtime_put(&msm_host->pdev->dev); in msm_dsi_host_power_on()
2420 regulator_bulk_disable(msm_host->cfg_hnd->cfg->num_regulators, in msm_dsi_host_power_on()
2421 msm_host->supplies); in msm_dsi_host_power_on()
2423 mutex_unlock(&msm_host->dev_mutex); in msm_dsi_host_power_on()
2430 const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd; in msm_dsi_host_power_off()
2432 mutex_lock(&msm_host->dev_mutex); in msm_dsi_host_power_off()
2433 if (!msm_host->power_on) { in msm_dsi_host_power_off()
2440 pinctrl_pm_select_sleep_state(&msm_host->pdev->dev); in msm_dsi_host_power_off()
2442 cfg_hnd->ops->link_clk_disable(msm_host); in msm_dsi_host_power_off()
2443 pm_runtime_put(&msm_host->pdev->dev); in msm_dsi_host_power_off()
2445 regulator_bulk_disable(msm_host->cfg_hnd->cfg->num_regulators, in msm_dsi_host_power_off()
2446 msm_host->supplies); in msm_dsi_host_power_off()
2450 DBG("-"); in msm_dsi_host_power_off()
2452 msm_host->power_on = false; in msm_dsi_host_power_off()
2455 mutex_unlock(&msm_host->dev_mutex); in msm_dsi_host_power_off()
2464 if (msm_host->mode) { in msm_dsi_host_set_display_mode()
2465 drm_mode_destroy(msm_host->dev, msm_host->mode); in msm_dsi_host_set_display_mode()
2466 msm_host->mode = NULL; in msm_dsi_host_set_display_mode()
2469 msm_host->mode = drm_mode_duplicate(msm_host->dev, mode); in msm_dsi_host_set_display_mode()
2470 if (!msm_host->mode) { in msm_dsi_host_set_display_mode()
2472 return -ENOMEM; in msm_dsi_host_set_display_mode()
2482 struct drm_dsc_config *dsc = msm_host->dsc; in msm_dsi_host_check_dsc()
2483 int pic_width = mode->hdisplay; in msm_dsi_host_check_dsc()
2484 int pic_height = mode->vdisplay; in msm_dsi_host_check_dsc()
2486 if (!msm_host->dsc) in msm_dsi_host_check_dsc()
2489 if (pic_width % dsc->slice_width) { in msm_dsi_host_check_dsc()
2491 pic_width, dsc->slice_width); in msm_dsi_host_check_dsc()
2495 if (pic_height % dsc->slice_height) { in msm_dsi_host_check_dsc()
2497 pic_height, dsc->slice_height); in msm_dsi_host_check_dsc()
2506 return to_msm_dsi_host(host)->mode_flags; in msm_dsi_host_get_mode_flags()
2513 pm_runtime_get_sync(&msm_host->pdev->dev); in msm_dsi_host_snapshot()
2515 msm_disp_snapshot_add_block(disp_state, msm_host->ctrl_size, in msm_dsi_host_snapshot()
2516 msm_host->ctrl_base, "dsi%d_ctrl", msm_host->id); in msm_dsi_host_snapshot()
2518 pm_runtime_put_sync(&msm_host->pdev->dev); in msm_dsi_host_snapshot()
2531 /* use 24-bit RGB test pttern */ in msm_dsi_host_video_test_pattern_setup()
2564 bool is_video_mode = !!(msm_host->mode_flags & MIPI_DSI_MODE_VIDEO); in msm_dsi_host_test_pattern_en()
2586 return msm_host->dsc; in msm_dsi_host_get_dsc_config()