Lines Matching full:rm
34 * @rm: DPU Resource Manager handle
41 struct dpu_rm *rm, in dpu_rm_init() argument
48 if (!rm || !cat || !mmio) { in dpu_rm_init()
54 memset(rm, 0, sizeof(*rm)); in dpu_rm_init()
67 rm->mixer_blks[lm->id - LM_0] = &hw->base; in dpu_rm_init()
81 rm->merge_3d_blks[merge_3d->id - MERGE_3D_0] = &hw->base; in dpu_rm_init()
96 hw->merge_3d = to_dpu_hw_merge_3d(rm->merge_3d_blks[pp->merge_3d - MERGE_3D_0]); in dpu_rm_init()
97 rm->pingpong_blks[pp->id - PINGPONG_0] = &hw->base; in dpu_rm_init()
110 rm->hw_intf[intf->id - INTF_0] = hw; in dpu_rm_init()
123 rm->hw_wb[wb->id - WB_0] = hw; in dpu_rm_init()
136 rm->cwb_blks[cwb->id - CWB_0] = &hw->base; in dpu_rm_init()
149 rm->ctl_blks[ctl->id - CTL_0] = &hw->base; in dpu_rm_init()
162 rm->dspp_blks[dspp->id - DSPP_0] = &hw->base; in dpu_rm_init()
179 rm->dsc_blks[dsc->id - DSC_0] = &hw->base; in dpu_rm_init()
192 rm->hw_sspp[sspp->id - SSPP_NONE] = hw; in dpu_rm_init()
204 rm->cdm_blk = &hw->base; in dpu_rm_init()
220 * @rm: dpu resource manager handle
221 * @primary_idx: index of primary mixer in rm->mixer_blks[]
225 static int _dpu_rm_get_lm_peer(struct dpu_rm *rm, int primary_idx) in _dpu_rm_get_lm_peer() argument
229 prim_lm_cfg = to_dpu_hw_mixer(rm->mixer_blks[primary_idx])->cap; in _dpu_rm_get_lm_peer()
236 static int _dpu_rm_reserve_cwb_mux_and_pingpongs(struct dpu_rm *rm, in _dpu_rm_reserve_cwb_mux_and_pingpongs() argument
253 for (int i = 0; i < ARRAY_SIZE(rm->mixer_blks) && in _dpu_rm_reserve_cwb_mux_and_pingpongs()
255 for (int j = 0; j < ARRAY_SIZE(rm->cwb_blks); j++) { in _dpu_rm_reserve_cwb_mux_and_pingpongs()
260 * Since the RM HW block array index is based on the HW in _dpu_rm_reserve_cwb_mux_and_pingpongs()
293 * @rm: dpu resource manager handle
296 * @lm_idx: index of proposed layer mixer in rm->mixer_blks[], function checks
300 * mixer in rm->pingpong_blks[].
302 * mixer in rm->dspp_blks[].
306 static bool _dpu_rm_check_lm_and_get_connected_blks(struct dpu_rm *rm, in _dpu_rm_check_lm_and_get_connected_blks() argument
320 lm_cfg = to_dpu_hw_mixer(rm->mixer_blks[lm_idx])->cap; in _dpu_rm_check_lm_and_get_connected_blks()
322 if (idx < 0 || idx >= ARRAY_SIZE(rm->pingpong_blks)) { in _dpu_rm_check_lm_and_get_connected_blks()
338 if (idx < 0 || idx >= ARRAY_SIZE(rm->dspp_blks)) { in _dpu_rm_check_lm_and_get_connected_blks()
353 static int _dpu_rm_reserve_lms(struct dpu_rm *rm, in _dpu_rm_reserve_lms() argument
370 for (i = 0; i < ARRAY_SIZE(rm->mixer_blks) && in _dpu_rm_reserve_lms()
372 if (!rm->mixer_blks[i]) in _dpu_rm_reserve_lms()
378 if (!_dpu_rm_check_lm_and_get_connected_blks(rm, global_state, in _dpu_rm_reserve_lms()
388 int j = _dpu_rm_get_lm_peer(rm, i); in _dpu_rm_reserve_lms()
394 if (!rm->mixer_blks[j]) in _dpu_rm_reserve_lms()
397 if (!_dpu_rm_check_lm_and_get_connected_blks(rm, in _dpu_rm_reserve_lms()
428 struct dpu_rm *rm, in _dpu_rm_reserve_ctls() argument
452 for (j = 0; j < ARRAY_SIZE(rm->ctl_blks); j++) { in _dpu_rm_reserve_ctls()
457 if (!rm->ctl_blks[j]) in _dpu_rm_reserve_ctls()
462 ctl = to_dpu_hw_ctl(rm->ctl_blks[j]); in _dpu_rm_reserve_ctls()
516 static int _dpu_rm_dsc_alloc(struct dpu_rm *rm, in _dpu_rm_dsc_alloc() argument
526 for (dsc_idx = 0; dsc_idx < ARRAY_SIZE(rm->dsc_blks) && in _dpu_rm_dsc_alloc()
528 if (!rm->dsc_blks[dsc_idx]) in _dpu_rm_dsc_alloc()
556 static int _dpu_rm_dsc_alloc_pair(struct dpu_rm *rm, in _dpu_rm_dsc_alloc_pair() argument
566 for (dsc_idx = 0; dsc_idx < ARRAY_SIZE(rm->dsc_blks) && in _dpu_rm_dsc_alloc_pair()
568 if (!rm->dsc_blks[dsc_idx] || in _dpu_rm_dsc_alloc_pair()
569 !rm->dsc_blks[dsc_idx + 1]) in _dpu_rm_dsc_alloc_pair()
612 static int _dpu_rm_reserve_dsc(struct dpu_rm *rm, in _dpu_rm_reserve_dsc() argument
632 return _dpu_rm_dsc_alloc_pair(rm, global_state, crtc_id, top); in _dpu_rm_reserve_dsc()
634 return _dpu_rm_dsc_alloc(rm, global_state, crtc_id, top); in _dpu_rm_reserve_dsc()
639 static int _dpu_rm_reserve_cdm(struct dpu_rm *rm, in _dpu_rm_reserve_cdm() argument
645 if (!rm->cdm_blk) { in _dpu_rm_reserve_cdm()
666 struct dpu_rm *rm, in _dpu_rm_make_reservation() argument
673 ret = _dpu_rm_reserve_lms(rm, global_state, crtc_id, topology); in _dpu_rm_make_reservation()
680 ret = _dpu_rm_reserve_cwb_mux_and_pingpongs(rm, global_state, in _dpu_rm_make_reservation()
686 ret = _dpu_rm_reserve_ctls(rm, global_state, crtc_id, in _dpu_rm_make_reservation()
693 ret = _dpu_rm_reserve_dsc(rm, global_state, crtc_id, topology); in _dpu_rm_make_reservation()
698 ret = _dpu_rm_reserve_cdm(rm, global_state, crtc_id, topology->num_cdm); in _dpu_rm_make_reservation()
753 * @rm: DPU Resource Manager handle
760 struct dpu_rm *rm, in dpu_rm_reserve() argument
778 ret = _dpu_rm_make_reservation(rm, global_state, crtc->base.id, topology); in dpu_rm_reserve()
785 static struct dpu_hw_sspp *dpu_rm_try_sspp(struct dpu_rm *rm, in dpu_rm_try_sspp() argument
795 for (i = 0; i < ARRAY_SIZE(rm->hw_sspp); i++) { in dpu_rm_try_sspp()
796 if (!rm->hw_sspp[i]) in dpu_rm_try_sspp()
802 hw_sspp = rm->hw_sspp[i]; in dpu_rm_try_sspp()
822 return rm->hw_sspp[i]; in dpu_rm_try_sspp()
830 * @rm: DPU Resource Manager handle
835 struct dpu_hw_sspp *dpu_rm_reserve_sspp(struct dpu_rm *rm, in dpu_rm_reserve_sspp() argument
843 hw_sspp = dpu_rm_try_sspp(rm, global_state, crtc, reqs, SSPP_TYPE_DMA); in dpu_rm_reserve_sspp()
845 hw_sspp = dpu_rm_try_sspp(rm, global_state, crtc, reqs, SSPP_TYPE_RGB); in dpu_rm_reserve_sspp()
847 hw_sspp = dpu_rm_try_sspp(rm, global_state, crtc, reqs, SSPP_TYPE_VIG); in dpu_rm_reserve_sspp()
870 * @rm: DPU Resource Manager handle
877 int dpu_rm_get_assigned_resources(struct dpu_rm *rm, in dpu_rm_get_assigned_resources() argument
889 hw_blks = rm->pingpong_blks; in dpu_rm_get_assigned_resources()
891 max_blks = ARRAY_SIZE(rm->pingpong_blks); in dpu_rm_get_assigned_resources()
894 hw_blks = rm->mixer_blks; in dpu_rm_get_assigned_resources()
896 max_blks = ARRAY_SIZE(rm->mixer_blks); in dpu_rm_get_assigned_resources()
899 hw_blks = rm->ctl_blks; in dpu_rm_get_assigned_resources()
901 max_blks = ARRAY_SIZE(rm->ctl_blks); in dpu_rm_get_assigned_resources()
904 hw_blks = rm->dspp_blks; in dpu_rm_get_assigned_resources()
906 max_blks = ARRAY_SIZE(rm->dspp_blks); in dpu_rm_get_assigned_resources()
909 hw_blks = rm->dsc_blks; in dpu_rm_get_assigned_resources()
911 max_blks = ARRAY_SIZE(rm->dsc_blks); in dpu_rm_get_assigned_resources()
914 hw_blks = &rm->cdm_blk; in dpu_rm_get_assigned_resources()
919 hw_blks = rm->cwb_blks; in dpu_rm_get_assigned_resources()
921 max_blks = ARRAY_SIZE(rm->cwb_blks); in dpu_rm_get_assigned_resources()
924 DPU_ERROR("blk type %d not managed by rm\n", type); in dpu_rm_get_assigned_resources()
977 * dpu_rm_print_state - output the RM private state
984 const struct dpu_rm *rm = global_state->rm; in dpu_rm_print_state() local
990 dpu_rm_print_state_helper(p, rm->pingpong_blks[i], in dpu_rm_print_state()
996 dpu_rm_print_state_helper(p, rm->mixer_blks[i], in dpu_rm_print_state()
1002 dpu_rm_print_state_helper(p, rm->ctl_blks[i], in dpu_rm_print_state()
1008 dpu_rm_print_state_helper(p, rm->dspp_blks[i], in dpu_rm_print_state()
1014 dpu_rm_print_state_helper(p, rm->dsc_blks[i], in dpu_rm_print_state()
1019 dpu_rm_print_state_helper(p, rm->cdm_blk, in dpu_rm_print_state()
1026 dpu_rm_print_state_helper(p, rm->hw_sspp[i] ? &rm->hw_sspp[i]->base : NULL, in dpu_rm_print_state()
1032 dpu_rm_print_state_helper(p, rm->cwb_blks[i], in dpu_rm_print_state()