38 static void dpu_hw_dsc_disable(struct dpu_hw_dsc *dsc)  in dpu_hw_dsc_disable()  argument
40 	struct dpu_hw_blk_reg_map *c = &dsc->hw;  in dpu_hw_dsc_disable()
46 			      struct drm_dsc_config *dsc,  in dpu_hw_dsc_config()  argument
55 	bool input_10_bits = dsc->bits_per_component == 10;  in dpu_hw_dsc_config()
62 	slice_last_group_size = (dsc->slice_width + 2) % 3;  in dpu_hw_dsc_config()
67 	data |= (dsc->bits_per_pixel << 8);  in dpu_hw_dsc_config()
68 	data |= (dsc->block_pred_enable << 7);  in dpu_hw_dsc_config()
69 	data |= (dsc->line_buf_depth << 3);  in dpu_hw_dsc_config()
70 	data |= (dsc->simple_422 << 2);  in dpu_hw_dsc_config()
71 	data |= (dsc->convert_rgb << 1);  in dpu_hw_dsc_config()
76 	data = dsc->pic_width << 16;  in dpu_hw_dsc_config()
77 	data |= dsc->pic_height;  in dpu_hw_dsc_config()
80 	data = dsc->slice_width << 16;  in dpu_hw_dsc_config()
81 	data |= dsc->slice_height;  in dpu_hw_dsc_config()
84 	data = dsc->slice_chunk_size << 16;  in dpu_hw_dsc_config()
87 	data = dsc->initial_dec_delay << 16;  in dpu_hw_dsc_config()
88 	data |= dsc->initial_xmit_delay;  in dpu_hw_dsc_config()
91 	data = dsc->initial_scale_value;  in dpu_hw_dsc_config()
94 	data = dsc->scale_decrement_interval;  in dpu_hw_dsc_config()
97 	data = dsc->scale_increment_interval;  in dpu_hw_dsc_config()
100 	data = dsc->first_line_bpg_offset;  in dpu_hw_dsc_config()
103 	data = dsc->nfl_bpg_offset << 16;  in dpu_hw_dsc_config()
104 	data |= dsc->slice_bpg_offset;  in dpu_hw_dsc_config()
107 	data = dsc->initial_offset << 16;  in dpu_hw_dsc_config()
108 	data |= dsc->final_offset;  in dpu_hw_dsc_config()
111 	det_thresh_flatness = drm_dsc_flatness_det_thresh(dsc);  in dpu_hw_dsc_config()
113 	data |= dsc->flatness_max_qp << 5;  in dpu_hw_dsc_config()
114 	data |= dsc->flatness_min_qp;  in dpu_hw_dsc_config()
117 	data = dsc->rc_model_size;  in dpu_hw_dsc_config()
120 	data = dsc->rc_tgt_offset_low << 18;  in dpu_hw_dsc_config()
121 	data |= dsc->rc_tgt_offset_high << 14;  in dpu_hw_dsc_config()
122 	data |= dsc->rc_quant_incr_limit1 << 9;  in dpu_hw_dsc_config()
123 	data |= dsc->rc_quant_incr_limit0 << 4;  in dpu_hw_dsc_config()
124 	data |= dsc->rc_edge_factor;  in dpu_hw_dsc_config()
129 				     struct drm_dsc_config *dsc)  in dpu_hw_dsc_config_thresh()  argument
131 	struct drm_dsc_rc_range_parameters *rc = dsc->rc_range_params;  in dpu_hw_dsc_config_thresh()
138 		DPU_REG_WRITE(c, off, dsc->rc_buf_thresh[i]);  in dpu_hw_dsc_config_thresh()
175 		DRM_DEBUG_KMS("Binding dsc:%d to pp:%d\n",  in dpu_hw_dsc_bind_pingpong_blk()
178 		DRM_DEBUG_KMS("Unbinding dsc:%d from any pp\n",  in dpu_hw_dsc_bind_pingpong_blk()
195  * dpu_hw_dsc_init() - Initializes the DSC hw driver object.
197  * @cfg:  DSC catalog entry for which driver object is required