drm/imagination/pvr_fw.h

1 /* SPDX-License-Identifier: GPL-2.0-only OR MIT */
27  * struct pvr_fw_object - container for firmware memory allocations
37 	 * @fw_mm_node: Node representing mapping in FW address space. @pvr_obj->lock must
63  * struct pvr_fw_defs - FW processor function table and static definitions
70 	 * @pvr_dev: Target PowerVR device.
87 	 * @pvr_dev: Target PowerVR device.
97 	 * @pvr_dev: Target PowerVR device.
119 	 * @pvr_dev: Target PowerVR device.
134 	 * @pvr_dev: Target PowerVR device.
159 	 * @pvr_dev: Target PowerVR device.
214  * struct pvr_fw_mem - FW memory allocations
235 	/** @code: Driver-side copy of firmware code. */
238 	/** @data: Driver-side copy of firmware data. */
242 	 * @core_code: Driver-side copy of firmware core code. May be %NULL if firmware does not
248 	 * @core_data: Driver-side copy of firmware core data. May be %NULL if firmware does not
292 	/** @gpu_util_fwcb_obj: Object representing FW GPU utilisation control structure. */
329 		/** @mips_data: Pointer to MIPS-specific data. */
335 		/** @gpu_addr: Base address of firmware heap in GPU address space. */
404 	pvr_cr_read32((pvr_dev), (pvr_dev)->fw_dev.defs->irq.name ## _reg)
407 	pvr_cr_write32((pvr_dev), (pvr_dev)->fw_dev.defs->irq.name ## _reg, value)
410 	(pvr_fw_irq_read_reg(pvr_dev, status) & (pvr_dev)->fw_dev.defs->irq.event_mask)
413 	pvr_fw_irq_write_reg(pvr_dev, clear, (pvr_dev)->fw_dev.defs->irq.clear_mask)
416 	pvr_fw_irq_write_reg(pvr_dev, enable, (pvr_dev)->fw_dev.defs->irq.event_mask)
465 	return pvr_gem_object_vmap(fw_obj->gem);  in pvr_fw_object_vmap()
471 	pvr_gem_object_vunmap(fw_obj->gem);  in pvr_fw_object_vunmap()
484  * pvr_fw_object_get_dma_addr() - Get DMA address for given offset in firmware
492  *  * -%EINVAL if object is not currently backed, or if @offset is out of valid
498 	return pvr_gem_get_dma_addr(fw_obj->gem, offset, dma_addr_out);  in pvr_fw_object_get_dma_addr()