Lines Matching +full:cpu +full:- +full:centric
2 * Copyright © 2015-2016 Intel Corporation
40 * captured by DMA from the GPU, unsynchronized with and unrelated to the CPU.
44 * without special privileges. Access to system-wide metrics requires root
58 * might sample sets of tightly-coupled counters, depending on the
70 * interleaved with event-type specific members.
74 * with the CPU, using HW specific packing formats for counter sets. Sometimes
76 * would be acceptable to expose them to unprivileged applications - to hide
88 * into perf's currently cpu centric design.
96 * side-band OA data captured via MI_REPORT_PERF_COUNT commands; we're
102 * For posterity, in case we might re-visit trying to adapt core perf to be
106 * - The perf based OA PMU driver broke some significant design assumptions:
108 * Existing perf pmus are used for profiling work on a cpu and we were
110 * implications, the need to fake cpu-related data (such as user/kernel
112 * as a way to forward device-specific status records.
115 * involvement from the CPU, making our PMU driver the first of a kind.
117 * Given the way we were periodically forward data from the GPU-mapped, OA
123 * explicitly initiated from the cpu (say in response to a userspace read())
125 * trigger a report from the cpu on demand.
130 * opened, there's no clear precedent for being able to provide group-wide
139 * for combining with the side-band raw reports it captures using
142 * - As a side note on perf's grouping feature; there was also some concern
158 * one time. The OA unit is not designed to allow re-configuration while in
178 * - It felt like our perf based PMU was making some technical compromises
182 * cpu core, while our device pmu related to neither. Events opened with a
184 * that process - so not appropriate for us. When an event is related to a
185 * cpu id, perf ensures pmu methods will be invoked via an inter process
187 * perf events for a specific cpu. This was workable but it meant the
229 #define OA_TAKEN(tail, head) ((tail - head) & (OA_BUFFER_SIZE - 1))
237 * CPU).
240 * by checking for a zeroed report-id field in tail reports, we want to account
260 * non-periodic reports (such as on context switch) or the OA unit may be
315 * code assumes all reports have a power-of-two size and ~(size - 1) can
343 * struct perf_open_properties - for validated properties given to open a stream
358 * @poll_oa_period: The period in nanoseconds at which the CPU will check for OA
402 kfree(oa_config->flex_regs); in i915_oa_config_release()
403 kfree(oa_config->b_counter_regs); in i915_oa_config_release()
404 kfree(oa_config->mux_regs); in i915_oa_config_release()
415 oa_config = idr_find(&perf->metrics_idr, metrics_set); in i915_perf_get_oa_config()
425 i915_oa_config_put(oa_bo->oa_config); in free_oa_config_bo()
426 i915_vma_put(oa_bo->vma); in free_oa_config_bo()
433 return &stream->engine->oa_group->regs; in __oa_regs()
438 struct intel_uncore *uncore = stream->uncore; in gen12_oa_hw_tail_read()
440 return intel_uncore_read(uncore, __oa_regs(stream)->oa_tail_ptr) & in gen12_oa_hw_tail_read()
446 struct intel_uncore *uncore = stream->uncore; in gen8_oa_hw_tail_read()
453 struct intel_uncore *uncore = stream->uncore; in gen7_oa_hw_tail_read()
460 ((__s)->oa_buffer.format->header == HDR_64_BIT)
470 (GRAPHICS_VER(stream->perf->i915) == 12 ? in oa_report_reason()
486 stream->perf->gen8_valid_ctx_bit); in oa_report_ctx_invalid()
508 return ctx_id & stream->specific_ctx_id_mask; in oa_context_id()
520 * oa_buffer_check_unlocked - check for data and update tail ptr state
528 * pointer having a race with respect to what data is visible to the CPU.
544 u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma); in oa_buffer_check_unlocked()
545 int report_size = stream->oa_buffer.format->size; in oa_buffer_check_unlocked()
556 spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags); in oa_buffer_check_unlocked()
558 hw_tail = stream->perf->ops.oa_hw_tail_read(stream); in oa_buffer_check_unlocked()
559 hw_tail -= gtt_offset; in oa_buffer_check_unlocked()
566 partial_report_size = OA_TAKEN(hw_tail, stream->oa_buffer.tail); in oa_buffer_check_unlocked()
586 while (OA_TAKEN(tail, stream->oa_buffer.tail) >= report_size) { in oa_buffer_check_unlocked()
587 void *report = stream->oa_buffer.vaddr + tail; in oa_buffer_check_unlocked()
593 tail = (tail - report_size) & (OA_BUFFER_SIZE - 1); in oa_buffer_check_unlocked()
597 __ratelimit(&stream->perf->tail_pointer_race)) in oa_buffer_check_unlocked()
598 drm_notice(&stream->uncore->i915->drm, in oa_buffer_check_unlocked()
600 stream->oa_buffer.head, tail, hw_tail); in oa_buffer_check_unlocked()
602 stream->oa_buffer.tail = tail; in oa_buffer_check_unlocked()
604 pollin = OA_TAKEN(stream->oa_buffer.tail, in oa_buffer_check_unlocked()
605 stream->oa_buffer.head) >= report_size; in oa_buffer_check_unlocked()
607 spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags); in oa_buffer_check_unlocked()
613 * append_oa_status - Appends a status record to a userspace read() buffer.
614 * @stream: An i915-perf stream opened for OA metrics
635 if ((count - *offset) < header.size) in append_oa_status()
636 return -ENOSPC; in append_oa_status()
639 return -EFAULT; in append_oa_status()
647 * append_oa_sample - Copies single OA report into userspace read() buffer.
648 * @stream: An i915-perf stream opened for OA metrics
655 * properties when opening a stream, tracked as `stream->sample_flags`. This
669 int report_size = stream->oa_buffer.format->size; in append_oa_sample()
676 header.size = stream->sample_size; in append_oa_sample()
678 if ((count - *offset) < header.size) in append_oa_sample()
679 return -ENOSPC; in append_oa_sample()
683 return -EFAULT; in append_oa_sample()
686 oa_buf_end = stream->oa_buffer.vaddr + OA_BUFFER_SIZE; in append_oa_sample()
687 report_size_partial = oa_buf_end - report; in append_oa_sample()
691 return -EFAULT; in append_oa_sample()
694 if (copy_to_user(buf, stream->oa_buffer.vaddr, in append_oa_sample()
695 report_size - report_size_partial)) in append_oa_sample()
696 return -EFAULT; in append_oa_sample()
698 return -EFAULT; in append_oa_sample()
707 * gen8_append_oa_reports - Copies all buffered OA reports into
709 * @stream: An i915-perf stream opened for OA metrics
714 * Notably any error condition resulting in a short read (-%ENOSPC or
715 * -%EFAULT) will be returned even though one or more records may
722 * and back-to-front you're not alone, but this follows the
732 struct intel_uncore *uncore = stream->uncore; in gen8_append_oa_reports()
733 int report_size = stream->oa_buffer.format->size; in gen8_append_oa_reports()
734 u8 *oa_buf_base = stream->oa_buffer.vaddr; in gen8_append_oa_reports()
735 u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma); in gen8_append_oa_reports()
736 u32 mask = (OA_BUFFER_SIZE - 1); in gen8_append_oa_reports()
742 if (drm_WARN_ON(&uncore->i915->drm, !stream->enabled)) in gen8_append_oa_reports()
743 return -EIO; in gen8_append_oa_reports()
745 spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags); in gen8_append_oa_reports()
747 head = stream->oa_buffer.head; in gen8_append_oa_reports()
748 tail = stream->oa_buffer.tail; in gen8_append_oa_reports()
750 spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags); in gen8_append_oa_reports()
758 if (drm_WARN_ONCE(&uncore->i915->drm, in gen8_append_oa_reports()
763 return -EIO; in gen8_append_oa_reports()
784 * invalid to be sure we avoid false-positive, single-context in gen8_append_oa_reports()
796 * context-switch-report: This is a report with the reason type in gen8_append_oa_reports()
797 * being context-switch. It is generated when a context switches in gen8_append_oa_reports()
800 * context-valid-bit: A bit that is set in the report ID field in gen8_append_oa_reports()
803 * gpu-idle: A condition characterized by a in gen8_append_oa_reports()
804 * context-switch-report with context-valid-bit set to 0. in gen8_append_oa_reports()
806 * On prior platforms, context-id-valid bit is set to 0 only in gen8_append_oa_reports()
809 * On XEHP platforms, context-valid-bit is set to 1 in a context in gen8_append_oa_reports()
815 * context ID field and the context-valid-bit is 0. The logic in gen8_append_oa_reports()
823 GRAPHICS_VER_FULL(stream->engine->i915) < IP_VER(12, 55)) { in gen8_append_oa_reports()
831 * stop the counters from updating as system-wide / global in gen8_append_oa_reports()
835 * filtered on the cpu but it's not worth trying to in gen8_append_oa_reports()
839 * provide a side-band view of the real values. in gen8_append_oa_reports()
843 * needs be forwarded bookend context-switch reports so that it in gen8_append_oa_reports()
856 * switches since it's not-uncommon for periodic samples to in gen8_append_oa_reports()
859 if (!stream->ctx || in gen8_append_oa_reports()
860 stream->specific_ctx_id == ctx_id || in gen8_append_oa_reports()
861 stream->oa_buffer.last_ctx_id == stream->specific_ctx_id || in gen8_append_oa_reports()
868 if (stream->ctx && in gen8_append_oa_reports()
869 stream->specific_ctx_id != ctx_id) { in gen8_append_oa_reports()
878 stream->oa_buffer.last_ctx_id = ctx_id; in gen8_append_oa_reports()
889 u8 *oa_buf_end = stream->oa_buffer.vaddr + in gen8_append_oa_reports()
891 u32 part = oa_buf_end - (u8 *)report32; in gen8_append_oa_reports()
898 memset(oa_buf_base, 0, report_size - part); in gen8_append_oa_reports()
906 oaheadptr = GRAPHICS_VER(stream->perf->i915) == 12 ? in gen8_append_oa_reports()
907 __oa_regs(stream)->oa_head_ptr : in gen8_append_oa_reports()
910 spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags); in gen8_append_oa_reports()
918 stream->oa_buffer.head = head; in gen8_append_oa_reports()
920 spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags); in gen8_append_oa_reports()
927 * gen8_oa_read - copy status records then buffered OA reports
928 * @stream: An i915-perf stream opened for OA metrics
951 struct intel_uncore *uncore = stream->uncore; in gen8_oa_read()
956 if (drm_WARN_ON(&uncore->i915->drm, !stream->oa_buffer.vaddr)) in gen8_oa_read()
957 return -EIO; in gen8_oa_read()
959 oastatus_reg = GRAPHICS_VER(stream->perf->i915) == 12 ? in gen8_oa_read()
960 __oa_regs(stream)->oa_status : in gen8_oa_read()
985 drm_dbg(&stream->perf->i915->drm, in gen8_oa_read()
987 stream->period_exponent); in gen8_oa_read()
989 stream->perf->ops.oa_disable(stream); in gen8_oa_read()
990 stream->perf->ops.oa_enable(stream); in gen8_oa_read()
993 * Note: .oa_enable() is expected to re-init the oabuffer and in gen8_oa_read()
1008 IS_GRAPHICS_VER(uncore->i915, 8, 11) ? in gen8_oa_read()
1017 * gen7_append_oa_reports - Copies all buffered OA reports into
1019 * @stream: An i915-perf stream opened for OA metrics
1024 * Notably any error condition resulting in a short read (-%ENOSPC or
1025 * -%EFAULT) will be returned even though one or more records may
1032 * and back-to-front you're not alone, but this follows the
1042 struct intel_uncore *uncore = stream->uncore; in gen7_append_oa_reports()
1043 int report_size = stream->oa_buffer.format->size; in gen7_append_oa_reports()
1044 u8 *oa_buf_base = stream->oa_buffer.vaddr; in gen7_append_oa_reports()
1045 u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma); in gen7_append_oa_reports()
1046 u32 mask = (OA_BUFFER_SIZE - 1); in gen7_append_oa_reports()
1052 if (drm_WARN_ON(&uncore->i915->drm, !stream->enabled)) in gen7_append_oa_reports()
1053 return -EIO; in gen7_append_oa_reports()
1055 spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags); in gen7_append_oa_reports()
1057 head = stream->oa_buffer.head; in gen7_append_oa_reports()
1058 tail = stream->oa_buffer.tail; in gen7_append_oa_reports()
1060 spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags); in gen7_append_oa_reports()
1068 if (drm_WARN_ONCE(&uncore->i915->drm, in gen7_append_oa_reports()
1073 return -EIO; in gen7_append_oa_reports()
1090 if (drm_WARN_ON(&uncore->i915->drm, in gen7_append_oa_reports()
1091 (OA_BUFFER_SIZE - head) < report_size)) { in gen7_append_oa_reports()
1092 drm_err(&uncore->i915->drm, in gen7_append_oa_reports()
1093 "Spurious OA head ptr: non-integral report offset\n"); in gen7_append_oa_reports()
1097 /* The report-ID field for periodic samples includes in gen7_append_oa_reports()
1104 if (__ratelimit(&stream->perf->spurious_report_rs)) in gen7_append_oa_reports()
1105 drm_notice(&uncore->i915->drm, in gen7_append_oa_reports()
1122 spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags); in gen7_append_oa_reports()
1127 stream->oa_buffer.head = head; in gen7_append_oa_reports()
1129 spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags); in gen7_append_oa_reports()
1136 * gen7_oa_read - copy status records then buffered OA reports
1137 * @stream: An i915-perf stream opened for OA metrics
1156 struct intel_uncore *uncore = stream->uncore; in gen7_oa_read()
1160 if (drm_WARN_ON(&uncore->i915->drm, !stream->oa_buffer.vaddr)) in gen7_oa_read()
1161 return -EIO; in gen7_oa_read()
1170 oastatus1 &= ~stream->perf->gen7_latched_oastatus1; in gen7_oa_read()
1174 * - The status can be interpreted to mean that the buffer is in gen7_oa_read()
1176 * which will start to report a near-empty buffer after an in gen7_oa_read()
1181 * - Since it also implies the HW has started overwriting old in gen7_oa_read()
1186 * - In the future we may want to introduce a flight recorder in gen7_oa_read()
1198 drm_dbg(&stream->perf->i915->drm, in gen7_oa_read()
1200 stream->period_exponent); in gen7_oa_read()
1202 stream->perf->ops.oa_disable(stream); in gen7_oa_read()
1203 stream->perf->ops.oa_enable(stream); in gen7_oa_read()
1213 stream->perf->gen7_latched_oastatus1 |= in gen7_oa_read()
1221 * i915_oa_wait_unlocked - handles blocking IO until OA data available
1222 * @stream: An i915-perf stream opened for OA metrics
1225 * for OA metrics. It waits until the hrtimer callback finds a non-empty
1229 * since any subsequent read handling will return -EAGAIN if there isn't
1237 if (!stream->periodic) in i915_oa_wait_unlocked()
1238 return -EIO; in i915_oa_wait_unlocked()
1240 return wait_event_interruptible(stream->poll_wq, in i915_oa_wait_unlocked()
1245 * i915_oa_poll_wait - call poll_wait() for an OA stream poll()
1246 * @stream: An i915-perf stream opened for OA metrics
1258 poll_wait(file, &stream->poll_wq, wait); in i915_oa_poll_wait()
1262 * i915_oa_read - just calls through to &i915_oa_ops->read
1263 * @stream: An i915-perf stream opened for OA metrics
1278 return stream->perf->ops.read(stream, buf, count, offset); in i915_oa_read()
1284 struct i915_gem_context *ctx = stream->ctx; in oa_pin_context()
1287 int err = -ENODEV; in oa_pin_context()
1290 if (ce->engine != stream->engine) /* first match! */ in oa_pin_context()
1308 if (err == -EDEADLK) { in oa_pin_context()
1318 stream->pinned_ctx = ce; in oa_pin_context()
1319 return stream->pinned_ctx; in oa_pin_context()
1328 if (GRAPHICS_VER(rq->i915) >= 8) in __store_reg_to_mem()
1361 err = -ETIME; in __read_reg()
1375 scratch = __vm_create_scratch_for_read_pinned(&ce->engine->gt->ggtt->vm, 4); in gen12_guc_sw_ctx_id()
1383 err = __read_reg(ce, RING_EXECLIST_STATUS_HI(ce->engine->mmio_base), in gen12_guc_sw_ctx_id()
1388 val = i915_gem_object_pin_map_unlocked(scratch->obj, I915_MAP_WB); in gen12_guc_sw_ctx_id()
1395 i915_gem_object_unpin_map(scratch->obj); in gen12_guc_sw_ctx_id()
1404 * 0 - (NUM_CONTEXT_TAG -1) are used by other contexts
1418 if (intel_engine_uses_guc(stream->engine)) { in gen12_get_render_context_id()
1419 ret = gen12_guc_sw_ctx_id(stream->pinned_ctx, &ctx_id); in gen12_get_render_context_id()
1423 mask = ((1U << GEN12_GUC_SW_CTX_ID_WIDTH) - 1) << in gen12_get_render_context_id()
1424 (GEN12_GUC_SW_CTX_ID_SHIFT - 32); in gen12_get_render_context_id()
1425 } else if (GRAPHICS_VER_FULL(stream->engine->i915) >= IP_VER(12, 55)) { in gen12_get_render_context_id()
1426 ctx_id = (XEHP_MAX_CONTEXT_HW_ID - 1) << in gen12_get_render_context_id()
1427 (XEHP_SW_CTX_ID_SHIFT - 32); in gen12_get_render_context_id()
1429 mask = ((1U << XEHP_SW_CTX_ID_WIDTH) - 1) << in gen12_get_render_context_id()
1430 (XEHP_SW_CTX_ID_SHIFT - 32); in gen12_get_render_context_id()
1432 ctx_id = (GEN12_MAX_CONTEXT_HW_ID - 1) << in gen12_get_render_context_id()
1433 (GEN11_SW_CTX_ID_SHIFT - 32); in gen12_get_render_context_id()
1435 mask = ((1U << GEN11_SW_CTX_ID_WIDTH) - 1) << in gen12_get_render_context_id()
1436 (GEN11_SW_CTX_ID_SHIFT - 32); in gen12_get_render_context_id()
1438 stream->specific_ctx_id = ctx_id & mask; in gen12_get_render_context_id()
1439 stream->specific_ctx_id_mask = mask; in gen12_get_render_context_id()
1464 u32 offset, len = (ce->engine->context_size - PAGE_SIZE) / 4; in oa_context_image_offset()
1465 u32 *state = ce->lrc_reg_state; in oa_context_image_offset()
1467 if (drm_WARN_ON(&ce->engine->i915->drm, !state)) in oa_context_image_offset()
1473 * We expect reg-value pairs in MI_LRI command, so in oa_context_image_offset()
1476 drm_WARN_ON(&ce->engine->i915->drm, in oa_context_image_offset()
1491 i915_reg_t reg = GEN12_OACTXCONTROL(ce->engine->mmio_base); in set_oa_ctx_ctrl_offset()
1492 struct i915_perf *perf = &ce->engine->i915->perf; in set_oa_ctx_ctrl_offset()
1493 u32 offset = perf->ctx_oactxctrl_offset; in set_oa_ctx_ctrl_offset()
1500 perf->ctx_oactxctrl_offset = offset; in set_oa_ctx_ctrl_offset()
1502 drm_dbg(&ce->engine->i915->drm, in set_oa_ctx_ctrl_offset()
1504 ce->engine->name, offset); in set_oa_ctx_ctrl_offset()
1507 return offset && offset != U32_MAX ? 0 : -ENODEV; in set_oa_ctx_ctrl_offset()
1512 return engine->class == RENDER_CLASS; in engine_supports_mi_query()
1516 * oa_get_render_ctx_id - determine and hold ctx hw id
1517 * @stream: An i915-perf stream opened for OA metrics
1534 if (engine_supports_mi_query(stream->engine) && in oa_get_render_ctx_id()
1535 HAS_LOGICAL_RING_CONTEXTS(stream->perf->i915)) { in oa_get_render_ctx_id()
1543 drm_err(&stream->perf->i915->drm, in oa_get_render_ctx_id()
1545 stream->engine->name); in oa_get_render_ctx_id()
1550 switch (GRAPHICS_VER(ce->engine->i915)) { in oa_get_render_ctx_id()
1556 stream->specific_ctx_id = i915_ggtt_offset(ce->state); in oa_get_render_ctx_id()
1557 stream->specific_ctx_id_mask = 0; in oa_get_render_ctx_id()
1563 if (intel_engine_uses_guc(ce->engine)) { in oa_get_render_ctx_id()
1574 stream->specific_ctx_id = ce->lrc.lrca >> 12; in oa_get_render_ctx_id()
1580 stream->specific_ctx_id_mask = in oa_get_render_ctx_id()
1581 (1U << (GEN8_CTX_ID_WIDTH - 1)) - 1; in oa_get_render_ctx_id()
1583 stream->specific_ctx_id_mask = in oa_get_render_ctx_id()
1584 (1U << GEN8_CTX_ID_WIDTH) - 1; in oa_get_render_ctx_id()
1585 stream->specific_ctx_id = stream->specific_ctx_id_mask; in oa_get_render_ctx_id()
1595 MISSING_CASE(GRAPHICS_VER(ce->engine->i915)); in oa_get_render_ctx_id()
1598 ce->tag = stream->specific_ctx_id; in oa_get_render_ctx_id()
1600 drm_dbg(&stream->perf->i915->drm, in oa_get_render_ctx_id()
1602 stream->specific_ctx_id, in oa_get_render_ctx_id()
1603 stream->specific_ctx_id_mask); in oa_get_render_ctx_id()
1609 * oa_put_render_ctx_id - counterpart to oa_get_render_ctx_id releases hold
1610 * @stream: An i915-perf stream opened for OA metrics
1619 ce = fetch_and_zero(&stream->pinned_ctx); in oa_put_render_ctx_id()
1621 ce->tag = 0; /* recomputed on next submission after parking */ in oa_put_render_ctx_id()
1625 stream->specific_ctx_id = INVALID_CTX_ID; in oa_put_render_ctx_id()
1626 stream->specific_ctx_id_mask = 0; in oa_put_render_ctx_id()
1632 i915_vma_unpin_and_release(&stream->oa_buffer.vma, in free_oa_buffer()
1635 stream->oa_buffer.vaddr = NULL; in free_oa_buffer()
1643 i915_oa_config_put(stream->oa_config); in free_oa_configs()
1644 llist_for_each_entry_safe(oa_bo, tmp, stream->oa_config_bos.first, node) in free_oa_configs()
1651 i915_vma_unpin_and_release(&stream->noa_wait, 0); in free_noa_wait()
1656 return engine->oa_group; in engine_supports_oa()
1661 return engine->oa_group && engine->oa_group->type == type; in engine_supports_oa_format()
1666 struct i915_perf *perf = stream->perf; in i915_oa_stream_destroy()
1667 struct intel_gt *gt = stream->engine->gt; in i915_oa_stream_destroy()
1668 struct i915_perf_group *g = stream->engine->oa_group; in i915_oa_stream_destroy()
1670 if (WARN_ON(stream != g->exclusive_stream)) in i915_oa_stream_destroy()
1679 WRITE_ONCE(g->exclusive_stream, NULL); in i915_oa_stream_destroy()
1680 perf->ops.disable_metric_set(stream); in i915_oa_stream_destroy()
1684 intel_uncore_forcewake_put(stream->uncore, FORCEWAKE_ALL); in i915_oa_stream_destroy()
1685 intel_engine_pm_put(stream->engine); in i915_oa_stream_destroy()
1687 if (stream->ctx) in i915_oa_stream_destroy()
1693 if (perf->spurious_report_rs.missed) { in i915_oa_stream_destroy()
1695 perf->spurious_report_rs.missed); in i915_oa_stream_destroy()
1701 struct intel_uncore *uncore = stream->uncore; in gen7_init_oa_buffer()
1702 u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma); in gen7_init_oa_buffer()
1705 spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags); in gen7_init_oa_buffer()
1707 /* Pre-DevBDW: OABUFFER must be set with counters off, in gen7_init_oa_buffer()
1712 stream->oa_buffer.head = 0; in gen7_init_oa_buffer()
1720 stream->oa_buffer.tail = 0; in gen7_init_oa_buffer()
1722 spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags); in gen7_init_oa_buffer()
1728 stream->perf->gen7_latched_oastatus1 = 0; in gen7_init_oa_buffer()
1732 * first allocating), we may re-init the OA buffer, either in gen7_init_oa_buffer()
1733 * when re-enabling a stream or in error/reset paths. in gen7_init_oa_buffer()
1735 * The reason we clear the buffer for each re-init is for the in gen7_init_oa_buffer()
1737 * report-id field to make sure it's non-zero which relies on in gen7_init_oa_buffer()
1741 memset(stream->oa_buffer.vaddr, 0, OA_BUFFER_SIZE); in gen7_init_oa_buffer()
1746 struct intel_uncore *uncore = stream->uncore; in gen8_init_oa_buffer()
1747 u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma); in gen8_init_oa_buffer()
1750 spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags); in gen8_init_oa_buffer()
1754 stream->oa_buffer.head = 0; in gen8_init_oa_buffer()
1771 stream->oa_buffer.tail = 0; in gen8_init_oa_buffer()
1778 stream->oa_buffer.last_ctx_id = INVALID_CTX_ID; in gen8_init_oa_buffer()
1780 spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags); in gen8_init_oa_buffer()
1785 * first allocating), we may re-init the OA buffer, either in gen8_init_oa_buffer()
1786 * when re-enabling a stream or in error/reset paths. in gen8_init_oa_buffer()
1788 * The reason we clear the buffer for each re-init is for the in gen8_init_oa_buffer()
1790 * reason field to make sure it's non-zero which relies on in gen8_init_oa_buffer()
1794 memset(stream->oa_buffer.vaddr, 0, OA_BUFFER_SIZE); in gen8_init_oa_buffer()
1799 struct intel_uncore *uncore = stream->uncore; in gen12_init_oa_buffer()
1800 u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma); in gen12_init_oa_buffer()
1803 spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags); in gen12_init_oa_buffer()
1805 intel_uncore_write(uncore, __oa_regs(stream)->oa_status, 0); in gen12_init_oa_buffer()
1806 intel_uncore_write(uncore, __oa_regs(stream)->oa_head_ptr, in gen12_init_oa_buffer()
1808 stream->oa_buffer.head = 0; in gen12_init_oa_buffer()
1818 intel_uncore_write(uncore, __oa_regs(stream)->oa_buffer, gtt_offset | in gen12_init_oa_buffer()
1820 intel_uncore_write(uncore, __oa_regs(stream)->oa_tail_ptr, in gen12_init_oa_buffer()
1824 stream->oa_buffer.tail = 0; in gen12_init_oa_buffer()
1831 stream->oa_buffer.last_ctx_id = INVALID_CTX_ID; in gen12_init_oa_buffer()
1833 spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags); in gen12_init_oa_buffer()
1838 * first allocating), we may re-init the OA buffer, either in gen12_init_oa_buffer()
1839 * when re-enabling a stream or in error/reset paths. in gen12_init_oa_buffer()
1841 * The reason we clear the buffer for each re-init is for the in gen12_init_oa_buffer()
1843 * reason field to make sure it's non-zero which relies on in gen12_init_oa_buffer()
1847 memset(stream->oa_buffer.vaddr, 0, in gen12_init_oa_buffer()
1848 stream->oa_buffer.vma->size); in gen12_init_oa_buffer()
1853 struct drm_i915_private *i915 = stream->perf->i915; in alloc_oa_buffer()
1854 struct intel_gt *gt = stream->engine->gt; in alloc_oa_buffer()
1859 if (drm_WARN_ON(&i915->drm, stream->oa_buffer.vma)) in alloc_oa_buffer()
1860 return -ENODEV; in alloc_oa_buffer()
1865 bo = i915_gem_object_create_shmem(stream->perf->i915, OA_BUFFER_SIZE); in alloc_oa_buffer()
1867 drm_err(&i915->drm, "Failed to allocate OA buffer\n"); in alloc_oa_buffer()
1874 vma = i915_vma_instance(bo, >->ggtt->vm, NULL); in alloc_oa_buffer()
1890 stream->oa_buffer.vma = vma; in alloc_oa_buffer()
1892 stream->oa_buffer.vaddr = in alloc_oa_buffer()
1894 if (IS_ERR(stream->oa_buffer.vaddr)) { in alloc_oa_buffer()
1895 ret = PTR_ERR(stream->oa_buffer.vaddr); in alloc_oa_buffer()
1907 stream->oa_buffer.vaddr = NULL; in alloc_oa_buffer()
1908 stream->oa_buffer.vma = NULL; in alloc_oa_buffer()
1922 if (GRAPHICS_VER(stream->perf->i915) >= 8) in save_restore_register()
1928 *cs++ = i915_ggtt_offset(stream->noa_wait) + offset + 4 * d; in save_restore_register()
1937 struct drm_i915_private *i915 = stream->perf->i915; in alloc_noa_wait()
1938 struct intel_gt *gt = stream->engine->gt; in alloc_noa_wait()
1941 const u64 delay_ticks = 0xffffffffffffffff - in alloc_noa_wait()
1942 intel_gt_ns_to_clock_interval(to_gt(stream->perf->i915), in alloc_noa_wait()
1943 atomic64_read(&stream->perf->noa_programming_delay)); in alloc_noa_wait()
1944 const u32 base = stream->engine->mmio_base; in alloc_noa_wait()
1962 * gt->scratch was being used to save/restore the GPR registers, but on in alloc_noa_wait()
1969 drm_err(&i915->drm, in alloc_noa_wait()
1985 vma = i915_vma_instance(bo, >->ggtt->vm, NULL); in alloc_noa_wait()
2001 stream->noa_wait = vma; in alloc_noa_wait()
2026 *cs++ = MI_LOAD_REGISTER_REG | (3 - 2); in alloc_noa_wait()
2044 *cs++ = MI_LOAD_REGISTER_REG | (3 - 2); in alloc_noa_wait()
2064 *cs++ = MI_LOAD_REGISTER_REG | (3 - 2); in alloc_noa_wait()
2076 *cs++ = i915_ggtt_offset(vma) + (ts0 - batch) * 4; in alloc_noa_wait()
2084 * (((1 * << 64) - 1) - delay_ns) in alloc_noa_wait()
2107 *cs++ = MI_LOAD_REGISTER_REG | (3 - 2); in alloc_noa_wait()
2119 *cs++ = i915_ggtt_offset(vma) + (jump - batch) * 4; in alloc_noa_wait()
2137 GEM_BUG_ON(cs - batch > PAGE_SIZE / sizeof(*batch)); in alloc_noa_wait()
2147 if (ret == -EDEADLK) { in alloc_noa_wait()
2167 n_regs - i, in write_cs_mi_lri()
2204 return ERR_PTR(-ENOMEM); in alloc_oa_config_buffer()
2206 config_length += num_lri_dwords(oa_config->mux_regs_len); in alloc_oa_config_buffer()
2207 config_length += num_lri_dwords(oa_config->b_counter_regs_len); in alloc_oa_config_buffer()
2208 config_length += num_lri_dwords(oa_config->flex_regs_len); in alloc_oa_config_buffer()
2212 obj = i915_gem_object_create_shmem(stream->perf->i915, config_length); in alloc_oa_config_buffer()
2231 oa_config->mux_regs, in alloc_oa_config_buffer()
2232 oa_config->mux_regs_len); in alloc_oa_config_buffer()
2234 oa_config->b_counter_regs, in alloc_oa_config_buffer()
2235 oa_config->b_counter_regs_len); in alloc_oa_config_buffer()
2237 oa_config->flex_regs, in alloc_oa_config_buffer()
2238 oa_config->flex_regs_len); in alloc_oa_config_buffer()
2241 *cs++ = (GRAPHICS_VER(stream->perf->i915) < 8 ? in alloc_oa_config_buffer()
2244 *cs++ = i915_ggtt_offset(stream->noa_wait); in alloc_oa_config_buffer()
2250 oa_bo->vma = i915_vma_instance(obj, in alloc_oa_config_buffer()
2251 &stream->engine->gt->ggtt->vm, in alloc_oa_config_buffer()
2253 if (IS_ERR(oa_bo->vma)) { in alloc_oa_config_buffer()
2254 err = PTR_ERR(oa_bo->vma); in alloc_oa_config_buffer()
2258 oa_bo->oa_config = i915_oa_config_get(oa_config); in alloc_oa_config_buffer()
2259 llist_add(&oa_bo->node, &stream->oa_config_bos); in alloc_oa_config_buffer()
2262 if (err == -EDEADLK) { in alloc_oa_config_buffer()
2288 llist_for_each_entry(oa_bo, stream->oa_config_bos.first, node) { in get_oa_vma()
2289 if (oa_bo->oa_config == oa_config && in get_oa_vma()
2290 memcmp(oa_bo->oa_config->uuid, in get_oa_vma()
2291 oa_config->uuid, in get_oa_vma()
2292 sizeof(oa_config->uuid)) == 0) in get_oa_vma()
2301 return i915_vma_get(oa_bo->vma); in get_oa_vma()
2321 err = i915_gem_object_lock(vma->obj, &ww); in emit_oa_config()
2329 intel_engine_pm_get(ce->engine); in emit_oa_config()
2331 intel_engine_pm_put(ce->engine); in emit_oa_config()
2353 err = rq->engine->emit_bb_start(rq, in emit_oa_config()
2364 if (err == -EDEADLK) { in emit_oa_config()
2377 return stream->pinned_ctx ?: stream->engine->kernel_context; in oa_context()
2384 struct intel_uncore *uncore = stream->uncore; in hsw_enable_metric_set()
2391 * unable to count the events from non-render clock domain. in hsw_enable_metric_set()
2393 * count the events from non-render domain. Unit level clock in hsw_enable_metric_set()
2402 stream->oa_config, oa_context(stream), in hsw_enable_metric_set()
2408 struct intel_uncore *uncore = stream->uncore; in hsw_disable_metric_set()
2432 for (i = 0; i < oa_config->flex_regs_len; i++) { in oa_config_flex_reg()
2433 if (i915_mmio_reg_offset(oa_config->flex_regs[i].addr) == mmio) in oa_config_flex_reg()
2434 return oa_config->flex_regs[i].value; in oa_config_flex_reg()
2443 * It's fine to put out-of-date values into these per-context registers
2450 u32 ctx_oactxctrl = stream->perf->ctx_oactxctrl_offset; in gen8_update_reg_state_unlocked()
2451 u32 ctx_flexeu0 = stream->perf->ctx_flexeu0_offset; in gen8_update_reg_state_unlocked()
2462 u32 *reg_state = ce->lrc_reg_state; in gen8_update_reg_state_unlocked()
2466 (stream->period_exponent << GEN8_OA_TIMER_PERIOD_SHIFT) | in gen8_update_reg_state_unlocked()
2467 (stream->periodic ? GEN8_OA_TIMER_ENABLE : 0) | in gen8_update_reg_state_unlocked()
2472 oa_config_flex_reg(stream->oa_config, flex_regs[i]); in gen8_update_reg_state_unlocked()
2493 offset = i915_ggtt_offset(ce->state) + LRC_STATE_OFFSET; in gen8_store_flex()
2496 *cs++ = offset + flex->offset * sizeof(u32); in gen8_store_flex()
2498 *cs++ = flex->value; in gen8_store_flex()
2499 } while (flex++, --count); in gen8_store_flex()
2521 *cs++ = i915_mmio_reg_offset(flex->reg); in gen8_load_flex()
2522 *cs++ = flex->value; in gen8_load_flex()
2523 } while (flex++, --count); in gen8_load_flex()
2537 rq = intel_engine_create_kernel_request(ce->engine); in gen8_modify_context()
2558 intel_engine_pm_get(ce->engine); in gen8_modify_self()
2560 intel_engine_pm_put(ce->engine); in gen8_modify_self()
2588 GEM_BUG_ON(ce == ce->engine->kernel_context); in gen8_configure_context()
2590 if (ce->engine->class != RENDER_CLASS) in gen8_configure_context()
2597 flex->value = intel_sseu_make_rpcs(ce->engine->gt, &ce->sseu); in gen8_configure_context()
2613 struct intel_context *ce = stream->pinned_ctx; in gen12_configure_oar_context()
2614 u32 format = stream->oa_buffer.format->format; in gen12_configure_oar_context()
2615 u32 offset = stream->perf->ctx_oactxctrl_offset; in gen12_configure_oar_context()
2635 RING_CONTEXT_CONTROL(ce->engine->mmio_base), in gen12_configure_oar_context()
2660 * Manages updating the per-context aspects of the OA stream
2670 * won't automatically reload an out-of-date timer exponent even
2674 * - Ensure the currently running context's per-context OA state is
2676 * - Ensure that all existing contexts will have the correct per-context
2678 * - Ensure any new contexts will be initialized with the correct
2679 * per-context OA state.
2690 struct drm_i915_private *i915 = stream->perf->i915; in oa_configure_all_contexts()
2692 struct intel_gt *gt = stream->engine->gt; in oa_configure_all_contexts()
2696 lockdep_assert_held(>->perf.lock); in oa_configure_all_contexts()
2701 * lite-restore). This means we can't safely update a context's image, in oa_configure_all_contexts()
2714 spin_lock(&i915->gem.contexts.lock); in oa_configure_all_contexts()
2715 list_for_each_entry_safe(ctx, cn, &i915->gem.contexts.list, link) { in oa_configure_all_contexts()
2716 if (!kref_get_unless_zero(&ctx->ref)) in oa_configure_all_contexts()
2719 spin_unlock(&i915->gem.contexts.lock); in oa_configure_all_contexts()
2727 spin_lock(&i915->gem.contexts.lock); in oa_configure_all_contexts()
2731 spin_unlock(&i915->gem.contexts.lock); in oa_configure_all_contexts()
2739 struct intel_context *ce = engine->kernel_context; in oa_configure_all_contexts()
2741 if (engine->class != RENDER_CLASS) in oa_configure_all_contexts()
2744 regs[0].value = intel_sseu_make_rpcs(engine->gt, &ce->sseu); in oa_configure_all_contexts()
2759 u32 ctx_oactxctrl = stream->perf->ctx_oactxctrl_offset; in lrc_configure_all_contexts()
2761 const u32 ctx_flexeu0 = stream->perf->ctx_flexeu0_offset; in lrc_configure_all_contexts()
2784 (stream->period_exponent << GEN8_OA_TIMER_PERIOD_SHIFT) | in lrc_configure_all_contexts()
2785 (stream->periodic ? GEN8_OA_TIMER_ENABLE : 0) | in lrc_configure_all_contexts()
2800 struct intel_uncore *uncore = stream->uncore; in gen8_enable_metric_set()
2801 struct i915_oa_config *oa_config = stream->oa_config; in gen8_enable_metric_set()
2816 * Currently none of the high-level metrics we have depend on knowing in gen8_enable_metric_set()
2827 if (IS_GRAPHICS_VER(stream->perf->i915, 9, 11)) { in gen8_enable_metric_set()
2843 stream->oa_config, oa_context(stream), in gen8_enable_metric_set()
2850 (stream->sample_flags & SAMPLE_OA_REPORT) ? in oag_report_ctx_switches()
2858 struct drm_i915_private *i915 = stream->perf->i915; in gen12_enable_metric_set()
2859 struct intel_uncore *uncore = stream->uncore; in gen12_enable_metric_set()
2860 bool periodic = stream->periodic; in gen12_enable_metric_set()
2861 u32 period_exponent = stream->period_exponent; in gen12_enable_metric_set()
2871 intel_gt_mcr_multicast_write(uncore->gt, GEN8_ROW_CHICKEN, in gen12_enable_metric_set()
2877 intel_uncore_write(uncore, __oa_regs(stream)->oa_debug, in gen12_enable_metric_set()
2887 intel_uncore_write(uncore, __oa_regs(stream)->oa_ctx_ctrl, periodic ? in gen12_enable_metric_set()
2908 if (stream->ctx) { in gen12_enable_metric_set()
2915 stream->oa_config, oa_context(stream), in gen12_enable_metric_set()
2921 struct intel_uncore *uncore = stream->uncore; in gen8_disable_metric_set()
2931 struct intel_uncore *uncore = stream->uncore; in gen11_disable_metric_set()
2942 struct intel_uncore *uncore = stream->uncore; in gen12_disable_metric_set()
2943 struct drm_i915_private *i915 = stream->perf->i915; in gen12_disable_metric_set()
2950 intel_gt_mcr_multicast_write(uncore->gt, GEN8_ROW_CHICKEN, in gen12_disable_metric_set()
2957 if (stream->ctx) in gen12_disable_metric_set()
2972 struct intel_uncore *uncore = stream->uncore; in gen7_oa_enable()
2973 struct i915_gem_context *ctx = stream->ctx; in gen7_oa_enable()
2974 u32 ctx_id = stream->specific_ctx_id; in gen7_oa_enable()
2975 bool periodic = stream->periodic; in gen7_oa_enable()
2976 u32 period_exponent = stream->period_exponent; in gen7_oa_enable()
2977 u32 report_format = stream->oa_buffer.format->format; in gen7_oa_enable()
3002 struct intel_uncore *uncore = stream->uncore; in gen8_oa_enable()
3003 u32 report_format = stream->oa_buffer.format->format; in gen8_oa_enable()
3018 * filtering and instead filter on the cpu based on the context-id in gen8_oa_enable()
3035 if (!(stream->sample_flags & SAMPLE_OA_REPORT)) in gen12_oa_enable()
3041 val = (stream->oa_buffer.format->format << regs->oa_ctrl_counter_format_shift) | in gen12_oa_enable()
3044 intel_uncore_write(stream->uncore, regs->oa_ctrl, val); in gen12_oa_enable()
3048 * i915_oa_stream_enable - handle `I915_PERF_IOCTL_ENABLE` for OA stream
3058 stream->pollin = false; in i915_oa_stream_enable()
3060 stream->perf->ops.oa_enable(stream); in i915_oa_stream_enable()
3062 if (stream->sample_flags & SAMPLE_OA_REPORT) in i915_oa_stream_enable()
3063 hrtimer_start(&stream->poll_check_timer, in i915_oa_stream_enable()
3064 ns_to_ktime(stream->poll_oa_period), in i915_oa_stream_enable()
3070 struct intel_uncore *uncore = stream->uncore; in gen7_oa_disable()
3076 drm_err(&stream->perf->i915->drm, in gen7_oa_disable()
3082 struct intel_uncore *uncore = stream->uncore; in gen8_oa_disable()
3088 drm_err(&stream->perf->i915->drm, in gen8_oa_disable()
3094 struct intel_uncore *uncore = stream->uncore; in gen12_oa_disable()
3096 intel_uncore_write(uncore, __oa_regs(stream)->oa_ctrl, 0); in gen12_oa_disable()
3098 __oa_regs(stream)->oa_ctrl, in gen12_oa_disable()
3101 drm_err(&stream->perf->i915->drm, in gen12_oa_disable()
3109 drm_err(&stream->perf->i915->drm, in gen12_oa_disable()
3114 * i915_oa_stream_disable - handle `I915_PERF_IOCTL_DISABLE` for OA stream
3123 stream->perf->ops.oa_disable(stream); in i915_oa_stream_disable()
3125 if (stream->sample_flags & SAMPLE_OA_REPORT) in i915_oa_stream_disable()
3126 hrtimer_cancel(&stream->poll_check_timer); in i915_oa_stream_disable()
3145 return -ENOMEM; in i915_perf_stream_enable_sync()
3147 err = stream->perf->ops.enable_metric_set(stream, active); in i915_perf_stream_enable_sync()
3159 const struct sseu_dev_info *devinfo_sseu = &engine->gt->info.sseu; in get_default_sseu_config()
3163 if (GRAPHICS_VER(engine->i915) == 11) { in get_default_sseu_config()
3166 * we select - just turn off low bits in the amount of half of in get_default_sseu_config()
3169 out_sseu->subslice_mask = in get_default_sseu_config()
3170 ~(~0 << (hweight8(out_sseu->subslice_mask) / 2)); in get_default_sseu_config()
3171 out_sseu->slice_mask = 0x1; in get_default_sseu_config()
3180 if (drm_sseu->engine.engine_class != engine->uabi_class || in get_sseu_config()
3181 drm_sseu->engine.engine_instance != engine->uabi_instance) in get_sseu_config()
3182 return -EINVAL; in get_sseu_config()
3184 return i915_gem_user_to_context_sseu(engine->gt, drm_sseu, out_sseu); in get_sseu_config()
3201 with_intel_runtime_pm(to_gt(i915)->uncore->rpm, wakeref) in i915_perf_oa_timestamp_frequency()
3202 reg = intel_uncore_read(to_gt(i915)->uncore, RPM_CONFIG0); in i915_perf_oa_timestamp_frequency()
3207 return to_gt(i915)->clock_frequency << (3 - shift); in i915_perf_oa_timestamp_frequency()
3210 return to_gt(i915)->clock_frequency; in i915_perf_oa_timestamp_frequency()
3214 * i915_oa_stream_init - validate combined props for OA stream and init
3235 struct drm_i915_private *i915 = stream->perf->i915; in i915_oa_stream_init()
3236 struct i915_perf *perf = stream->perf; in i915_oa_stream_init()
3240 if (!props->engine) { in i915_oa_stream_init()
3241 drm_dbg(&stream->perf->i915->drm, in i915_oa_stream_init()
3243 return -EINVAL; in i915_oa_stream_init()
3245 g = props->engine->oa_group; in i915_oa_stream_init()
3252 if (!perf->metrics_kobj) { in i915_oa_stream_init()
3253 drm_dbg(&stream->perf->i915->drm, in i915_oa_stream_init()
3255 return -EINVAL; in i915_oa_stream_init()
3258 if (!(props->sample_flags & SAMPLE_OA_REPORT) && in i915_oa_stream_init()
3259 (GRAPHICS_VER(perf->i915) < 12 || !stream->ctx)) { in i915_oa_stream_init()
3260 drm_dbg(&stream->perf->i915->drm, in i915_oa_stream_init()
3262 return -EINVAL; in i915_oa_stream_init()
3265 if (!perf->ops.enable_metric_set) { in i915_oa_stream_init()
3266 drm_dbg(&stream->perf->i915->drm, in i915_oa_stream_init()
3268 return -ENODEV; in i915_oa_stream_init()
3276 if (g->exclusive_stream) { in i915_oa_stream_init()
3277 drm_dbg(&stream->perf->i915->drm, in i915_oa_stream_init()
3279 return -EBUSY; in i915_oa_stream_init()
3282 if (!props->oa_format) { in i915_oa_stream_init()
3283 drm_dbg(&stream->perf->i915->drm, in i915_oa_stream_init()
3285 return -EINVAL; in i915_oa_stream_init()
3288 stream->engine = props->engine; in i915_oa_stream_init()
3289 stream->uncore = stream->engine->gt->uncore; in i915_oa_stream_init()
3291 stream->sample_size = sizeof(struct drm_i915_perf_record_header); in i915_oa_stream_init()
3293 stream->oa_buffer.format = &perf->oa_formats[props->oa_format]; in i915_oa_stream_init()
3294 if (drm_WARN_ON(&i915->drm, stream->oa_buffer.format->size == 0)) in i915_oa_stream_init()
3295 return -EINVAL; in i915_oa_stream_init()
3297 stream->sample_flags = props->sample_flags; in i915_oa_stream_init()
3298 stream->sample_size += stream->oa_buffer.format->size; in i915_oa_stream_init()
3300 stream->hold_preemption = props->hold_preemption; in i915_oa_stream_init()
3302 stream->periodic = props->oa_periodic; in i915_oa_stream_init()
3303 if (stream->periodic) in i915_oa_stream_init()
3304 stream->period_exponent = props->oa_period_exponent; in i915_oa_stream_init()
3306 if (stream->ctx) { in i915_oa_stream_init()
3309 drm_dbg(&stream->perf->i915->drm, in i915_oa_stream_init()
3317 drm_dbg(&stream->perf->i915->drm, in i915_oa_stream_init()
3322 stream->oa_config = i915_perf_get_oa_config(perf, props->metrics_set); in i915_oa_stream_init()
3323 if (!stream->oa_config) { in i915_oa_stream_init()
3324 drm_dbg(&stream->perf->i915->drm, in i915_oa_stream_init()
3325 "Invalid OA config id=%i\n", props->metrics_set); in i915_oa_stream_init()
3326 ret = -EINVAL; in i915_oa_stream_init()
3330 /* PRM - observability performance counters: in i915_oa_stream_init()
3342 intel_engine_pm_get(stream->engine); in i915_oa_stream_init()
3343 intel_uncore_forcewake_get(stream->uncore, FORCEWAKE_ALL); in i915_oa_stream_init()
3349 stream->ops = &i915_oa_stream_ops; in i915_oa_stream_init()
3351 stream->engine->gt->perf.sseu = props->sseu; in i915_oa_stream_init()
3352 WRITE_ONCE(g->exclusive_stream, stream); in i915_oa_stream_init()
3356 drm_dbg(&stream->perf->i915->drm, in i915_oa_stream_init()
3361 drm_dbg(&stream->perf->i915->drm, in i915_oa_stream_init()
3363 stream->oa_config->uuid); in i915_oa_stream_init()
3365 hrtimer_setup(&stream->poll_check_timer, oa_poll_check_timer_cb, CLOCK_MONOTONIC, in i915_oa_stream_init()
3367 init_waitqueue_head(&stream->poll_wq); in i915_oa_stream_init()
3368 spin_lock_init(&stream->oa_buffer.ptr_lock); in i915_oa_stream_init()
3369 mutex_init(&stream->lock); in i915_oa_stream_init()
3374 WRITE_ONCE(g->exclusive_stream, NULL); in i915_oa_stream_init()
3375 perf->ops.disable_metric_set(stream); in i915_oa_stream_init()
3380 intel_uncore_forcewake_put(stream->uncore, FORCEWAKE_ALL); in i915_oa_stream_init()
3381 intel_engine_pm_put(stream->engine); in i915_oa_stream_init()
3389 if (stream->ctx) in i915_oa_stream_init()
3400 if (engine->class != RENDER_CLASS) in i915_oa_init_reg_state()
3404 stream = READ_ONCE(engine->oa_group->exclusive_stream); in i915_oa_init_reg_state()
3405 if (stream && GRAPHICS_VER(stream->perf->i915) < 12) in i915_oa_init_reg_state()
3410 * i915_perf_read - handles read() FOP for i915 perf stream FDs
3418 * &i915_perf_stream_ops->read but to save having stream implementations (of
3432 struct i915_perf_stream *stream = file->private_data; in i915_perf_read()
3440 if (!stream->enabled || !(stream->sample_flags & SAMPLE_OA_REPORT)) in i915_perf_read()
3441 return -EIO; in i915_perf_read()
3443 if (!(file->f_flags & O_NONBLOCK)) { in i915_perf_read()
3445 * stream->ops->wait_unlocked. in i915_perf_read()
3452 ret = stream->ops->wait_unlocked(stream); in i915_perf_read()
3456 mutex_lock(&stream->lock); in i915_perf_read()
3457 ret = stream->ops->read(stream, buf, count, &offset); in i915_perf_read()
3458 mutex_unlock(&stream->lock); in i915_perf_read()
3461 mutex_lock(&stream->lock); in i915_perf_read()
3462 ret = stream->ops->read(stream, buf, count, &offset); in i915_perf_read()
3463 mutex_unlock(&stream->lock); in i915_perf_read()
3470 * and read() returning -EAGAIN. Clearing the oa.pollin state here in i915_perf_read()
3473 * The exception to this is if ops->read() returned -ENOSPC which means in i915_perf_read()
3477 if (ret != -ENOSPC) in i915_perf_read()
3478 stream->pollin = false; in i915_perf_read()
3480 /* Possible values for ret are 0, -EFAULT, -ENOSPC, -EIO, ... */ in i915_perf_read()
3481 return offset ?: (ret ?: -EAGAIN); in i915_perf_read()
3490 stream->pollin = true; in oa_poll_check_timer_cb()
3491 wake_up(&stream->poll_wq); in oa_poll_check_timer_cb()
3495 ns_to_ktime(stream->poll_oa_period)); in oa_poll_check_timer_cb()
3501 * i915_perf_poll_locked - poll_wait() with a suitable wait queue for stream
3507 * &i915_perf_stream_ops->poll_wait to call poll_wait() with a wait queue that
3518 stream->ops->poll_wait(stream, file, wait); in i915_perf_poll_locked()
3526 if (stream->pollin) in i915_perf_poll_locked()
3533 * i915_perf_poll - call poll_wait() with a suitable wait queue for stream
3547 struct i915_perf_stream *stream = file->private_data; in i915_perf_poll()
3550 mutex_lock(&stream->lock); in i915_perf_poll()
3552 mutex_unlock(&stream->lock); in i915_perf_poll()
3558 * i915_perf_enable_locked - handle `I915_PERF_IOCTL_ENABLE` ioctl
3569 if (stream->enabled) in i915_perf_enable_locked()
3572 /* Allow stream->ops->enable() to refer to this */ in i915_perf_enable_locked()
3573 stream->enabled = true; in i915_perf_enable_locked()
3575 if (stream->ops->enable) in i915_perf_enable_locked()
3576 stream->ops->enable(stream); in i915_perf_enable_locked()
3578 if (stream->hold_preemption) in i915_perf_enable_locked()
3579 intel_context_set_nopreempt(stream->pinned_ctx); in i915_perf_enable_locked()
3583 * i915_perf_disable_locked - handle `I915_PERF_IOCTL_DISABLE` ioctl
3588 * The intention is that disabling an re-enabling a stream will ideally be
3589 * cheaper than destroying and re-opening a stream with the same configuration,
3591 * must be retained between disabling and re-enabling a stream.
3594 * to attempt to read from the stream (-EIO).
3598 if (!stream->enabled) in i915_perf_disable_locked()
3601 /* Allow stream->ops->disable() to refer to this */ in i915_perf_disable_locked()
3602 stream->enabled = false; in i915_perf_disable_locked()
3604 if (stream->hold_preemption) in i915_perf_disable_locked()
3605 intel_context_clear_nopreempt(stream->pinned_ctx); in i915_perf_disable_locked()
3607 if (stream->ops->disable) in i915_perf_disable_locked()
3608 stream->ops->disable(stream); in i915_perf_disable_locked()
3615 long ret = stream->oa_config->id; in i915_perf_config_locked()
3617 config = i915_perf_get_oa_config(stream->perf, metrics_set); in i915_perf_config_locked()
3619 return -EINVAL; in i915_perf_config_locked()
3621 if (config != stream->oa_config) { in i915_perf_config_locked()
3635 config = xchg(&stream->oa_config, config); in i915_perf_config_locked()
3646 * i915_perf_ioctl_locked - support ioctl() usage with i915 perf stream FDs
3651 * Returns: zero on success or a negative error code. Returns -EINVAL for
3669 return -EINVAL; in i915_perf_ioctl_locked()
3673 * i915_perf_ioctl - support ioctl() usage with i915 perf stream FDs
3680 * Returns: zero on success or a negative error code. Returns -EINVAL for
3687 struct i915_perf_stream *stream = file->private_data; in i915_perf_ioctl()
3690 mutex_lock(&stream->lock); in i915_perf_ioctl()
3692 mutex_unlock(&stream->lock); in i915_perf_ioctl()
3698 * i915_perf_destroy_locked - destroy an i915 perf stream
3704 * Note: The >->perf.lock mutex has been taken to serialize
3705 * with any non-file-operation driver hooks.
3709 if (stream->enabled) in i915_perf_destroy_locked()
3712 if (stream->ops->destroy) in i915_perf_destroy_locked()
3713 stream->ops->destroy(stream); in i915_perf_destroy_locked()
3715 if (stream->ctx) in i915_perf_destroy_locked()
3716 i915_gem_context_put(stream->ctx); in i915_perf_destroy_locked()
3722 * i915_perf_release - handles userspace close() of a stream file
3734 struct i915_perf_stream *stream = file->private_data; in i915_perf_release()
3735 struct i915_perf *perf = stream->perf; in i915_perf_release()
3736 struct intel_gt *gt = stream->engine->gt; in i915_perf_release()
3740 * other user of stream->lock. Use the perf lock to destroy the stream in i915_perf_release()
3743 mutex_lock(>->perf.lock); in i915_perf_release()
3745 mutex_unlock(>->perf.lock); in i915_perf_release()
3748 drm_dev_put(&perf->i915->drm); in i915_perf_release()
3768 * i915_perf_open_ioctl_locked - DRM ioctl() for userspace to open a stream FD
3777 * behalf of i915_perf_open_ioctl() with the >->perf.lock mutex
3778 * taken to serialize with any non-file-operation driver hooks.
3804 if (props->single_context) { in i915_perf_open_ioctl_locked()
3805 u32 ctx_handle = props->ctx_handle; in i915_perf_open_ioctl_locked()
3806 struct drm_i915_file_private *file_priv = file->driver_priv; in i915_perf_open_ioctl_locked()
3810 drm_dbg(&perf->i915->drm, in i915_perf_open_ioctl_locked()
3822 * non-privileged client. in i915_perf_open_ioctl_locked()
3824 * For Gen8->11 the OA unit no longer supports clock gating off for a in i915_perf_open_ioctl_locked()
3826 * from updating as system-wide / global values. Even though we can in i915_perf_open_ioctl_locked()
3837 if (IS_HASWELL(perf->i915) && specific_ctx) in i915_perf_open_ioctl_locked()
3839 else if (GRAPHICS_VER(perf->i915) == 12 && specific_ctx && in i915_perf_open_ioctl_locked()
3840 (props->sample_flags & SAMPLE_OA_REPORT) == 0) in i915_perf_open_ioctl_locked()
3843 if (props->hold_preemption) { in i915_perf_open_ioctl_locked()
3844 if (!props->single_context) { in i915_perf_open_ioctl_locked()
3845 drm_dbg(&perf->i915->drm, in i915_perf_open_ioctl_locked()
3847 ret = -EINVAL; in i915_perf_open_ioctl_locked()
3856 if (props->has_sseu) in i915_perf_open_ioctl_locked()
3859 get_default_sseu_config(&props->sseu, props->engine); in i915_perf_open_ioctl_locked()
3868 drm_dbg(&perf->i915->drm, in i915_perf_open_ioctl_locked()
3870 ret = -EACCES; in i915_perf_open_ioctl_locked()
3876 ret = -ENOMEM; in i915_perf_open_ioctl_locked()
3880 stream->perf = perf; in i915_perf_open_ioctl_locked()
3881 stream->ctx = specific_ctx; in i915_perf_open_ioctl_locked()
3882 stream->poll_oa_period = props->poll_oa_period; in i915_perf_open_ioctl_locked()
3888 /* we avoid simply assigning stream->sample_flags = props->sample_flags in i915_perf_open_ioctl_locked()
3892 if (WARN_ON(stream->sample_flags != props->sample_flags)) { in i915_perf_open_ioctl_locked()
3893 ret = -ENODEV; in i915_perf_open_ioctl_locked()
3897 if (param->flags & I915_PERF_FLAG_FD_CLOEXEC) in i915_perf_open_ioctl_locked()
3899 if (param->flags & I915_PERF_FLAG_FD_NONBLOCK) in i915_perf_open_ioctl_locked()
3908 if (!(param->flags & I915_PERF_FLAG_DISABLED)) in i915_perf_open_ioctl_locked()
3914 drm_dev_get(&perf->i915->drm); in i915_perf_open_ioctl_locked()
3919 if (stream->ops->destroy) in i915_perf_open_ioctl_locked()
3920 stream->ops->destroy(stream); in i915_perf_open_ioctl_locked()
3933 u32 den = i915_perf_oa_timestamp_frequency(perf->i915); in oa_exponent_to_ns()
3935 return div_u64(nom + den - 1, den); in oa_exponent_to_ns()
3941 return test_bit(format, perf->format_mask); in oa_format_valid()
3947 __set_bit(format, perf->format_mask); in oa_format_add()
3951 * read_properties_unlocked - validate + copy userspace stream open properties
3981 props->poll_oa_period = DEFAULT_POLL_PERIOD_NS; in read_properties_unlocked()
3990 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
3992 return -EINVAL; in read_properties_unlocked()
4012 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4014 return -EINVAL; in read_properties_unlocked()
4019 props->single_context = 1; in read_properties_unlocked()
4020 props->ctx_handle = value; in read_properties_unlocked()
4024 props->sample_flags |= SAMPLE_OA_REPORT; in read_properties_unlocked()
4028 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4030 return -EINVAL; in read_properties_unlocked()
4032 props->metrics_set = value; in read_properties_unlocked()
4036 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4037 "Out-of-range OA report format %llu\n", in read_properties_unlocked()
4039 return -EINVAL; in read_properties_unlocked()
4042 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4045 return -EINVAL; in read_properties_unlocked()
4047 props->oa_format = value; in read_properties_unlocked()
4051 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4054 return -EINVAL; in read_properties_unlocked()
4080 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4083 return -EACCES; in read_properties_unlocked()
4086 props->oa_periodic = true; in read_properties_unlocked()
4087 props->oa_period_exponent = value; in read_properties_unlocked()
4090 props->hold_preemption = !!value; in read_properties_unlocked()
4093 if (GRAPHICS_VER_FULL(perf->i915) >= IP_VER(12, 55)) { in read_properties_unlocked()
4094 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4096 GRAPHICS_VER_FULL(perf->i915)); in read_properties_unlocked()
4097 return -ENODEV; in read_properties_unlocked()
4103 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4105 return -EFAULT; in read_properties_unlocked()
4112 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4115 return -EINVAL; in read_properties_unlocked()
4117 props->poll_oa_period = value; in read_properties_unlocked()
4129 return -EINVAL; in read_properties_unlocked()
4137 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4138 "OA engine-class and engine-instance parameters must be passed together\n"); in read_properties_unlocked()
4139 return -EINVAL; in read_properties_unlocked()
4142 props->engine = intel_engine_lookup_user(perf->i915, class, instance); in read_properties_unlocked()
4143 if (!props->engine) { in read_properties_unlocked()
4144 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4147 return -EINVAL; in read_properties_unlocked()
4150 if (!engine_supports_oa(props->engine)) { in read_properties_unlocked()
4151 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4154 return -EINVAL; in read_properties_unlocked()
4162 if (IS_MEDIA_GT_IP_STEP(props->engine->gt, IP_VER(13, 0), STEP_A0, STEP_C0) && in read_properties_unlocked()
4163 props->engine->oa_group->type == TYPE_OAM && in read_properties_unlocked()
4164 intel_check_bios_c6_setup(&props->engine->gt->rc6)) { in read_properties_unlocked()
4165 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4167 return -EINVAL; in read_properties_unlocked()
4170 i = array_index_nospec(props->oa_format, I915_OA_FORMAT_MAX); in read_properties_unlocked()
4171 f = &perf->oa_formats[i]; in read_properties_unlocked()
4172 if (!engine_supports_oa_format(props->engine, f->type)) { in read_properties_unlocked()
4173 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4175 f->type, props->engine->class); in read_properties_unlocked()
4176 return -EINVAL; in read_properties_unlocked()
4180 ret = get_sseu_config(&props->sseu, props->engine, &user_sseu); in read_properties_unlocked()
4182 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4186 props->has_sseu = true; in read_properties_unlocked()
4193 * i915_perf_open_ioctl - DRM ioctl() for userspace to open a stream FD
4203 * i915-perf stream is expected to be a suitable interface for other forms of
4210 * i915_perf_open_ioctl_locked() after taking the >->perf.lock
4211 * mutex for serializing with any non-file-operation driver hooks.
4219 struct i915_perf *perf = &to_i915(dev)->perf; in i915_perf_open_ioctl()
4226 if (!perf->i915) in i915_perf_open_ioctl()
4227 return -ENOTSUPP; in i915_perf_open_ioctl()
4232 if (param->flags & ~known_open_flags) { in i915_perf_open_ioctl()
4233 drm_dbg(&perf->i915->drm, in i915_perf_open_ioctl()
4235 return -EINVAL; in i915_perf_open_ioctl()
4239 u64_to_user_ptr(param->properties_ptr), in i915_perf_open_ioctl()
4240 param->num_properties, in i915_perf_open_ioctl()
4245 gt = props.engine->gt; in i915_perf_open_ioctl()
4247 mutex_lock(>->perf.lock); in i915_perf_open_ioctl()
4249 mutex_unlock(>->perf.lock); in i915_perf_open_ioctl()
4255 * i915_perf_register - exposes i915-perf to userspace
4260 * used to open an i915-perf stream.
4264 struct i915_perf *perf = &i915->perf; in i915_perf_register()
4267 if (!perf->i915) in i915_perf_register()
4274 mutex_lock(>->perf.lock); in i915_perf_register()
4276 perf->metrics_kobj = in i915_perf_register()
4278 &i915->drm.primary->kdev->kobj); in i915_perf_register()
4280 mutex_unlock(>->perf.lock); in i915_perf_register()
4284 * i915_perf_unregister - hide i915-perf from userspace
4287 * i915-perf state cleanup is split up into an 'unregister' and
4294 struct i915_perf *perf = &i915->perf; in i915_perf_unregister()
4296 if (!perf->metrics_kobj) in i915_perf_unregister()
4299 kobject_put(perf->metrics_kobj); in i915_perf_unregister()
4300 perf->metrics_kobj = NULL; in i915_perf_unregister()
4325 while (table->start || table->end) { in reg_in_range_table()
4326 if (addr >= table->start && addr <= table->end) in reg_in_range_table()
4339 { .start = 0x2710, .end = 0x272c }, /* OASTARTTRIG[1-8] */
4340 { .start = 0x2740, .end = 0x275c }, /* OAREPORTTRIG[1-8] */
4341 { .start = 0x2770, .end = 0x27ac }, /* OACEC[0-7][0-1] */
4347 { .start = 0xd900, .end = 0xd91c }, /* GEN12_OAG_OASTARTTRIG[1-8] */
4348 { .start = 0xd920, .end = 0xd93c }, /* GEN12_OAG_OAREPORTTRIG1[1-8] */
4349 { .start = 0xd940, .end = 0xd97c }, /* GEN12_OAG_CEC[0-7][0-1] */
4350 { .start = 0xdc00, .end = 0xdc3c }, /* GEN12_OAG_SCEC[0-7][0-1] */
4357 { .start = 0x393000, .end = 0x39301c }, /* GEN12_OAM_STARTTRIG1[1-8] */
4358 { .start = 0x393020, .end = 0x39303c }, /* GEN12_OAM_REPORTTRIG1[1-8] */
4359 { .start = 0x393040, .end = 0x39307c }, /* GEN12_OAM_CEC[0-7][0-1] */
4360 { .start = 0x393200, .end = 0x39323C }, /* MPES[0-7] */
4366 { .start = 0xdd00, .end = 0xdd48 }, /* OAG_LCE0_0 - OAA_LENABLE_REG */
4371 { .start = 0x91b8, .end = 0x91cc }, /* OA_PERFCNT[1-2], OA_PERFMATRIX */
4372 { .start = 0x9800, .end = 0x9888 }, /* MICRO_BP0_0 - NOA_WRITE */
4378 { .start = 0x09e80, .end = 0x09ea4 }, /* HSW_MBVID2_NOA[0-9] */
4390 { .start = 0x0d00, .end = 0x0d2c }, /* RPM_CONFIG[0-1], NOA_CONFIG[0-8] */
4396 { .start = 0x91c8, .end = 0x91dc }, /* OA_PERFCNT[3-4] */
4401 { .start = 0x0d00, .end = 0x0d04 }, /* RPM_CONFIG[0-1] */
4402 { .start = 0x0d0c, .end = 0x0d2c }, /* NOA_CONFIG[0-8] */
4414 { .start = 0x0d00, .end = 0x0d04 }, /* RPM_CONFIG[0-1] */
4415 { .start = 0x0d0c, .end = 0x0d2c }, /* NOA_CONFIG[0-8] */
4459 if (HAS_OAM(perf->i915) && in mtl_is_valid_oam_b_counter_addr()
4460 GRAPHICS_VER_FULL(perf->i915) >= IP_VER(12, 70)) in mtl_is_valid_oam_b_counter_addr()
4475 if (GRAPHICS_VER_FULL(perf->i915) >= IP_VER(12, 70)) in gen12_is_valid_mux_addr()
4517 return ERR_PTR(-EINVAL); in alloc_oa_regs()
4521 return ERR_PTR(-ENOMEM); in alloc_oa_regs()
4531 drm_dbg(&perf->i915->drm, in alloc_oa_regs()
4533 err = -EINVAL; in alloc_oa_regs()
4561 return sprintf(buf, "%d\n", oa_config->id); in show_dynamic_id()
4567 sysfs_attr_init(&oa_config->sysfs_metric_id.attr); in create_dynamic_oa_sysfs_entry()
4568 oa_config->sysfs_metric_id.attr.name = "id"; in create_dynamic_oa_sysfs_entry()
4569 oa_config->sysfs_metric_id.attr.mode = S_IRUGO; in create_dynamic_oa_sysfs_entry()
4570 oa_config->sysfs_metric_id.show = show_dynamic_id; in create_dynamic_oa_sysfs_entry()
4571 oa_config->sysfs_metric_id.store = NULL; in create_dynamic_oa_sysfs_entry()
4573 oa_config->attrs[0] = &oa_config->sysfs_metric_id.attr; in create_dynamic_oa_sysfs_entry()
4574 oa_config->attrs[1] = NULL; in create_dynamic_oa_sysfs_entry()
4576 oa_config->sysfs_metric.name = oa_config->uuid; in create_dynamic_oa_sysfs_entry()
4577 oa_config->sysfs_metric.attrs = oa_config->attrs; in create_dynamic_oa_sysfs_entry()
4579 return sysfs_create_group(perf->metrics_kobj, in create_dynamic_oa_sysfs_entry()
4580 &oa_config->sysfs_metric); in create_dynamic_oa_sysfs_entry()
4584 * i915_perf_add_config_ioctl - DRM ioctl() for userspace to add a new OA config
4599 struct i915_perf *perf = &to_i915(dev)->perf; in i915_perf_add_config_ioctl()
4605 if (!perf->i915) in i915_perf_add_config_ioctl()
4606 return -ENOTSUPP; in i915_perf_add_config_ioctl()
4608 if (!perf->metrics_kobj) { in i915_perf_add_config_ioctl()
4609 drm_dbg(&perf->i915->drm, in i915_perf_add_config_ioctl()
4611 return -EINVAL; in i915_perf_add_config_ioctl()
4615 drm_dbg(&perf->i915->drm, in i915_perf_add_config_ioctl()
4617 return -EACCES; in i915_perf_add_config_ioctl()
4620 if ((!args->mux_regs_ptr || !args->n_mux_regs) && in i915_perf_add_config_ioctl()
4621 (!args->boolean_regs_ptr || !args->n_boolean_regs) && in i915_perf_add_config_ioctl()
4622 (!args->flex_regs_ptr || !args->n_flex_regs)) { in i915_perf_add_config_ioctl()
4623 drm_dbg(&perf->i915->drm, in i915_perf_add_config_ioctl()
4625 return -EINVAL; in i915_perf_add_config_ioctl()
4630 drm_dbg(&perf->i915->drm, in i915_perf_add_config_ioctl()
4632 return -ENOMEM; in i915_perf_add_config_ioctl()
4635 oa_config->perf = perf; in i915_perf_add_config_ioctl()
4636 kref_init(&oa_config->ref); in i915_perf_add_config_ioctl()
4638 if (!uuid_is_valid(args->uuid)) { in i915_perf_add_config_ioctl()
4639 drm_dbg(&perf->i915->drm, in i915_perf_add_config_ioctl()
4641 err = -EINVAL; in i915_perf_add_config_ioctl()
4645 /* Last character in oa_config->uuid will be 0 because oa_config is in i915_perf_add_config_ioctl()
4648 memcpy(oa_config->uuid, args->uuid, sizeof(args->uuid)); in i915_perf_add_config_ioctl()
4650 oa_config->mux_regs_len = args->n_mux_regs; in i915_perf_add_config_ioctl()
4652 perf->ops.is_valid_mux_reg, in i915_perf_add_config_ioctl()
4653 u64_to_user_ptr(args->mux_regs_ptr), in i915_perf_add_config_ioctl()
4654 args->n_mux_regs); in i915_perf_add_config_ioctl()
4657 drm_dbg(&perf->i915->drm, in i915_perf_add_config_ioctl()
4662 oa_config->mux_regs = regs; in i915_perf_add_config_ioctl()
4664 oa_config->b_counter_regs_len = args->n_boolean_regs; in i915_perf_add_config_ioctl()
4666 perf->ops.is_valid_b_counter_reg, in i915_perf_add_config_ioctl()
4667 u64_to_user_ptr(args->boolean_regs_ptr), in i915_perf_add_config_ioctl()
4668 args->n_boolean_regs); in i915_perf_add_config_ioctl()
4671 drm_dbg(&perf->i915->drm, in i915_perf_add_config_ioctl()
4676 oa_config->b_counter_regs = regs; in i915_perf_add_config_ioctl()
4678 if (GRAPHICS_VER(perf->i915) < 8) { in i915_perf_add_config_ioctl()
4679 if (args->n_flex_regs != 0) { in i915_perf_add_config_ioctl()
4680 err = -EINVAL; in i915_perf_add_config_ioctl()
4684 oa_config->flex_regs_len = args->n_flex_regs; in i915_perf_add_config_ioctl()
4686 perf->ops.is_valid_flex_reg, in i915_perf_add_config_ioctl()
4687 u64_to_user_ptr(args->flex_regs_ptr), in i915_perf_add_config_ioctl()
4688 args->n_flex_regs); in i915_perf_add_config_ioctl()
4691 drm_dbg(&perf->i915->drm, in i915_perf_add_config_ioctl()
4696 oa_config->flex_regs = regs; in i915_perf_add_config_ioctl()
4699 err = mutex_lock_interruptible(&perf->metrics_lock); in i915_perf_add_config_ioctl()
4706 idr_for_each_entry(&perf->metrics_idr, tmp, id) { in i915_perf_add_config_ioctl()
4707 if (!strcmp(tmp->uuid, oa_config->uuid)) { in i915_perf_add_config_ioctl()
4708 drm_dbg(&perf->i915->drm, in i915_perf_add_config_ioctl()
4710 err = -EADDRINUSE; in i915_perf_add_config_ioctl()
4717 drm_dbg(&perf->i915->drm, in i915_perf_add_config_ioctl()
4723 oa_config->id = idr_alloc(&perf->metrics_idr, in i915_perf_add_config_ioctl()
4726 if (oa_config->id < 0) { in i915_perf_add_config_ioctl()
4727 drm_dbg(&perf->i915->drm, in i915_perf_add_config_ioctl()
4729 err = oa_config->id; in i915_perf_add_config_ioctl()
4732 id = oa_config->id; in i915_perf_add_config_ioctl()
4734 drm_dbg(&perf->i915->drm, in i915_perf_add_config_ioctl()
4735 "Added config %s id=%i\n", oa_config->uuid, oa_config->id); in i915_perf_add_config_ioctl()
4736 mutex_unlock(&perf->metrics_lock); in i915_perf_add_config_ioctl()
4741 mutex_unlock(&perf->metrics_lock); in i915_perf_add_config_ioctl()
4744 drm_dbg(&perf->i915->drm, in i915_perf_add_config_ioctl()
4750 * i915_perf_remove_config_ioctl - DRM ioctl() for userspace to remove an OA config
4763 struct i915_perf *perf = &to_i915(dev)->perf; in i915_perf_remove_config_ioctl()
4768 if (!perf->i915) in i915_perf_remove_config_ioctl()
4769 return -ENOTSUPP; in i915_perf_remove_config_ioctl()
4772 drm_dbg(&perf->i915->drm, in i915_perf_remove_config_ioctl()
4774 return -EACCES; in i915_perf_remove_config_ioctl()
4777 ret = mutex_lock_interruptible(&perf->metrics_lock); in i915_perf_remove_config_ioctl()
4781 oa_config = idr_find(&perf->metrics_idr, *arg); in i915_perf_remove_config_ioctl()
4783 drm_dbg(&perf->i915->drm, in i915_perf_remove_config_ioctl()
4785 ret = -ENOENT; in i915_perf_remove_config_ioctl()
4789 GEM_BUG_ON(*arg != oa_config->id); in i915_perf_remove_config_ioctl()
4791 sysfs_remove_group(perf->metrics_kobj, &oa_config->sysfs_metric); in i915_perf_remove_config_ioctl()
4793 idr_remove(&perf->metrics_idr, *arg); in i915_perf_remove_config_ioctl()
4795 mutex_unlock(&perf->metrics_lock); in i915_perf_remove_config_ioctl()
4797 drm_dbg(&perf->i915->drm, in i915_perf_remove_config_ioctl()
4798 "Removed config %s id=%i\n", oa_config->uuid, oa_config->id); in i915_perf_remove_config_ioctl()
4805 mutex_unlock(&perf->metrics_lock); in i915_perf_remove_config_ioctl()
4837 if (GRAPHICS_VER_FULL(engine->i915) >= IP_VER(12, 70)) { in __oam_engine_group()
4842 drm_WARN_ON(&engine->i915->drm, in __oam_engine_group()
4843 engine->gt->type != GT_MEDIA); in __oam_engine_group()
4853 switch (engine->class) { in __oa_engine_group()
4898 int i, num_groups = gt->perf.num_perf_groups; in oa_init_groups()
4901 struct i915_perf_group *g = >->perf.group[i]; in oa_init_groups()
4904 if (g->num_engines == 0) in oa_init_groups()
4907 if (i == PERF_GROUP_OAG && gt->type != GT_MEDIA) { in oa_init_groups()
4908 g->regs = __oag_regs(); in oa_init_groups()
4909 g->type = TYPE_OAG; in oa_init_groups()
4910 } else if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 70)) { in oa_init_groups()
4911 g->regs = __oam_regs(mtl_oa_base[i]); in oa_init_groups()
4912 g->type = TYPE_OAM; in oa_init_groups()
4926 return -ENOMEM; in oa_init_gt()
4931 engine->oa_group = NULL; in oa_init_gt()
4934 engine->oa_group = &g[index]; in oa_init_gt()
4938 gt->perf.num_perf_groups = num_groups; in oa_init_gt()
4939 gt->perf.group = g; in oa_init_gt()
4951 for_each_gt(gt, perf->i915, i) { in oa_init_engine_groups()
4962 struct drm_i915_private *i915 = perf->i915; in oa_init_supported_formats()
4963 enum intel_platform platform = INTEL_INFO(i915)->platform; in oa_init_supported_formats()
5018 struct i915_perf *perf = &i915->perf; in i915_perf_init_info()
5022 perf->ctx_oactxctrl_offset = 0x120; in i915_perf_init_info()
5023 perf->ctx_flexeu0_offset = 0x2ce; in i915_perf_init_info()
5024 perf->gen8_valid_ctx_bit = BIT(25); in i915_perf_init_info()
5027 perf->ctx_oactxctrl_offset = 0x128; in i915_perf_init_info()
5028 perf->ctx_flexeu0_offset = 0x3de; in i915_perf_init_info()
5029 perf->gen8_valid_ctx_bit = BIT(16); in i915_perf_init_info()
5032 perf->ctx_oactxctrl_offset = 0x124; in i915_perf_init_info()
5033 perf->ctx_flexeu0_offset = 0x78e; in i915_perf_init_info()
5034 perf->gen8_valid_ctx_bit = BIT(16); in i915_perf_init_info()
5037 perf->gen8_valid_ctx_bit = BIT(16); in i915_perf_init_info()
5040 * cache the value in perf->ctx_oactxctrl_offset. in i915_perf_init_info()
5049 * i915_perf_init - initialize i915-perf state on module bind
5052 * Initializes i915-perf state without exposing anything to userspace.
5054 * Note: i915-perf initialization is split into an 'init' and 'register'
5059 struct i915_perf *perf = &i915->perf; in i915_perf_init()
5061 perf->oa_formats = oa_formats; in i915_perf_init()
5063 perf->ops.is_valid_b_counter_reg = gen7_is_valid_b_counter_addr; in i915_perf_init()
5064 perf->ops.is_valid_mux_reg = hsw_is_valid_mux_addr; in i915_perf_init()
5065 perf->ops.is_valid_flex_reg = NULL; in i915_perf_init()
5066 perf->ops.enable_metric_set = hsw_enable_metric_set; in i915_perf_init()
5067 perf->ops.disable_metric_set = hsw_disable_metric_set; in i915_perf_init()
5068 perf->ops.oa_enable = gen7_oa_enable; in i915_perf_init()
5069 perf->ops.oa_disable = gen7_oa_disable; in i915_perf_init()
5070 perf->ops.read = gen7_oa_read; in i915_perf_init()
5071 perf->ops.oa_hw_tail_read = gen7_oa_hw_tail_read; in i915_perf_init()
5079 perf->ops.read = gen8_oa_read; in i915_perf_init()
5083 perf->ops.is_valid_b_counter_reg = in i915_perf_init()
5085 perf->ops.is_valid_mux_reg = in i915_perf_init()
5087 perf->ops.is_valid_flex_reg = in i915_perf_init()
5091 perf->ops.is_valid_mux_reg = in i915_perf_init()
5095 perf->ops.oa_enable = gen8_oa_enable; in i915_perf_init()
5096 perf->ops.oa_disable = gen8_oa_disable; in i915_perf_init()
5097 perf->ops.enable_metric_set = gen8_enable_metric_set; in i915_perf_init()
5098 perf->ops.disable_metric_set = gen8_disable_metric_set; in i915_perf_init()
5099 perf->ops.oa_hw_tail_read = gen8_oa_hw_tail_read; in i915_perf_init()
5101 perf->ops.is_valid_b_counter_reg = in i915_perf_init()
5103 perf->ops.is_valid_mux_reg = in i915_perf_init()
5105 perf->ops.is_valid_flex_reg = in i915_perf_init()
5108 perf->ops.oa_enable = gen8_oa_enable; in i915_perf_init()
5109 perf->ops.oa_disable = gen8_oa_disable; in i915_perf_init()
5110 perf->ops.enable_metric_set = gen8_enable_metric_set; in i915_perf_init()
5111 perf->ops.disable_metric_set = gen11_disable_metric_set; in i915_perf_init()
5112 perf->ops.oa_hw_tail_read = gen8_oa_hw_tail_read; in i915_perf_init()
5114 perf->ops.is_valid_b_counter_reg = in i915_perf_init()
5118 perf->ops.is_valid_mux_reg = in i915_perf_init()
5120 perf->ops.is_valid_flex_reg = in i915_perf_init()
5123 perf->ops.oa_enable = gen12_oa_enable; in i915_perf_init()
5124 perf->ops.oa_disable = gen12_oa_disable; in i915_perf_init()
5125 perf->ops.enable_metric_set = gen12_enable_metric_set; in i915_perf_init()
5126 perf->ops.disable_metric_set = gen12_disable_metric_set; in i915_perf_init()
5127 perf->ops.oa_hw_tail_read = gen12_oa_hw_tail_read; in i915_perf_init()
5131 if (perf->ops.enable_metric_set) { in i915_perf_init()
5136 mutex_init(>->perf.lock); in i915_perf_init()
5139 oa_sample_rate_hard_limit = to_gt(i915)->clock_frequency / 2; in i915_perf_init()
5141 mutex_init(&perf->metrics_lock); in i915_perf_init()
5142 idr_init_base(&perf->metrics_idr, 1); in i915_perf_init()
5154 ratelimit_state_init(&perf->spurious_report_rs, 5 * HZ, 10); in i915_perf_init()
5159 ratelimit_set_flags(&perf->spurious_report_rs, in i915_perf_init()
5162 ratelimit_state_init(&perf->tail_pointer_race, in i915_perf_init()
5164 ratelimit_set_flags(&perf->tail_pointer_race, in i915_perf_init()
5167 atomic64_set(&perf->noa_programming_delay, in i915_perf_init()
5170 perf->i915 = i915; in i915_perf_init()
5174 drm_err(&i915->drm, in i915_perf_init()
5203 * i915_perf_fini - Counter part to i915_perf_init()
5208 struct i915_perf *perf = &i915->perf; in i915_perf_fini()
5212 if (!perf->i915) in i915_perf_fini()
5215 for_each_gt(gt, perf->i915, i) in i915_perf_fini()
5216 kfree(gt->perf.group); in i915_perf_fini()
5218 idr_for_each(&perf->metrics_idr, destroy_config, perf); in i915_perf_fini()
5219 idr_destroy(&perf->metrics_idr); in i915_perf_fini()
5221 memset(&perf->ops, 0, sizeof(perf->ops)); in i915_perf_fini()
5222 perf->i915 = NULL; in i915_perf_fini()
5226 * i915_perf_ioctl_version - Version of the i915-perf subsystem
5264 if (IS_MEDIA_GT_IP_STEP(i915->media_gt, IP_VER(13, 0), STEP_A0, STEP_C0) && in i915_perf_ioctl_version()
5265 intel_check_bios_c6_setup(&i915->media_gt->rc6)) in i915_perf_ioctl_version()