Lines Matching +full:y +full:- +full:offset
1 // SPDX-License-Identifier: MIT
275 const struct drm_framebuffer *fb = plane_state->hw.fb; in glk_plane_ratio()
277 if (fb->format->cpp[0] == 8) { in glk_plane_ratio()
302 const struct drm_framebuffer *fb = plane_state->hw.fb; in skl_plane_ratio()
304 if (fb->format->cpp[0] == 8) { in skl_plane_ratio()
328 int cpp = fb->format->cpp[color_plane]; in skl_plane_max_width()
330 switch (fb->modifier) { in skl_plane_max_width()
336 * - Ytile (already limited to 4k) in skl_plane_max_width()
337 * - FP16 (already limited to 4k) in skl_plane_max_width()
338 * - render compression (already limited to 4k) in skl_plane_max_width()
339 * - KVMR sprite and cursor (don't care) in skl_plane_max_width()
340 * - horizontal panning (TODO verify this) in skl_plane_max_width()
341 * - pipe and plane scaling (TODO verify this) in skl_plane_max_width()
357 MISSING_CASE(fb->modifier); in skl_plane_max_width()
366 int cpp = fb->format->cpp[color_plane]; in glk_plane_max_width()
368 switch (fb->modifier) { in glk_plane_max_width()
385 MISSING_CASE(fb->modifier); in glk_plane_max_width()
395 switch (fb->format->format) { in icl_plane_min_width()
434 if (intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier)) in xe3_plane_max_width()
444 if (intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier)) in icl_hdr_plane_max_width()
479 int cpp = info->cpp[0]; in plane_max_stride()
591 /* PLANE_SURF GGTT -> DPT alignment */ in tgl_plane_min_alignment()
603 if (display->platform.alderlake_p && in tgl_plane_min_alignment()
604 intel_plane_can_async_flip(plane, fb->modifier)) in tgl_plane_min_alignment()
607 switch (fb->modifier) { in tgl_plane_min_alignment()
630 MISSING_CASE(fb->modifier); in tgl_plane_min_alignment()
647 * VT-d needs at least 256k alignment, in skl_plane_min_alignment()
650 switch (fb->modifier) { in skl_plane_min_alignment()
660 MISSING_CASE(fb->modifier); in skl_plane_min_alignment()
678 * in full-range YCbCr.
686 enum pipe pipe = plane->pipe; in icl_program_input_csc()
687 enum plane_id plane_id = plane->id; in icl_program_input_csc()
691 * BT.601 full range YCbCr -> full range RGB in icl_program_input_csc()
694 * 1.000, -0.336, -0.698, in icl_program_input_csc()
703 * BT.709 full range YCbCr -> full range RGB in icl_program_input_csc()
706 * 1.000, -0.187, -0.468, in icl_program_input_csc()
715 * BT.2020 full range YCbCr -> full range RGB in icl_program_input_csc()
718 * 1.000, -0.1645, -0.5713, in icl_program_input_csc()
727 const u16 *csc = input_csc_matrix[plane_state->hw.color_encoding]; in icl_program_input_csc()
774 const struct drm_framebuffer *fb = plane_state->hw.fb; in skl_plane_stride()
775 unsigned int rotation = plane_state->hw.rotation; in skl_plane_stride()
776 u32 stride = plane_state->view.color_plane[color_plane].scanout_stride; in skl_plane_stride()
778 if (color_plane >= fb->format->num_planes) in skl_plane_stride()
786 if (!entry->end) in skl_plane_ddb_reg_val()
789 return PLANE_BUF_END(entry->end - 1) | in skl_plane_ddb_reg_val()
790 PLANE_BUF_START(entry->start); in skl_plane_ddb_reg_val()
813 if (level->enable) in skl_plane_wm_reg_val()
815 if (level->ignore_lines) in skl_plane_wm_reg_val()
817 if (level->auto_min_alloc_wm_enable) in skl_plane_wm_reg_val()
820 val |= REG_FIELD_PREP(PLANE_WM_BLOCKS_MASK, level->blocks); in skl_plane_wm_reg_val()
821 val |= REG_FIELD_PREP(PLANE_WM_LINES_MASK, level->lines); in skl_plane_wm_reg_val()
831 enum plane_id plane_id = plane->id; in skl_write_plane_wm()
832 enum pipe pipe = plane->pipe; in skl_write_plane_wm()
833 const struct skl_pipe_wm *pipe_wm = &crtc_state->wm.skl.optimal; in skl_write_plane_wm()
835 &crtc_state->wm.skl.plane_ddb[plane_id]; in skl_write_plane_wm()
837 &crtc_state->wm.skl.plane_ddb_y[plane_id]; in skl_write_plane_wm()
838 const u16 *min_ddb = &crtc_state->wm.skl.plane_min_ddb[plane_id]; in skl_write_plane_wm()
840 &crtc_state->wm.skl.plane_interim_ddb[plane_id]; in skl_write_plane_wm()
843 for (level = 0; level < display->wm.num_levels; level++) in skl_write_plane_wm()
851 const struct skl_plane_wm *wm = &pipe_wm->planes[plane_id]; in skl_write_plane_wm()
854 skl_plane_wm_reg_val(&wm->sagv.wm0)); in skl_write_plane_wm()
856 skl_plane_wm_reg_val(&wm->sagv.trans_wm)); in skl_write_plane_wm()
877 enum plane_id plane_id = plane->id; in skl_plane_disable_arm()
878 enum pipe pipe = plane->pipe; in skl_plane_disable_arm()
891 enum pipe pipe = plane->pipe; in icl_plane_disable_sel_fetch_arm()
893 if (!crtc_state->enable_psr2_sel_fetch) in icl_plane_disable_sel_fetch_arm()
896 intel_de_write_dsb(display, dsb, SEL_FETCH_PLANE_CTL(pipe, plane->id), 0); in icl_plane_disable_sel_fetch_arm()
905 enum plane_id plane_id = plane->id; in icl_plane_disable_arm()
906 enum pipe pipe = plane->pipe; in icl_plane_disable_arm()
924 enum plane_id plane_id = plane->id; in skl_plane_get_hw_state()
928 power_domain = POWER_DOMAIN_PIPE(plane->pipe); in skl_plane_get_hw_state()
933 ret = intel_de_read(display, PLANE_CTL(plane->pipe, plane_id)) & PLANE_CTL_ENABLE; in skl_plane_get_hw_state()
935 *pipe = plane->pipe; in skl_plane_get_hw_state()
1006 if (!plane_state->hw.fb->format->has_alpha) in skl_plane_ctl_alpha()
1009 switch (plane_state->hw.pixel_blend_mode) { in skl_plane_ctl_alpha()
1017 MISSING_CASE(plane_state->hw.pixel_blend_mode); in skl_plane_ctl_alpha()
1024 if (!plane_state->hw.fb->format->has_alpha) in glk_plane_color_ctl_alpha()
1027 switch (plane_state->hw.pixel_blend_mode) { in glk_plane_color_ctl_alpha()
1035 MISSING_CASE(plane_state->hw.pixel_blend_mode); in glk_plane_color_ctl_alpha()
1131 const struct drm_framebuffer *fb = plane_state->hw.fb; in adlp_plane_ctl_arb_slots()
1133 if (intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier)) { in adlp_plane_ctl_arb_slots()
1134 switch (fb->format->cpp[0]) { in adlp_plane_ctl_arb_slots()
1141 switch (fb->format->cpp[0]) { in adlp_plane_ctl_arb_slots()
1160 if (crtc_state->gamma_enable) in skl_plane_ctl_crtc()
1163 if (crtc_state->csc_enable) in skl_plane_ctl_crtc()
1173 const struct drm_framebuffer *fb = plane_state->hw.fb; in skl_plane_ctl()
1174 unsigned int rotation = plane_state->hw.rotation; in skl_plane_ctl()
1175 const struct drm_intel_sprite_colorkey *key = &plane_state->ckey; in skl_plane_ctl()
1184 if (plane_state->hw.color_encoding == DRM_COLOR_YCBCR_BT709) in skl_plane_ctl()
1187 if (plane_state->hw.color_range == DRM_COLOR_YCBCR_FULL_RANGE) in skl_plane_ctl()
1191 plane_ctl |= skl_plane_ctl_format(fb->format->format); in skl_plane_ctl()
1192 plane_ctl |= skl_plane_ctl_tiling(fb->modifier); in skl_plane_ctl()
1199 if (key->flags & I915_SET_COLORKEY_DESTINATION) in skl_plane_ctl()
1201 else if (key->flags & I915_SET_COLORKEY_SOURCE) in skl_plane_ctl()
1204 /* Wa_22012358565:adl-p */ in skl_plane_ctl()
1219 if (crtc_state->gamma_enable) in glk_plane_color_ctl_crtc()
1222 if (crtc_state->csc_enable) in glk_plane_color_ctl_crtc()
1232 const struct drm_framebuffer *fb = plane_state->hw.fb; in glk_plane_color_ctl()
1233 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); in glk_plane_color_ctl()
1239 if (fb->format->is_yuv && !icl_is_hdr_plane(display, plane->id)) { in glk_plane_color_ctl()
1240 switch (plane_state->hw.color_encoding) { in glk_plane_color_ctl()
1252 if (plane_state->hw.color_range == DRM_COLOR_YCBCR_FULL_RANGE) in glk_plane_color_ctl()
1254 } else if (fb->format->is_yuv) { in glk_plane_color_ctl()
1256 if (plane_state->hw.color_range == DRM_COLOR_YCBCR_FULL_RANGE) in glk_plane_color_ctl()
1260 if (plane_state->force_black) in glk_plane_color_ctl()
1270 const struct drm_framebuffer *fb = plane_state->hw.fb; in skl_surf_address()
1271 u32 offset = plane_state->view.color_plane[color_plane].offset; in skl_surf_address() local
1275 * The DPT object contains only one vma, so the VMA's offset in skl_surf_address()
1278 drm_WARN_ON(display->drm, plane_state->dpt_vma && in skl_surf_address()
1279 intel_dpt_offset(plane_state->dpt_vma)); in skl_surf_address()
1280 drm_WARN_ON(display->drm, offset & 0x1fffff); in skl_surf_address()
1281 return offset >> 9; in skl_surf_address()
1283 drm_WARN_ON(display->drm, offset & 0xfff); in skl_surf_address()
1284 return offset; in skl_surf_address()
1296 if (plane_state->decrypt) in skl_plane_surf()
1306 const struct drm_framebuffer *fb = plane_state->hw.fb; in skl_plane_aux_dist()
1313 aux_dist = skl_surf_address(plane_state, aux_plane) - in skl_plane_aux_dist()
1324 const struct drm_intel_sprite_colorkey *key = &plane_state->ckey; in skl_plane_keyval()
1326 return key->min_value; in skl_plane_keyval()
1331 const struct drm_intel_sprite_colorkey *key = &plane_state->ckey; in skl_plane_keymax()
1332 u8 alpha = plane_state->hw.alpha >> 8; in skl_plane_keymax()
1334 return (key->max_value & 0xffffff) | PLANE_KEYMAX_ALPHA(alpha); in skl_plane_keymax()
1339 const struct drm_intel_sprite_colorkey *key = &plane_state->ckey; in skl_plane_keymsk()
1340 u8 alpha = plane_state->hw.alpha >> 8; in skl_plane_keymsk()
1343 keymsk = key->channel_mask & 0x7ffffff; in skl_plane_keymsk()
1355 enum plane_id plane_id = plane->id; in icl_plane_csc_load_black()
1356 enum pipe pipe = plane->pipe; in icl_plane_csc_load_black()
1378 if (plane_state->planar_linked_plane && !plane_state->is_y_plane) in icl_plane_color_plane()
1391 enum plane_id plane_id = plane->id; in skl_plane_update_noarm()
1392 enum pipe pipe = plane->pipe; in skl_plane_update_noarm()
1394 int crtc_x = plane_state->uapi.dst.x1; in skl_plane_update_noarm()
1395 int crtc_y = plane_state->uapi.dst.y1; in skl_plane_update_noarm()
1396 u32 src_w = drm_rect_width(&plane_state->uapi.src) >> 16; in skl_plane_update_noarm()
1397 u32 src_h = drm_rect_height(&plane_state->uapi.src) >> 16; in skl_plane_update_noarm()
1400 if (plane_state->scaler_id >= 0) { in skl_plane_update_noarm()
1410 PLANE_HEIGHT(src_h - 1) | PLANE_WIDTH(src_w - 1)); in skl_plane_update_noarm()
1422 enum plane_id plane_id = plane->id; in skl_plane_update_arm()
1423 enum pipe pipe = plane->pipe; in skl_plane_update_arm()
1424 u32 x = plane_state->view.color_plane[0].x; in skl_plane_update_arm()
1425 u32 y = plane_state->view.color_plane[0].y; in skl_plane_update_arm() local
1428 plane_ctl = plane_state->ctl | in skl_plane_update_arm()
1432 if (plane->need_async_flip_toggle_wa && in skl_plane_update_arm()
1433 crtc_state->async_flip_planes & BIT(plane->id)) in skl_plane_update_arm()
1437 plane_color_ctl = plane_state->color_ctl | in skl_plane_update_arm()
1448 PLANE_OFFSET_Y(y) | PLANE_OFFSET_X(x)); in skl_plane_update_arm()
1454 PLANE_OFFSET_Y(plane_state->view.color_plane[1].y) | in skl_plane_update_arm()
1455 PLANE_OFFSET_X(plane_state->view.color_plane[1].x)); in skl_plane_update_arm()
1468 if (plane_state->scaler_id >= 0) in skl_plane_update_arm()
1472 * The control register self-arms if the plane was previously in skl_plane_update_arm()
1489 enum pipe pipe = plane->pipe; in icl_plane_update_sel_fetch_noarm()
1492 int x, y; in icl_plane_update_sel_fetch_noarm() local
1494 if (!crtc_state->enable_psr2_sel_fetch) in icl_plane_update_sel_fetch_noarm()
1497 clip = &plane_state->psr2_sel_fetch_area; in icl_plane_update_sel_fetch_noarm()
1499 if (crtc_state->enable_psr2_su_region_et) in icl_plane_update_sel_fetch_noarm()
1500 y = max(0, plane_state->uapi.dst.y1 - crtc_state->psr2_su_area.y1); in icl_plane_update_sel_fetch_noarm()
1502 y = (clip->y1 + plane_state->uapi.dst.y1); in icl_plane_update_sel_fetch_noarm()
1503 val = y << 16; in icl_plane_update_sel_fetch_noarm()
1504 val |= plane_state->uapi.dst.x1; in icl_plane_update_sel_fetch_noarm()
1505 intel_de_write_dsb(display, dsb, SEL_FETCH_PLANE_POS(pipe, plane->id), val); in icl_plane_update_sel_fetch_noarm()
1507 x = plane_state->view.color_plane[color_plane].x; in icl_plane_update_sel_fetch_noarm()
1510 * From Bspec: UV surface Start Y Position = half of Y plane Y in icl_plane_update_sel_fetch_noarm()
1514 y = plane_state->view.color_plane[color_plane].y + clip->y1; in icl_plane_update_sel_fetch_noarm()
1516 y = plane_state->view.color_plane[color_plane].y + clip->y1 / 2; in icl_plane_update_sel_fetch_noarm()
1518 val = y << 16 | x; in icl_plane_update_sel_fetch_noarm()
1520 intel_de_write_dsb(display, dsb, SEL_FETCH_PLANE_OFFSET(pipe, plane->id), val); in icl_plane_update_sel_fetch_noarm()
1523 val = (drm_rect_height(clip) - 1) << 16; in icl_plane_update_sel_fetch_noarm()
1524 val |= (drm_rect_width(&plane_state->uapi.src) >> 16) - 1; in icl_plane_update_sel_fetch_noarm()
1525 intel_de_write_dsb(display, dsb, SEL_FETCH_PLANE_SIZE(pipe, plane->id), val); in icl_plane_update_sel_fetch_noarm()
1535 enum plane_id plane_id = plane->id; in icl_plane_update_noarm()
1536 enum pipe pipe = plane->pipe; in icl_plane_update_noarm()
1539 const struct drm_framebuffer *fb = plane_state->hw.fb; in icl_plane_update_noarm()
1540 int crtc_x = plane_state->uapi.dst.x1; in icl_plane_update_noarm()
1541 int crtc_y = plane_state->uapi.dst.y1; in icl_plane_update_noarm()
1542 int x = plane_state->view.color_plane[color_plane].x; in icl_plane_update_noarm()
1543 int y = plane_state->view.color_plane[color_plane].y; in icl_plane_update_noarm() local
1544 int src_w = drm_rect_width(&plane_state->uapi.src) >> 16; in icl_plane_update_noarm()
1545 int src_h = drm_rect_height(&plane_state->uapi.src) >> 16; in icl_plane_update_noarm()
1548 plane_color_ctl = plane_state->color_ctl | in icl_plane_update_noarm()
1552 if (plane_state->scaler_id >= 0) { in icl_plane_update_noarm()
1562 PLANE_HEIGHT(src_h - 1) | PLANE_WIDTH(src_w - 1)); in icl_plane_update_noarm()
1572 PLANE_OFFSET_Y(y) | PLANE_OFFSET_X(x)); in icl_plane_update_noarm()
1574 if (intel_fb_is_rc_ccs_cc_modifier(fb->modifier)) { in icl_plane_update_noarm()
1576 lower_32_bits(plane_state->ccval)); in icl_plane_update_noarm()
1578 upper_32_bits(plane_state->ccval)); in icl_plane_update_noarm()
1582 if (!HAS_FLAT_CCS(to_i915(display->drm)) && DISPLAY_VER(display) < 20) in icl_plane_update_noarm()
1588 plane_state->cus_ctl); in icl_plane_update_noarm()
1593 if (fb->format->is_yuv && icl_is_hdr_plane(display, plane_id)) in icl_plane_update_noarm()
1602 if (plane_state->force_black) in icl_plane_update_noarm()
1614 enum pipe pipe = plane->pipe; in icl_plane_update_sel_fetch_arm()
1616 if (!crtc_state->enable_psr2_sel_fetch) in icl_plane_update_sel_fetch_arm()
1619 if (drm_rect_height(&plane_state->psr2_sel_fetch_area) > 0) in icl_plane_update_sel_fetch_arm()
1620 intel_de_write_dsb(display, dsb, SEL_FETCH_PLANE_CTL(pipe, plane->id), in icl_plane_update_sel_fetch_arm()
1633 enum plane_id plane_id = plane->id; in icl_plane_update_arm()
1634 enum pipe pipe = plane->pipe; in icl_plane_update_arm()
1638 plane_ctl = plane_state->ctl | in icl_plane_update_arm()
1648 if (plane_state->scaler_id >= 0) in icl_plane_update_arm()
1654 * The control register self-arms if the plane was previously in icl_plane_update_arm()
1670 error->ctl = intel_de_read(display, PLANE_CTL(crtc->pipe, plane->id)); in skl_plane_capture_error()
1671 error->surf = intel_de_read(display, PLANE_SURF(crtc->pipe, plane->id)); in skl_plane_capture_error()
1672 error->surflive = intel_de_read(display, PLANE_SURFLIVE(crtc->pipe, plane->id)); in skl_plane_capture_error()
1683 enum plane_id plane_id = plane->id; in skl_plane_async_flip()
1684 enum pipe pipe = plane->pipe; in skl_plane_async_flip()
1685 u32 plane_ctl = plane_state->ctl, plane_surf; in skl_plane_async_flip()
1719 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); in skl_plane_check_fb()
1720 const struct drm_framebuffer *fb = plane_state->hw.fb; in skl_plane_check_fb()
1721 unsigned int rotation = plane_state->hw.rotation; in skl_plane_check_fb()
1727 intel_fb_is_ccs_modifier(fb->modifier)) { in skl_plane_check_fb()
1728 drm_dbg_kms(display->drm, in skl_plane_check_fb()
1730 plane->base.base.id, plane->base.name, rotation); in skl_plane_check_fb()
1731 return -EINVAL; in skl_plane_check_fb()
1735 fb->modifier == DRM_FORMAT_MOD_LINEAR) { in skl_plane_check_fb()
1736 drm_dbg_kms(display->drm, in skl_plane_check_fb()
1738 plane->base.base.id, plane->base.name); in skl_plane_check_fb()
1739 return -EINVAL; in skl_plane_check_fb()
1746 intel_fb_is_tile4_modifier(fb->modifier) && in skl_plane_check_fb()
1748 drm_dbg_kms(display->drm, in skl_plane_check_fb()
1750 plane->base.base.id, plane->base.name); in skl_plane_check_fb()
1751 return -EINVAL; in skl_plane_check_fb()
1756 drm_dbg_kms(display->drm, in skl_plane_check_fb()
1757 "[PLANE:%d:%s] Y/Yf tiling required for 90/270!\n", in skl_plane_check_fb()
1758 plane->base.base.id, plane->base.name); in skl_plane_check_fb()
1759 return -EINVAL; in skl_plane_check_fb()
1764 * Indexed 8-bit. RGB 16-bit 5:6:5 is allowed gen11 onwards. in skl_plane_check_fb()
1766 switch (fb->format->format) { in skl_plane_check_fb()
1781 drm_dbg_kms(display->drm, in skl_plane_check_fb()
1783 plane->base.base.id, plane->base.name, &fb->format->format); in skl_plane_check_fb()
1784 return -EINVAL; in skl_plane_check_fb()
1790 /* Y-tiling is not supported in IF-ID Interlace mode */ in skl_plane_check_fb()
1791 if (crtc_state->hw.enable && in skl_plane_check_fb()
1792 crtc_state->hw.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE && in skl_plane_check_fb()
1793 fb->modifier != DRM_FORMAT_MOD_LINEAR && in skl_plane_check_fb()
1794 fb->modifier != I915_FORMAT_MOD_X_TILED) { in skl_plane_check_fb()
1795 drm_dbg_kms(display->drm, in skl_plane_check_fb()
1796 "[PLANE:%d:%s] Y/Yf tiling not supported in IF-ID mode\n", in skl_plane_check_fb()
1797 plane->base.base.id, plane->base.name); in skl_plane_check_fb()
1798 return -EINVAL; in skl_plane_check_fb()
1801 /* Wa_1606054188:tgl,adl-s */ in skl_plane_check_fb()
1802 if ((display->platform.alderlake_s || display->platform.tigerlake) && in skl_plane_check_fb()
1803 plane_state->ckey.flags & I915_SET_COLORKEY_SOURCE && in skl_plane_check_fb()
1804 intel_format_is_p01x(fb->format->format)) { in skl_plane_check_fb()
1805 drm_dbg_kms(display->drm, in skl_plane_check_fb()
1807 plane->base.base.id, plane->base.name); in skl_plane_check_fb()
1808 return -EINVAL; in skl_plane_check_fb()
1818 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); in skl_plane_check_dst_coordinates()
1819 int crtc_x = plane_state->uapi.dst.x1; in skl_plane_check_dst_coordinates()
1820 int crtc_w = drm_rect_width(&plane_state->uapi.dst); in skl_plane_check_dst_coordinates()
1821 int pipe_src_w = drm_rect_width(&crtc_state->pipe_src); in skl_plane_check_dst_coordinates()
1833 (crtc_x + crtc_w < 4 || crtc_x > pipe_src_w - 4)) { in skl_plane_check_dst_coordinates()
1834 drm_dbg_kms(display->drm, in skl_plane_check_dst_coordinates()
1835 "[PLANE:%d:%s] requested plane X %s position %d invalid (valid range %d-%d)\n", in skl_plane_check_dst_coordinates()
1836 plane->base.base.id, plane->base.name, in skl_plane_check_dst_coordinates()
1839 4, pipe_src_w - 4); in skl_plane_check_dst_coordinates()
1840 return -ERANGE; in skl_plane_check_dst_coordinates()
1849 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); in skl_plane_check_nv12_rotation()
1850 const struct drm_framebuffer *fb = plane_state->hw.fb; in skl_plane_check_nv12_rotation()
1851 unsigned int rotation = plane_state->hw.rotation; in skl_plane_check_nv12_rotation()
1852 int src_w = drm_rect_width(&plane_state->uapi.src) >> 16; in skl_plane_check_nv12_rotation()
1855 if (intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier) && in skl_plane_check_nv12_rotation()
1859 drm_dbg_kms(display->drm, in skl_plane_check_nv12_rotation()
1861 plane->base.base.id, plane->base.name); in skl_plane_check_nv12_rotation()
1862 return -EINVAL; in skl_plane_check_nv12_rotation()
1878 !intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier)) in skl_plane_max_scale()
1879 return 0x30000 - 1; in skl_plane_max_scale()
1881 return 0x20000 - 1; in skl_plane_max_scale()
1889 if (plane->min_width) in intel_plane_min_width()
1890 return plane->min_width(fb, color_plane, rotation); in intel_plane_min_width()
1900 if (plane->max_width) in intel_plane_max_width()
1901 return plane->max_width(fb, color_plane, rotation); in intel_plane_max_width()
1911 if (plane->max_height) in intel_plane_max_height()
1912 return plane->max_height(fb, color_plane, rotation); in intel_plane_max_height()
1922 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); in skl_check_main_ccs_coordinates()
1923 const struct drm_framebuffer *fb = plane_state->hw.fb; in skl_check_main_ccs_coordinates()
1924 int aux_x = plane_state->view.color_plane[ccs_plane].x; in skl_check_main_ccs_coordinates()
1925 int aux_y = plane_state->view.color_plane[ccs_plane].y; in skl_check_main_ccs_coordinates()
1926 u32 aux_offset = plane_state->view.color_plane[ccs_plane].offset; in skl_check_main_ccs_coordinates()
1927 unsigned int alignment = plane->min_alignment(plane, fb, ccs_plane); in skl_check_main_ccs_coordinates()
1933 int x, y; in skl_check_main_ccs_coordinates() local
1942 y = aux_y / vsub; in skl_check_main_ccs_coordinates()
1943 aux_offset = intel_plane_adjust_aligned_offset(&x, &y, in skl_check_main_ccs_coordinates()
1947 aux_offset - alignment); in skl_check_main_ccs_coordinates()
1949 aux_y = y * vsub + aux_y % vsub; in skl_check_main_ccs_coordinates()
1955 plane_state->view.color_plane[ccs_plane].offset = aux_offset; in skl_check_main_ccs_coordinates()
1956 plane_state->view.color_plane[ccs_plane].x = aux_x; in skl_check_main_ccs_coordinates()
1957 plane_state->view.color_plane[ccs_plane].y = aux_y; in skl_check_main_ccs_coordinates()
1964 int *x, int *y, u32 *offset) in skl_calc_main_surface_offset() argument
1967 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); in skl_calc_main_surface_offset()
1968 const struct drm_framebuffer *fb = plane_state->hw.fb; in skl_calc_main_surface_offset()
1970 u32 aux_offset = plane_state->view.color_plane[aux_plane].offset; in skl_calc_main_surface_offset()
1971 unsigned int alignment = plane->min_alignment(plane, fb, 0); in skl_calc_main_surface_offset()
1972 int w = drm_rect_width(&plane_state->uapi.src) >> 16; in skl_calc_main_surface_offset()
1974 intel_add_fb_offsets(x, y, plane_state, 0); in skl_calc_main_surface_offset()
1975 *offset = intel_plane_compute_aligned_offset(x, y, plane_state, 0); in skl_calc_main_surface_offset()
1976 if (drm_WARN_ON(display->drm, alignment && !is_power_of_2(alignment))) in skl_calc_main_surface_offset()
1977 return -EINVAL; in skl_calc_main_surface_offset()
1980 * AUX surface offset is specified as the distance from the in skl_calc_main_surface_offset()
1981 * main surface offset, and it must be non-negative. Make in skl_calc_main_surface_offset()
1984 if (aux_plane && *offset > aux_offset) in skl_calc_main_surface_offset()
1985 *offset = intel_plane_adjust_aligned_offset(x, y, plane_state, 0, in skl_calc_main_surface_offset()
1986 *offset, in skl_calc_main_surface_offset()
1987 aux_offset & ~(alignment - 1)); in skl_calc_main_surface_offset()
1990 * When using an X-tiled surface, the plane blows up in skl_calc_main_surface_offset()
1991 * if the x offset + width exceed the stride. in skl_calc_main_surface_offset()
1993 * TODO: linear and Y-tiled seem fine, Yf untested, in skl_calc_main_surface_offset()
1995 if (fb->modifier == I915_FORMAT_MOD_X_TILED) { in skl_calc_main_surface_offset()
1996 int cpp = fb->format->cpp[0]; in skl_calc_main_surface_offset()
1998 while ((*x + w) * cpp > plane_state->view.color_plane[0].mapping_stride) { in skl_calc_main_surface_offset()
1999 if (*offset == 0) { in skl_calc_main_surface_offset()
2000 drm_dbg_kms(display->drm, in skl_calc_main_surface_offset()
2001 "[PLANE:%d:%s] unable to find suitable display surface offset due to X-tiling\n", in skl_calc_main_surface_offset()
2002 plane->base.base.id, plane->base.name); in skl_calc_main_surface_offset()
2003 return -EINVAL; in skl_calc_main_surface_offset()
2006 *offset = intel_plane_adjust_aligned_offset(x, y, plane_state, 0, in skl_calc_main_surface_offset()
2007 *offset, in skl_calc_main_surface_offset()
2008 *offset - alignment); in skl_calc_main_surface_offset()
2018 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); in skl_check_main_surface()
2019 const struct drm_framebuffer *fb = plane_state->hw.fb; in skl_check_main_surface()
2020 unsigned int rotation = plane_state->hw.rotation; in skl_check_main_surface()
2021 int x = plane_state->uapi.src.x1 >> 16; in skl_check_main_surface()
2022 int y = plane_state->uapi.src.y1 >> 16; in skl_check_main_surface() local
2023 int w = drm_rect_width(&plane_state->uapi.src) >> 16; in skl_check_main_surface()
2024 int h = drm_rect_height(&plane_state->uapi.src) >> 16; in skl_check_main_surface()
2028 unsigned int alignment = plane->min_alignment(plane, fb, 0); in skl_check_main_surface()
2030 u32 offset; in skl_check_main_surface() local
2034 drm_dbg_kms(display->drm, in skl_check_main_surface()
2035 "[PLANE:%d:%s] requested Y/RGB source size %dx%d outside limits (min: %dx1 max: %dx%d)\n", in skl_check_main_surface()
2036 plane->base.base.id, plane->base.name, in skl_check_main_surface()
2038 return -EINVAL; in skl_check_main_surface()
2041 ret = skl_calc_main_surface_offset(plane_state, &x, &y, &offset); in skl_check_main_surface()
2046 * CCS AUX surface doesn't have its own x/y offsets, we must make sure in skl_check_main_surface()
2047 * they match with the main surface x/y offsets. On DG2 in skl_check_main_surface()
2050 if (intel_fb_is_ccs_modifier(fb->modifier) && aux_plane) { in skl_check_main_surface()
2051 while (!skl_check_main_ccs_coordinates(plane_state, x, y, in skl_check_main_surface()
2052 offset, aux_plane)) { in skl_check_main_surface()
2053 if (offset == 0) in skl_check_main_surface()
2056 offset = intel_plane_adjust_aligned_offset(&x, &y, plane_state, 0, in skl_check_main_surface()
2057 offset, offset - alignment); in skl_check_main_surface()
2060 if (x != plane_state->view.color_plane[aux_plane].x || in skl_check_main_surface()
2061 y != plane_state->view.color_plane[aux_plane].y) { in skl_check_main_surface()
2062 drm_dbg_kms(display->drm, in skl_check_main_surface()
2063 "[PLANE:%d:%s] unable to find suitable display surface offset due to CCS\n", in skl_check_main_surface()
2064 plane->base.base.id, plane->base.name); in skl_check_main_surface()
2065 return -EINVAL; in skl_check_main_surface()
2070 drm_WARN_ON(display->drm, x > 65535 || y > 65535); in skl_check_main_surface()
2072 drm_WARN_ON(display->drm, x > 8191 || y > 8191); in skl_check_main_surface()
2074 plane_state->view.color_plane[0].offset = offset; in skl_check_main_surface()
2075 plane_state->view.color_plane[0].x = x; in skl_check_main_surface()
2076 plane_state->view.color_plane[0].y = y; in skl_check_main_surface()
2082 drm_rect_translate_to(&plane_state->uapi.src, in skl_check_main_surface()
2083 x << 16, y << 16); in skl_check_main_surface()
2091 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); in skl_check_nv12_aux_surface()
2092 const struct drm_framebuffer *fb = plane_state->hw.fb; in skl_check_nv12_aux_surface()
2093 unsigned int rotation = plane_state->hw.rotation; in skl_check_nv12_aux_surface()
2095 int ccs_plane = intel_fb_is_ccs_modifier(fb->modifier) ? in skl_check_nv12_aux_surface()
2099 int x = plane_state->uapi.src.x1 >> 17; in skl_check_nv12_aux_surface()
2100 int y = plane_state->uapi.src.y1 >> 17; in skl_check_nv12_aux_surface() local
2101 int w = drm_rect_width(&plane_state->uapi.src) >> 17; in skl_check_nv12_aux_surface()
2102 int h = drm_rect_height(&plane_state->uapi.src) >> 17; in skl_check_nv12_aux_surface()
2103 u32 offset; in skl_check_nv12_aux_surface() local
2107 drm_dbg_kms(display->drm, in skl_check_nv12_aux_surface()
2109 plane->base.base.id, plane->base.name, in skl_check_nv12_aux_surface()
2111 return -EINVAL; in skl_check_nv12_aux_surface()
2114 intel_add_fb_offsets(&x, &y, plane_state, uv_plane); in skl_check_nv12_aux_surface()
2115 offset = intel_plane_compute_aligned_offset(&x, &y, in skl_check_nv12_aux_surface()
2119 u32 aux_offset = plane_state->view.color_plane[ccs_plane].offset; in skl_check_nv12_aux_surface()
2120 unsigned int alignment = plane->min_alignment(plane, fb, uv_plane); in skl_check_nv12_aux_surface()
2122 if (offset > aux_offset) in skl_check_nv12_aux_surface()
2123 offset = intel_plane_adjust_aligned_offset(&x, &y, in skl_check_nv12_aux_surface()
2126 offset, in skl_check_nv12_aux_surface()
2127 aux_offset & ~(alignment - 1)); in skl_check_nv12_aux_surface()
2129 while (!skl_check_main_ccs_coordinates(plane_state, x, y, in skl_check_nv12_aux_surface()
2130 offset, ccs_plane)) { in skl_check_nv12_aux_surface()
2131 if (offset == 0) in skl_check_nv12_aux_surface()
2134 offset = intel_plane_adjust_aligned_offset(&x, &y, in skl_check_nv12_aux_surface()
2137 offset, offset - alignment); in skl_check_nv12_aux_surface()
2140 if (x != plane_state->view.color_plane[ccs_plane].x || in skl_check_nv12_aux_surface()
2141 y != plane_state->view.color_plane[ccs_plane].y) { in skl_check_nv12_aux_surface()
2142 drm_dbg_kms(display->drm, in skl_check_nv12_aux_surface()
2143 "[PLANE:%d:%s] unable to find suitable display surface offset due to CCS\n", in skl_check_nv12_aux_surface()
2144 plane->base.base.id, plane->base.name); in skl_check_nv12_aux_surface()
2145 return -EINVAL; in skl_check_nv12_aux_surface()
2150 drm_WARN_ON(display->drm, x > 65535 || y > 65535); in skl_check_nv12_aux_surface()
2152 drm_WARN_ON(display->drm, x > 8191 || y > 8191); in skl_check_nv12_aux_surface()
2154 plane_state->view.color_plane[uv_plane].offset = offset; in skl_check_nv12_aux_surface()
2155 plane_state->view.color_plane[uv_plane].x = x; in skl_check_nv12_aux_surface()
2156 plane_state->view.color_plane[uv_plane].y = y; in skl_check_nv12_aux_surface()
2163 const struct drm_framebuffer *fb = plane_state->hw.fb; in skl_check_ccs_aux_surface()
2164 int src_x = plane_state->uapi.src.x1 >> 16; in skl_check_ccs_aux_surface()
2165 int src_y = plane_state->uapi.src.y1 >> 16; in skl_check_ccs_aux_surface()
2166 u32 offset; in skl_check_ccs_aux_surface() local
2169 for (ccs_plane = 0; ccs_plane < fb->format->num_planes; ccs_plane++) { in skl_check_ccs_aux_surface()
2172 int x, y; in skl_check_ccs_aux_surface() local
2184 y = src_y / vsub; in skl_check_ccs_aux_surface()
2186 intel_add_fb_offsets(&x, &y, plane_state, ccs_plane); in skl_check_ccs_aux_surface()
2188 offset = intel_plane_compute_aligned_offset(&x, &y, in skl_check_ccs_aux_surface()
2192 plane_state->view.color_plane[ccs_plane].offset = offset; in skl_check_ccs_aux_surface()
2193 plane_state->view.color_plane[ccs_plane].x = (x * hsub + src_x % hsub) / main_hsub; in skl_check_ccs_aux_surface()
2194 plane_state->view.color_plane[ccs_plane].y = (y * vsub + src_y % vsub) / main_vsub; in skl_check_ccs_aux_surface()
2202 const struct drm_framebuffer *fb = plane_state->hw.fb; in skl_check_plane_surface()
2209 if (!plane_state->uapi.visible) in skl_check_plane_surface()
2216 if (intel_fb_is_ccs_modifier(fb->modifier)) { in skl_check_plane_surface()
2222 if (intel_format_info_is_yuv_semiplanar(fb->format, in skl_check_plane_surface()
2223 fb->modifier)) { in skl_check_plane_surface()
2243 display = to_intel_display(fb->dev); in skl_fb_scalable()
2245 switch (fb->format->format) { in skl_fb_scalable()
2261 const struct drm_framebuffer *fb = plane_state->hw.fb; in check_protection()
2267 plane_state->decrypt = intel_pxp_key_check(obj, false) == 0; in check_protection()
2268 plane_state->force_black = intel_bo_is_protected(obj) && in check_protection()
2269 !plane_state->decrypt; in check_protection()
2275 const struct drm_framebuffer *fb = plane_state->hw.fb; in make_damage_viewport_relative()
2276 const struct drm_rect *src = &plane_state->uapi.src; in make_damage_viewport_relative()
2277 unsigned int rotation = plane_state->hw.rotation; in make_damage_viewport_relative()
2278 struct drm_rect *damage = &plane_state->damage; in make_damage_viewport_relative()
2283 if (!fb || !plane_state->uapi.visible) { in make_damage_viewport_relative()
2284 plane_state->damage = DRM_RECT_INIT(0, 0, 0, 0); in make_damage_viewport_relative()
2289 drm_rect_rotate(damage, fb->width, fb->height, in make_damage_viewport_relative()
2291 drm_rect_translate(damage, -(src->y1 >> 16), -(src->x1 >> 16)); in make_damage_viewport_relative()
2293 drm_rect_translate(damage, -(src->x1 >> 16), -(src->y1 >> 16)); in make_damage_viewport_relative()
2299 struct drm_rect *damage = &plane_state->damage; in clip_damage()
2305 drm_rect_fp_to_int(&src, &plane_state->uapi.src); in clip_damage()
2314 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); in skl_plane_check()
2315 const struct drm_framebuffer *fb = plane_state->hw.fb; in skl_plane_check()
2325 if (!plane_state->ckey.flags && skl_fb_scalable(fb)) { in skl_plane_check()
2341 if (!plane_state->uapi.visible) in skl_plane_check()
2361 if (!(plane_state->hw.alpha >> 8)) { in skl_plane_check()
2362 plane_state->uapi.visible = false; in skl_plane_check()
2363 plane_state->damage = DRM_RECT_INIT(0, 0, 0, 0); in skl_plane_check()
2366 plane_state->ctl = skl_plane_ctl(crtc_state, plane_state); in skl_plane_check()
2369 plane_state->color_ctl = glk_plane_color_ctl(crtc_state, in skl_plane_check()
2372 if (intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier) && in skl_plane_check()
2373 icl_is_hdr_plane(display, plane->id)) in skl_plane_check()
2374 /* Enable and use MPEG-2 chroma siting */ in skl_plane_check()
2375 plane_state->cus_ctl = PLANE_CUS_ENABLE | in skl_plane_check()
2379 plane_state->cus_ctl = 0; in skl_plane_check()
2388 struct intel_plane *uv_plane = to_intel_plane(uv_plane_state->uapi.plane); in icl_link_nv12_planes()
2389 struct intel_plane *y_plane = to_intel_plane(y_plane_state->uapi.plane); in icl_link_nv12_planes()
2391 drm_WARN_ON(display->drm, icl_is_nv12_y_plane(display, uv_plane->id)); in icl_link_nv12_planes()
2392 drm_WARN_ON(display->drm, !icl_is_nv12_y_plane(display, y_plane->id)); in icl_link_nv12_planes()
2394 y_plane_state->ctl |= PLANE_CTL_YUV420_Y_PLANE; in icl_link_nv12_planes()
2396 if (icl_is_hdr_plane(display, uv_plane->id)) { in icl_link_nv12_planes()
2397 switch (y_plane->id) { in icl_link_nv12_planes()
2399 uv_plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_7_ICL; in icl_link_nv12_planes()
2402 uv_plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_6_ICL; in icl_link_nv12_planes()
2405 uv_plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_5_RKL; in icl_link_nv12_planes()
2408 uv_plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_4_RKL; in icl_link_nv12_planes()
2411 MISSING_CASE(y_plane->id); in icl_link_nv12_planes()
2418 return pipe - PIPE_A + INTEL_FBC_A; in skl_fbc_id_for_pipe()
2424 if ((DISPLAY_RUNTIME_INFO(display)->fbc_mask & BIT(fbc_id)) == 0) in skl_plane_has_fbc()
2439 return display->fbc[fbc_id]; in skl_plane_fbc()
2448 if (display->platform.skylake || display->platform.broxton) in skl_plane_has_planar()
2692 struct drm_i915_private *i915 = to_i915(plane->base.dev); in skl_plane_enable_flip_done()
2693 enum pipe pipe = plane->pipe; in skl_plane_enable_flip_done()
2695 spin_lock_irq(&i915->irq_lock); in skl_plane_enable_flip_done()
2696 bdw_enable_pipe_irq(i915, pipe, GEN9_PIPE_PLANE_FLIP_DONE(plane->id)); in skl_plane_enable_flip_done()
2697 spin_unlock_irq(&i915->irq_lock); in skl_plane_enable_flip_done()
2703 struct drm_i915_private *i915 = to_i915(plane->base.dev); in skl_plane_disable_flip_done()
2704 enum pipe pipe = plane->pipe; in skl_plane_disable_flip_done()
2706 spin_lock_irq(&i915->irq_lock); in skl_plane_disable_flip_done()
2707 bdw_disable_pipe_irq(i915, pipe, GEN9_PIPE_PLANE_FLIP_DONE(plane->id)); in skl_plane_disable_flip_done()
2708 spin_unlock_irq(&i915->irq_lock); in skl_plane_disable_flip_done()
2763 if (display->platform.dg1 || display->platform.rocketlake || in tgl_plane_has_mc_ccs()
2764 (display->platform.tigerlake && IS_DISPLAY_STEP(display, STEP_A0, STEP_D0))) in tgl_plane_has_mc_ccs()
2785 if (DISPLAY_VER(display) >= 14 && display->platform.dgfx) in tgl_plane_caps()
2810 plane->pipe = pipe; in skl_universal_plane_create()
2811 plane->id = plane_id; in skl_universal_plane_create()
2812 plane->frontbuffer_bit = INTEL_FRONTBUFFER(pipe, plane_id); in skl_universal_plane_create()
2817 plane->max_width = xe3_plane_max_width; in skl_universal_plane_create()
2818 plane->max_height = icl_plane_max_height; in skl_universal_plane_create()
2819 plane->min_cdclk = icl_plane_min_cdclk; in skl_universal_plane_create()
2821 plane->min_width = icl_plane_min_width; in skl_universal_plane_create()
2823 plane->max_width = icl_hdr_plane_max_width; in skl_universal_plane_create()
2825 plane->max_width = icl_sdr_plane_max_width; in skl_universal_plane_create()
2826 plane->max_height = icl_plane_max_height; in skl_universal_plane_create()
2827 plane->min_cdclk = icl_plane_min_cdclk; in skl_universal_plane_create()
2829 plane->max_width = glk_plane_max_width; in skl_universal_plane_create()
2830 plane->max_height = skl_plane_max_height; in skl_universal_plane_create()
2831 plane->min_cdclk = glk_plane_min_cdclk; in skl_universal_plane_create()
2833 plane->max_width = skl_plane_max_width; in skl_universal_plane_create()
2834 plane->max_height = skl_plane_max_height; in skl_universal_plane_create()
2835 plane->min_cdclk = skl_plane_min_cdclk; in skl_universal_plane_create()
2839 plane->max_stride = adl_plane_max_stride; in skl_universal_plane_create()
2841 plane->max_stride = skl_plane_max_stride; in skl_universal_plane_create()
2844 plane->min_alignment = tgl_plane_min_alignment; in skl_universal_plane_create()
2846 plane->min_alignment = skl_plane_min_alignment; in skl_universal_plane_create()
2849 plane->vtd_guard = DISPLAY_VER(display) >= 10 ? 168 : 136; in skl_universal_plane_create()
2852 plane->update_noarm = icl_plane_update_noarm; in skl_universal_plane_create()
2853 plane->update_arm = icl_plane_update_arm; in skl_universal_plane_create()
2854 plane->disable_arm = icl_plane_disable_arm; in skl_universal_plane_create()
2856 plane->update_noarm = skl_plane_update_noarm; in skl_universal_plane_create()
2857 plane->update_arm = skl_plane_update_arm; in skl_universal_plane_create()
2858 plane->disable_arm = skl_plane_disable_arm; in skl_universal_plane_create()
2860 plane->capture_error = skl_plane_capture_error; in skl_universal_plane_create()
2861 plane->get_hw_state = skl_plane_get_hw_state; in skl_universal_plane_create()
2862 plane->check_plane = skl_plane_check; in skl_universal_plane_create()
2865 plane->need_async_flip_toggle_wa = IS_DISPLAY_VER(display, 9, 10); in skl_universal_plane_create()
2866 plane->async_flip = skl_plane_async_flip; in skl_universal_plane_create()
2867 plane->enable_flip_done = skl_plane_enable_flip_done; in skl_universal_plane_create()
2868 plane->disable_flip_done = skl_plane_disable_flip_done; in skl_universal_plane_create()
2871 plane->can_async_flip = tgl_plane_can_async_flip; in skl_universal_plane_create()
2873 plane->can_async_flip = icl_plane_can_async_flip; in skl_universal_plane_create()
2875 plane->can_async_flip = skl_plane_can_async_flip; in skl_universal_plane_create()
2910 if (!IS_ENABLED(I915) && !HAS_FLAT_CCS(to_i915(display->drm))) in skl_universal_plane_create()
2917 ret = drm_universal_plane_init(display->drm, &plane->base, in skl_universal_plane_create()
2939 drm_plane_create_rotation_property(&plane->base, in skl_universal_plane_create()
2948 drm_plane_create_color_properties(&plane->base, in skl_universal_plane_create()
2955 drm_plane_create_alpha_property(&plane->base); in skl_universal_plane_create()
2956 drm_plane_create_blend_mode_property(&plane->base, in skl_universal_plane_create()
2961 drm_plane_create_zpos_immutable_property(&plane->base, plane_id); in skl_universal_plane_create()
2964 drm_plane_enable_fb_damage_clips(&plane->base); in skl_universal_plane_create()
2967 drm_plane_create_scaling_filter_property(&plane->base, in skl_universal_plane_create()
2986 struct intel_crtc_state *crtc_state = to_intel_crtc_state(crtc->base.state); in skl_get_initial_plane_config()
2987 struct intel_plane *plane = to_intel_plane(crtc->base.primary); in skl_get_initial_plane_config()
2988 enum plane_id plane_id = plane->id; in skl_get_initial_plane_config()
2990 u32 val, base, offset, stride_mult, tiling, alpha; in skl_get_initial_plane_config() local
2997 if (!plane->get_hw_state(plane, &pipe)) in skl_get_initial_plane_config()
3000 drm_WARN_ON(display->drm, pipe != crtc->pipe); in skl_get_initial_plane_config()
3002 if (crtc_state->joiner_pipes) { in skl_get_initial_plane_config()
3003 drm_dbg_kms(display->drm, in skl_get_initial_plane_config()
3005 crtc->base.base.id, crtc->base.name); in skl_get_initial_plane_config()
3011 drm_dbg_kms(display->drm, "failed to alloc fb\n"); in skl_get_initial_plane_config()
3015 fb = &intel_fb->base; in skl_get_initial_plane_config()
3017 fb->dev = display->drm; in skl_get_initial_plane_config()
3037 fb->format = drm_format_info(fourcc); in skl_get_initial_plane_config()
3042 fb->modifier = DRM_FORMAT_MOD_LINEAR; in skl_get_initial_plane_config()
3045 plane_config->tiling = I915_TILING_X; in skl_get_initial_plane_config()
3046 fb->modifier = I915_FORMAT_MOD_X_TILED; in skl_get_initial_plane_config()
3049 plane_config->tiling = I915_TILING_Y; in skl_get_initial_plane_config()
3052 fb->modifier = I915_FORMAT_MOD_4_TILED_MTL_RC_CCS; in skl_get_initial_plane_config()
3054 fb->modifier = I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS; in skl_get_initial_plane_config()
3056 fb->modifier = I915_FORMAT_MOD_Y_TILED_CCS; in skl_get_initial_plane_config()
3059 fb->modifier = I915_FORMAT_MOD_4_TILED_MTL_MC_CCS; in skl_get_initial_plane_config()
3061 fb->modifier = I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS; in skl_get_initial_plane_config()
3063 fb->modifier = I915_FORMAT_MOD_Y_TILED; in skl_get_initial_plane_config()
3071 fb->modifier = I915_FORMAT_MOD_4_TILED_DG2_RC_CCS; in skl_get_initial_plane_config()
3073 fb->modifier = I915_FORMAT_MOD_4_TILED_DG2_MC_CCS; in skl_get_initial_plane_config()
3075 fb->modifier = I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC; in skl_get_initial_plane_config()
3077 fb->modifier = I915_FORMAT_MOD_4_TILED; in skl_get_initial_plane_config()
3080 fb->modifier = I915_FORMAT_MOD_Yf_TILED_CCS; in skl_get_initial_plane_config()
3082 fb->modifier = I915_FORMAT_MOD_Yf_TILED; in skl_get_initial_plane_config()
3090 if (!display->params.enable_dpt && in skl_get_initial_plane_config()
3091 intel_fb_modifier_uses_dpt(display, fb->modifier)) { in skl_get_initial_plane_config()
3092 drm_dbg_kms(display->drm, "DPT disabled, skipping initial FB\n"); in skl_get_initial_plane_config()
3102 plane_config->rotation = DRM_MODE_ROTATE_0; in skl_get_initial_plane_config()
3105 plane_config->rotation = DRM_MODE_ROTATE_270; in skl_get_initial_plane_config()
3108 plane_config->rotation = DRM_MODE_ROTATE_180; in skl_get_initial_plane_config()
3111 plane_config->rotation = DRM_MODE_ROTATE_90; in skl_get_initial_plane_config()
3116 plane_config->rotation |= DRM_MODE_REFLECT_X; in skl_get_initial_plane_config()
3119 if (drm_rotation_90_or_270(plane_config->rotation)) in skl_get_initial_plane_config()
3123 plane_config->base = base; in skl_get_initial_plane_config()
3125 offset = intel_de_read(display, PLANE_OFFSET(pipe, plane_id)); in skl_get_initial_plane_config()
3126 drm_WARN_ON(display->drm, offset != 0); in skl_get_initial_plane_config()
3129 fb->height = REG_FIELD_GET(PLANE_HEIGHT_MASK, val) + 1; in skl_get_initial_plane_config()
3130 fb->width = REG_FIELD_GET(PLANE_WIDTH_MASK, val) + 1; in skl_get_initial_plane_config()
3135 fb->pitches[0] = REG_FIELD_GET(PLANE_STRIDE__MASK, val) * stride_mult; in skl_get_initial_plane_config()
3137 aligned_height = intel_fb_align_height(fb, 0, fb->height); in skl_get_initial_plane_config()
3139 plane_config->size = fb->pitches[0] * aligned_height; in skl_get_initial_plane_config()
3141 drm_dbg_kms(display->drm, in skl_get_initial_plane_config()
3142 "[CRTC:%d:%s][PLANE:%d:%s] with fb: size=%dx%d@%d, offset=%x, pitch %d, size 0x%x\n", in skl_get_initial_plane_config()
3143 crtc->base.base.id, crtc->base.name, in skl_get_initial_plane_config()
3144 plane->base.base.id, plane->base.name, in skl_get_initial_plane_config()
3145 fb->width, fb->height, fb->format->cpp[0] * 8, in skl_get_initial_plane_config()
3146 base, fb->pitches[0], plane_config->size); in skl_get_initial_plane_config()
3148 plane_config->fb = intel_fb; in skl_get_initial_plane_config()
3159 struct intel_plane *plane = to_intel_plane(crtc->base.primary); in skl_fixup_initial_plane_config()
3161 to_intel_plane_state(plane->base.state); in skl_fixup_initial_plane_config()
3162 enum plane_id plane_id = plane->id; in skl_fixup_initial_plane_config()
3163 enum pipe pipe = crtc->pipe; in skl_fixup_initial_plane_config()
3166 if (!plane_state->uapi.visible) in skl_fixup_initial_plane_config()
3175 if (plane_config->base == base) in skl_fixup_initial_plane_config()