19 	struct intel_display *display = to_intel_display(connector);  in intel_vrr_is_capable()  local
45 	return HAS_VRR(display) &&  in intel_vrr_is_capable()
84 static int intel_vrr_extra_vblank_delay(struct intel_display *display)  in intel_vrr_extra_vblank_delay()  argument
94 	return DISPLAY_VER(display) < 13 ? 1 : 0;  in intel_vrr_extra_vblank_delay()
99 	struct intel_display *display = to_intel_display(crtc_state);  in intel_vrr_vblank_delay()  local
102 		intel_vrr_extra_vblank_delay(display);  in intel_vrr_vblank_delay()
105 static int intel_vrr_flipline_offset(struct intel_display *display)  in intel_vrr_flipline_offset()  argument
108 	return DISPLAY_VER(display) < 13 ? 1 : 0;  in intel_vrr_flipline_offset()
113 	struct intel_display *display = to_intel_display(crtc_state);  in intel_vrr_vmin_flipline()  local
115 	return crtc_state->vrr.vmin + intel_vrr_flipline_offset(display);  in intel_vrr_vmin_flipline()
136 	struct intel_display *display = to_intel_display(crtc_state);  in intel_vrr_vblank_exit_length()  local
138 	if (DISPLAY_VER(display) >= 13)  in intel_vrr_vblank_exit_length()
147 	struct intel_display *display = to_intel_display(crtc_state);  in intel_vrr_vmin_vtotal()  local
150 	if (DISPLAY_VER(display) >= 13)  in intel_vrr_vmin_vtotal()
159 	struct intel_display *display = to_intel_display(crtc_state);  in intel_vrr_vmax_vtotal()  local
161 	if (DISPLAY_VER(display) >= 13)  in intel_vrr_vmax_vtotal()
181 	struct intel_display *display = to_intel_display(crtc_state);  in is_cmrr_frac_required()  local
185 	if (!HAS_CMRR(display))  in is_cmrr_frac_required()
229 	struct intel_display *display = to_intel_display(crtc_state);  in intel_vrr_compute_config()  local
253 	if (HAS_LRR(display))  in intel_vrr_compute_config()
277 	crtc_state->vrr.vmin -= intel_vrr_flipline_offset(display);  in intel_vrr_compute_config()
302 	if (HAS_AS_SDP(display)) {  in intel_vrr_compute_config()
314 	struct intel_display *display = to_intel_display(crtc_state);  in intel_vrr_compute_config_late()  local
320 	if (DISPLAY_VER(display) >= 13) {  in intel_vrr_compute_config_late()
341 	struct intel_display *display = to_intel_display(crtc_state);  in trans_vrr_ctl()  local
343 	if (DISPLAY_VER(display) >= 13)  in trans_vrr_ctl()
354 	struct intel_display *display = to_intel_display(crtc_state);  in intel_vrr_set_transcoder_timings()  local
362 	if (IS_DISPLAY_VER(display, 12, 13))  in intel_vrr_set_transcoder_timings()
363 		intel_de_rmw(display, CHICKEN_TRANS(display, cpu_transcoder),  in intel_vrr_set_transcoder_timings()
367 		intel_de_write(display,  in intel_vrr_set_transcoder_timings()
368 			       TRANS_VRR_CTL(display, cpu_transcoder), 0);  in intel_vrr_set_transcoder_timings()
373 		intel_de_write(display, TRANS_CMRR_M_HI(display, cpu_transcoder),  in intel_vrr_set_transcoder_timings()
375 		intel_de_write(display, TRANS_CMRR_M_LO(display, cpu_transcoder),  in intel_vrr_set_transcoder_timings()
377 		intel_de_write(display, TRANS_CMRR_N_HI(display, cpu_transcoder),  in intel_vrr_set_transcoder_timings()
379 		intel_de_write(display, TRANS_CMRR_N_LO(display, cpu_transcoder),  in intel_vrr_set_transcoder_timings()
383 	intel_de_write(display, TRANS_VRR_VMIN(display, cpu_transcoder),  in intel_vrr_set_transcoder_timings()
385 	intel_de_write(display, TRANS_VRR_VMAX(display, cpu_transcoder),  in intel_vrr_set_transcoder_timings()
387 	intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),  in intel_vrr_set_transcoder_timings()
389 	intel_de_write(display, TRANS_VRR_FLIPLINE(display, cpu_transcoder),  in intel_vrr_set_transcoder_timings()
392 	if (HAS_AS_SDP(display))  in intel_vrr_set_transcoder_timings()
393 		intel_de_write(display,  in intel_vrr_set_transcoder_timings()
394 			       TRANS_VRR_VSYNC(display, cpu_transcoder),  in intel_vrr_set_transcoder_timings()
402 	struct intel_display *display = to_intel_display(crtc_state);  in intel_vrr_send_push()  local
411 	intel_de_write_dsb(display, dsb,  in intel_vrr_send_push()
412 			   TRANS_PUSH(display, cpu_transcoder),  in intel_vrr_send_push()
422 	struct intel_display *display = to_intel_display(crtc_state);  in intel_vrr_check_push_sent()  local
444 		intel_dsb_poll(dsb, TRANS_PUSH(display, cpu_transcoder),  in intel_vrr_check_push_sent()
448 			drm_err(display->drm, "[CRTC:%d:%s] VRR push send still pending\n",  in intel_vrr_check_push_sent()
455 	struct intel_display *display = to_intel_display(crtc_state);  in intel_vrr_is_push_sent()  local
461 	return intel_de_read(display, TRANS_PUSH(display, cpu_transcoder)) & TRANS_PUSH_SEND;  in intel_vrr_is_push_sent()
466 	struct intel_display *display = to_intel_display(crtc_state);  in intel_vrr_enable()  local
472 	intel_de_write(display, TRANS_PUSH(display, cpu_transcoder),  in intel_vrr_enable()
476 		intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),  in intel_vrr_enable()
480 		intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),  in intel_vrr_enable()
487 	struct intel_display *display = to_intel_display(old_crtc_state);  in intel_vrr_disable()  local
493 	intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),  in intel_vrr_disable()
495 	intel_de_wait_for_clear(display,  in intel_vrr_disable()
496 				TRANS_VRR_STATUS(display, cpu_transcoder),  in intel_vrr_disable()
498 	intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), 0);  in intel_vrr_disable()
503 	struct intel_display *display = to_intel_display(crtc_state);  in intel_vrr_get_config()  local
507 	trans_vrr_ctl = intel_de_read(display,  in intel_vrr_get_config()
508 				      TRANS_VRR_CTL(display, cpu_transcoder));  in intel_vrr_get_config()
511 	if (HAS_CMRR(display))  in intel_vrr_get_config()
516 			intel_de_read64_2x32(display, TRANS_CMRR_N_LO(display, cpu_transcoder),  in intel_vrr_get_config()
517 					     TRANS_CMRR_N_HI(display, cpu_transcoder));  in intel_vrr_get_config()
519 			intel_de_read64_2x32(display, TRANS_CMRR_M_LO(display, cpu_transcoder),  in intel_vrr_get_config()
520 					     TRANS_CMRR_M_HI(display, cpu_transcoder));  in intel_vrr_get_config()
523 	if (DISPLAY_VER(display) >= 13)  in intel_vrr_get_config()
532 		crtc_state->vrr.flipline = intel_de_read(display,  in intel_vrr_get_config()
533 							 TRANS_VRR_FLIPLINE(display, cpu_transcoder)) + 1;  in intel_vrr_get_config()
534 		crtc_state->vrr.vmax = intel_de_read(display,  in intel_vrr_get_config()
535 						     TRANS_VRR_VMAX(display, cpu_transcoder)) + 1;  in intel_vrr_get_config()
536 		crtc_state->vrr.vmin = intel_de_read(display,  in intel_vrr_get_config()
537 						     TRANS_VRR_VMIN(display, cpu_transcoder)) + 1;  in intel_vrr_get_config()
539 		if (HAS_AS_SDP(display)) {  in intel_vrr_get_config()
541 				intel_de_read(display,  in intel_vrr_get_config()
542 					      TRANS_VRR_VSYNC(display, cpu_transcoder));  in intel_vrr_get_config()