Lines Matching full:pps
32 struct intel_pps *pps = &intel_dp->pps; in pps_name() local
35 switch (pps->vlv_pps_pipe) { in pps_name()
39 * to always have a valid PPS when calling this. in pps_name()
41 return "PPS <none>"; in pps_name()
43 return "PPS A"; in pps_name()
45 return "PPS B"; in pps_name()
47 MISSING_CASE(pps->vlv_pps_pipe); in pps_name()
51 switch (pps->pps_idx) { in pps_name()
53 return "PPS 0"; in pps_name()
55 return "PPS 1"; in pps_name()
57 MISSING_CASE(pps->pps_idx); in pps_name()
62 return "PPS <invalid>"; in pps_name()
74 mutex_lock(&display->pps.mutex); in intel_pps_lock()
84 mutex_unlock(&display->pps.mutex); in intel_pps_unlock()
96 enum pipe pipe = intel_dp->pps.vlv_pps_pipe; in vlv_power_sequencer_kick()
182 intel_dp->pps.vlv_active_pipe != INVALID_PIPE && in vlv_find_free_pps()
183 intel_dp->pps.vlv_active_pipe != in vlv_find_free_pps()
184 intel_dp->pps.vlv_pps_pipe); in vlv_find_free_pps()
186 if (intel_dp->pps.vlv_pps_pipe != INVALID_PIPE) in vlv_find_free_pps()
187 pipes &= ~(1 << intel_dp->pps.vlv_pps_pipe); in vlv_find_free_pps()
190 intel_dp->pps.vlv_pps_pipe != INVALID_PIPE); in vlv_find_free_pps()
192 if (intel_dp->pps.vlv_active_pipe != INVALID_PIPE) in vlv_find_free_pps()
193 pipes &= ~(1 << intel_dp->pps.vlv_active_pipe); in vlv_find_free_pps()
210 lockdep_assert_held(&display->pps.mutex); in vlv_power_sequencer_pipe()
215 drm_WARN_ON(display->drm, intel_dp->pps.vlv_active_pipe != INVALID_PIPE && in vlv_power_sequencer_pipe()
216 intel_dp->pps.vlv_active_pipe != intel_dp->pps.vlv_pps_pipe); in vlv_power_sequencer_pipe()
218 if (intel_dp->pps.vlv_pps_pipe != INVALID_PIPE) in vlv_power_sequencer_pipe()
219 return intel_dp->pps.vlv_pps_pipe; in vlv_power_sequencer_pipe()
231 intel_dp->pps.vlv_pps_pipe = pipe; in vlv_power_sequencer_pipe()
248 return intel_dp->pps.vlv_pps_pipe; in vlv_power_sequencer_pipe()
255 int pps_idx = intel_dp->pps.pps_idx; in bxt_power_sequencer_idx()
257 lockdep_assert_held(&display->pps.mutex); in bxt_power_sequencer_idx()
262 if (!intel_dp->pps.bxt_pps_reset) in bxt_power_sequencer_idx()
265 intel_dp->pps.bxt_pps_reset = false; in bxt_power_sequencer_idx()
323 lockdep_assert_held(&display->pps.mutex); in vlv_initial_power_sequencer_setup()
327 intel_dp->pps.vlv_pps_pipe = vlv_initial_pps_pipe(display, port, in vlv_initial_power_sequencer_setup()
330 if (intel_dp->pps.vlv_pps_pipe == INVALID_PIPE) in vlv_initial_power_sequencer_setup()
331 intel_dp->pps.vlv_pps_pipe = vlv_initial_pps_pipe(display, port, in vlv_initial_power_sequencer_setup()
334 if (intel_dp->pps.vlv_pps_pipe == INVALID_PIPE) in vlv_initial_power_sequencer_setup()
335 intel_dp->pps.vlv_pps_pipe = vlv_initial_pps_pipe(display, port, in vlv_initial_power_sequencer_setup()
339 if (intel_dp->pps.vlv_pps_pipe == INVALID_PIPE) { in vlv_initial_power_sequencer_setup()
379 if (intel_dp->pps.pps_idx == 1 && in intel_pps_is_valid()
407 lockdep_assert_held(&display->pps.mutex); in pps_initial_setup()
416 intel_dp->pps.pps_idx = connector->panel.vbt.backlight.controller; in pps_initial_setup()
418 intel_dp->pps.pps_idx = 0; in pps_initial_setup()
420 if (drm_WARN_ON(display->drm, intel_dp->pps.pps_idx >= intel_num_pps(display))) in pps_initial_setup()
421 intel_dp->pps.pps_idx = -1; in pps_initial_setup()
424 if (intel_dp->pps.pps_idx < 0) in pps_initial_setup()
425 intel_dp->pps.pps_idx = bxt_initial_pps_idx(display, pps_has_pp_on); in pps_initial_setup()
427 if (intel_dp->pps.pps_idx < 0) in pps_initial_setup()
428 intel_dp->pps.pps_idx = bxt_initial_pps_idx(display, pps_has_vdd_on); in pps_initial_setup()
430 if (intel_dp->pps.pps_idx < 0) { in pps_initial_setup()
431 intel_dp->pps.pps_idx = bxt_initial_pps_idx(display, pps_any); in pps_initial_setup()
467 drm_WARN_ON(display->drm, intel_dp->pps.vlv_active_pipe != INVALID_PIPE); in vlv_pps_reset_all()
470 intel_dp->pps.vlv_pps_pipe = INVALID_PIPE; in vlv_pps_reset_all()
487 intel_dp->pps.bxt_pps_reset = true; in bxt_pps_reset_all()
513 pps_idx = intel_dp->pps.pps_idx; in intel_pps_get_registers()
552 lockdep_assert_held(&display->pps.mutex); in edp_have_panel_power()
555 intel_dp->pps.vlv_pps_pipe == INVALID_PIPE) in edp_have_panel_power()
565 lockdep_assert_held(&display->pps.mutex); in edp_have_panel_vdd()
568 intel_dp->pps.vlv_pps_pipe == INVALID_PIPE) in edp_have_panel_vdd()
614 lockdep_assert_held(&display->pps.mutex); in wait_panel_status()
674 panel_power_off_duration = ktime_ms_delta(panel_power_on_time, intel_dp->pps.panel_power_off_time); in wait_panel_power_cycle()
676 remaining = max(0, intel_dp->pps.panel_power_cycle_delay - panel_power_off_duration); in wait_panel_power_cycle()
704 wait_remaining_ms_from_jiffies(intel_dp->pps.last_power_on, in wait_backlight_on()
705 intel_dp->pps.backlight_on_delay); in wait_backlight_on()
710 wait_remaining_ms_from_jiffies(intel_dp->pps.last_backlight_off, in edp_wait_backlight_off()
711 intel_dp->pps.backlight_off_delay); in edp_wait_backlight_off()
723 lockdep_assert_held(&display->pps.mutex); in ilk_get_pp_control()
745 bool need_to_disable = !intel_dp->pps.want_panel_vdd; in intel_pps_vdd_on_unlocked()
747 lockdep_assert_held(&display->pps.mutex); in intel_pps_vdd_on_unlocked()
752 cancel_delayed_work(&intel_dp->pps.panel_vdd_work); in intel_pps_vdd_on_unlocked()
753 intel_dp->pps.want_panel_vdd = true; in intel_pps_vdd_on_unlocked()
758 drm_WARN_ON(display->drm, intel_dp->pps.vdd_wakeref); in intel_pps_vdd_on_unlocked()
759 intel_dp->pps.vdd_wakeref = intel_display_power_get(display, in intel_pps_vdd_on_unlocked()
791 msleep(intel_dp->pps.panel_power_up_delay); in intel_pps_vdd_on_unlocked()
829 lockdep_assert_held(&display->pps.mutex); in intel_pps_vdd_off_sync_unlocked()
831 drm_WARN_ON(display->drm, intel_dp->pps.want_panel_vdd); in intel_pps_vdd_off_sync_unlocked()
858 intel_dp->pps.panel_power_off_time = ktime_get_boottime(); in intel_pps_vdd_off_sync_unlocked()
864 fetch_and_zero(&intel_dp->pps.vdd_wakeref)); in intel_pps_vdd_off_sync_unlocked()
874 cancel_delayed_work_sync(&intel_dp->pps.panel_vdd_work); in intel_pps_vdd_off_sync()
885 struct intel_pps *pps = container_of(to_delayed_work(__work), in edp_panel_vdd_work() local
887 struct intel_dp *intel_dp = container_of(pps, struct intel_dp, pps); in edp_panel_vdd_work()
891 if (!intel_dp->pps.want_panel_vdd) in edp_panel_vdd_work()
906 if (intel_dp->pps.initializing) in edp_panel_vdd_schedule_off()
914 delay = msecs_to_jiffies(intel_dp->pps.panel_power_cycle_delay * 5); in edp_panel_vdd_schedule_off()
916 &intel_dp->pps.panel_vdd_work, delay); in edp_panel_vdd_schedule_off()
928 lockdep_assert_held(&display->pps.mutex); in intel_pps_vdd_off_unlocked()
933 INTEL_DISPLAY_STATE_WARN(display, !intel_dp->pps.want_panel_vdd, in intel_pps_vdd_off_unlocked()
939 intel_dp->pps.want_panel_vdd = false; in intel_pps_vdd_off_unlocked()
964 lockdep_assert_held(&display->pps.mutex); in intel_pps_on_unlocked()
1008 intel_dp->pps.last_power_on = jiffies; in intel_pps_on_unlocked()
1039 lockdep_assert_held(&display->pps.mutex); in intel_pps_off_unlocked()
1048 drm_WARN(display->drm, !intel_dp->pps.want_panel_vdd, in intel_pps_off_unlocked()
1061 intel_dp->pps.want_panel_vdd = false; in intel_pps_off_unlocked()
1067 intel_dp->pps.panel_power_off_time = ktime_get_boottime(); in intel_pps_off_unlocked()
1074 fetch_and_zero(&intel_dp->pps.vdd_wakeref)); in intel_pps_off_unlocked()
1134 intel_dp->pps.last_backlight_off = jiffies; in intel_pps_backlight_off()
1168 enum pipe pipe = intel_dp->pps.vlv_pps_pipe; in vlv_detach_power_sequencer()
1171 drm_WARN_ON(display->drm, intel_dp->pps.vlv_active_pipe != INVALID_PIPE); in vlv_detach_power_sequencer()
1194 intel_dp->pps.vlv_pps_pipe = INVALID_PIPE; in vlv_detach_power_sequencer()
1202 lockdep_assert_held(&display->pps.mutex); in vlv_steal_power_sequencer()
1207 drm_WARN(display->drm, intel_dp->pps.vlv_active_pipe == pipe, in vlv_steal_power_sequencer()
1208 "stealing PPS %c from active [ENCODER:%d:%s]\n", in vlv_steal_power_sequencer()
1212 if (intel_dp->pps.vlv_pps_pipe != pipe) in vlv_steal_power_sequencer()
1216 "stealing PPS %c from [ENCODER:%d:%s]\n", in vlv_steal_power_sequencer()
1241 intel_dp->pps.vlv_pps_pipe = INVALID_PIPE; in vlv_pps_pipe_init()
1242 intel_dp->pps.vlv_active_pipe = vlv_active_pipe(intel_dp); in vlv_pps_pipe_init()
1251 intel_dp->pps.vlv_active_pipe = vlv_active_pipe(intel_dp); in vlv_pps_pipe_reset()
1260 * current pipe isn't valid, try the PPS pipe, and if that fails just in vlv_pps_backlight_initial_pipe()
1266 pipe = intel_dp->pps.vlv_pps_pipe; in vlv_pps_backlight_initial_pipe()
1282 lockdep_assert_held(&display->pps.mutex); in vlv_pps_port_enable_unlocked()
1284 drm_WARN_ON(display->drm, intel_dp->pps.vlv_active_pipe != INVALID_PIPE); in vlv_pps_port_enable_unlocked()
1286 if (intel_dp->pps.vlv_pps_pipe != INVALID_PIPE && in vlv_pps_port_enable_unlocked()
1287 intel_dp->pps.vlv_pps_pipe != crtc->pipe) { in vlv_pps_port_enable_unlocked()
1302 intel_dp->pps.vlv_active_pipe = crtc->pipe; in vlv_pps_port_enable_unlocked()
1308 intel_dp->pps.vlv_pps_pipe = crtc->pipe; in vlv_pps_port_enable_unlocked()
1329 intel_dp->pps.vlv_active_pipe = INVALID_PIPE; in vlv_pps_port_disable()
1337 lockdep_assert_held(&display->pps.mutex); in pps_vdd_init()
1352 drm_WARN_ON(display->drm, intel_dp->pps.vdd_wakeref); in pps_vdd_init()
1353 intel_dp->pps.vdd_wakeref = intel_display_power_get(display, in pps_vdd_init()
1378 intel_dp->pps.panel_power_off_time = 0; in pps_init_timestamps()
1379 intel_dp->pps.last_power_on = jiffies; in pps_init_timestamps()
1380 intel_dp->pps.last_backlight_off = jiffies; in pps_init_timestamps()
1394 /* Ensure PPS is unlocked */ in intel_pps_readout_hw_state()
1438 struct intel_pps_delays *sw = &intel_dp->pps.pps_delays; in intel_pps_verify_state()
1447 drm_err(display->drm, "PPS state mismatch\n"); in intel_pps_verify_state()
1461 /* PPS uses 100us units */ in msecs_to_pps_units()
1467 /* PPS uses 100us units */ in pps_units_to_msecs()
1476 lockdep_assert_held(&display->pps.mutex); in pps_init_delays_bios()
1478 if (!pps_delays_valid(&intel_dp->pps.bios_pps_delays)) in pps_init_delays_bios()
1479 intel_pps_readout_hw_state(intel_dp, &intel_dp->pps.bios_pps_delays); in pps_init_delays_bios()
1481 *bios = intel_dp->pps.bios_pps_delays; in pps_init_delays_bios()
1492 *vbt = connector->panel.vbt.edp.pps; in pps_init_delays_vbt()
1518 lockdep_assert_held(&display->pps.mutex); in pps_init_delays_spec()
1534 *final = &intel_dp->pps.pps_delays; in pps_init_delays()
1536 lockdep_assert_held(&display->pps.mutex); in pps_init_delays()
1558 intel_dp->pps.panel_power_up_delay = pps_units_to_msecs(final->power_up); in pps_init_delays()
1559 intel_dp->pps.backlight_on_delay = pps_units_to_msecs(final->backlight_on); in pps_init_delays()
1560 intel_dp->pps.backlight_off_delay = pps_units_to_msecs(final->backlight_off); in pps_init_delays()
1561 intel_dp->pps.panel_power_down_delay = pps_units_to_msecs(final->power_down); in pps_init_delays()
1562 intel_dp->pps.panel_power_cycle_delay = pps_units_to_msecs(final->power_cycle); in pps_init_delays()
1566 intel_dp->pps.panel_power_up_delay, in pps_init_delays()
1567 intel_dp->pps.panel_power_down_delay, in pps_init_delays()
1568 intel_dp->pps.panel_power_cycle_delay); in pps_init_delays()
1571 intel_dp->pps.backlight_on_delay, in pps_init_delays()
1572 intel_dp->pps.backlight_off_delay); in pps_init_delays()
1600 const struct intel_pps_delays *seq = &intel_dp->pps.pps_delays; in pps_init_registers()
1602 lockdep_assert_held(&display->pps.mutex); in pps_init_registers()
1717 intel_dp->pps.initializing = true; in intel_pps_init()
1718 INIT_DELAYED_WORK(&intel_dp->pps.panel_vdd_work, edp_panel_vdd_work); in intel_pps_init()
1747 intel_dp->pps.pps_idx != connector->panel.vbt.backlight.controller, in pps_init_late()
1750 intel_dp->pps.pps_idx, connector->panel.vbt.backlight.controller); in pps_init_late()
1753 intel_dp->pps.pps_idx = connector->panel.vbt.backlight.controller; in pps_init_late()
1764 memset(&intel_dp->pps.pps_delays, 0, sizeof(intel_dp->pps.pps_delays)); in intel_pps_init_late()
1768 intel_dp->pps.initializing = false; in intel_pps_init_late()
1798 display->pps.mmio_base = PCH_PPS_BASE; in intel_pps_setup()
1800 display->pps.mmio_base = VLV_PPS_BASE; in intel_pps_setup()
1802 display->pps.mmio_base = PPS_BASE; in intel_pps_setup()
1814 intel_dp->pps.panel_power_up_delay); in intel_pps_show()
1816 intel_dp->pps.panel_power_down_delay); in intel_pps_show()
1818 intel_dp->pps.panel_power_cycle_delay); in intel_pps_show()
1820 intel_dp->pps.backlight_on_delay); in intel_pps_show()
1822 intel_dp->pps.backlight_off_delay); in intel_pps_show()