Lines Matching +full:display +full:- +full:pipe
1 // SPDX-License-Identifier: MIT
20 struct intel_display *display = to_intel_display(crtc_state); in intel_pch_pfit_check_dst_window() local
21 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_pch_pfit_check_dst_window()
23 &crtc_state->hw.adjusted_mode; in intel_pch_pfit_check_dst_window()
24 const struct drm_rect *dst = &crtc_state->pch_pfit.dst; in intel_pch_pfit_check_dst_window()
27 int x = dst->x1; in intel_pch_pfit_check_dst_window()
28 int y = dst->y1; in intel_pch_pfit_check_dst_window()
30 if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE && in intel_pch_pfit_check_dst_window()
32 drm_dbg_kms(display->drm, in intel_pch_pfit_check_dst_window()
34 crtc->base.base.id, crtc->base.name, DRM_RECT_ARG(dst)); in intel_pch_pfit_check_dst_window()
35 return -EINVAL; in intel_pch_pfit_check_dst_window()
39 * "Restriction : When pipe scaling is enabled, the scaled in intel_pch_pfit_check_dst_window()
40 * output must equal the pipe active area, so Pipe active in intel_pch_pfit_check_dst_window()
47 if (adjusted_mode->crtc_hdisplay != 2 * x + width || in intel_pch_pfit_check_dst_window()
48 adjusted_mode->crtc_vdisplay != 2 * y + height) { in intel_pch_pfit_check_dst_window()
49 drm_dbg_kms(display->drm, in intel_pch_pfit_check_dst_window()
51 crtc->base.base.id, crtc->base.name, DRM_RECT_ARG(dst)); in intel_pch_pfit_check_dst_window()
52 return -EINVAL; in intel_pch_pfit_check_dst_window()
60 drm_dbg_kms(display->drm, in intel_pch_pfit_check_dst_window()
62 crtc->base.base.id, crtc->base.name, DRM_RECT_ARG(dst)); in intel_pch_pfit_check_dst_window()
63 return -EINVAL; in intel_pch_pfit_check_dst_window()
71 struct intel_display *display = to_intel_display(crtc_state); in intel_pch_pfit_check_src_size() local
72 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_pch_pfit_check_src_size()
73 int pipe_src_w = drm_rect_width(&crtc_state->pipe_src); in intel_pch_pfit_check_src_size()
74 int pipe_src_h = drm_rect_height(&crtc_state->pipe_src); in intel_pch_pfit_check_src_size()
77 if (DISPLAY_VER(display) >= 8) { in intel_pch_pfit_check_src_size()
80 } else if (DISPLAY_VER(display) >= 7) { in intel_pch_pfit_check_src_size()
87 * This assumes we use a 1:1 mapping between pipe and PF. in intel_pch_pfit_check_src_size()
89 max_src_w = crtc->pipe == PIPE_A ? 4096 : 2048; in intel_pch_pfit_check_src_size()
97 drm_dbg_kms(display->drm, in intel_pch_pfit_check_src_size()
99 crtc->base.base.id, crtc->base.name, in intel_pch_pfit_check_src_size()
101 return -EINVAL; in intel_pch_pfit_check_src_size()
109 struct intel_display *display = to_intel_display(crtc_state); in intel_pch_pfit_check_scaling() local
110 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_pch_pfit_check_scaling()
111 const struct drm_rect *dst = &crtc_state->pch_pfit.dst; in intel_pch_pfit_check_scaling()
112 int pipe_src_w = drm_rect_width(&crtc_state->pipe_src); in intel_pch_pfit_check_scaling()
113 int pipe_src_h = drm_rect_height(&crtc_state->pipe_src); in intel_pch_pfit_check_scaling()
121 drm_dbg_kms(display->drm, in intel_pch_pfit_check_scaling()
122 "[CRTC:%d:%s] pfit horizontal downscaling (%d->%d) exceeds max (0x%x)\n", in intel_pch_pfit_check_scaling()
123 crtc->base.base.id, crtc->base.name, in intel_pch_pfit_check_scaling()
131 drm_dbg_kms(display->drm, in intel_pch_pfit_check_scaling()
132 "[CRTC:%d:%s] pfit vertical downscaling (%d->%d) exceeds max (0x%x)\n", in intel_pch_pfit_check_scaling()
133 crtc->base.base.id, crtc->base.name, in intel_pch_pfit_check_scaling()
144 struct intel_display *display = to_intel_display(crtc_state); in intel_pch_pfit_check_timings() local
145 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_pch_pfit_check_timings()
147 &crtc_state->hw.adjusted_mode; in intel_pch_pfit_check_timings()
149 if (adjusted_mode->crtc_vdisplay < 7) { in intel_pch_pfit_check_timings()
150 drm_dbg_kms(display->drm, in intel_pch_pfit_check_timings()
152 crtc->base.base.id, crtc->base.name, in intel_pch_pfit_check_timings()
153 adjusted_mode->crtc_vdisplay, 7); in intel_pch_pfit_check_timings()
154 return -EINVAL; in intel_pch_pfit_check_timings()
162 struct intel_display *display = to_intel_display(crtc_state); in intel_pch_pfit_check_cloning() local
163 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_pch_pfit_check_cloning()
166 * The panel fitter is in the pipe and thus would affect every in intel_pch_pfit_check_cloning()
168 * margins) are per-connector so we'd have to make sure each in intel_pch_pfit_check_cloning()
172 if (crtc_state->uapi.encoder_mask && in intel_pch_pfit_check_cloning()
173 !is_power_of_2(crtc_state->uapi.encoder_mask)) { in intel_pch_pfit_check_cloning()
174 drm_dbg_kms(display->drm, in intel_pch_pfit_check_cloning()
176 crtc->base.base.id, crtc->base.name); in intel_pch_pfit_check_cloning()
177 return -EINVAL; in intel_pch_pfit_check_cloning()
187 struct intel_display *display = to_intel_display(crtc_state); in pch_panel_fitting() local
189 &crtc_state->hw.adjusted_mode; in pch_panel_fitting()
190 int pipe_src_w = drm_rect_width(&crtc_state->pipe_src); in pch_panel_fitting()
191 int pipe_src_h = drm_rect_height(&crtc_state->pipe_src); in pch_panel_fitting()
195 if (adjusted_mode->crtc_hdisplay == pipe_src_w && in pch_panel_fitting()
196 adjusted_mode->crtc_vdisplay == pipe_src_h && in pch_panel_fitting()
197 crtc_state->output_format != INTEL_OUTPUT_FORMAT_YCBCR420) in pch_panel_fitting()
200 switch (conn_state->scaling_mode) { in pch_panel_fitting()
204 x = (adjusted_mode->crtc_hdisplay - width + 1)/2; in pch_panel_fitting()
205 y = (adjusted_mode->crtc_vdisplay - height + 1)/2; in pch_panel_fitting()
211 u32 scaled_width = adjusted_mode->crtc_hdisplay * pipe_src_h; in pch_panel_fitting()
212 u32 scaled_height = pipe_src_w * adjusted_mode->crtc_vdisplay; in pch_panel_fitting()
218 x = (adjusted_mode->crtc_hdisplay - width + 1) / 2; in pch_panel_fitting()
220 height = adjusted_mode->crtc_vdisplay; in pch_panel_fitting()
225 y = (adjusted_mode->crtc_vdisplay - height + 1) / 2; in pch_panel_fitting()
227 width = adjusted_mode->crtc_hdisplay; in pch_panel_fitting()
230 width = adjusted_mode->crtc_hdisplay; in pch_panel_fitting()
231 height = adjusted_mode->crtc_vdisplay; in pch_panel_fitting()
237 WARN_ON(adjusted_mode->crtc_hdisplay != pipe_src_w); in pch_panel_fitting()
238 WARN_ON(adjusted_mode->crtc_vdisplay != pipe_src_h); in pch_panel_fitting()
242 width = adjusted_mode->crtc_hdisplay; in pch_panel_fitting()
243 height = adjusted_mode->crtc_vdisplay; in pch_panel_fitting()
247 MISSING_CASE(conn_state->scaling_mode); in pch_panel_fitting()
248 return -EINVAL; in pch_panel_fitting()
251 drm_rect_init(&crtc_state->pch_pfit.dst, in pch_panel_fitting()
253 crtc_state->pch_pfit.enabled = true; in pch_panel_fitting()
259 if (DISPLAY_VER(display) >= 9) in pch_panel_fitting()
292 sync_width = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start; in centre_horizontally()
293 blank_width = adjusted_mode->crtc_hblank_end - adjusted_mode->crtc_hblank_start; in centre_horizontally()
294 sync_pos = (blank_width - sync_width + 1) / 2; in centre_horizontally()
296 border = (adjusted_mode->crtc_hdisplay - width + 1) / 2; in centre_horizontally()
299 adjusted_mode->crtc_hdisplay = width; in centre_horizontally()
300 adjusted_mode->crtc_hblank_start = width + border; in centre_horizontally()
301 adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_hblank_start + blank_width; in centre_horizontally()
303 adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hblank_start + sync_pos; in centre_horizontally()
304 adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + sync_width; in centre_horizontally()
314 sync_width = adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start; in centre_vertically()
315 blank_width = adjusted_mode->crtc_vblank_end - adjusted_mode->crtc_vblank_start; in centre_vertically()
316 sync_pos = (blank_width - sync_width + 1) / 2; in centre_vertically()
318 border = (adjusted_mode->crtc_vdisplay - height + 1) / 2; in centre_vertically()
320 adjusted_mode->crtc_vdisplay = height; in centre_vertically()
321 adjusted_mode->crtc_vblank_start = height + border; in centre_vertically()
322 adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vblank_start + blank_width; in centre_vertically()
324 adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vblank_start + sync_pos; in centre_vertically()
325 adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + sync_width; in centre_vertically()
345 &crtc_state->hw.adjusted_mode; in i965_scale_aspect()
346 int pipe_src_w = drm_rect_width(&crtc_state->pipe_src); in i965_scale_aspect()
347 int pipe_src_h = drm_rect_height(&crtc_state->pipe_src); in i965_scale_aspect()
348 u32 scaled_width = adjusted_mode->crtc_hdisplay * pipe_src_h; in i965_scale_aspect()
349 u32 scaled_height = pipe_src_w * adjusted_mode->crtc_vdisplay; in i965_scale_aspect()
358 else if (adjusted_mode->crtc_hdisplay != pipe_src_w) in i965_scale_aspect()
366 struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; in i9xx_scale_aspect()
367 int pipe_src_w = drm_rect_width(&crtc_state->pipe_src); in i9xx_scale_aspect()
368 int pipe_src_h = drm_rect_height(&crtc_state->pipe_src); in i9xx_scale_aspect()
369 u32 scaled_width = adjusted_mode->crtc_hdisplay * pipe_src_h; in i9xx_scale_aspect()
370 u32 scaled_height = pipe_src_w * adjusted_mode->crtc_vdisplay; in i9xx_scale_aspect()
383 if (pipe_src_h != adjusted_mode->crtc_vdisplay) { in i9xx_scale_aspect()
385 adjusted_mode->crtc_vdisplay); in i9xx_scale_aspect()
398 if (pipe_src_w != adjusted_mode->crtc_hdisplay) { in i9xx_scale_aspect()
400 adjusted_mode->crtc_hdisplay); in i9xx_scale_aspect()
420 struct intel_display *display = to_intel_display(crtc_state); in intel_gmch_pfit_check_timings() local
421 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_gmch_pfit_check_timings()
423 &crtc_state->hw.adjusted_mode; in intel_gmch_pfit_check_timings()
426 if (DISPLAY_VER(display) >= 4) in intel_gmch_pfit_check_timings()
431 if (adjusted_mode->crtc_hdisplay < min) { in intel_gmch_pfit_check_timings()
432 drm_dbg_kms(display->drm, in intel_gmch_pfit_check_timings()
434 crtc->base.base.id, crtc->base.name, in intel_gmch_pfit_check_timings()
435 adjusted_mode->crtc_hdisplay, min); in intel_gmch_pfit_check_timings()
436 return -EINVAL; in intel_gmch_pfit_check_timings()
439 if (adjusted_mode->crtc_vdisplay < min) { in intel_gmch_pfit_check_timings()
440 drm_dbg_kms(display->drm, in intel_gmch_pfit_check_timings()
442 crtc->base.base.id, crtc->base.name, in intel_gmch_pfit_check_timings()
443 adjusted_mode->crtc_vdisplay, min); in intel_gmch_pfit_check_timings()
444 return -EINVAL; in intel_gmch_pfit_check_timings()
453 struct intel_display *display = to_intel_display(crtc_state); in gmch_panel_fitting() local
454 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in gmch_panel_fitting()
456 struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; in gmch_panel_fitting()
457 int pipe_src_w = drm_rect_width(&crtc_state->pipe_src); in gmch_panel_fitting()
458 int pipe_src_h = drm_rect_height(&crtc_state->pipe_src); in gmch_panel_fitting()
461 if (adjusted_mode->crtc_hdisplay == pipe_src_w && in gmch_panel_fitting()
462 adjusted_mode->crtc_vdisplay == pipe_src_h) in gmch_panel_fitting()
469 if (adjusted_mode->crtc_hdisplay < pipe_src_w) { in gmch_panel_fitting()
470 drm_dbg_kms(display->drm, in gmch_panel_fitting()
471 "[CRTC:%d:%s] pfit horizontal downscaling (%d->%d) not supported\n", in gmch_panel_fitting()
472 crtc->base.base.id, crtc->base.name, in gmch_panel_fitting()
473 pipe_src_w, adjusted_mode->crtc_hdisplay); in gmch_panel_fitting()
474 return -EINVAL; in gmch_panel_fitting()
476 if (adjusted_mode->crtc_vdisplay < pipe_src_h) { in gmch_panel_fitting()
477 drm_dbg_kms(display->drm, in gmch_panel_fitting()
478 "[CRTC:%d:%s] pfit vertical downscaling (%d->%d) not supported\n", in gmch_panel_fitting()
479 crtc->base.base.id, crtc->base.name, in gmch_panel_fitting()
480 pipe_src_h, adjusted_mode->crtc_vdisplay); in gmch_panel_fitting()
481 return -EINVAL; in gmch_panel_fitting()
484 switch (conn_state->scaling_mode) { in gmch_panel_fitting()
496 if (DISPLAY_VER(display) >= 4) in gmch_panel_fitting()
507 if (pipe_src_h != adjusted_mode->crtc_vdisplay || in gmch_panel_fitting()
508 pipe_src_w != adjusted_mode->crtc_hdisplay) { in gmch_panel_fitting()
510 if (DISPLAY_VER(display) >= 4) in gmch_panel_fitting()
520 MISSING_CASE(conn_state->scaling_mode); in gmch_panel_fitting()
521 return -EINVAL; in gmch_panel_fitting()
526 if (DISPLAY_VER(display) >= 4) in gmch_panel_fitting()
527 pfit_control |= PFIT_PIPE(crtc->pipe) | PFIT_FILTER_FUZZY; in gmch_panel_fitting()
535 /* Make sure pre-965 set dither correctly for 18bpp panels. */ in gmch_panel_fitting()
536 if (DISPLAY_VER(display) < 4 && crtc_state->pipe_bpp == 18) in gmch_panel_fitting()
539 crtc_state->gmch_pfit.control = pfit_control; in gmch_panel_fitting()
540 crtc_state->gmch_pfit.pgm_ratios = pfit_pgm_ratios; in gmch_panel_fitting()
541 crtc_state->gmch_pfit.lvds_border_bits = border; in gmch_panel_fitting()
552 struct intel_display *display = to_intel_display(crtc_state); in intel_pfit_compute_config() local
554 if (HAS_GMCH(display)) in intel_pfit_compute_config()
562 struct intel_display *display = to_intel_display(crtc_state); in ilk_pfit_enable() local
563 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in ilk_pfit_enable()
564 const struct drm_rect *dst = &crtc_state->pch_pfit.dst; in ilk_pfit_enable()
565 enum pipe pipe = crtc->pipe; in ilk_pfit_enable() local
568 int x = dst->x1; in ilk_pfit_enable()
569 int y = dst->y1; in ilk_pfit_enable()
571 if (!crtc_state->pch_pfit.enabled) in ilk_pfit_enable()
575 * Force use of hard-coded filter coefficients as some pre-programmed in ilk_pfit_enable()
578 if (display->platform.ivybridge || display->platform.haswell) in ilk_pfit_enable()
579 intel_de_write_fw(display, PF_CTL(pipe), PF_ENABLE | in ilk_pfit_enable()
580 PF_FILTER_MED_3x3 | PF_PIPE_SEL_IVB(pipe)); in ilk_pfit_enable()
582 intel_de_write_fw(display, PF_CTL(pipe), PF_ENABLE | in ilk_pfit_enable()
584 intel_de_write_fw(display, PF_WIN_POS(pipe), in ilk_pfit_enable()
586 intel_de_write_fw(display, PF_WIN_SZ(pipe), in ilk_pfit_enable()
592 struct intel_display *display = to_intel_display(old_crtc_state); in ilk_pfit_disable() local
593 struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); in ilk_pfit_disable()
594 enum pipe pipe = crtc->pipe; in ilk_pfit_disable() local
600 if (!old_crtc_state->pch_pfit.enabled) in ilk_pfit_disable()
603 intel_de_write_fw(display, PF_CTL(pipe), 0); in ilk_pfit_disable()
604 intel_de_write_fw(display, PF_WIN_POS(pipe), 0); in ilk_pfit_disable()
605 intel_de_write_fw(display, PF_WIN_SZ(pipe), 0); in ilk_pfit_disable()
610 struct intel_display *display = to_intel_display(crtc_state); in ilk_pfit_get_config() local
611 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in ilk_pfit_get_config()
613 enum pipe pipe; in ilk_pfit_get_config() local
615 ctl = intel_de_read(display, PF_CTL(crtc->pipe)); in ilk_pfit_get_config()
619 if (display->platform.ivybridge || display->platform.haswell) in ilk_pfit_get_config()
620 pipe = REG_FIELD_GET(PF_PIPE_SEL_MASK_IVB, ctl); in ilk_pfit_get_config()
622 pipe = crtc->pipe; in ilk_pfit_get_config()
624 crtc_state->pch_pfit.enabled = true; in ilk_pfit_get_config()
626 pos = intel_de_read(display, PF_WIN_POS(crtc->pipe)); in ilk_pfit_get_config()
627 size = intel_de_read(display, PF_WIN_SZ(crtc->pipe)); in ilk_pfit_get_config()
629 drm_rect_init(&crtc_state->pch_pfit.dst, in ilk_pfit_get_config()
640 drm_WARN_ON(display->drm, pipe != crtc->pipe); in ilk_pfit_get_config()
645 struct intel_display *display = to_intel_display(crtc_state); in i9xx_pfit_enable() local
646 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in i9xx_pfit_enable()
648 if (!crtc_state->gmch_pfit.control) in i9xx_pfit_enable()
652 * The panel fitter should only be adjusted whilst the pipe is disabled, in i9xx_pfit_enable()
655 drm_WARN_ON(display->drm, in i9xx_pfit_enable()
656 intel_de_read(display, PFIT_CONTROL(display)) & PFIT_ENABLE); in i9xx_pfit_enable()
657 assert_transcoder_disabled(display, crtc_state->cpu_transcoder); in i9xx_pfit_enable()
659 intel_de_write(display, PFIT_PGM_RATIOS(display), in i9xx_pfit_enable()
660 crtc_state->gmch_pfit.pgm_ratios); in i9xx_pfit_enable()
661 intel_de_write(display, PFIT_CONTROL(display), in i9xx_pfit_enable()
662 crtc_state->gmch_pfit.control); in i9xx_pfit_enable()
668 intel_de_write(display, BCLRPAT(display, crtc->pipe), 0); in i9xx_pfit_enable()
673 struct intel_display *display = to_intel_display(old_crtc_state); in i9xx_pfit_disable() local
675 if (!old_crtc_state->gmch_pfit.control) in i9xx_pfit_disable()
678 assert_transcoder_disabled(display, old_crtc_state->cpu_transcoder); in i9xx_pfit_disable()
680 drm_dbg_kms(display->drm, "disabling pfit, current: 0x%08x\n", in i9xx_pfit_disable()
681 intel_de_read(display, PFIT_CONTROL(display))); in i9xx_pfit_disable()
682 intel_de_write(display, PFIT_CONTROL(display), 0); in i9xx_pfit_disable()
685 static bool i9xx_has_pfit(struct intel_display *display) in i9xx_has_pfit() argument
687 if (display->platform.i830) in i9xx_has_pfit()
690 return DISPLAY_VER(display) >= 4 || in i9xx_has_pfit()
691 display->platform.pineview || display->platform.mobile; in i9xx_has_pfit()
696 struct intel_display *display = to_intel_display(crtc_state); in i9xx_pfit_get_config() local
697 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in i9xx_pfit_get_config()
698 enum pipe pipe; in i9xx_pfit_get_config() local
701 if (!i9xx_has_pfit(display)) in i9xx_pfit_get_config()
704 tmp = intel_de_read(display, PFIT_CONTROL(display)); in i9xx_pfit_get_config()
708 /* Check whether the pfit is attached to our pipe. */ in i9xx_pfit_get_config()
709 if (DISPLAY_VER(display) >= 4) in i9xx_pfit_get_config()
710 pipe = REG_FIELD_GET(PFIT_PIPE_MASK, tmp); in i9xx_pfit_get_config()
712 pipe = PIPE_B; in i9xx_pfit_get_config()
714 if (pipe != crtc->pipe) in i9xx_pfit_get_config()
717 crtc_state->gmch_pfit.control = tmp; in i9xx_pfit_get_config()
718 crtc_state->gmch_pfit.pgm_ratios = in i9xx_pfit_get_config()
719 intel_de_read(display, PFIT_PGM_RATIOS(display)); in i9xx_pfit_get_config()