i915/display/intel_fifo_underrun.c

39  * DOC: fifo underrun handling
45  * If an underrun is detected this is logged into dmesg. To avoid flooding logs
46  * and occupying the cpu underrun interrupts are disabled after the first
49  * Note that underrun detection on gmch platforms is a bit more ugly since there
51  * interrupt register). Also on some other platforms underrun interrupts are
52  * shared, which means that if we detect an underrun we need to disable underrun
55  * The code also supports underrun detection on the PCH transcoder.
111 	drm_err(display->drm, "pipe %c underrun\n", pipe_name(crtc->pipe));  in i9xx_check_fifo_underruns()
131 			drm_err(display->drm, "pipe %c underrun\n",  in i9xx_set_fifo_underrun_reporting()
165 	drm_err(display->drm, "fifo underrun on pipe %c\n", pipe_name(pipe));  in ivb_check_fifo_underruns()
187 				"uncleared fifo underrun on pipe %c\n",  in ivb_set_fifo_underrun_reporting()
235 	drm_err(display->drm, "pch fifo underrun on pch transcoder %c\n",  in cpt_check_pch_fifo_underruns()
259 				"uncleared pch fifo underrun on pch transcoder %c\n",  in cpt_set_fifo_underrun_reporting()
290  * intel_set_cpu_fifo_underrun_reporting - set cpu fifo underrun reporting state
295  * This function sets the fifo underrun state for @pipe. It is used in the
299  * Notice that on some platforms disabling underrun reports for one pipe
303  * Returns the previous state of underrun reporting.
320  * intel_set_pch_fifo_underrun_reporting - set PCH fifo underrun reporting state
327  * underrun reporting for one transcoder may also disable all the other PCH
331  * Returns the previous state of underrun reporting.
346 	 * underrun statistics in crtc A. Since we never expose this anywhere  in intel_set_pch_fifo_underrun_reporting()
347 	 * nor use it outside of the fifo underrun code here using the "wrong"  in intel_set_pch_fifo_underrun_reporting()
370  * intel_cpu_fifo_underrun_irq_handler - handle CPU fifo underrun interrupt
374  * This handles a CPU fifo underrun interrupt, generating an underrun warning
375  * into dmesg if underrun reporting is enabled and then disables the underrun
395 		drm_err(display->drm, "CPU pipe %c FIFO underrun\n", pipe_name(pipe));  in intel_cpu_fifo_underrun_irq_handler()
402  * intel_pch_fifo_underrun_irq_handler - handle PCH fifo underrun interrupt
406  * This handles a PCH fifo underrun interrupt, generating an underrun warning
407  * into dmesg if underrun reporting is enabled and then disables the underrun
416 		drm_err(display->drm, "PCH transcoder %c FIFO underrun\n",  in intel_pch_fifo_underrun_irq_handler()
485 	 * We track the PCH trancoder underrun reporting state  in intel_init_fifo_underrun_reporting()
486 	 * within the crtc. With crtc for pipe A housing the underrun  in intel_init_fifo_underrun_reporting()
489 	 * and marking underrun reporting as disabled for the non-existing  in intel_init_fifo_underrun_reporting()