Lines Matching +full:cts +full:- +full:override
1 // SPDX-License-Identifier: MIT
28 memset(&intel_dp->compliance, 0, sizeof(intel_dp->compliance)); in intel_dp_test_reset()
38 /* For DP Compliance we override the computed bpp for the pipe */ in intel_dp_test_compute_config()
39 if (intel_dp->compliance.test_data.bpc != 0) { in intel_dp_test_compute_config()
40 int bpp = 3 * intel_dp->compliance.test_data.bpc; in intel_dp_test_compute_config()
42 limits->pipe.min_bpp = bpp; in intel_dp_test_compute_config()
43 limits->pipe.max_bpp = bpp; in intel_dp_test_compute_config()
44 pipe_config->dither_force_disable = bpp == 6 * 3; in intel_dp_test_compute_config()
46 drm_dbg_kms(display->drm, "Setting pipe_bpp to %d\n", bpp); in intel_dp_test_compute_config()
50 if (intel_dp->compliance.test_type == DP_TEST_LINK_TRAINING) { in intel_dp_test_compute_config()
56 if (intel_dp_link_params_valid(intel_dp, intel_dp->compliance.test_link_rate, in intel_dp_test_compute_config()
57 intel_dp->compliance.test_lane_count)) { in intel_dp_test_compute_config()
58 index = intel_dp_rate_index(intel_dp->common_rates, in intel_dp_test_compute_config()
59 intel_dp->num_common_rates, in intel_dp_test_compute_config()
60 intel_dp->compliance.test_link_rate); in intel_dp_test_compute_config()
62 limits->min_rate = intel_dp->compliance.test_link_rate; in intel_dp_test_compute_config()
63 limits->max_rate = intel_dp->compliance.test_link_rate; in intel_dp_test_compute_config()
65 limits->min_lane_count = intel_dp->compliance.test_lane_count; in intel_dp_test_compute_config()
66 limits->max_lane_count = intel_dp->compliance.test_lane_count; in intel_dp_test_compute_config()
82 /* (DP CTS 1.2) in intel_dp_autotest_link_training()
85 /* Read the TEST_LANE_COUNT and TEST_LINK_RTAE fields (DP CTS 3.1.4) */ in intel_dp_autotest_link_training()
86 status = drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_LANE_COUNT, in intel_dp_autotest_link_training()
90 drm_dbg_kms(display->drm, "Lane count read failed\n"); in intel_dp_autotest_link_training()
95 status = drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_LINK_RATE, in intel_dp_autotest_link_training()
98 drm_dbg_kms(display->drm, "Link Rate read failed\n"); in intel_dp_autotest_link_training()
108 intel_dp->compliance.test_lane_count = test_lane_count; in intel_dp_autotest_link_training()
109 intel_dp->compliance.test_link_rate = test_link_rate; in intel_dp_autotest_link_training()
122 /* Read the TEST_PATTERN (DP CTS 3.1.5) */ in intel_dp_autotest_video_pattern()
123 status = drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_PATTERN, in intel_dp_autotest_video_pattern()
126 drm_dbg_kms(display->drm, "Test pattern read failed\n"); in intel_dp_autotest_video_pattern()
132 status = drm_dp_dpcd_read(&intel_dp->aux, DP_TEST_H_WIDTH_HI, in intel_dp_autotest_video_pattern()
135 drm_dbg_kms(display->drm, "H Width read failed\n"); in intel_dp_autotest_video_pattern()
139 status = drm_dp_dpcd_read(&intel_dp->aux, DP_TEST_V_HEIGHT_HI, in intel_dp_autotest_video_pattern()
142 drm_dbg_kms(display->drm, "V Height read failed\n"); in intel_dp_autotest_video_pattern()
146 status = drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_MISC0, in intel_dp_autotest_video_pattern()
149 drm_dbg_kms(display->drm, "TEST MISC read failed\n"); in intel_dp_autotest_video_pattern()
158 intel_dp->compliance.test_data.bpc = 6; in intel_dp_autotest_video_pattern()
161 intel_dp->compliance.test_data.bpc = 8; in intel_dp_autotest_video_pattern()
167 intel_dp->compliance.test_data.video_pattern = test_pattern; in intel_dp_autotest_video_pattern()
168 intel_dp->compliance.test_data.hdisplay = be16_to_cpu(h_width); in intel_dp_autotest_video_pattern()
169 intel_dp->compliance.test_data.vdisplay = be16_to_cpu(v_height); in intel_dp_autotest_video_pattern()
171 intel_dp->compliance.test_active = true; in intel_dp_autotest_video_pattern()
180 struct intel_connector *intel_connector = intel_dp->attached_connector; in intel_dp_autotest_edid()
181 struct drm_connector *connector = &intel_connector->base; in intel_dp_autotest_edid()
183 if (!intel_connector->detect_edid || connector->edid_corrupt || in intel_dp_autotest_edid()
184 intel_dp->aux.i2c_defer_count > 6) { in intel_dp_autotest_edid()
186 * (DP CTS 1.2 Core r1.1) in intel_dp_autotest_edid()
192 if (intel_dp->aux.i2c_nack_count > 0 || in intel_dp_autotest_edid()
193 intel_dp->aux.i2c_defer_count > 0) in intel_dp_autotest_edid()
194 drm_dbg_kms(display->drm, in intel_dp_autotest_edid()
196 intel_dp->aux.i2c_nack_count, in intel_dp_autotest_edid()
197 intel_dp->aux.i2c_defer_count); in intel_dp_autotest_edid()
198 intel_dp->compliance.test_data.edid = INTEL_DP_RESOLUTION_FAILSAFE; in intel_dp_autotest_edid()
201 const struct edid *block = drm_edid_raw(intel_connector->detect_edid); in intel_dp_autotest_edid()
204 block += block->extensions; in intel_dp_autotest_edid()
206 if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_TEST_EDID_CHECKSUM, in intel_dp_autotest_edid()
207 block->checksum) <= 0) in intel_dp_autotest_edid()
208 drm_dbg_kms(display->drm, in intel_dp_autotest_edid()
212 intel_dp->compliance.test_data.edid = INTEL_DP_RESOLUTION_PREFERRED; in intel_dp_autotest_edid()
216 intel_dp->compliance.test_active = true; in intel_dp_autotest_edid()
226 &intel_dp->compliance.test_data.phytest; in intel_dp_phy_pattern_update()
227 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_dp_phy_pattern_update()
228 struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base; in intel_dp_phy_pattern_update()
229 enum pipe pipe = crtc->pipe; in intel_dp_phy_pattern_update()
232 switch (data->phy_pattern) { in intel_dp_phy_pattern_update()
234 drm_dbg_kms(display->drm, "Disable Phy Test Pattern\n"); in intel_dp_phy_pattern_update()
242 drm_dbg_kms(display->drm, "Set D10.2 Phy Test Pattern\n"); in intel_dp_phy_pattern_update()
247 drm_dbg_kms(display->drm, in intel_dp_phy_pattern_update()
254 drm_dbg_kms(display->drm, "Set PRBS7 Phy Test Pattern\n"); in intel_dp_phy_pattern_update()
261 * current firmware of DPR-100 could not set it, so hardcoding in intel_dp_phy_pattern_update()
264 drm_dbg_kms(display->drm, in intel_dp_phy_pattern_update()
279 * current firmware of DPR-100 could not set it, so hardcoding in intel_dp_phy_pattern_update()
282 drm_dbg_kms(display->drm, in intel_dp_phy_pattern_update()
291 drm_warn(display->drm, in intel_dp_phy_pattern_update()
295 drm_dbg_kms(display->drm, in intel_dp_phy_pattern_update()
303 drm_warn(display->drm, "Invalid Phy Test Pattern\n"); in intel_dp_phy_pattern_update()
312 &intel_dp->compliance.test_data.phytest; in intel_dp_process_phy_request()
315 if (drm_dp_dpcd_read_phy_link_status(&intel_dp->aux, DP_PHY_DPRX, in intel_dp_process_phy_request()
317 drm_dbg_kms(display->drm, "failed to get link status\n"); in intel_dp_process_phy_request()
321 /* retrieve vswing & pre-emphasis setting */ in intel_dp_process_phy_request()
329 drm_dp_dpcd_write(&intel_dp->aux, DP_TRAINING_LANE0_SET, in intel_dp_process_phy_request()
330 intel_dp->train_set, crtc_state->lane_count); in intel_dp_process_phy_request()
332 drm_dp_set_phy_test_pattern(&intel_dp->aux, data, in intel_dp_process_phy_request()
333 intel_dp->dpcd[DP_DPCD_REV]); in intel_dp_process_phy_request()
340 &intel_dp->compliance.test_data.phytest; in intel_dp_autotest_phy_pattern()
342 if (drm_dp_get_phy_test_pattern(&intel_dp->aux, data)) { in intel_dp_autotest_phy_pattern()
343 drm_dbg_kms(display->drm, in intel_dp_autotest_phy_pattern()
349 intel_dp->compliance.test_active = true; in intel_dp_autotest_phy_pattern()
361 status = drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_REQUEST, &request); in intel_dp_test_request()
363 drm_dbg_kms(display->drm, in intel_dp_test_request()
370 drm_dbg_kms(display->drm, "LINK_TRAINING test requested\n"); in intel_dp_test_request()
374 drm_dbg_kms(display->drm, "TEST_PATTERN test requested\n"); in intel_dp_test_request()
378 drm_dbg_kms(display->drm, "EDID test requested\n"); in intel_dp_test_request()
382 drm_dbg_kms(display->drm, "PHY_PATTERN test requested\n"); in intel_dp_test_request()
386 drm_dbg_kms(display->drm, "Invalid test request '%02x'\n", in intel_dp_test_request()
392 intel_dp->compliance.test_type = request; in intel_dp_test_request()
395 status = drm_dp_dpcd_writeb(&intel_dp->aux, DP_TEST_RESPONSE, response); in intel_dp_test_request()
397 drm_dbg_kms(display->drm, in intel_dp_test_request()
414 drm_connector_list_iter_begin(display->drm, &conn_iter); in intel_dp_prep_phy_test()
417 connector->base.state; in intel_dp_prep_phy_test()
424 crtc = to_intel_crtc(conn_state->crtc); in intel_dp_prep_phy_test()
428 ret = drm_modeset_lock(&crtc->base.mutex, ctx); in intel_dp_prep_phy_test()
432 crtc_state = to_intel_crtc_state(crtc->base.state); in intel_dp_prep_phy_test()
434 drm_WARN_ON(display->drm, in intel_dp_prep_phy_test()
437 if (!crtc_state->hw.active) in intel_dp_prep_phy_test()
440 if (conn_state->commit && in intel_dp_prep_phy_test()
441 !try_wait_for_completion(&conn_state->commit->hw_done)) in intel_dp_prep_phy_test()
444 *pipe_mask |= BIT(crtc->pipe); in intel_dp_prep_phy_test()
460 ret = drm_modeset_lock(&display->drm->mode_config.connection_mutex, in intel_dp_do_phy_test()
472 drm_dbg_kms(display->drm, "[ENCODER:%d:%s] PHY test\n", in intel_dp_do_phy_test()
473 encoder->base.base.id, encoder->base.name); in intel_dp_do_phy_test()
475 for_each_intel_crtc_in_pipe_mask(display->drm, crtc, pipe_mask) { in intel_dp_do_phy_test()
477 to_intel_crtc_state(crtc->base.state); in intel_dp_do_phy_test()
495 struct intel_encoder *encoder = &dig_port->base; in intel_dp_test_phy()
499 if (!intel_dp->compliance.test_active || in intel_dp_test_phy()
500 intel_dp->compliance.test_type != DP_TEST_LINK_PHY_TEST_PATTERN) in intel_dp_test_phy()
508 if (ret == -EDEADLK) { in intel_dp_test_phy()
518 drm_WARN(encoder->base.dev, ret, in intel_dp_test_phy()
529 switch (intel_dp->compliance.test_type) { in intel_dp_test_short_pulse()
531 drm_dbg_kms(display->drm, in intel_dp_test_short_pulse()
534 drm_kms_helper_hotplug_event(display->drm); in intel_dp_test_short_pulse()
537 drm_dbg_kms(display->drm, in intel_dp_test_short_pulse()
542 * FIXME get rid of the ad-hoc phy test modeset code in intel_dp_test_short_pulse()
555 struct seq_file *m = file->private_data; in i915_displayport_test_active_write()
556 struct intel_display *display = m->private; in i915_displayport_test_active_write()
571 drm_dbg_kms(display->drm, "Copied %d bytes from user\n", (unsigned int)len); in i915_displayport_test_active_write()
573 drm_connector_list_iter_begin(display->drm, &conn_iter); in i915_displayport_test_active_write()
577 if (connector->connector_type != in i915_displayport_test_active_write()
581 encoder = to_intel_encoder(connector->encoder); in i915_displayport_test_active_write()
582 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST) in i915_displayport_test_active_write()
585 if (encoder && connector->status == connector_status_connected) { in i915_displayport_test_active_write()
590 drm_dbg_kms(display->drm, "Got %d for test active\n", val); in i915_displayport_test_active_write()
595 intel_dp->compliance.test_active = true; in i915_displayport_test_active_write()
597 intel_dp->compliance.test_active = false; in i915_displayport_test_active_write()
611 struct intel_display *display = m->private; in i915_displayport_test_active_show()
616 drm_connector_list_iter_begin(display->drm, &conn_iter); in i915_displayport_test_active_show()
620 if (connector->connector_type != in i915_displayport_test_active_show()
624 encoder = to_intel_encoder(connector->encoder); in i915_displayport_test_active_show()
625 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST) in i915_displayport_test_active_show()
628 if (encoder && connector->status == connector_status_connected) { in i915_displayport_test_active_show()
630 if (intel_dp->compliance.test_active) in i915_displayport_test_active_show()
647 inode->i_private); in i915_displayport_test_active_open()
661 struct intel_display *display = m->private; in i915_displayport_test_data_show()
666 drm_connector_list_iter_begin(display->drm, &conn_iter); in i915_displayport_test_data_show()
670 if (connector->connector_type != in i915_displayport_test_data_show()
674 encoder = to_intel_encoder(connector->encoder); in i915_displayport_test_data_show()
675 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST) in i915_displayport_test_data_show()
678 if (encoder && connector->status == connector_status_connected) { in i915_displayport_test_data_show()
680 if (intel_dp->compliance.test_type == in i915_displayport_test_data_show()
683 intel_dp->compliance.test_data.edid); in i915_displayport_test_data_show()
684 else if (intel_dp->compliance.test_type == in i915_displayport_test_data_show()
687 intel_dp->compliance.test_data.hdisplay); in i915_displayport_test_data_show()
689 intel_dp->compliance.test_data.vdisplay); in i915_displayport_test_data_show()
691 intel_dp->compliance.test_data.bpc); in i915_displayport_test_data_show()
692 } else if (intel_dp->compliance.test_type == in i915_displayport_test_data_show()
695 intel_dp->compliance.test_data.phytest.phy_pattern); in i915_displayport_test_data_show()
697 intel_dp->compliance.test_data.phytest.num_lanes); in i915_displayport_test_data_show()
699 intel_dp->compliance.test_data.phytest.link_rate); in i915_displayport_test_data_show()
701 intel_dp->train_set[0]); in i915_displayport_test_data_show()
715 struct intel_display *display = m->private; in i915_displayport_test_type_show()
720 drm_connector_list_iter_begin(display->drm, &conn_iter); in i915_displayport_test_type_show()
724 if (connector->connector_type != in i915_displayport_test_type_show()
728 encoder = to_intel_encoder(connector->encoder); in i915_displayport_test_type_show()
729 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST) in i915_displayport_test_type_show()
732 if (encoder && connector->status == connector_status_connected) { in i915_displayport_test_type_show()
734 seq_printf(m, "%02lx\n", intel_dp->compliance.test_type); in i915_displayport_test_type_show()
756 struct drm_minor *minor = display->drm->primary; in intel_dp_test_debugfs_register()
762 minor->debugfs_root, in intel_dp_test_debugfs_register()