Lines Matching +full:dp +full:- +full:connector
58 * DP MST (DisplayPort Multi-Stream Transport)
60 * MST support on the source depends on the platform and port. DP initialization
70 * Decision to use MST for a sink happens at detect on the connector attached to
93 struct intel_digital_port *dig_port = intel_mst->primary; in to_primary_encoder()
95 return &dig_port->base; in to_primary_encoder()
98 /* From fake MST stream encoder to primary DP */
102 struct intel_digital_port *dig_port = intel_mst->primary; in to_primary_dp()
104 return &dig_port->dp; in to_primary_dp()
112 &crtc_state->hw.adjusted_mode; in intel_dp_mst_max_dpt_bpp()
118 * DSC->DPT interface width: in intel_dp_mst_max_dpt_bpp()
119 * ICL-MTL: 72 bits (each branch has 72 bits, only left branch is used) in intel_dp_mst_max_dpt_bpp()
126 * testing on MTL-P the in intel_dp_mst_max_dpt_bpp()
127 * - DELL U3224KBA display in intel_dp_mst_max_dpt_bpp()
128 * - Unigraf UCD-500 CTS test sink in intel_dp_mst_max_dpt_bpp()
130 * - 5120x2880/995.59Mhz in intel_dp_mst_max_dpt_bpp()
131 * - 6016x3384/1357.23Mhz in intel_dp_mst_max_dpt_bpp()
132 * - 6144x3456/1413.39Mhz in intel_dp_mst_max_dpt_bpp()
137 return div64_u64(mul_u32_u32(intel_dp_link_symbol_clock(crtc_state->port_clock) * 72, in intel_dp_mst_max_dpt_bpp()
139 mul_u32_u32(adjusted_mode->crtc_clock, 1030000)); in intel_dp_mst_max_dpt_bpp()
146 &crtc_state->hw.adjusted_mode; in intel_dp_mst_bw_overhead()
152 flags |= crtc_state->fec_enable ? DRM_DP_BW_OVERHEAD_FEC : 0; in intel_dp_mst_bw_overhead()
157 overhead = drm_dp_bw_overhead(crtc_state->lane_count, in intel_dp_mst_bw_overhead()
158 adjusted_mode->hdisplay, in intel_dp_mst_bw_overhead()
167 return max(overhead, intel_dp_bw_fec_overhead(crtc_state->fec_enable)); in intel_dp_mst_bw_overhead()
176 &crtc_state->hw.adjusted_mode; in intel_dp_mst_compute_m_n()
179 intel_link_compute_m_n(bpp_x16, crtc_state->lane_count, in intel_dp_mst_compute_m_n()
180 adjusted_mode->crtc_clock, in intel_dp_mst_compute_m_n()
181 crtc_state->port_clock, in intel_dp_mst_compute_m_n()
185 m_n->tu = DIV_ROUND_UP_ULL(mul_u32_u32(m_n->data_m, 64), m_n->data_n); in intel_dp_mst_compute_m_n()
200 static int intel_dp_mst_dsc_get_slice_count(const struct intel_connector *connector, in intel_dp_mst_dsc_get_slice_count() argument
204 &crtc_state->hw.adjusted_mode; in intel_dp_mst_dsc_get_slice_count()
207 return intel_dp_dsc_get_slice_count(connector, in intel_dp_mst_dsc_get_slice_count()
208 adjusted_mode->clock, in intel_dp_mst_dsc_get_slice_count()
209 adjusted_mode->hdisplay, in intel_dp_mst_dsc_get_slice_count()
218 &crtc_state->hw.adjusted_mode; in intel_dp_mst_compute_min_hblank()
227 (adjusted_mode->htotal - adjusted_mode->hdisplay, 4) * bpp_x16), in intel_dp_mst_compute_min_hblank()
230 crtc_state->min_hblank = hblank; in intel_dp_mst_compute_min_hblank()
239 struct drm_atomic_state *state = crtc_state->uapi.state; in intel_dp_mtp_tu_compute_config()
241 struct intel_connector *connector = in intel_dp_mtp_tu_compute_config() local
242 to_intel_connector(conn_state->connector); in intel_dp_mtp_tu_compute_config()
244 &crtc_state->hw.adjusted_mode; in intel_dp_mtp_tu_compute_config()
246 int bpp_x16, slots = -EINVAL; in intel_dp_mtp_tu_compute_config()
251 drm_WARN_ON(display->drm, !dsc && (fxp_q4_to_frac(min_bpp_x16) || in intel_dp_mtp_tu_compute_config()
256 mst_state = drm_atomic_get_mst_topology_state(state, &intel_dp->mst.mgr); in intel_dp_mtp_tu_compute_config()
260 mst_state->pbn_div = drm_dp_get_vc_payload_bw(crtc_state->port_clock, in intel_dp_mtp_tu_compute_config()
261 crtc_state->lane_count); in intel_dp_mtp_tu_compute_config()
265 if (!intel_dp_supports_fec(intel_dp, connector, crtc_state)) in intel_dp_mtp_tu_compute_config()
266 return -EINVAL; in intel_dp_mtp_tu_compute_config()
268 crtc_state->fec_enable = !intel_dp_is_uhbr(crtc_state); in intel_dp_mtp_tu_compute_config()
273 drm_dbg_kms(display->drm, "Limiting bpp to max DPT bpp (" FXP_Q4_FMT " -> " FXP_Q4_FMT ")\n", in intel_dp_mtp_tu_compute_config()
278 …drm_dbg_kms(display->drm, "Looking for slots in range min bpp " FXP_Q4_FMT " max bpp " FXP_Q4_FMT … in intel_dp_mtp_tu_compute_config()
282 dsc_slice_count = intel_dp_mst_dsc_get_slice_count(connector, crtc_state); in intel_dp_mtp_tu_compute_config()
284 drm_dbg_kms(display->drm, "Can't get valid DSC slice count\n"); in intel_dp_mtp_tu_compute_config()
286 return -ENOSPC; in intel_dp_mtp_tu_compute_config()
290 for (bpp_x16 = max_bpp_x16; bpp_x16 >= min_bpp_x16; bpp_x16 -= bpp_step_x16) { in intel_dp_mtp_tu_compute_config()
294 drm_dbg_kms(display->drm, "Trying bpp " FXP_Q4_FMT "\n", FXP_Q4_ARGS(bpp_x16)); in intel_dp_mtp_tu_compute_config()
297 fxp_q4_from_int(intel_dp_output_bpp(crtc_state->output_format, in intel_dp_mtp_tu_compute_config()
308 &crtc_state->dp_m_n); in intel_dp_mtp_tu_compute_config()
325 * the ALLOCATE_PAYLOAD side-band message matches the payload in intel_dp_mtp_tu_compute_config()
329 * crtc_state->dp_m_n.tu), provided that the driver doesn't in intel_dp_mtp_tu_compute_config()
332 pbn.full = dfixed_const(intel_dp_mst_calc_pbn(adjusted_mode->crtc_clock, in intel_dp_mtp_tu_compute_config()
335 remote_tu = DIV_ROUND_UP(pbn.full, mst_state->pbn_div.full); in intel_dp_mtp_tu_compute_config()
344 remote_tu = ALIGN(remote_tu, 4 / crtc_state->lane_count); in intel_dp_mtp_tu_compute_config()
353 pbn.full = remote_tu * mst_state->pbn_div.full; in intel_dp_mtp_tu_compute_config()
355 drm_WARN_ON(display->drm, remote_tu < crtc_state->dp_m_n.tu); in intel_dp_mtp_tu_compute_config()
356 crtc_state->dp_m_n.tu = remote_tu; in intel_dp_mtp_tu_compute_config()
358 slots = drm_dp_atomic_find_time_slots(state, &intel_dp->mst.mgr, in intel_dp_mtp_tu_compute_config()
359 connector->mst.port, in intel_dp_mtp_tu_compute_config()
363 crtc_state->dp_m_n.tu = ALIGN(crtc_state->dp_m_n.tu, in intel_dp_mtp_tu_compute_config()
364 4 / crtc_state->lane_count); in intel_dp_mtp_tu_compute_config()
366 if (crtc_state->dp_m_n.tu <= 64) in intel_dp_mtp_tu_compute_config()
367 slots = crtc_state->dp_m_n.tu; in intel_dp_mtp_tu_compute_config()
369 slots = -EINVAL; in intel_dp_mtp_tu_compute_config()
372 if (slots == -EDEADLK) in intel_dp_mtp_tu_compute_config()
376 drm_WARN_ON(display->drm, slots != crtc_state->dp_m_n.tu); in intel_dp_mtp_tu_compute_config()
387 drm_dbg_kms(display->drm, "failed finding vcpi slots:%d\n", in intel_dp_mtp_tu_compute_config()
393 crtc_state->pipe_bpp = fxp_q4_to_int(bpp_x16); in intel_dp_mtp_tu_compute_config()
395 crtc_state->dsc.compressed_bpp_x16 = bpp_x16; in intel_dp_mtp_tu_compute_config()
397 drm_dbg_kms(display->drm, "Got %d slots for pipe bpp " FXP_Q4_FMT " dsc %d\n", in intel_dp_mtp_tu_compute_config()
408 crtc_state->lane_count = limits->max_lane_count; in mst_stream_compute_link_config()
409 crtc_state->port_clock = limits->max_rate; in mst_stream_compute_link_config()
416 limits->link.min_bpp_x16, in mst_stream_compute_link_config()
417 limits->link.max_bpp_x16, in mst_stream_compute_link_config()
427 struct intel_connector *connector = to_intel_connector(conn_state->connector); in mst_stream_dsc_compute_link_config() local
433 max_bpp = limits->pipe.max_bpp; in mst_stream_dsc_compute_link_config()
434 min_bpp = limits->pipe.min_bpp; in mst_stream_dsc_compute_link_config()
436 num_bpc = drm_dp_dsc_sink_supported_input_bpcs(connector->dp.dsc_dpcd, in mst_stream_dsc_compute_link_config()
439 drm_dbg_kms(display->drm, "DSC Source supported min bpp %d max bpp %d\n", in mst_stream_dsc_compute_link_config()
445 drm_dbg_kms(display->drm, "DSC Sink supported min bpp %d max bpp %d\n", in mst_stream_dsc_compute_link_config()
454 crtc_state->pipe_bpp = max_bpp; in mst_stream_dsc_compute_link_config()
456 max_compressed_bpp = fxp_q4_to_int(limits->link.max_bpp_x16); in mst_stream_dsc_compute_link_config()
457 min_compressed_bpp = fxp_q4_to_int_roundup(limits->link.min_bpp_x16); in mst_stream_dsc_compute_link_config()
459 drm_dbg_kms(display->drm, "DSC Sink supported compressed min bpp %d compressed max bpp %d\n", in mst_stream_dsc_compute_link_config()
464 crtc_state->pipe_bpp); in mst_stream_dsc_compute_link_config()
466 crtc_state->pipe_bpp); in mst_stream_dsc_compute_link_config()
468 crtc_state->lane_count = limits->max_lane_count; in mst_stream_dsc_compute_link_config()
469 crtc_state->port_clock = limits->max_rate; in mst_stream_dsc_compute_link_config()
482 struct drm_dp_mst_topology_mgr *mgr = &intel_dp->mst.mgr; in mst_stream_update_slots()
487 topology_state = drm_atomic_get_mst_topology_state(conn_state->state, mgr); in mst_stream_update_slots()
489 drm_dbg_kms(display->drm, "slot update failed\n"); in mst_stream_update_slots()
500 return DIV_ROUND_CLOSEST_ULL(mul_u32_u32(mode->htotal - mode->hdisplay, in mode_hblank_period_ns()
502 mode->crtc_clock); in mode_hblank_period_ns()
506 hblank_expansion_quirk_needs_dsc(const struct intel_connector *connector, in hblank_expansion_quirk_needs_dsc() argument
511 &crtc_state->hw.adjusted_mode; in hblank_expansion_quirk_needs_dsc()
512 bool is_uhbr_sink = connector->mst.dp && in hblank_expansion_quirk_needs_dsc()
513 drm_dp_128b132b_supported(connector->mst.dp->dpcd); in hblank_expansion_quirk_needs_dsc()
516 if (!connector->dp.dsc_hblank_expansion_quirk) in hblank_expansion_quirk_needs_dsc()
519 if (is_uhbr_sink && !drm_dp_is_uhbr_rate(limits->max_rate)) in hblank_expansion_quirk_needs_dsc()
525 if (!intel_dp_mst_dsc_get_slice_count(connector, crtc_state)) in hblank_expansion_quirk_needs_dsc()
533 const struct intel_connector *connector, in adjust_limits_for_dsc_hblank_expansion_quirk() argument
538 struct intel_display *display = to_intel_display(connector); in adjust_limits_for_dsc_hblank_expansion_quirk()
539 const struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in adjust_limits_for_dsc_hblank_expansion_quirk()
540 int min_bpp_x16 = limits->link.min_bpp_x16; in adjust_limits_for_dsc_hblank_expansion_quirk()
542 if (!hblank_expansion_quirk_needs_dsc(connector, crtc_state, limits)) in adjust_limits_for_dsc_hblank_expansion_quirk()
546 if (intel_dp_supports_dsc(intel_dp, connector, crtc_state)) { in adjust_limits_for_dsc_hblank_expansion_quirk()
547 drm_dbg_kms(display->drm, in adjust_limits_for_dsc_hblank_expansion_quirk()
548 "[CRTC:%d:%s][CONNECTOR:%d:%s] DSC needed by hblank expansion quirk\n", in adjust_limits_for_dsc_hblank_expansion_quirk()
549 crtc->base.base.id, crtc->base.name, in adjust_limits_for_dsc_hblank_expansion_quirk()
550 connector->base.base.id, connector->base.name); in adjust_limits_for_dsc_hblank_expansion_quirk()
554 drm_dbg_kms(display->drm, in adjust_limits_for_dsc_hblank_expansion_quirk()
555 … "[CRTC:%d:%s][CONNECTOR:%d:%s] Increasing link min bpp to 24 due to hblank expansion quirk\n", in adjust_limits_for_dsc_hblank_expansion_quirk()
556 crtc->base.base.id, crtc->base.name, in adjust_limits_for_dsc_hblank_expansion_quirk()
557 connector->base.base.id, connector->base.name); in adjust_limits_for_dsc_hblank_expansion_quirk()
559 if (limits->link.max_bpp_x16 < fxp_q4_from_int(24)) in adjust_limits_for_dsc_hblank_expansion_quirk()
562 limits->link.min_bpp_x16 = fxp_q4_from_int(24); in adjust_limits_for_dsc_hblank_expansion_quirk()
567 drm_WARN_ON(display->drm, limits->min_rate != limits->max_rate); in adjust_limits_for_dsc_hblank_expansion_quirk()
569 if (limits->max_rate < 540000) in adjust_limits_for_dsc_hblank_expansion_quirk()
571 else if (limits->max_rate < 810000) in adjust_limits_for_dsc_hblank_expansion_quirk()
574 if (limits->link.min_bpp_x16 >= min_bpp_x16) in adjust_limits_for_dsc_hblank_expansion_quirk()
577 drm_dbg_kms(display->drm, in adjust_limits_for_dsc_hblank_expansion_quirk()
578 …"[CRTC:%d:%s][CONNECTOR:%d:%s] Increasing link min bpp to " FXP_Q4_FMT " in DSC mode due to hblank… in adjust_limits_for_dsc_hblank_expansion_quirk()
579 crtc->base.base.id, crtc->base.name, in adjust_limits_for_dsc_hblank_expansion_quirk()
580 connector->base.base.id, connector->base.name, in adjust_limits_for_dsc_hblank_expansion_quirk()
583 if (limits->link.max_bpp_x16 < min_bpp_x16) in adjust_limits_for_dsc_hblank_expansion_quirk()
586 limits->link.min_bpp_x16 = min_bpp_x16; in adjust_limits_for_dsc_hblank_expansion_quirk()
593 const struct intel_connector *connector, in mst_stream_compute_config_limits() argument
603 connector, in mst_stream_compute_config_limits()
614 struct intel_atomic_state *state = to_intel_atomic_state(conn_state->state); in mst_stream_compute_config()
615 struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); in mst_stream_compute_config()
617 struct intel_connector *connector = in mst_stream_compute_config() local
618 to_intel_connector(conn_state->connector); in mst_stream_compute_config()
620 &pipe_config->hw.adjusted_mode; in mst_stream_compute_config()
626 if (pipe_config->fec_enable && in mst_stream_compute_config()
627 !intel_dp_supports_fec(intel_dp, connector, pipe_config)) in mst_stream_compute_config()
628 return -EINVAL; in mst_stream_compute_config()
630 if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) in mst_stream_compute_config()
631 return -EINVAL; in mst_stream_compute_config()
633 num_joined_pipes = intel_dp_num_joined_pipes(intel_dp, connector, in mst_stream_compute_config()
634 adjusted_mode->crtc_hdisplay, in mst_stream_compute_config()
635 adjusted_mode->crtc_clock); in mst_stream_compute_config()
637 pipe_config->joiner_pipes = GENMASK(crtc->pipe + num_joined_pipes - 1, crtc->pipe); in mst_stream_compute_config()
639 pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB; in mst_stream_compute_config()
640 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; in mst_stream_compute_config()
641 pipe_config->has_pch_encoder = false; in mst_stream_compute_config()
645 dsc_needed = joiner_needs_dsc || intel_dp->force_dsc_en || in mst_stream_compute_config()
646 !mst_stream_compute_config_limits(intel_dp, connector, in mst_stream_compute_config()
653 if (ret == -EDEADLK) in mst_stream_compute_config()
660 if (dsc_needed && !intel_dp_supports_dsc(intel_dp, connector, pipe_config)) { in mst_stream_compute_config()
661 drm_dbg_kms(display->drm, "DSC required but not available\n"); in mst_stream_compute_config()
662 return -EINVAL; in mst_stream_compute_config()
667 drm_dbg_kms(display->drm, "Try DSC (fallback=%s, joiner=%s, force=%s)\n", in mst_stream_compute_config()
669 str_yes_no(intel_dp->force_dsc_en)); in mst_stream_compute_config()
672 if (!mst_stream_compute_config_limits(intel_dp, connector, in mst_stream_compute_config()
675 return -EINVAL; in mst_stream_compute_config()
681 drm_WARN(display->drm, intel_dp->force_dsc_bpc, in mst_stream_compute_config()
687 drm_dbg_kms(display->drm, "Trying to find VCPI slots in DSC mode\n"); in mst_stream_compute_config()
696 pipe_config->dp_m_n.tu); in mst_stream_compute_config()
706 pipe_config->limited_color_range = in mst_stream_compute_config()
709 if (display->platform.geminilake || display->platform.broxton) in mst_stream_compute_config()
710 pipe_config->lane_lat_optim_mask = in mst_stream_compute_config()
711 bxt_dpio_phy_calc_lane_lat_optim_mask(pipe_config->lane_count); in mst_stream_compute_config()
719 return intel_dp_tunnel_atomic_compute_stream_bw(state, intel_dp, connector, in mst_stream_compute_config()
725 * all CPU transcoders streaming over the same DP link.
733 struct intel_connector *connector; in intel_dp_mst_transcoder_mask() local
740 for_each_new_intel_connector_in_state(state, connector, conn_state, i) { in intel_dp_mst_transcoder_mask()
744 if (connector->mst.dp != mst_port || !conn_state->base.crtc) in intel_dp_mst_transcoder_mask()
747 crtc = to_intel_crtc(conn_state->base.crtc); in intel_dp_mst_transcoder_mask()
750 if (!crtc_state->hw.active) in intel_dp_mst_transcoder_mask()
753 transcoders |= BIT(crtc_state->cpu_transcoder); in intel_dp_mst_transcoder_mask()
764 struct intel_connector *connector; in get_pipes_downstream_of_mst_port() local
768 for_each_new_intel_connector_in_state(state, connector, conn_state, i) { in get_pipes_downstream_of_mst_port()
769 if (!conn_state->base.crtc) in get_pipes_downstream_of_mst_port()
772 if (&connector->mst.dp->mst.mgr != mst_mgr) in get_pipes_downstream_of_mst_port()
775 if (connector->mst.port != parent_port && in get_pipes_downstream_of_mst_port()
777 connector->mst.port, in get_pipes_downstream_of_mst_port()
781 mask |= BIT(to_intel_crtc(conn_state->base.crtc)->pipe); in get_pipes_downstream_of_mst_port()
799 for_each_intel_crtc_in_pipe_mask(display->drm, crtc, mst_pipe_mask) { in intel_dp_mst_check_fec_change()
803 /* Atomic connector check should've added all the MST CRTCs. */ in intel_dp_mst_check_fec_change()
804 if (drm_WARN_ON(display->drm, !crtc_state)) in intel_dp_mst_check_fec_change()
805 return -EINVAL; in intel_dp_mst_check_fec_change()
807 if (crtc_state->fec_enable) in intel_dp_mst_check_fec_change()
808 fec_pipe_mask |= BIT(crtc->pipe); in intel_dp_mst_check_fec_change()
814 limits->force_fec_pipes |= mst_pipe_mask; in intel_dp_mst_check_fec_change()
819 return ret ? : -EAGAIN; in intel_dp_mst_check_fec_change()
831 ret = drm_dp_mst_atomic_check_mgr(&state->base, mst_mgr, mst_state, &mst_port); in intel_dp_mst_check_bw()
832 if (ret != -ENOSPC) in intel_dp_mst_check_bw()
840 return ret ? : -EAGAIN; in intel_dp_mst_check_bw()
844 * intel_dp_mst_atomic_check_link - check all modeset MST link configuration
854 * - 0 if the configuration is valid
855 * - %-EAGAIN, if the configuration is invalid and @limits got updated
858 * - Other negative error, if the configuration is invalid without a
869 for_each_new_mst_mgr_in_state(&state->base, mgr, mst_state, i) { in intel_dp_mst_atomic_check_link()
887 struct intel_atomic_state *state = to_intel_atomic_state(conn_state->state); in mst_stream_compute_config_late()
891 crtc_state->mst_master_transcoder = in mst_stream_compute_config_late()
892 ffs(intel_dp_mst_transcoder_mask(state, intel_dp)) - 1; in mst_stream_compute_config_late()
911 mst_connector_atomic_topology_check(struct intel_connector *connector, in mst_connector_atomic_topology_check() argument
914 struct intel_display *display = to_intel_display(connector); in mst_connector_atomic_topology_check()
919 if (!intel_connector_needs_modeset(state, &connector->base)) in mst_connector_atomic_topology_check()
922 drm_connector_list_iter_begin(display->drm, &connector_list_iter); in mst_connector_atomic_topology_check()
928 if (connector_iter->mst.dp != connector->mst.dp || in mst_connector_atomic_topology_check()
929 connector_iter == connector) in mst_connector_atomic_topology_check()
939 if (!conn_iter_state->base.crtc) in mst_connector_atomic_topology_check()
942 crtc = to_intel_crtc(conn_iter_state->base.crtc); in mst_connector_atomic_topology_check()
943 crtc_state = intel_atomic_get_crtc_state(&state->base, crtc); in mst_connector_atomic_topology_check()
949 ret = drm_atomic_add_affected_planes(&state->base, &crtc->base); in mst_connector_atomic_topology_check()
952 crtc_state->uapi.mode_changed = true; in mst_connector_atomic_topology_check()
964 struct intel_connector *connector = to_intel_connector(_connector); in mst_connector_atomic_check() local
967 ret = intel_digital_connector_atomic_check(&connector->base, &state->base); in mst_connector_atomic_check()
971 ret = mst_connector_atomic_topology_check(connector, state); in mst_connector_atomic_check()
975 if (intel_connector_needs_modeset(state, &connector->base)) { in mst_connector_atomic_check()
977 connector->mst.dp, in mst_connector_atomic_check()
978 connector); in mst_connector_atomic_check()
983 return drm_dp_atomic_release_time_slots(&state->base, in mst_connector_atomic_check()
984 &connector->mst.dp->mst.mgr, in mst_connector_atomic_check()
985 connector->mst.port); in mst_connector_atomic_check()
996 struct intel_connector *connector = in mst_stream_disable() local
997 to_intel_connector(old_conn_state->connector); in mst_stream_disable()
998 enum transcoder trans = old_crtc_state->cpu_transcoder; in mst_stream_disable()
1000 drm_dbg_kms(display->drm, "active links %d\n", in mst_stream_disable()
1001 intel_dp->mst.active_links); in mst_stream_disable()
1003 if (intel_dp->mst.active_links == 1) in mst_stream_disable()
1004 intel_dp->link_trained = false; in mst_stream_disable()
1006 intel_hdcp_disable(intel_mst->connector); in mst_stream_disable()
1008 intel_dp_sink_disable_decompression(state, connector, old_crtc_state); in mst_stream_disable()
1023 struct intel_connector *connector = in mst_stream_post_disable() local
1024 to_intel_connector(old_conn_state->connector); in mst_stream_post_disable()
1026 drm_atomic_get_old_mst_topology_state(&state->base, &intel_dp->mst.mgr); in mst_stream_post_disable()
1028 drm_atomic_get_new_mst_topology_state(&state->base, &intel_dp->mst.mgr); in mst_stream_post_disable()
1030 drm_atomic_get_mst_payload_state(old_mst_state, connector->mst.port); in mst_stream_post_disable()
1032 drm_atomic_get_mst_payload_state(new_mst_state, connector->mst.port); in mst_stream_post_disable()
1037 intel_dp->mst.active_links--; in mst_stream_post_disable()
1038 last_mst_stream = intel_dp->mst.active_links == 0; in mst_stream_post_disable()
1039 drm_WARN_ON(display->drm, DISPLAY_VER(display) >= 12 && last_mst_stream && in mst_stream_post_disable()
1051 drm_dp_remove_payload_part1(&intel_dp->mst.mgr, new_mst_state, new_payload); in mst_stream_post_disable()
1056 TRANS_DDI_FUNC_CTL(display, old_crtc_state->cpu_transcoder), in mst_stream_post_disable()
1060 drm_dp_check_act_status(&intel_dp->mst.mgr); in mst_stream_post_disable()
1062 drm_dp_remove_payload_part2(&intel_dp->mst.mgr, new_mst_state, in mst_stream_post_disable()
1083 drm_dp_send_power_updown_phy(&intel_dp->mst.mgr, connector->mst.port, in mst_stream_post_disable()
1092 * From TGL spec: "If multi-stream slave transcoder: Configure in mst_stream_post_disable()
1102 intel_mst->connector = NULL; in mst_stream_post_disable()
1104 primary_encoder->post_disable(state, primary_encoder, in mst_stream_post_disable()
1107 drm_dbg_kms(display->drm, "active links %d\n", in mst_stream_post_disable()
1108 intel_dp->mst.active_links); in mst_stream_post_disable()
1119 if (intel_dp->mst.active_links == 0 && in mst_stream_post_pll_disable()
1120 primary_encoder->post_pll_disable) in mst_stream_post_pll_disable()
1121 primary_encoder->post_pll_disable(state, primary_encoder, old_crtc_state, old_conn_state); in mst_stream_post_pll_disable()
1132 if (intel_dp->mst.active_links == 0) in mst_stream_pre_pll_enable()
1133 primary_encoder->pre_pll_enable(state, primary_encoder, in mst_stream_pre_pll_enable()
1141 to_intel_crtc(pipe_config->uapi.crtc)); in mst_stream_pre_pll_enable()
1147 return intel_dp->link.mst_probed_rate == link_rate && in intel_mst_probed_link_params_valid()
1148 intel_dp->link.mst_probed_lane_count == lane_count; in intel_mst_probed_link_params_valid()
1154 intel_dp->link.mst_probed_rate = link_rate; in intel_mst_set_probed_link_params()
1155 intel_dp->link.mst_probed_lane_count = lane_count; in intel_mst_set_probed_link_params()
1162 crtc_state->port_clock, crtc_state->lane_count)) in intel_mst_reprobe_topology()
1165 drm_dp_mst_topology_queue_probe(&intel_dp->mst.mgr); in intel_mst_reprobe_topology()
1168 crtc_state->port_clock, crtc_state->lane_count); in intel_mst_reprobe_topology()
1180 struct intel_connector *connector = in mst_stream_pre_enable() local
1181 to_intel_connector(conn_state->connector); in mst_stream_pre_enable()
1183 drm_atomic_get_new_mst_topology_state(&state->base, &intel_dp->mst.mgr); in mst_stream_pre_enable()
1187 /* MST encoders are bound to a crtc, not to a connector, in mst_stream_pre_enable()
1190 connector->encoder = encoder; in mst_stream_pre_enable()
1191 intel_mst->connector = connector; in mst_stream_pre_enable()
1192 first_mst_stream = intel_dp->mst.active_links == 0; in mst_stream_pre_enable()
1193 drm_WARN_ON(display->drm, DISPLAY_VER(display) >= 12 && first_mst_stream && in mst_stream_pre_enable()
1196 drm_dbg_kms(display->drm, "active links %d\n", in mst_stream_pre_enable()
1197 intel_dp->mst.active_links); in mst_stream_pre_enable()
1202 drm_dp_send_power_updown_phy(&intel_dp->mst.mgr, connector->mst.port, true); in mst_stream_pre_enable()
1204 intel_dp_sink_enable_decompression(state, connector, pipe_config); in mst_stream_pre_enable()
1207 primary_encoder->pre_enable(state, primary_encoder, in mst_stream_pre_enable()
1213 intel_dp->mst.active_links++; in mst_stream_pre_enable()
1215 ret = drm_dp_add_payload_part1(&intel_dp->mst.mgr, mst_state, in mst_stream_pre_enable()
1216 drm_atomic_get_mst_payload_state(mst_state, connector->mst.port)); in mst_stream_pre_enable()
1222 * primary_encoder->pre_enable() and should be done here. For in mst_stream_pre_enable()
1243 if (!display->platform.alderlake_p) in enable_bs_jitter_was()
1250 if (crtc_state->fec_enable || intel_dp_is_uhbr(crtc_state)) in enable_bs_jitter_was()
1251 set |= DP_MST_FEC_BS_JITTER_WA(crtc_state->cpu_transcoder); in enable_bs_jitter_was()
1256 set |= DP_MST_SHORT_HBLANK_WA(crtc_state->cpu_transcoder); in enable_bs_jitter_was()
1257 else if (crtc_state->fec_enable) in enable_bs_jitter_was()
1258 clear |= DP_MST_SHORT_HBLANK_WA(crtc_state->cpu_transcoder); in enable_bs_jitter_was()
1260 if (crtc_state->fec_enable || intel_dp_is_uhbr(crtc_state)) in enable_bs_jitter_was()
1261 set |= DP_MST_DPT_DPTP_ALIGN_WA(crtc_state->cpu_transcoder); in enable_bs_jitter_was()
1278 struct intel_connector *connector = to_intel_connector(conn_state->connector); in mst_stream_enable() local
1280 drm_atomic_get_new_mst_topology_state(&state->base, &intel_dp->mst.mgr); in mst_stream_enable()
1281 enum transcoder trans = pipe_config->cpu_transcoder; in mst_stream_enable()
1282 bool first_mst_stream = intel_dp->mst.active_links == 1; in mst_stream_enable()
1286 drm_WARN_ON(display->drm, pipe_config->has_pch_encoder); in mst_stream_enable()
1290 &pipe_config->hw.adjusted_mode; in mst_stream_enable()
1291 u64 crtc_clock_hz = KHz(adjusted_mode->crtc_clock); in mst_stream_enable()
1293 intel_de_write(display, TRANS_DP2_VFREQHIGH(pipe_config->cpu_transcoder), in mst_stream_enable()
1295 intel_de_write(display, TRANS_DP2_VFREQLOW(pipe_config->cpu_transcoder), in mst_stream_enable()
1304 min_hblank = pipe_config->min_hblank - 2; in mst_stream_enable()
1331 drm_dbg_kms(display->drm, "active links %d\n", in mst_stream_enable()
1332 intel_dp->mst.active_links); in mst_stream_enable()
1335 drm_dp_check_act_status(&intel_dp->mst.mgr); in mst_stream_enable()
1340 ret = drm_dp_add_payload_part2(&intel_dp->mst.mgr, in mst_stream_enable()
1342 connector->mst.port)); in mst_stream_enable()
1349 pipe_config->fec_enable ? FECSTALL_DIS_DPTSTREAM_DPTTG : 0); in mst_stream_enable()
1369 *pipe = intel_mst->pipe; in mst_stream_get_hw_state()
1370 if (intel_mst->connector) in mst_stream_get_hw_state()
1380 primary_encoder->get_config(primary_encoder, pipe_config); in mst_stream_get_config()
1393 struct intel_connector *connector = to_intel_connector(_connector); in mst_connector_get_ddc_modes() local
1394 struct intel_display *display = to_intel_display(connector); in mst_connector_get_ddc_modes()
1395 struct intel_dp *intel_dp = connector->mst.dp; in mst_connector_get_ddc_modes()
1399 if (drm_connector_is_unregistered(&connector->base)) in mst_connector_get_ddc_modes()
1400 return intel_connector_update_modes(&connector->base, NULL); in mst_connector_get_ddc_modes()
1403 return drm_edid_connector_add_modes(&connector->base); in mst_connector_get_ddc_modes()
1405 drm_edid = drm_dp_mst_edid_read(&connector->base, &intel_dp->mst.mgr, connector->mst.port); in mst_connector_get_ddc_modes()
1407 ret = intel_connector_update_modes(&connector->base, drm_edid); in mst_connector_get_ddc_modes()
1417 struct intel_connector *connector = to_intel_connector(_connector); in mst_connector_late_register() local
1420 ret = drm_dp_mst_connector_late_register(&connector->base, connector->mst.port); in mst_connector_late_register()
1424 ret = intel_connector_register(&connector->base); in mst_connector_late_register()
1426 drm_dp_mst_connector_early_unregister(&connector->base, connector->mst.port); in mst_connector_late_register()
1434 struct intel_connector *connector = to_intel_connector(_connector); in mst_connector_early_unregister() local
1436 intel_connector_unregister(&connector->base); in mst_connector_early_unregister()
1437 drm_dp_mst_connector_early_unregister(&connector->base, connector->mst.port); in mst_connector_early_unregister()
1453 struct intel_connector *connector = to_intel_connector(_connector); in mst_connector_get_modes() local
1455 return mst_connector_get_ddc_modes(&connector->base); in mst_connector_get_modes()
1464 struct intel_connector *connector = to_intel_connector(_connector); in mst_connector_mode_valid_ctx() local
1465 struct intel_display *display = to_intel_display(connector); in mst_connector_mode_valid_ctx()
1466 struct intel_dp *intel_dp = connector->mst.dp; in mst_connector_mode_valid_ctx()
1467 struct drm_dp_mst_topology_mgr *mgr = &intel_dp->mst.mgr; in mst_connector_mode_valid_ctx()
1468 struct drm_dp_mst_port *port = connector->mst.port; in mst_connector_mode_valid_ctx()
1470 int max_dotclk = display->cdclk.max_dotclk_freq; in mst_connector_mode_valid_ctx()
1476 int target_clock = mode->clock; in mst_connector_mode_valid_ctx()
1479 if (drm_connector_is_unregistered(&connector->base)) { in mst_connector_mode_valid_ctx()
1488 if (mode->flags & DRM_MODE_FLAG_DBLCLK) { in mst_connector_mode_valid_ctx()
1493 if (mode->clock < 10000) { in mst_connector_mode_valid_ctx()
1503 mode_rate = intel_dp_link_required(mode->clock, min_bpp); in mst_connector_mode_valid_ctx()
1507 * - Also check if compression would allow for the mode in mst_connector_mode_valid_ctx()
1508 * - Calculate the overhead using drm_dp_bw_overhead() / in mst_connector_mode_valid_ctx()
1512 * - Check here and during compute config the BW reported by in mst_connector_mode_valid_ctx()
1517 num_joined_pipes = intel_dp_num_joined_pipes(intel_dp, connector, in mst_connector_mode_valid_ctx()
1518 mode->hdisplay, target_clock); in mst_connector_mode_valid_ctx()
1521 ret = drm_modeset_lock(&mgr->base.lock, ctx); in mst_connector_mode_valid_ctx()
1525 if (mode_rate > max_rate || mode->clock > max_dotclk || in mst_connector_mode_valid_ctx()
1526 drm_dp_calc_pbn_mode(mode->clock, min_bpp << 4) > port->full_pbn) { in mst_connector_mode_valid_ctx()
1531 if (intel_dp_has_dsc(connector)) { in mst_connector_mode_valid_ctx()
1533 * TBD pass the connector BPC, in mst_connector_mode_valid_ctx()
1536 int pipe_bpp = intel_dp_dsc_compute_max_bpp(connector, U8_MAX); in mst_connector_mode_valid_ctx()
1538 if (drm_dp_sink_supports_fec(connector->dp.fec_capability)) { in mst_connector_mode_valid_ctx()
1544 mode->hdisplay, in mst_connector_mode_valid_ctx()
1549 intel_dp_dsc_get_slice_count(connector, in mst_connector_mode_valid_ctx()
1551 mode->hdisplay, in mst_connector_mode_valid_ctx()
1576 struct intel_connector *connector = to_intel_connector(_connector); in mst_connector_atomic_best_encoder() local
1578 drm_atomic_get_new_connector_state(state, &connector->base); in mst_connector_atomic_best_encoder()
1579 struct intel_dp *intel_dp = connector->mst.dp; in mst_connector_atomic_best_encoder()
1580 struct intel_crtc *crtc = to_intel_crtc(connector_state->crtc); in mst_connector_atomic_best_encoder()
1582 return &intel_dp->mst.stream_encoders[crtc->pipe]->base.base; in mst_connector_atomic_best_encoder()
1589 struct intel_connector *connector = to_intel_connector(_connector); in mst_connector_detect_ctx() local
1590 struct intel_display *display = to_intel_display(connector); in mst_connector_detect_ctx()
1591 struct intel_dp *intel_dp = connector->mst.dp; in mst_connector_detect_ctx()
1596 if (drm_connector_is_unregistered(&connector->base)) in mst_connector_detect_ctx()
1600 return connector->base.status; in mst_connector_detect_ctx()
1602 intel_dp_flush_connector_commits(connector); in mst_connector_detect_ctx()
1604 return drm_dp_mst_detect_port(&connector->base, ctx, &intel_dp->mst.mgr, in mst_connector_detect_ctx()
1605 connector->mst.port); in mst_connector_detect_ctx()
1628 static bool mst_connector_get_hw_state(struct intel_connector *connector) in mst_connector_get_hw_state() argument
1630 /* This is the MST stream encoder set in ->pre_enable, if any */ in mst_connector_get_hw_state()
1631 struct intel_encoder *encoder = intel_attached_encoder(connector); in mst_connector_get_hw_state()
1634 if (!encoder || !connector->base.state->crtc) in mst_connector_get_hw_state()
1637 return encoder->get_hw_state(encoder, &pipe); in mst_connector_get_hw_state()
1645 struct intel_connector *connector = to_intel_connector(_connector); in mst_topology_add_connector_properties() local
1647 drm_object_attach_property(&connector->base.base, in mst_topology_add_connector_properties()
1648 display->drm->mode_config.path_property, 0); in mst_topology_add_connector_properties()
1649 drm_object_attach_property(&connector->base.base, in mst_topology_add_connector_properties()
1650 display->drm->mode_config.tile_property, 0); in mst_topology_add_connector_properties()
1652 intel_attach_force_audio_property(&connector->base); in mst_topology_add_connector_properties()
1653 intel_attach_broadcast_rgb_property(&connector->base); in mst_topology_add_connector_properties()
1656 * Reuse the prop from the SST connector because we're in mst_topology_add_connector_properties()
1659 connector->base.max_bpc_property = in mst_topology_add_connector_properties()
1660 intel_dp->attached_connector->base.max_bpc_property; in mst_topology_add_connector_properties()
1661 if (connector->base.max_bpc_property) in mst_topology_add_connector_properties()
1662 drm_connector_attach_max_bpc_property(&connector->base, 6, 12); in mst_topology_add_connector_properties()
1664 return drm_connector_set_path_property(&connector->base, pathprop); in mst_topology_add_connector_properties()
1669 struct intel_connector *connector) in intel_dp_mst_read_decompression_port_dsc_caps() argument
1673 if (!connector->dp.dsc_decompression_aux) in intel_dp_mst_read_decompression_port_dsc_caps()
1676 if (drm_dp_read_dpcd_caps(connector->dp.dsc_decompression_aux, dpcd_caps) < 0) in intel_dp_mst_read_decompression_port_dsc_caps()
1679 intel_dp_get_dsc_sink_cap(dpcd_caps[DP_DPCD_REV], connector); in intel_dp_mst_read_decompression_port_dsc_caps()
1682 static bool detect_dsc_hblank_expansion_quirk(const struct intel_connector *connector) in detect_dsc_hblank_expansion_quirk() argument
1684 struct intel_display *display = to_intel_display(connector); in detect_dsc_hblank_expansion_quirk()
1685 struct drm_dp_aux *aux = connector->dp.dsc_decompression_aux; in detect_dsc_hblank_expansion_quirk()
1696 if (drm_dp_mst_port_is_logical(connector->mst.port)) { in detect_dsc_hblank_expansion_quirk()
1697 aux = drm_dp_mst_aux_for_parent(connector->mst.port); in detect_dsc_hblank_expansion_quirk()
1699 aux = &connector->mst.dp->aux; in detect_dsc_hblank_expansion_quirk()
1722 drm_dbg_kms(display->drm, in detect_dsc_hblank_expansion_quirk()
1723 "[CONNECTOR:%d:%s] DSC HBLANK expansion quirk detected\n", in detect_dsc_hblank_expansion_quirk()
1724 connector->base.base.id, connector->base.name); in detect_dsc_hblank_expansion_quirk()
1737 struct intel_connector *connector; in mst_topology_add_connector() local
1741 connector = intel_connector_alloc(); in mst_topology_add_connector()
1742 if (!connector) in mst_topology_add_connector()
1745 connector->get_hw_state = mst_connector_get_hw_state; in mst_topology_add_connector()
1746 connector->sync_state = intel_dp_connector_sync_state; in mst_topology_add_connector()
1747 connector->mst.dp = intel_dp; in mst_topology_add_connector()
1748 connector->mst.port = port; in mst_topology_add_connector()
1751 ret = drm_connector_dynamic_init(display->drm, &connector->base, &mst_connector_funcs, in mst_topology_add_connector()
1756 connector->dp.dsc_decompression_aux = drm_dp_mst_dsc_aux_for_port(port); in mst_topology_add_connector()
1757 intel_dp_mst_read_decompression_port_dsc_caps(intel_dp, connector); in mst_topology_add_connector()
1758 connector->dp.dsc_hblank_expansion_quirk = in mst_topology_add_connector()
1759 detect_dsc_hblank_expansion_quirk(connector); in mst_topology_add_connector()
1761 drm_connector_helper_add(&connector->base, &mst_connector_helper_funcs); in mst_topology_add_connector()
1765 &intel_dp->mst.stream_encoders[pipe]->base.base; in mst_topology_add_connector()
1767 ret = drm_connector_attach_encoder(&connector->base, enc); in mst_topology_add_connector()
1772 ret = mst_topology_add_connector_properties(intel_dp, &connector->base, pathprop); in mst_topology_add_connector()
1776 ret = intel_dp_hdcp_init(dig_port, connector); in mst_topology_add_connector()
1778 drm_dbg_kms(display->drm, "[%s:%d] HDCP MST init failed, skipping.\n", in mst_topology_add_connector()
1779 connector->base.name, connector->base.base.id); in mst_topology_add_connector()
1781 return &connector->base; in mst_topology_add_connector()
1784 drm_connector_cleanup(&connector->base); in mst_topology_add_connector()
1787 intel_connector_free(connector); in mst_topology_add_connector()
1810 struct intel_encoder *primary_encoder = &dig_port->base; in mst_stream_encoder_create()
1819 intel_mst->pipe = pipe; in mst_stream_encoder_create()
1820 encoder = &intel_mst->base; in mst_stream_encoder_create()
1821 intel_mst->primary = dig_port; in mst_stream_encoder_create()
1823 drm_encoder_init(display->drm, &encoder->base, &mst_stream_encoder_funcs, in mst_stream_encoder_create()
1824 DRM_MODE_ENCODER_DPMST, "DP-MST %c", pipe_name(pipe)); in mst_stream_encoder_create()
1826 encoder->type = INTEL_OUTPUT_DP_MST; in mst_stream_encoder_create()
1827 encoder->power_domain = primary_encoder->power_domain; in mst_stream_encoder_create()
1828 encoder->port = primary_encoder->port; in mst_stream_encoder_create()
1829 encoder->cloneable = 0; in mst_stream_encoder_create()
1832 * of possible_crtcs of all the encoders of a given connector in mst_stream_encoder_create()
1833 * to figure out which crtcs can drive said connector. What in mst_stream_encoder_create()
1838 encoder->pipe_mask = ~0; in mst_stream_encoder_create()
1840 encoder->compute_config = mst_stream_compute_config; in mst_stream_encoder_create()
1841 encoder->compute_config_late = mst_stream_compute_config_late; in mst_stream_encoder_create()
1842 encoder->disable = mst_stream_disable; in mst_stream_encoder_create()
1843 encoder->post_disable = mst_stream_post_disable; in mst_stream_encoder_create()
1844 encoder->post_pll_disable = mst_stream_post_pll_disable; in mst_stream_encoder_create()
1845 encoder->update_pipe = intel_ddi_update_pipe; in mst_stream_encoder_create()
1846 encoder->pre_pll_enable = mst_stream_pre_pll_enable; in mst_stream_encoder_create()
1847 encoder->pre_enable = mst_stream_pre_enable; in mst_stream_encoder_create()
1848 encoder->enable = mst_stream_enable; in mst_stream_encoder_create()
1849 encoder->audio_enable = intel_audio_codec_enable; in mst_stream_encoder_create()
1850 encoder->audio_disable = intel_audio_codec_disable; in mst_stream_encoder_create()
1851 encoder->get_hw_state = mst_stream_get_hw_state; in mst_stream_encoder_create()
1852 encoder->get_config = mst_stream_get_config; in mst_stream_encoder_create()
1853 encoder->initial_fastset_check = mst_stream_initial_fastset_check; in mst_stream_encoder_create()
1864 struct intel_dp *intel_dp = &dig_port->dp; in mst_stream_encoders_create()
1868 intel_dp->mst.stream_encoders[pipe] = mst_stream_encoder_create(dig_port, pipe); in mst_stream_encoders_create()
1875 return dig_port->dp.mst.active_links; in intel_dp_mst_encoder_active_links()
1882 struct intel_dp *intel_dp = &dig_port->dp; in intel_dp_mst_encoder_init()
1883 enum port port = dig_port->base.port; in intel_dp_mst_encoder_init()
1895 intel_dp->mst.mgr.cbs = &mst_topology_cbs; in intel_dp_mst_encoder_init()
1899 ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst.mgr, display->drm, in intel_dp_mst_encoder_init()
1900 &intel_dp->aux, 16, in intel_dp_mst_encoder_init()
1903 intel_dp->mst.mgr.cbs = NULL; in intel_dp_mst_encoder_init()
1912 return intel_dp->mst.mgr.cbs; in intel_dp_mst_source_support()
1918 struct intel_dp *intel_dp = &dig_port->dp; in intel_dp_mst_encoder_cleanup()
1923 drm_dp_mst_topology_mgr_destroy(&intel_dp->mst.mgr); in intel_dp_mst_encoder_cleanup()
1926 intel_dp->mst.mgr.cbs = NULL; in intel_dp_mst_encoder_cleanup()
1931 return crtc_state->mst_master_transcoder == crtc_state->cpu_transcoder; in intel_dp_mst_is_master_trans()
1936 return crtc_state->mst_master_transcoder != INVALID_TRANSCODER && in intel_dp_mst_is_slave_trans()
1937 crtc_state->mst_master_transcoder != crtc_state->cpu_transcoder; in intel_dp_mst_is_slave_trans()
1941 * intel_dp_mst_add_topology_state_for_connector - add MST topology state for a connector
1943 * @connector: connector to add the state for
1944 * @crtc: the CRTC @connector is attached to
1946 * Add the MST topology state for @connector to @state.
1952 struct intel_connector *connector, in intel_dp_mst_add_topology_state_for_connector() argument
1957 if (!connector->mst.dp) in intel_dp_mst_add_topology_state_for_connector()
1960 mst_state = drm_atomic_get_mst_topology_state(&state->base, in intel_dp_mst_add_topology_state_for_connector()
1961 &connector->mst.dp->mst.mgr); in intel_dp_mst_add_topology_state_for_connector()
1965 mst_state->pending_crtc_mask |= drm_crtc_mask(&crtc->base); in intel_dp_mst_add_topology_state_for_connector()
1971 * intel_dp_mst_add_topology_state_for_crtc - add MST topology state for a CRTC
1986 for_each_new_connector_in_state(&state->base, _connector, conn_state, i) { in intel_dp_mst_add_topology_state_for_crtc()
1987 struct intel_connector *connector = to_intel_connector(_connector); in intel_dp_mst_add_topology_state_for_crtc() local
1990 if (conn_state->crtc != &crtc->base) in intel_dp_mst_add_topology_state_for_crtc()
1993 ret = intel_dp_mst_add_topology_state_for_connector(state, connector, crtc); in intel_dp_mst_add_topology_state_for_crtc()
2010 for_each_oldnew_connector_in_state(&state->base, _connector, in get_connector_in_state_for_crtc()
2012 struct intel_connector *connector = in get_connector_in_state_for_crtc() local
2015 if (old_conn_state->crtc == &crtc->base || in get_connector_in_state_for_crtc()
2016 new_conn_state->crtc == &crtc->base) in get_connector_in_state_for_crtc()
2017 return connector; in get_connector_in_state_for_crtc()
2024 * intel_dp_mst_crtc_needs_modeset - check if changes in topology need to modeset the given CRTC
2052 for_each_new_connector_in_state(&state->base, _connector, conn_state, i) { in intel_dp_mst_crtc_needs_modeset()
2053 const struct intel_connector *connector = in intel_dp_mst_crtc_needs_modeset() local
2059 if (connector->mst.dp != crtc_connector->mst.dp || in intel_dp_mst_crtc_needs_modeset()
2060 !conn_state->crtc) in intel_dp_mst_crtc_needs_modeset()
2063 crtc_iter = to_intel_crtc(conn_state->crtc); in intel_dp_mst_crtc_needs_modeset()
2071 if (old_crtc_state->dsc.compression_enable == in intel_dp_mst_crtc_needs_modeset()
2072 new_crtc_state->dsc.compression_enable) in intel_dp_mst_crtc_needs_modeset()
2081 if (connector->dp.dsc_decompression_aux == in intel_dp_mst_crtc_needs_modeset()
2082 &connector->mst.dp->aux) in intel_dp_mst_crtc_needs_modeset()
2090 * intel_dp_mst_prepare_probe - Prepare an MST link for topology probing
2091 * @intel_dp: DP port object
2104 if (intel_dp->link_trained) in intel_dp_mst_prepare_probe()
2114 drm_dp_enhanced_frame_cap(intel_dp->dpcd)); in intel_dp_mst_prepare_probe()
2120 * intel_dp_mst_verify_dpcd_state - verify the MST SW enabled state wrt. the DPCD
2121 * @intel_dp: DP port object
2124 * state. A long HPD pulse - not long enough to be detected as a disconnected
2125 * state - could've reset the DPCD state, which requires tearing
2134 struct intel_connector *connector = intel_dp->attached_connector; in intel_dp_mst_verify_dpcd_state() local
2136 struct intel_encoder *encoder = &dig_port->base; in intel_dp_mst_verify_dpcd_state()
2140 if (!intel_dp->is_mst) in intel_dp_mst_verify_dpcd_state()
2143 ret = drm_dp_dpcd_readb(intel_dp->mst.mgr.aux, DP_MSTM_CTRL, &val); in intel_dp_mst_verify_dpcd_state()
2147 drm_dbg_kms(display->drm, in intel_dp_mst_verify_dpcd_state()
2148 … "[CONNECTOR:%d:%s][ENCODER:%d:%s] MST mode got reset, removing topology (ret=%d, ctrl=0x%02x)\n", in intel_dp_mst_verify_dpcd_state()
2149 connector->base.base.id, connector->base.name, in intel_dp_mst_verify_dpcd_state()
2150 encoder->base.base.id, encoder->base.name, in intel_dp_mst_verify_dpcd_state()