Lines Matching full:well
236 * threads can't disable the power well while the caller tries to read a few
286 * This function set the "DC off" power well target_dc_state,
287 * based upon this target_dc_stste, "DC off" power well will
310 * If DC off power well is disabled, need to enable and disable the in intel_display_power_set_target_dc_state()
311 * DC off power well to effect target DC state. in intel_display_power_set_target_dc_state()
1145 * expect us to program the abox_ctl0 register as well, even though in icl_mbus_init()
1186 "Display power well on\n"); in assert_can_disable_lcpll()
1358 * well is disabled and most interrupts are disabled, and these are also
1428 struct i915_power_well *well; in skl_display_core_init() local
1441 well = lookup_power_well(display, SKL_DISP_PW_1); in skl_display_core_init()
1442 intel_power_well_enable(display, well); in skl_display_core_init()
1444 well = lookup_power_well(display, SKL_DISP_PW_MISC_IO); in skl_display_core_init()
1445 intel_power_well_enable(display, well); in skl_display_core_init()
1460 struct i915_power_well *well; in skl_display_core_uninit() local
1478 * BSpec says to keep the MISC IO power well enabled here, only in skl_display_core_uninit()
1479 * remove our request for power well 1. in skl_display_core_uninit()
1480 * Note that even though the driver's request is removed power well 1 in skl_display_core_uninit()
1483 well = lookup_power_well(display, SKL_DISP_PW_1); in skl_display_core_uninit()
1484 intel_power_well_disable(display, well); in skl_display_core_uninit()
1494 struct i915_power_well *well; in bxt_display_core_init() local
1512 well = lookup_power_well(display, SKL_DISP_PW_1); in bxt_display_core_init()
1513 intel_power_well_enable(display, well); in bxt_display_core_init()
1528 struct i915_power_well *well; in bxt_display_core_uninit() local
1544 * Note that even though the driver's request is removed power well 1 in bxt_display_core_uninit()
1549 well = lookup_power_well(display, SKL_DISP_PW_1); in bxt_display_core_uninit()
1550 intel_power_well_disable(display, well); in bxt_display_core_uninit()
1637 struct i915_power_well *well; in icl_display_core_init() local
1657 * 3. Enable Power Well 1 (PG1). in icl_display_core_init()
1661 well = lookup_power_well(display, SKL_DISP_PW_1); in icl_display_core_init()
1662 intel_power_well_enable(display, well); in icl_display_core_init()
1718 struct i915_power_well *well; in icl_display_core_uninit() local
1739 * 4. Disable Power Well 1 (PG1). in icl_display_core_uninit()
1744 well = lookup_power_well(display, SKL_DISP_PW_1); in icl_display_core_uninit()
1745 intel_power_well_disable(display, well); in icl_display_core_uninit()
1763 * power well state and lane status to reconstruct the in chv_phy_control_init()
1910 * power well must match its HW enabled state, see
1986 /* Remove the refcount we took to keep power well support disabled. */ in intel_power_domains_driver_remove()
1995 /* Keep the power well enabled, but cancel its rpm wakeref. */ in intel_power_domains_driver_remove()
2005 * without a user for it (any user for a power well has taken a reference
2022 "BIOS left unused %s power well enabled, disabling it\n", in intel_power_domains_sanitize_state()
2103 * Even if power well support was disabled we still want to disable in intel_power_domains_suspend()
2173 * Verify if the reference count of each power well matches its HW enabled
2200 "power well %s state mismatch (refcount %d/enabled %d)", in intel_power_domains_verify_state()
2210 "power well %s refcount/domain refcount mismatch " in intel_power_domains_verify_state()
2323 seq_printf(m, "%-25s %s\n", "Power well/domain", "Use count"); in intel_display_power_debug()