Lines Matching full:i915

18 void valleyview_enable_display_irqs(struct drm_i915_private *i915);
19 void valleyview_disable_display_irqs(struct drm_i915_private *i915);
21 void ilk_update_display_irq(struct drm_i915_private *i915,
23 void ilk_enable_display_irq(struct drm_i915_private *i915, u32 bits);
24 void ilk_disable_display_irq(struct drm_i915_private *i915, u32 bits);
26 void bdw_update_port_irq(struct drm_i915_private *i915, u32 interrupt_mask, u32 enabled_irq_mask);
27 void bdw_enable_pipe_irq(struct drm_i915_private *i915, enum pipe pipe, u32 bits);
28 void bdw_disable_pipe_irq(struct drm_i915_private *i915, enum pipe pipe, u32 bits);
30 void ibx_display_interrupt_update(struct drm_i915_private *i915,
32 void ibx_enable_display_interrupt(struct drm_i915_private *i915, u32 bits);
33 void ibx_disable_display_interrupt(struct drm_i915_private *i915, u32 bits);
35 void gen8_irq_power_well_post_enable(struct drm_i915_private *i915, u8 pipe_mask);
36 void gen8_irq_power_well_pre_disable(struct drm_i915_private *i915, u8 pipe_mask);
49 void ivb_display_irq_handler(struct drm_i915_private *i915, u32 de_iir);
50 void ilk_display_irq_handler(struct drm_i915_private *i915, u32 de_iir);
51 void gen8_de_irq_handler(struct drm_i915_private *i915, u32 master_ctl);
52 void gen11_display_irq_handler(struct drm_i915_private *i915);
54 u32 gen11_gu_misc_irq_ack(struct drm_i915_private *i915, const u32 master_ctl);
55 void gen11_gu_misc_irq_handler(struct drm_i915_private *i915, const u32 iir);
57 void i9xx_display_irq_reset(struct drm_i915_private *i915);
58 void vlv_display_irq_reset(struct drm_i915_private *i915);
59 void gen8_display_irq_reset(struct drm_i915_private *i915);
60 void gen11_display_irq_reset(struct drm_i915_private *i915);
62 void vlv_display_irq_postinstall(struct drm_i915_private *i915);
63 void ilk_de_irq_postinstall(struct drm_i915_private *i915);
64 void gen8_de_irq_postinstall(struct drm_i915_private *i915);
65 void gen11_de_irq_postinstall(struct drm_i915_private *i915);
66 void dg1_de_irq_postinstall(struct drm_i915_private *i915);
69 void i915_enable_pipestat(struct drm_i915_private *i915, enum pipe pipe, u32 status_mask);
70 void i915_disable_pipestat(struct drm_i915_private *i915, enum pipe pipe, u32 status_mask);
71 void i915_enable_asle_pipestat(struct drm_i915_private *i915);
73 void i9xx_pipestat_irq_ack(struct drm_i915_private *i915, u32 iir, u32 pipe_stats[I915_MAX_PIPES]);
75 void i915_pipestat_irq_handler(struct drm_i915_private *i915, u32 iir, u32 pipe_stats[I915_MAX_PIPE…
76 void i965_pipestat_irq_handler(struct drm_i915_private *i915, u32 iir, u32 pipe_stats[I915_MAX_PIPE…
77 void valleyview_pipestat_irq_handler(struct drm_i915_private *i915, u32 pipe_stats[I915_MAX_PIPES]);
82 void intel_display_irq_init(struct drm_i915_private *i915);
84 void i915gm_irq_cstate_wa(struct drm_i915_private *i915, bool enable);