1 // SPDX-License-Identifier: MIT
18 	for ((__phy) = I915_MAX_PHYS; (__phy)-- > PHY_A;) \
34 		.name = "0.85V dot0 (low-voltage)",
86 		     (0xff << 16) | 0xff, procmon->dw1);  in icl_set_procmon_ref_values()
88 	intel_de_write(display, ICL_PORT_COMP_DW9(phy), procmon->dw9);  in icl_set_procmon_ref_values()
89 	intel_de_write(display, ICL_PORT_COMP_DW10(phy), procmon->dw10);  in icl_set_procmon_ref_values()
99 		drm_dbg_kms(display->drm,  in check_phy_reg()
119 			    (0xff << 16) | 0xff, procmon->dw1);  in icl_verify_procmon_ref_values()
121 			     -1U, procmon->dw9);  in icl_verify_procmon_ref_values()
123 			     -1U, procmon->dw10);  in icl_verify_procmon_ref_values()
131 	 * Some platforms only expect PHY_MISC to be programmed for PHY-A and  in has_phy_misc()
132 	 * PHY-B and may not even have instances of the register for the  in has_phy_misc()
135 	 * ADL-S technically has three instances of PHY_MISC, but only requires  in has_phy_misc()
139 	if (display->platform.alderlake_s)  in has_phy_misc()
141 	else if ((display->platform.jasperlake || display->platform.elkhartlake) ||  in has_phy_misc()
142 		 display->platform.rocketlake ||  in has_phy_misc()
143 		 display->platform.dg1)  in has_phy_misc()
171 	 * nothing on PORT_A and no DSI.  in ehl_vbt_ddi_d_present()
178 	 * DDI-D _and_ an internal display on DDI-A/DSI leave an error message  in ehl_vbt_ddi_d_present()
182 		drm_err(display->drm,  in ehl_vbt_ddi_d_present()
195 	 *   A(master) -> B(slave), C(slave)  in phy_is_master()
197 	 *   A(master) -> B(slave)  in phy_is_master()
198 	 *   C(master) -> D(slave)  in phy_is_master()
199 	 * ADL-S:  in phy_is_master()
200 	 *   A(master) -> B(slave), C(slave)  in phy_is_master()
201 	 *   D(master) -> E(slave)  in phy_is_master()
203 	 * We must set the IREFGEN bit for any PHY acting as a master  in phy_is_master()
208 	else if (display->platform.alderlake_s)  in phy_is_master()
210 	else if (display->platform.dg1 || display->platform.rocketlake)  in phy_is_master()
242 		if (display->platform.jasperlake || display->platform.elkhartlake) {  in icl_combo_phy_verify_state()
265 		drm_WARN_ON(display->drm, lane_reversal);  in intel_combo_phy_power_up_lanes()
320 		drm_dbg_kms(display->drm,  in icl_combo_phys_init()
322 			    phy_name(phy), procmon->name);  in icl_combo_phys_init()
329 		 * display (via DDI-D) or an internal display (via DDI-A or  in icl_combo_phys_init()
330 		 * the DSI DPHY).  This is a motherboard design decision that  in icl_combo_phys_init()
336 		if ((display->platform.jasperlake || display->platform.elkhartlake) &&  in icl_combo_phys_init()
380 			if (display->platform.tigerlake || display->platform.dg1) {  in icl_combo_phys_uninit()
383 				 * https://gitlab.freedesktop.org/drm/intel/-/issues/2411  in icl_combo_phys_uninit()
386 				drm_dbg_kms(display->drm,  in icl_combo_phys_uninit()
390 				drm_warn(display->drm,  in icl_combo_phys_uninit()