56 icl_get_procmon_ref_values(struct intel_display *display, enum phy phy)  in icl_get_procmon_ref_values()  argument
60 	val = intel_de_read(display, ICL_PORT_COMP_DW3(phy));  in icl_get_procmon_ref_values()
78 static void icl_set_procmon_ref_values(struct intel_display *display,  in icl_set_procmon_ref_values()  argument
83 	procmon = icl_get_procmon_ref_values(display, phy);  in icl_set_procmon_ref_values()
85 	intel_de_rmw(display, ICL_PORT_COMP_DW1(phy),  in icl_set_procmon_ref_values()
88 	intel_de_write(display, ICL_PORT_COMP_DW9(phy), procmon->dw9);  in icl_set_procmon_ref_values()
89 	intel_de_write(display, ICL_PORT_COMP_DW10(phy), procmon->dw10);  in icl_set_procmon_ref_values()
92 static bool check_phy_reg(struct intel_display *display,  in check_phy_reg()  argument
96 	u32 val = intel_de_read(display, reg);  in check_phy_reg()
99 		drm_dbg_kms(display->drm,  in check_phy_reg()
110 static bool icl_verify_procmon_ref_values(struct intel_display *display,  in icl_verify_procmon_ref_values()  argument
116 	procmon = icl_get_procmon_ref_values(display, phy);  in icl_verify_procmon_ref_values()
118 	ret = check_phy_reg(display, phy, ICL_PORT_COMP_DW1(phy),  in icl_verify_procmon_ref_values()
120 	ret &= check_phy_reg(display, phy, ICL_PORT_COMP_DW9(phy),  in icl_verify_procmon_ref_values()
122 	ret &= check_phy_reg(display, phy, ICL_PORT_COMP_DW10(phy),  in icl_verify_procmon_ref_values()
128 static bool has_phy_misc(struct intel_display *display, enum phy phy)  in has_phy_misc()  argument
139 	if (display->platform.alderlake_s)  in has_phy_misc()
141 	else if ((display->platform.jasperlake || display->platform.elkhartlake) ||  in has_phy_misc()
142 		 display->platform.rocketlake ||  in has_phy_misc()
143 		 display->platform.dg1)  in has_phy_misc()
149 static bool icl_combo_phy_enabled(struct intel_display *display,  in icl_combo_phy_enabled()  argument
153 	if (!has_phy_misc(display, phy))  in icl_combo_phy_enabled()
154 		return intel_de_read(display, ICL_PORT_COMP_DW0(phy)) & COMP_INIT;  in icl_combo_phy_enabled()
156 		return !(intel_de_read(display, ICL_PHY_MISC(phy)) &  in icl_combo_phy_enabled()
158 			(intel_de_read(display, ICL_PORT_COMP_DW0(phy)) & COMP_INIT);  in icl_combo_phy_enabled()
161 static bool ehl_vbt_ddi_d_present(struct intel_display *display)  in ehl_vbt_ddi_d_present()  argument
163 	bool ddi_a_present = intel_bios_is_port_present(display, PORT_A);  in ehl_vbt_ddi_d_present()
164 	bool ddi_d_present = intel_bios_is_port_present(display, PORT_D);  in ehl_vbt_ddi_d_present()
165 	bool dsi_present = intel_bios_is_dsi_present(display, NULL);  in ehl_vbt_ddi_d_present()
170 	 * display, we should see a child device present on PORT_D and  in ehl_vbt_ddi_d_present()
177 	 * If we encounter a VBT that claims to have an external display on  in ehl_vbt_ddi_d_present()
178 	 * DDI-D _and_ an internal display on DDI-A/DSI leave an error message  in ehl_vbt_ddi_d_present()
179 	 * in the log and let the internal display win.  in ehl_vbt_ddi_d_present()
182 		drm_err(display->drm,  in ehl_vbt_ddi_d_present()
188 static bool phy_is_master(struct intel_display *display, enum phy phy)  in phy_is_master()  argument
208 	else if (display->platform.alderlake_s)  in phy_is_master()
210 	else if (display->platform.dg1 || display->platform.rocketlake)  in phy_is_master()
216 static bool icl_combo_phy_verify_state(struct intel_display *display,  in icl_combo_phy_verify_state()  argument
222 	if (!icl_combo_phy_enabled(display, phy))  in icl_combo_phy_verify_state()
225 	if (DISPLAY_VER(display) >= 12) {  in icl_combo_phy_verify_state()
226 		ret &= check_phy_reg(display, phy, ICL_PORT_TX_DW8_LN(0, phy),  in icl_combo_phy_verify_state()
232 		ret &= check_phy_reg(display, phy, ICL_PORT_PCS_DW1_LN(0, phy),  in icl_combo_phy_verify_state()
236 	ret &= icl_verify_procmon_ref_values(display, phy);  in icl_combo_phy_verify_state()
238 	if (phy_is_master(display, phy)) {  in icl_combo_phy_verify_state()
239 		ret &= check_phy_reg(display, phy, ICL_PORT_COMP_DW8(phy),  in icl_combo_phy_verify_state()
242 		if (display->platform.jasperlake || display->platform.elkhartlake) {  in icl_combo_phy_verify_state()
243 			if (ehl_vbt_ddi_d_present(display))  in icl_combo_phy_verify_state()
246 			ret &= check_phy_reg(display, phy, ICL_PHY_MISC(phy),  in icl_combo_phy_verify_state()
252 	ret &= check_phy_reg(display, phy, ICL_PORT_CL_DW5(phy),  in icl_combo_phy_verify_state()
258 void intel_combo_phy_power_up_lanes(struct intel_display *display,  in intel_combo_phy_power_up_lanes()  argument
265 		drm_WARN_ON(display->drm, lane_reversal);  in intel_combo_phy_power_up_lanes()
303 	intel_de_rmw(display, ICL_PORT_CL_DW10(phy),  in intel_combo_phy_power_up_lanes()
307 static void icl_combo_phys_init(struct intel_display *display)  in icl_combo_phys_init()  argument
311 	for_each_combo_phy(display, phy) {  in icl_combo_phys_init()
315 		if (icl_combo_phy_verify_state(display, phy))  in icl_combo_phys_init()
318 		procmon = icl_get_procmon_ref_values(display, phy);  in icl_combo_phys_init()
320 		drm_dbg_kms(display->drm,  in icl_combo_phys_init()
324 		if (!has_phy_misc(display, phy))  in icl_combo_phys_init()
329 		 * display (via DDI-D) or an internal display (via DDI-A or  in icl_combo_phys_init()
335 		val = intel_de_read(display, ICL_PHY_MISC(phy));  in icl_combo_phys_init()
336 		if ((display->platform.jasperlake || display->platform.elkhartlake) &&  in icl_combo_phys_init()
340 			if (ehl_vbt_ddi_d_present(display))  in icl_combo_phys_init()
345 		intel_de_write(display, ICL_PHY_MISC(phy), val);  in icl_combo_phys_init()
348 		if (DISPLAY_VER(display) >= 12) {  in icl_combo_phys_init()
349 			val = intel_de_read(display, ICL_PORT_TX_DW8_LN(0, phy));  in icl_combo_phys_init()
353 			intel_de_write(display, ICL_PORT_TX_DW8_GRP(phy), val);  in icl_combo_phys_init()
355 			val = intel_de_read(display, ICL_PORT_PCS_DW1_LN(0, phy));  in icl_combo_phys_init()
358 			intel_de_write(display, ICL_PORT_PCS_DW1_GRP(phy), val);  in icl_combo_phys_init()
361 		icl_set_procmon_ref_values(display, phy);  in icl_combo_phys_init()
363 		if (phy_is_master(display, phy))  in icl_combo_phys_init()
364 			intel_de_rmw(display, ICL_PORT_COMP_DW8(phy),  in icl_combo_phys_init()
367 		intel_de_rmw(display, ICL_PORT_COMP_DW0(phy), 0, COMP_INIT);  in icl_combo_phys_init()
368 		intel_de_rmw(display, ICL_PORT_CL_DW5(phy),  in icl_combo_phys_init()
373 static void icl_combo_phys_uninit(struct intel_display *display)  in icl_combo_phys_uninit()  argument
377 	for_each_combo_phy_reverse(display, phy) {  in icl_combo_phys_uninit()
379 		    !icl_combo_phy_verify_state(display, phy)) {  in icl_combo_phys_uninit()
380 			if (display->platform.tigerlake || display->platform.dg1) {  in icl_combo_phys_uninit()
386 				drm_dbg_kms(display->drm,  in icl_combo_phys_uninit()
390 				drm_warn(display->drm,  in icl_combo_phys_uninit()
396 		if (!has_phy_misc(display, phy))  in icl_combo_phys_uninit()
399 		intel_de_rmw(display, ICL_PHY_MISC(phy), 0,  in icl_combo_phys_uninit()
403 		intel_de_rmw(display, ICL_PORT_COMP_DW0(phy), COMP_INIT, 0);  in icl_combo_phys_uninit()
407 void intel_combo_phy_init(struct intel_display *display)  in intel_combo_phy_init()  argument
409 	icl_combo_phys_init(display);  in intel_combo_phy_init()
412 void intel_combo_phy_uninit(struct intel_display *display)  in intel_combo_phy_uninit()  argument
414 	icl_combo_phys_uninit(display);  in intel_combo_phy_uninit()