1 // SPDX-License-Identifier: MIT
24  * The CMTG is a timing generator that runs in parallel to transcoders timing
25  * generators (TG) to provide a synchronization mechanism where CMTG acts as
34  * - Dual eDP: The CMTG can be used to keep two eDP TGs in sync when on a
37  * - Single eDP as secondary: It is also possible to use a single eDP
39  *   allow a flow that would not require a modeset on the existing eDP when a
40  *   new eDP is added for a dual eDP configuration with CMTG.
42  * - DC6v: In DC6v, the transcoder might be off but the CMTG keeps running to
47  * we disable it in case we inherit a display configuration with it enabled.
57 	 * Xe2_LPD adds a second CMTG that can be used for dual eDP async mode.
64 static bool intel_cmtg_has_cmtg_b(struct intel_display *display)  in intel_cmtg_has_cmtg_b()  argument
66 	return DISPLAY_VER(display) >= 20;  in intel_cmtg_has_cmtg_b()
69 static bool intel_cmtg_has_clock_sel(struct intel_display *display)  in intel_cmtg_has_clock_sel()  argument
71 	return DISPLAY_VER(display) >= 14;  in intel_cmtg_has_clock_sel()
74 static void intel_cmtg_dump_config(struct intel_display *display,  in intel_cmtg_dump_config()  argument
77 	drm_dbg_kms(display->drm,  in intel_cmtg_dump_config()
78 …  "CMTG readout: CMTG A: %s, CMTG B: %s, Transcoder A secondary: %s, Transcoder B secondary: %s\n",  in intel_cmtg_dump_config()
79 		    str_enabled_disabled(cmtg_config->cmtg_a_enable),  in intel_cmtg_dump_config()
80 		    intel_cmtg_has_cmtg_b(display) ? str_enabled_disabled(cmtg_config->cmtg_b_enable) : "n/a",  in intel_cmtg_dump_config()
81 		    str_yes_no(cmtg_config->trans_a_secondary),  in intel_cmtg_dump_config()
82 		    str_yes_no(cmtg_config->trans_b_secondary));  in intel_cmtg_dump_config()
85 static bool intel_cmtg_transcoder_is_secondary(struct intel_display *display,  in intel_cmtg_transcoder_is_secondary()  argument
92 	if (!HAS_TRANSCODER(display, trans))  in intel_cmtg_transcoder_is_secondary()
97 	with_intel_display_power_if_enabled(display, power_domain, wakeref)  in intel_cmtg_transcoder_is_secondary()
98 		val = intel_de_read(display, TRANS_DDI_FUNC_CTL2(display, trans));  in intel_cmtg_transcoder_is_secondary()
103 static void intel_cmtg_get_config(struct intel_display *display,  in intel_cmtg_get_config()  argument
108 	val = intel_de_read(display, TRANS_CMTG_CTL_A);  in intel_cmtg_get_config()
109 	cmtg_config->cmtg_a_enable = val & CMTG_ENABLE;  in intel_cmtg_get_config()
111 	if (intel_cmtg_has_cmtg_b(display)) {  in intel_cmtg_get_config()
112 		val = intel_de_read(display, TRANS_CMTG_CTL_B);  in intel_cmtg_get_config()
113 		cmtg_config->cmtg_b_enable = val & CMTG_ENABLE;  in intel_cmtg_get_config()
116 	cmtg_config->trans_a_secondary = intel_cmtg_transcoder_is_secondary(display, TRANSCODER_A);  in intel_cmtg_get_config()
117 	cmtg_config->trans_b_secondary = intel_cmtg_transcoder_is_secondary(display, TRANSCODER_B);  in intel_cmtg_get_config()
120 static bool intel_cmtg_disable_requires_modeset(struct intel_display *display,  in intel_cmtg_disable_requires_modeset()  argument
123 	if (DISPLAY_VER(display) >= 20)  in intel_cmtg_disable_requires_modeset()
126 	return cmtg_config->trans_a_secondary || cmtg_config->trans_b_secondary;  in intel_cmtg_disable_requires_modeset()
129 static void intel_cmtg_disable(struct intel_display *display,  in intel_cmtg_disable()  argument
135 	if (cmtg_config->trans_a_secondary)  in intel_cmtg_disable()
136 		intel_de_rmw(display, TRANS_DDI_FUNC_CTL2(display, TRANSCODER_A),  in intel_cmtg_disable()
139 	if (cmtg_config->trans_b_secondary)  in intel_cmtg_disable()
140 		intel_de_rmw(display, TRANS_DDI_FUNC_CTL2(display, TRANSCODER_B),  in intel_cmtg_disable()
143 	if (cmtg_config->cmtg_a_enable) {  in intel_cmtg_disable()
144 		drm_dbg_kms(display->drm, "Disabling CMTG A\n");  in intel_cmtg_disable()
145 		intel_de_rmw(display, TRANS_CMTG_CTL_A, CMTG_ENABLE, 0);  in intel_cmtg_disable()
150 	if (cmtg_config->cmtg_b_enable) {  in intel_cmtg_disable()
151 		drm_dbg_kms(display->drm, "Disabling CMTG B\n");  in intel_cmtg_disable()
152 		intel_de_rmw(display, TRANS_CMTG_CTL_B, CMTG_ENABLE, 0);  in intel_cmtg_disable()
157 	if (intel_cmtg_has_clock_sel(display) && clk_sel_clr)  in intel_cmtg_disable()
158 		intel_de_rmw(display, CMTG_CLK_SEL, clk_sel_clr, clk_sel_set);  in intel_cmtg_disable()
163  * a modeset, do it.
169 void intel_cmtg_sanitize(struct intel_display *display)  in intel_cmtg_sanitize()  argument
173 	if (!HAS_CMTG(display))  in intel_cmtg_sanitize()
176 	intel_cmtg_get_config(display, &cmtg_config);  in intel_cmtg_sanitize()
177 	intel_cmtg_dump_config(display, &cmtg_config);  in intel_cmtg_sanitize()
180 	 * FIXME: The driver is not prepared to handle cases where a modeset is  in intel_cmtg_sanitize()
181 	 * required for disabling the CMTG: we need a proper way of tracking  in intel_cmtg_sanitize()
185 	if (intel_cmtg_disable_requires_modeset(display, &cmtg_config))  in intel_cmtg_sanitize()
188 	intel_cmtg_disable(display, &cmtg_config);  in intel_cmtg_sanitize()