Lines Matching full:plane
25 /* Primary plane formats for gen <= 3 */
33 /* Primary plane formats for ivb (no fp16 due to hw issue) */
43 /* Primary plane formats for gen >= 4, except ivb */
54 /* Primary plane formats for vlv/chv */
138 static bool i9xx_plane_has_windowing(struct intel_plane *plane) in i9xx_plane_has_windowing() argument
140 struct intel_display *display = to_intel_display(plane); in i9xx_plane_has_windowing()
141 enum i9xx_plane_id i9xx_plane = plane->i9xx_plane; in i9xx_plane_has_windowing()
229 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); in i9xx_check_plane_surface() local
249 "[PLANE:%d:%s] plane too wide (%d) for 64bpp\n", in i9xx_check_plane_surface()
250 plane->base.base.id, plane->base.name, src_w); in i9xx_check_plane_surface()
263 * When using an X-tiled surface the plane starts to in i9xx_check_plane_surface()
274 unsigned int alignment = plane->min_alignment(plane, fb, 0); in i9xx_check_plane_surface()
280 "[PLANE:%d:%s] unable to find suitable display surface offset due to X-tiling\n", in i9xx_check_plane_surface()
281 plane->base.base.id, plane->base.name); in i9xx_check_plane_surface()
329 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); in i9xx_plane_check() local
339 i9xx_plane_has_windowing(plane)); in i9xx_plane_check()
386 * of cdclk when the sprite plane is enabled on the in i9xx_plane_ratio()
425 struct intel_plane *plane, in i9xx_plane_update_noarm() argument
429 struct intel_display *display = to_intel_display(plane); in i9xx_plane_update_noarm()
430 enum i9xx_plane_id i9xx_plane = plane->i9xx_plane; in i9xx_plane_update_noarm()
454 struct intel_plane *plane, in i9xx_plane_update_arm() argument
458 struct intel_display *display = to_intel_display(plane); in i9xx_plane_update_arm()
459 enum i9xx_plane_id i9xx_plane = plane->i9xx_plane; in i9xx_plane_update_arm()
467 if (plane->need_async_flip_toggle_wa && in i9xx_plane_update_arm()
468 crtc_state->async_flip_planes & BIT(plane->id)) in i9xx_plane_update_arm()
503 * The control register self-arms if the plane was previously in i9xx_plane_update_arm()
504 * disabled. Try to make the plane enable atomic by writing in i9xx_plane_update_arm()
518 struct intel_plane *plane, in i830_plane_update_arm() argument
528 i9xx_plane_update_noarm(dsb, plane, crtc_state, plane_state); in i830_plane_update_arm()
529 i9xx_plane_update_arm(dsb, plane, crtc_state, plane_state); in i830_plane_update_arm()
533 struct intel_plane *plane, in i9xx_plane_disable_arm() argument
536 struct intel_display *display = to_intel_display(plane); in i9xx_plane_disable_arm()
537 enum i9xx_plane_id i9xx_plane = plane->i9xx_plane; in i9xx_plane_disable_arm()
543 * well, so we must configure them even if the plane in i9xx_plane_disable_arm()
561 struct intel_plane *plane, in g4x_primary_capture_error() argument
564 struct intel_display *display = to_intel_display(plane); in g4x_primary_capture_error()
565 enum i9xx_plane_id i9xx_plane = plane->i9xx_plane; in g4x_primary_capture_error()
573 struct intel_plane *plane, in i965_plane_capture_error() argument
576 struct intel_display *display = to_intel_display(plane); in i965_plane_capture_error()
577 enum i9xx_plane_id i9xx_plane = plane->i9xx_plane; in i965_plane_capture_error()
584 struct intel_plane *plane, in i8xx_plane_capture_error() argument
587 struct intel_display *display = to_intel_display(plane); in i8xx_plane_capture_error()
588 enum i9xx_plane_id i9xx_plane = plane->i9xx_plane; in i8xx_plane_capture_error()
596 struct intel_plane *plane, in g4x_primary_async_flip() argument
601 struct intel_display *display = to_intel_display(plane); in g4x_primary_async_flip()
604 enum i9xx_plane_id i9xx_plane = plane->i9xx_plane; in g4x_primary_async_flip()
617 struct intel_plane *plane, in vlv_primary_async_flip() argument
622 struct intel_display *display = to_intel_display(plane); in vlv_primary_async_flip()
624 enum i9xx_plane_id i9xx_plane = plane->i9xx_plane; in vlv_primary_async_flip()
631 bdw_primary_enable_flip_done(struct intel_plane *plane) in bdw_primary_enable_flip_done() argument
633 struct drm_i915_private *i915 = to_i915(plane->base.dev); in bdw_primary_enable_flip_done()
634 enum pipe pipe = plane->pipe; in bdw_primary_enable_flip_done()
642 bdw_primary_disable_flip_done(struct intel_plane *plane) in bdw_primary_disable_flip_done() argument
644 struct drm_i915_private *i915 = to_i915(plane->base.dev); in bdw_primary_disable_flip_done()
645 enum pipe pipe = plane->pipe; in bdw_primary_disable_flip_done()
653 ivb_primary_enable_flip_done(struct intel_plane *plane) in ivb_primary_enable_flip_done() argument
655 struct drm_i915_private *i915 = to_i915(plane->base.dev); in ivb_primary_enable_flip_done()
658 ilk_enable_display_irq(i915, DE_PLANE_FLIP_DONE_IVB(plane->i9xx_plane)); in ivb_primary_enable_flip_done()
663 ivb_primary_disable_flip_done(struct intel_plane *plane) in ivb_primary_disable_flip_done() argument
665 struct drm_i915_private *i915 = to_i915(plane->base.dev); in ivb_primary_disable_flip_done()
668 ilk_disable_display_irq(i915, DE_PLANE_FLIP_DONE_IVB(plane->i9xx_plane)); in ivb_primary_disable_flip_done()
673 ilk_primary_enable_flip_done(struct intel_plane *plane) in ilk_primary_enable_flip_done() argument
675 struct drm_i915_private *i915 = to_i915(plane->base.dev); in ilk_primary_enable_flip_done()
678 ilk_enable_display_irq(i915, DE_PLANE_FLIP_DONE(plane->i9xx_plane)); in ilk_primary_enable_flip_done()
683 ilk_primary_disable_flip_done(struct intel_plane *plane) in ilk_primary_disable_flip_done() argument
685 struct drm_i915_private *i915 = to_i915(plane->base.dev); in ilk_primary_disable_flip_done()
688 ilk_disable_display_irq(i915, DE_PLANE_FLIP_DONE(plane->i9xx_plane)); in ilk_primary_disable_flip_done()
693 vlv_primary_enable_flip_done(struct intel_plane *plane) in vlv_primary_enable_flip_done() argument
695 struct drm_i915_private *i915 = to_i915(plane->base.dev); in vlv_primary_enable_flip_done()
696 enum pipe pipe = plane->pipe; in vlv_primary_enable_flip_done()
704 vlv_primary_disable_flip_done(struct intel_plane *plane) in vlv_primary_disable_flip_done() argument
706 struct drm_i915_private *i915 = to_i915(plane->base.dev); in vlv_primary_disable_flip_done()
707 enum pipe pipe = plane->pipe; in vlv_primary_disable_flip_done()
719 static bool i9xx_plane_get_hw_state(struct intel_plane *plane, in i9xx_plane_get_hw_state() argument
722 struct intel_display *display = to_intel_display(plane); in i9xx_plane_get_hw_state()
724 enum i9xx_plane_id i9xx_plane = plane->i9xx_plane; in i9xx_plane_get_hw_state()
734 power_domain = POWER_DOMAIN_PIPE(plane->pipe); in i9xx_plane_get_hw_state()
744 *pipe = plane->pipe; in i9xx_plane_get_hw_state()
754 hsw_primary_max_stride(struct intel_plane *plane, in hsw_primary_max_stride() argument
766 ilk_primary_max_stride(struct intel_plane *plane, in ilk_primary_max_stride() argument
781 i965_plane_max_stride(struct intel_plane *plane, in i965_plane_max_stride() argument
796 i915_plane_max_stride(struct intel_plane *plane, in i915_plane_max_stride() argument
807 i8xx_plane_max_stride(struct intel_plane *plane, in i8xx_plane_max_stride() argument
811 if (plane->i9xx_plane == PLANE_C) in i8xx_plane_max_stride()
817 unsigned int vlv_plane_min_alignment(struct intel_plane *plane, in vlv_plane_min_alignment() argument
821 struct intel_display *display = to_intel_display(plane); in vlv_plane_min_alignment()
823 if (intel_plane_can_async_flip(plane, fb->modifier)) in vlv_plane_min_alignment()
841 static unsigned int g4x_primary_min_alignment(struct intel_plane *plane, in g4x_primary_min_alignment() argument
845 struct intel_display *display = to_intel_display(plane); in g4x_primary_min_alignment()
847 if (intel_plane_can_async_flip(plane, fb->modifier)) in g4x_primary_min_alignment()
863 static unsigned int i965_plane_min_alignment(struct intel_plane *plane, in i965_plane_min_alignment() argument
878 static unsigned int i9xx_plane_min_alignment(struct intel_plane *plane, in i9xx_plane_min_alignment() argument
906 struct intel_plane *plane; in intel_primary_plane_create() local
914 plane = intel_plane_alloc(); in intel_primary_plane_create()
915 if (IS_ERR(plane)) in intel_primary_plane_create()
916 return plane; in intel_primary_plane_create()
918 plane->pipe = pipe; in intel_primary_plane_create()
920 * On gen2/3 only plane A can do FBC, but the panel fitter and LVDS in intel_primary_plane_create()
921 * port is hooked to pipe B. Hence we want plane A feeding pipe B. in intel_primary_plane_create()
925 plane->i9xx_plane = (enum i9xx_plane_id) !pipe; in intel_primary_plane_create()
927 plane->i9xx_plane = (enum i9xx_plane_id) pipe; in intel_primary_plane_create()
928 plane->id = PLANE_PRIMARY; in intel_primary_plane_create()
929 plane->frontbuffer_bit = INTEL_FRONTBUFFER(pipe, plane->id); in intel_primary_plane_create()
931 intel_fbc_add_plane(i9xx_plane_fbc(display, plane->i9xx_plane), plane); in intel_primary_plane_create()
939 * "Workaround : When using the 64-bit format, the plane in intel_primary_plane_create()
943 * multiply the plane output by four." in intel_primary_plane_create()
945 * There is no dedicated plane gamma for the primary plane, in intel_primary_plane_create()
968 plane->min_cdclk = vlv_plane_min_cdclk; in intel_primary_plane_create()
970 plane->min_cdclk = hsw_plane_min_cdclk; in intel_primary_plane_create()
972 plane->min_cdclk = ivb_plane_min_cdclk; in intel_primary_plane_create()
974 plane->min_cdclk = i9xx_plane_min_cdclk; in intel_primary_plane_create()
978 plane->max_stride = i965_plane_max_stride; in intel_primary_plane_create()
980 plane->max_stride = i915_plane_max_stride; in intel_primary_plane_create()
982 plane->max_stride = i8xx_plane_max_stride; in intel_primary_plane_create()
985 plane->max_stride = hsw_primary_max_stride; in intel_primary_plane_create()
987 plane->max_stride = ilk_primary_max_stride; in intel_primary_plane_create()
991 plane->min_alignment = vlv_plane_min_alignment; in intel_primary_plane_create()
993 plane->min_alignment = g4x_primary_min_alignment; in intel_primary_plane_create()
995 plane->min_alignment = i965_plane_min_alignment; in intel_primary_plane_create()
997 plane->min_alignment = i9xx_plane_min_alignment; in intel_primary_plane_create()
1001 plane->vtd_guard = 128; in intel_primary_plane_create()
1004 plane->update_arm = i830_plane_update_arm; in intel_primary_plane_create()
1006 plane->update_noarm = i9xx_plane_update_noarm; in intel_primary_plane_create()
1007 plane->update_arm = i9xx_plane_update_arm; in intel_primary_plane_create()
1009 plane->disable_arm = i9xx_plane_disable_arm; in intel_primary_plane_create()
1010 plane->get_hw_state = i9xx_plane_get_hw_state; in intel_primary_plane_create()
1011 plane->check_plane = i9xx_plane_check; in intel_primary_plane_create()
1014 plane->capture_error = g4x_primary_capture_error; in intel_primary_plane_create()
1016 plane->capture_error = i965_plane_capture_error; in intel_primary_plane_create()
1018 plane->capture_error = i8xx_plane_capture_error; in intel_primary_plane_create()
1022 plane->async_flip = vlv_primary_async_flip; in intel_primary_plane_create()
1023 plane->enable_flip_done = vlv_primary_enable_flip_done; in intel_primary_plane_create()
1024 plane->disable_flip_done = vlv_primary_disable_flip_done; in intel_primary_plane_create()
1025 plane->can_async_flip = i9xx_plane_can_async_flip; in intel_primary_plane_create()
1027 plane->need_async_flip_toggle_wa = true; in intel_primary_plane_create()
1028 plane->async_flip = g4x_primary_async_flip; in intel_primary_plane_create()
1029 plane->enable_flip_done = bdw_primary_enable_flip_done; in intel_primary_plane_create()
1030 plane->disable_flip_done = bdw_primary_disable_flip_done; in intel_primary_plane_create()
1031 plane->can_async_flip = i9xx_plane_can_async_flip; in intel_primary_plane_create()
1033 plane->async_flip = g4x_primary_async_flip; in intel_primary_plane_create()
1034 plane->enable_flip_done = ivb_primary_enable_flip_done; in intel_primary_plane_create()
1035 plane->disable_flip_done = ivb_primary_disable_flip_done; in intel_primary_plane_create()
1036 plane->can_async_flip = i9xx_plane_can_async_flip; in intel_primary_plane_create()
1038 plane->async_flip = g4x_primary_async_flip; in intel_primary_plane_create()
1039 plane->enable_flip_done = ilk_primary_enable_flip_done; in intel_primary_plane_create()
1040 plane->disable_flip_done = ilk_primary_disable_flip_done; in intel_primary_plane_create()
1041 plane->can_async_flip = i9xx_plane_can_async_flip; in intel_primary_plane_create()
1048 ret = drm_universal_plane_init(display->drm, &plane->base, in intel_primary_plane_create()
1055 ret = drm_universal_plane_init(display->drm, &plane->base, in intel_primary_plane_create()
1060 "plane %c", in intel_primary_plane_create()
1061 plane_name(plane->i9xx_plane)); in intel_primary_plane_create()
1080 drm_plane_create_rotation_property(&plane->base, in intel_primary_plane_create()
1085 drm_plane_create_zpos_immutable_property(&plane->base, zpos); in intel_primary_plane_create()
1087 intel_plane_helper_add(plane); in intel_primary_plane_create()
1089 return plane; in intel_primary_plane_create()
1092 intel_plane_free(plane); in intel_primary_plane_create()
1135 struct intel_plane *plane = to_intel_plane(crtc->base.primary); in i9xx_get_initial_plane_config() local
1136 enum i9xx_plane_id i9xx_plane = plane->i9xx_plane; in i9xx_get_initial_plane_config()
1144 if (!plane->get_hw_state(plane, &pipe)) in i9xx_get_initial_plane_config()
1211 "[CRTC:%d:%s][PLANE:%d:%s] with fb: size=%dx%d@%d, offset=%x, pitch %d, size 0x%x\n", in i9xx_get_initial_plane_config()
1213 plane->base.base.id, plane->base.name, in i9xx_get_initial_plane_config()
1224 struct intel_plane *plane = to_intel_plane(crtc->base.primary); in i9xx_fixup_initial_plane_config() local
1226 to_intel_plane_state(plane->base.state); in i9xx_fixup_initial_plane_config()
1227 enum i9xx_plane_id i9xx_plane = plane->i9xx_plane; in i9xx_fixup_initial_plane_config()
1237 * part of ggtt, make the plane aware of that. in i9xx_fixup_initial_plane_config()