1 // SPDX-License-Identifier: GPL-2.0-or-later
19 				 dp->link.cap.lanes == 0x2 ? 0x3 : 0x1);  in hibmc_dp_link_training_configure()
21 				 dp->link.cap.lanes == 0x2 ? 0x1 : 0);  in hibmc_dp_link_training_configure()
27 	buf[0] = dp->link.cap.link_rate;  in hibmc_dp_link_training_configure()
28 	buf[1] = DP_LANE_COUNT_ENHANCED_FRAME_EN | dp->link.cap.lanes;  in hibmc_dp_link_training_configure()
29 	ret = drm_dp_dpcd_write(&dp->aux, DP_LINK_BW_SET, buf, sizeof(buf));  in hibmc_dp_link_training_configure()
31 		drm_dbg_dp(dp->dev, "dp aux write link rate and lanes failed, ret: %d\n", ret);  in hibmc_dp_link_training_configure()
32 		return ret >= 0 ? -EIO : ret;  in hibmc_dp_link_training_configure()
38 	ret = drm_dp_dpcd_write(&dp->aux, DP_DOWNSPREAD_CTRL, buf, sizeof(buf));  in hibmc_dp_link_training_configure()
40 		drm_dbg_dp(dp->dev, "dp aux write 8b/10b and downspread failed, ret: %d\n", ret);  in hibmc_dp_link_training_configure()
41 		return ret >= 0 ? -EIO : ret;  in hibmc_dp_link_training_configure()
44 	ret = drm_dp_read_dpcd_caps(&dp->aux, dp->dpcd);  in hibmc_dp_link_training_configure()
46 		drm_err(dp->dev, "dp aux read dpcd failed, ret: %d\n", ret);  in hibmc_dp_link_training_configure()
82 		return -EINVAL;  in hibmc_dp_link_set_pattern()
87 	ret = drm_dp_dpcd_write(&dp->aux, DP_TRAINING_PATTERN_SET, &buf, sizeof(buf));  in hibmc_dp_link_set_pattern()
89 		drm_dbg_dp(dp->dev, "dp aux write training pattern set failed\n");  in hibmc_dp_link_set_pattern()
90 		return ret >= 0 ? -EIO : ret;  in hibmc_dp_link_set_pattern()
98 	u8 *train_set = dp->link.train_set;  in hibmc_dp_link_training_cr_pre()
110 	for (i = 0; i < dp->link.cap.lanes; i++)  in hibmc_dp_link_training_cr_pre()
113 	ret = drm_dp_dpcd_write(&dp->aux, DP_TRAINING_LANE0_SET, train_set, dp->link.cap.lanes);  in hibmc_dp_link_training_cr_pre()
114 	if (ret != dp->link.cap.lanes) {  in hibmc_dp_link_training_cr_pre()
115 		drm_dbg_dp(dp->dev, "dp aux write training lane set failed\n");  in hibmc_dp_link_training_cr_pre()
116 		return ret >= 0 ? -EIO : ret;  in hibmc_dp_link_training_cr_pre()
128 	for (lane = 0; lane < dp->link.cap.lanes; lane++)  in hibmc_dp_link_get_adjust_train()
132 	if (memcmp(dp->link.train_set, train_set, HIBMC_DP_LANE_NUM_MAX)) {  in hibmc_dp_link_get_adjust_train()
133 		memcpy(dp->link.train_set, train_set, HIBMC_DP_LANE_NUM_MAX);  in hibmc_dp_link_get_adjust_train()
142 	switch (dp->link.cap.link_rate) {  in hibmc_dp_link_reduce_rate()
144 		dp->link.cap.link_rate = DP_LINK_BW_1_62;  in hibmc_dp_link_reduce_rate()
147 		dp->link.cap.link_rate = DP_LINK_BW_2_7;  in hibmc_dp_link_reduce_rate()
150 		dp->link.cap.link_rate = DP_LINK_BW_5_4;  in hibmc_dp_link_reduce_rate()
153 		return -EINVAL;  in hibmc_dp_link_reduce_rate()
159 	switch (dp->link.cap.lanes) {  in hibmc_dp_link_reduce_lane()
161 		dp->link.cap.lanes--;  in hibmc_dp_link_reduce_lane()
164 		drm_err(dp->dev, "dp link training reduce lane failed, already reach minimum\n");  in hibmc_dp_link_reduce_lane()
165 		return -EIO;  in hibmc_dp_link_reduce_lane()
167 		return -EINVAL;  in hibmc_dp_link_reduce_lane()
188 		drm_dp_link_train_clock_recovery_delay(&dp->aux, dp->dpcd);  in hibmc_dp_link_training_cr()
190 		ret = drm_dp_dpcd_read_link_status(&dp->aux, lane_status);  in hibmc_dp_link_training_cr()
192 			drm_err(dp->dev, "Get lane status failed\n");  in hibmc_dp_link_training_cr()
196 		if (drm_dp_clock_recovery_ok(lane_status, dp->link.cap.lanes)) {  in hibmc_dp_link_training_cr()
197 			drm_dbg_dp(dp->dev, "dp link training cr done\n");  in hibmc_dp_link_training_cr()
198 			dp->link.status.clock_recovered = true;  in hibmc_dp_link_training_cr()
203 			drm_dbg_dp(dp->dev, "same voltage tries 5 times\n");  in hibmc_dp_link_training_cr()
204 			dp->link.status.clock_recovered = false;  in hibmc_dp_link_training_cr()
209 		ret = drm_dp_dpcd_write(&dp->aux, DP_TRAINING_LANE0_SET, dp->link.train_set,  in hibmc_dp_link_training_cr()
210 					dp->link.cap.lanes);  in hibmc_dp_link_training_cr()
211 		if (ret != dp->link.cap.lanes) {  in hibmc_dp_link_training_cr()
212 			drm_dbg_dp(dp->dev, "Update link training failed\n");  in hibmc_dp_link_training_cr()
213 			return ret >= 0 ? -EIO : ret;  in hibmc_dp_link_training_cr()
219 	drm_err(dp->dev, "dp link training clock recovery 80 times failed\n");  in hibmc_dp_link_training_cr()
220 	dp->link.status.clock_recovered = false;  in hibmc_dp_link_training_cr()
236 		drm_dp_link_train_channel_eq_delay(&dp->aux, dp->dpcd);  in hibmc_dp_link_training_channel_eq()
238 		ret = drm_dp_dpcd_read_link_status(&dp->aux, lane_status);  in hibmc_dp_link_training_channel_eq()
240 			drm_err(dp->dev, "get lane status failed\n");  in hibmc_dp_link_training_channel_eq()
244 		if (!drm_dp_clock_recovery_ok(lane_status, dp->link.cap.lanes)) {  in hibmc_dp_link_training_channel_eq()
245 			drm_dbg_dp(dp->dev, "clock recovery check failed\n");  in hibmc_dp_link_training_channel_eq()
246 			drm_dbg_dp(dp->dev, "cannot continue channel equalization\n");  in hibmc_dp_link_training_channel_eq()
247 			dp->link.status.clock_recovered = false;  in hibmc_dp_link_training_channel_eq()
251 		if (drm_dp_channel_eq_ok(lane_status, dp->link.cap.lanes)) {  in hibmc_dp_link_training_channel_eq()
252 			dp->link.status.channel_equalized = true;  in hibmc_dp_link_training_channel_eq()
253 			drm_dbg_dp(dp->dev, "dp link training eq done\n");  in hibmc_dp_link_training_channel_eq()
258 		ret = drm_dp_dpcd_write(&dp->aux, DP_TRAINING_LANE0_SET,  in hibmc_dp_link_training_channel_eq()
259 					dp->link.train_set, dp->link.cap.lanes);  in hibmc_dp_link_training_channel_eq()
260 		if (ret != dp->link.cap.lanes) {  in hibmc_dp_link_training_channel_eq()
261 			drm_dbg_dp(dp->dev, "Update link training failed\n");  in hibmc_dp_link_training_channel_eq()
262 			ret = (ret >= 0) ? -EIO : ret;  in hibmc_dp_link_training_channel_eq()
268 		drm_err(dp->dev, "channel equalization failed %u times\n", eq_tries);  in hibmc_dp_link_training_channel_eq()
285 	if ((dp->link.status.clock_recovered && !dp->link.status.channel_equalized)) {  in hibmc_dp_link_downgrade_training_eq()
295 	struct hibmc_dp_link *link = &dp->link;  in hibmc_dp_link_training()
307 		if (!link->status.clock_recovered) {  in hibmc_dp_link_training()
318 		if (!link->status.channel_equalized) {  in hibmc_dp_link_training()