Lines Matching +full:dp +full:- +full:connector
45 * struct i2c_algo_dp_aux_data - driver interface structure for i2c over dp
65 struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data; in i2c_algo_dp_aux_transaction()
68 ret = (*algo_data->aux_ch)(adapter, mode, in i2c_algo_dp_aux_transaction()
85 struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data; in i2c_algo_dp_aux_address()
92 algo_data->address = address; in i2c_algo_dp_aux_address()
93 algo_data->running = true; in i2c_algo_dp_aux_address()
104 struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data; in i2c_algo_dp_aux_stop()
111 if (algo_data->running) { in i2c_algo_dp_aux_stop()
113 algo_data->running = false; in i2c_algo_dp_aux_stop()
119 * I2C link must be running or this returns -EIO
124 struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data; in i2c_algo_dp_aux_put_byte()
126 if (!algo_data->running) in i2c_algo_dp_aux_put_byte()
127 return -EIO; in i2c_algo_dp_aux_put_byte()
134 * I2C link must be running or this returns -EIO
139 struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data; in i2c_algo_dp_aux_get_byte()
141 if (!algo_data->running) in i2c_algo_dp_aux_get_byte()
142 return -EIO; in i2c_algo_dp_aux_get_byte()
211 adapter->algo = &i2c_dp_aux_algo; in i2c_dp_aux_prepare_bus()
212 adapter->retries = 3; in i2c_dp_aux_prepare_bus()
218 * FIXME: This is the old dp aux helper, gma500 is the last driver that needs to
238 ret__ = -ETIMEDOUT; \
256 uint32_t DP; member
304 * is_edp - is the given port attached to an eDP panel (either CPU or PCH)
307 * If a CPU or PCH DP output is attached to an eDP panel, this function
312 return encoder->type == INTEL_OUTPUT_EDP; in is_edp()
323 struct cdv_intel_dp *intel_dp = encoder->dev_priv; in cdv_intel_dp_max_lane_count()
326 if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11) { in cdv_intel_dp_max_lane_count()
327 max_lane_count = intel_dp->dpcd[DP_MAX_LANE_COUNT] & 0x1f; in cdv_intel_dp_max_lane_count()
341 struct cdv_intel_dp *intel_dp = encoder->dev_priv; in cdv_intel_dp_max_link_bw()
342 int max_link_bw = intel_dp->dpcd[DP_MAX_LINK_RATE]; in cdv_intel_dp_max_link_bw()
378 struct drm_device *dev = intel_encoder->base.dev; in cdv_intel_edp_panel_vdd_on()
379 struct cdv_intel_dp *intel_dp = intel_encoder->dev_priv; in cdv_intel_edp_panel_vdd_on()
382 if (intel_dp->panel_on) { in cdv_intel_edp_panel_vdd_on()
393 msleep(intel_dp->panel_power_up_delay); in cdv_intel_edp_panel_vdd_on()
398 struct drm_device *dev = intel_encoder->base.dev; in cdv_intel_edp_panel_vdd_off()
413 struct drm_device *dev = intel_encoder->base.dev; in cdv_intel_edp_panel_on()
414 struct cdv_intel_dp *intel_dp = intel_encoder->dev_priv; in cdv_intel_edp_panel_on()
417 if (intel_dp->panel_on) in cdv_intel_edp_panel_on()
430 intel_dp->panel_on = false; in cdv_intel_edp_panel_on()
432 intel_dp->panel_on = true; in cdv_intel_edp_panel_on()
433 msleep(intel_dp->panel_power_up_delay); in cdv_intel_edp_panel_on()
440 struct drm_device *dev = intel_encoder->base.dev; in cdv_intel_edp_panel_off()
442 struct cdv_intel_dp *intel_dp = intel_encoder->dev_priv; in cdv_intel_edp_panel_off()
451 intel_dp->panel_on = false; in cdv_intel_edp_panel_off()
466 msleep(intel_dp->panel_power_cycle_delay); in cdv_intel_edp_panel_off()
472 struct drm_device *dev = intel_encoder->base.dev; in cdv_intel_edp_backlight_on()
492 struct drm_device *dev = intel_encoder->base.dev; in cdv_intel_edp_backlight_off()
493 struct cdv_intel_dp *intel_dp = intel_encoder->dev_priv; in cdv_intel_edp_backlight_off()
503 msleep(intel_dp->backlight_off_delay); in cdv_intel_edp_backlight_off()
507 cdv_intel_dp_mode_valid(struct drm_connector *connector, in cdv_intel_dp_mode_valid() argument
510 struct gma_encoder *encoder = gma_attached_encoder(connector); in cdv_intel_dp_mode_valid()
511 struct cdv_intel_dp *intel_dp = encoder->dev_priv; in cdv_intel_dp_mode_valid()
514 struct drm_psb_private *dev_priv = to_drm_psb_private(connector->dev); in cdv_intel_dp_mode_valid()
516 if (is_edp(encoder) && intel_dp->panel_fixed_mode) { in cdv_intel_dp_mode_valid()
517 if (mode->hdisplay > intel_dp->panel_fixed_mode->hdisplay) in cdv_intel_dp_mode_valid()
519 if (mode->vdisplay > intel_dp->panel_fixed_mode->vdisplay) in cdv_intel_dp_mode_valid()
526 (cdv_intel_dp_link_required(mode->clock, dev_priv->edp.bpp) in cdv_intel_dp_mode_valid()
531 if (cdv_intel_dp_link_required(mode->clock, 24) in cdv_intel_dp_mode_valid()
536 if (mode->clock < 10000) in cdv_intel_dp_mode_valid()
551 v |= ((uint32_t) src[i]) << ((3-i) * 8); in pack_aux()
562 dst[i] = src >> ((3-i) * 8); in unpack_aux()
570 struct cdv_intel_dp *intel_dp = encoder->dev_priv; in cdv_intel_dp_aux_ch()
571 uint32_t output_reg = intel_dp->output_reg; in cdv_intel_dp_aux_ch()
572 struct drm_device *dev = encoder->base.dev; in cdv_intel_dp_aux_ch()
596 return -EBUSY; in cdv_intel_dp_aux_ch()
599 /* Must try at least 3 times according to DP spec */ in cdv_intel_dp_aux_ch()
604 pack_aux(send + i, send_bytes - i)); in cdv_intel_dp_aux_ch()
635 return -EBUSY; in cdv_intel_dp_aux_ch()
643 return -EIO; in cdv_intel_dp_aux_ch()
647 * "normal" -- don't fill the kernel log with these */ in cdv_intel_dp_aux_ch()
650 return -ETIMEDOUT; in cdv_intel_dp_aux_ch()
661 recv + i, recv_bytes - i); in cdv_intel_dp_aux_ch()
677 return -1; in cdv_intel_dp_aux_native_write()
681 msg[3] = send_bytes - 1; in cdv_intel_dp_aux_native_write()
694 return -EIO; in cdv_intel_dp_aux_native_write()
722 msg[3] = recv_bytes - 1; in cdv_intel_dp_aux_native_read()
731 return -EPROTO; in cdv_intel_dp_aux_native_read()
736 memcpy(recv, reply + 1, ret - 1); in cdv_intel_dp_aux_native_read()
737 return ret - 1; in cdv_intel_dp_aux_native_read()
742 return -EIO; in cdv_intel_dp_aux_native_read()
750 struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data; in cdv_intel_dp_i2c_aux_ch()
754 struct gma_encoder *encoder = intel_dp->encoder; in cdv_intel_dp_i2c_aux_ch()
755 uint16_t address = algo_data->address; in cdv_intel_dp_i2c_aux_ch()
804 /* I2C-over-AUX Reply field is only valid in cdv_intel_dp_i2c_aux_ch()
810 return -EREMOTEIO; in cdv_intel_dp_i2c_aux_ch()
817 return -EREMOTEIO; in cdv_intel_dp_i2c_aux_ch()
825 return reply_bytes - 1; in cdv_intel_dp_i2c_aux_ch()
828 return -EREMOTEIO; in cdv_intel_dp_i2c_aux_ch()
835 return -EREMOTEIO; in cdv_intel_dp_i2c_aux_ch()
840 return -EREMOTEIO; in cdv_intel_dp_i2c_aux_ch()
844 cdv_intel_dp_i2c_init(struct gma_connector *connector, in cdv_intel_dp_i2c_init() argument
847 struct cdv_intel_dp *intel_dp = encoder->dev_priv; in cdv_intel_dp_i2c_init()
852 intel_dp->algo.running = false; in cdv_intel_dp_i2c_init()
853 intel_dp->algo.address = 0; in cdv_intel_dp_i2c_init()
854 intel_dp->algo.aux_ch = cdv_intel_dp_i2c_aux_ch; in cdv_intel_dp_i2c_init()
856 memset(&intel_dp->adapter, '\0', sizeof (intel_dp->adapter)); in cdv_intel_dp_i2c_init()
857 intel_dp->adapter.owner = THIS_MODULE; in cdv_intel_dp_i2c_init()
858 strscpy(intel_dp->adapter.name, name); in cdv_intel_dp_i2c_init()
859 intel_dp->adapter.algo_data = &intel_dp->algo; in cdv_intel_dp_i2c_init()
860 intel_dp->adapter.dev.parent = connector->base.kdev; in cdv_intel_dp_i2c_init()
864 ret = i2c_dp_aux_add_bus(&intel_dp->adapter); in cdv_intel_dp_i2c_init()
874 adjusted_mode->hdisplay = fixed_mode->hdisplay; in cdv_intel_fixed_panel_mode()
875 adjusted_mode->hsync_start = fixed_mode->hsync_start; in cdv_intel_fixed_panel_mode()
876 adjusted_mode->hsync_end = fixed_mode->hsync_end; in cdv_intel_fixed_panel_mode()
877 adjusted_mode->htotal = fixed_mode->htotal; in cdv_intel_fixed_panel_mode()
879 adjusted_mode->vdisplay = fixed_mode->vdisplay; in cdv_intel_fixed_panel_mode()
880 adjusted_mode->vsync_start = fixed_mode->vsync_start; in cdv_intel_fixed_panel_mode()
881 adjusted_mode->vsync_end = fixed_mode->vsync_end; in cdv_intel_fixed_panel_mode()
882 adjusted_mode->vtotal = fixed_mode->vtotal; in cdv_intel_fixed_panel_mode()
884 adjusted_mode->clock = fixed_mode->clock; in cdv_intel_fixed_panel_mode()
893 struct drm_psb_private *dev_priv = to_drm_psb_private(encoder->dev); in cdv_intel_dp_mode_fixup()
895 struct cdv_intel_dp *intel_dp = intel_encoder->dev_priv; in cdv_intel_dp_mode_fixup()
900 int refclock = mode->clock; in cdv_intel_dp_mode_fixup()
903 if (is_edp(intel_encoder) && intel_dp->panel_fixed_mode) { in cdv_intel_dp_mode_fixup()
904 cdv_intel_fixed_panel_mode(intel_dp->panel_fixed_mode, adjusted_mode); in cdv_intel_dp_mode_fixup()
905 refclock = intel_dp->panel_fixed_mode->clock; in cdv_intel_dp_mode_fixup()
906 bpp = dev_priv->edp.bpp; in cdv_intel_dp_mode_fixup()
910 for (clock = max_clock; clock >= 0; clock--) { in cdv_intel_dp_mode_fixup()
914 intel_dp->link_bw = bws[clock]; in cdv_intel_dp_mode_fixup()
915 intel_dp->lane_count = lane_count; in cdv_intel_dp_mode_fixup()
916 adjusted_mode->clock = cdv_intel_dp_link_clock(intel_dp->link_bw); in cdv_intel_dp_mode_fixup()
919 intel_dp->link_bw, intel_dp->lane_count, in cdv_intel_dp_mode_fixup()
920 adjusted_mode->clock); in cdv_intel_dp_mode_fixup()
927 intel_dp->lane_count = max_lane_count; in cdv_intel_dp_mode_fixup()
928 intel_dp->link_bw = bws[max_clock]; in cdv_intel_dp_mode_fixup()
929 adjusted_mode->clock = cdv_intel_dp_link_clock(intel_dp->link_bw); in cdv_intel_dp_mode_fixup()
932 intel_dp->link_bw, intel_dp->lane_count, in cdv_intel_dp_mode_fixup()
933 adjusted_mode->clock); in cdv_intel_dp_mode_fixup()
971 m_n->tu = 64; in cdv_intel_dp_compute_m_n()
972 m_n->gmch_m = (pixel_clock * bpp + 7) >> 3; in cdv_intel_dp_compute_m_n()
973 m_n->gmch_n = link_clock * nlanes; in cdv_intel_dp_compute_m_n()
974 cdv_intel_reduce_ratio(&m_n->gmch_m, &m_n->gmch_n); in cdv_intel_dp_compute_m_n()
975 m_n->link_m = pixel_clock; in cdv_intel_dp_compute_m_n()
976 m_n->link_n = link_clock; in cdv_intel_dp_compute_m_n()
977 cdv_intel_reduce_ratio(&m_n->link_m, &m_n->link_n); in cdv_intel_dp_compute_m_n()
984 struct drm_device *dev = crtc->dev; in cdv_intel_dp_set_m_n()
986 struct drm_mode_config *mode_config = &dev->mode_config; in cdv_intel_dp_set_m_n()
991 int pipe = gma_crtc->pipe; in cdv_intel_dp_set_m_n()
996 list_for_each_entry(encoder, &mode_config->encoder_list, head) { in cdv_intel_dp_set_m_n()
1000 if (encoder->crtc != crtc) in cdv_intel_dp_set_m_n()
1004 intel_dp = intel_encoder->dev_priv; in cdv_intel_dp_set_m_n()
1005 if (intel_encoder->type == INTEL_OUTPUT_DISPLAYPORT) { in cdv_intel_dp_set_m_n()
1006 lane_count = intel_dp->lane_count; in cdv_intel_dp_set_m_n()
1009 lane_count = intel_dp->lane_count; in cdv_intel_dp_set_m_n()
1010 bpp = dev_priv->edp.bpp; in cdv_intel_dp_set_m_n()
1017 * the number of bytes_per_pixel post-LUT, which we always in cdv_intel_dp_set_m_n()
1018 * set up for 8-bits of R/G/B, or 3 bytes total. in cdv_intel_dp_set_m_n()
1021 mode->clock, adjusted_mode->clock, &m_n); in cdv_intel_dp_set_m_n()
1025 ((m_n.tu - 1) << PIPE_GMCH_DATA_M_TU_SIZE_SHIFT) | in cdv_intel_dp_set_m_n()
1038 struct drm_crtc *crtc = encoder->crtc; in cdv_intel_dp_mode_set()
1040 struct cdv_intel_dp *intel_dp = intel_encoder->dev_priv; in cdv_intel_dp_mode_set()
1041 struct drm_device *dev = encoder->dev; in cdv_intel_dp_mode_set()
1043 intel_dp->DP = DP_VOLTAGE_0_4 | DP_PRE_EMPHASIS_0; in cdv_intel_dp_mode_set()
1044 intel_dp->DP |= intel_dp->color_range; in cdv_intel_dp_mode_set()
1046 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) in cdv_intel_dp_mode_set()
1047 intel_dp->DP |= DP_SYNC_HS_HIGH; in cdv_intel_dp_mode_set()
1048 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) in cdv_intel_dp_mode_set()
1049 intel_dp->DP |= DP_SYNC_VS_HIGH; in cdv_intel_dp_mode_set()
1051 intel_dp->DP |= DP_LINK_TRAIN_OFF; in cdv_intel_dp_mode_set()
1053 switch (intel_dp->lane_count) { in cdv_intel_dp_mode_set()
1055 intel_dp->DP |= DP_PORT_WIDTH_1; in cdv_intel_dp_mode_set()
1058 intel_dp->DP |= DP_PORT_WIDTH_2; in cdv_intel_dp_mode_set()
1061 intel_dp->DP |= DP_PORT_WIDTH_4; in cdv_intel_dp_mode_set()
1064 if (intel_dp->has_audio) in cdv_intel_dp_mode_set()
1065 intel_dp->DP |= DP_AUDIO_OUTPUT_ENABLE; in cdv_intel_dp_mode_set()
1067 memset(intel_dp->link_configuration, 0, DP_LINK_CONFIGURATION_SIZE); in cdv_intel_dp_mode_set()
1068 intel_dp->link_configuration[0] = intel_dp->link_bw; in cdv_intel_dp_mode_set()
1069 intel_dp->link_configuration[1] = intel_dp->lane_count; in cdv_intel_dp_mode_set()
1074 if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11 && in cdv_intel_dp_mode_set()
1075 (intel_dp->dpcd[DP_MAX_LANE_COUNT] & DP_ENHANCED_FRAME_CAP)) { in cdv_intel_dp_mode_set()
1076 intel_dp->link_configuration[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN; in cdv_intel_dp_mode_set()
1077 intel_dp->DP |= DP_ENHANCED_FRAMING; in cdv_intel_dp_mode_set()
1080 /* CPT DP's pipe select is decided in TRANS_DP_CTL */ in cdv_intel_dp_mode_set()
1081 if (gma_crtc->pipe == 1) in cdv_intel_dp_mode_set()
1082 intel_dp->DP |= DP_PIPEB_SELECT; in cdv_intel_dp_mode_set()
1084 REG_WRITE(intel_dp->output_reg, (intel_dp->DP | DP_PORT_EN)); in cdv_intel_dp_mode_set()
1085 DRM_DEBUG_KMS("DP expected reg is %x\n", intel_dp->DP); in cdv_intel_dp_mode_set()
1090 if (mode->hdisplay != adjusted_mode->hdisplay || in cdv_intel_dp_mode_set()
1091 mode->vdisplay != adjusted_mode->vdisplay) in cdv_intel_dp_mode_set()
1096 pfit_control |= gma_crtc->pipe << PFIT_PIPE_SHIFT; in cdv_intel_dp_mode_set()
1106 struct cdv_intel_dp *intel_dp = encoder->dev_priv; in cdv_intel_dp_sink_dpms()
1110 if (intel_dp->dpcd[DP_DPCD_REV] < 0x11) in cdv_intel_dp_sink_dpms()
1168 struct cdv_intel_dp *intel_dp = intel_encoder->dev_priv; in cdv_intel_dp_dpms()
1169 struct drm_device *dev = encoder->dev; in cdv_intel_dp_dpms()
1170 uint32_t dp_reg = REG_READ(intel_dp->output_reg); in cdv_intel_dp_dpms()
1223 * Fetch AUX CH registers 0x202 - 0x207 which contain
1229 struct cdv_intel_dp *intel_dp = encoder->dev_priv; in cdv_intel_dp_get_link_status()
1232 intel_dp->link_status, in cdv_intel_dp_get_link_status()
1240 return link_status[r - DP_LANE0_1_STATUS]; in cdv_intel_dp_link_status()
1274 struct cdv_intel_dp *intel_dp = encoder->dev_priv; in cdv_intel_get_adjust_train()
1279 for (lane = 0; lane < intel_dp->lane_count; lane++) { in cdv_intel_get_adjust_train()
1280 uint8_t this_v = cdv_intel_get_adjust_request_voltage(intel_dp->link_status, lane); in cdv_intel_get_adjust_train()
1281 uint8_t this_p = cdv_intel_get_adjust_request_pre_emphasis(intel_dp->link_status, lane); in cdv_intel_get_adjust_train()
1296 intel_dp->train_set[lane] = v | p; in cdv_intel_get_adjust_train()
1333 struct cdv_intel_dp *intel_dp = encoder->dev_priv; in cdv_intel_channel_eq_ok()
1338 lane_align = cdv_intel_dp_link_status(intel_dp->link_status, in cdv_intel_channel_eq_ok()
1342 for (lane = 0; lane < intel_dp->lane_count; lane++) { in cdv_intel_channel_eq_ok()
1343 lane_status = cdv_intel_get_lane_status(intel_dp->link_status, lane); in cdv_intel_channel_eq_ok()
1355 struct drm_device *dev = encoder->base.dev; in cdv_intel_dp_set_link_train()
1357 struct cdv_intel_dp *intel_dp = encoder->dev_priv; in cdv_intel_dp_set_link_train()
1359 REG_WRITE(intel_dp->output_reg, dp_reg_value); in cdv_intel_dp_set_link_train()
1360 REG_READ(intel_dp->output_reg); in cdv_intel_dp_set_link_train()
1381 struct cdv_intel_dp *intel_dp = encoder->dev_priv; in cdv_intel_dplink_set_level()
1385 intel_dp->train_set, in cdv_intel_dplink_set_level()
1386 intel_dp->lane_count); in cdv_intel_dplink_set_level()
1388 if (ret != intel_dp->lane_count) { in cdv_intel_dplink_set_level()
1390 intel_dp->train_set[0], intel_dp->lane_count); in cdv_intel_dplink_set_level()
1399 struct drm_device *dev = encoder->base.dev; in cdv_intel_dp_set_vswing_premph()
1400 struct cdv_intel_dp *intel_dp = encoder->dev_priv; in cdv_intel_dp_set_vswing_premph()
1404 if (intel_dp->output_reg == DP_B) in cdv_intel_dp_set_vswing_premph()
1423 cdv_sb_write(dev, ddi_reg->VSwing5, 0x0505313A); in cdv_intel_dp_set_vswing_premph()
1426 cdv_sb_write(dev, ddi_reg->VSwing1, 0x43406055); in cdv_intel_dp_set_vswing_premph()
1433 cdv_sb_write(dev, ddi_reg->VSwing2, 0x055738954); in cdv_intel_dp_set_vswing_premph()
1435 cdv_sb_write(dev, ddi_reg->VSwing2, dp_vswing_premph_table[index]); in cdv_intel_dp_set_vswing_premph()
1439 cdv_sb_write(dev, ddi_reg->VSwing3, 0x70802040); in cdv_intel_dp_set_vswing_premph()
1441 cdv_sb_write(dev, ddi_reg->VSwing3, 0x40802040); in cdv_intel_dp_set_vswing_premph()
1444 /* cdv_sb_write(dev, ddi_reg->VSwing4, 0x2b405555); */ in cdv_intel_dp_set_vswing_premph()
1447 cdv_sb_write(dev, ddi_reg->VSwing1, 0xc3406055); in cdv_intel_dp_set_vswing_premph()
1452 cdv_sb_write(dev, ddi_reg->PreEmph1, 0x1f030040); in cdv_intel_dp_set_vswing_premph()
1456 cdv_sb_write(dev, ddi_reg->PreEmph2, dp_vswing_premph_table[index]); in cdv_intel_dp_set_vswing_premph()
1465 struct drm_device *dev = encoder->base.dev; in cdv_intel_dp_start_link_train()
1466 struct cdv_intel_dp *intel_dp = encoder->dev_priv; in cdv_intel_dp_start_link_train()
1472 uint32_t DP = intel_dp->DP; in cdv_intel_dp_start_link_train() local
1474 DP |= DP_PORT_EN; in cdv_intel_dp_start_link_train()
1475 DP &= ~DP_LINK_TRAIN_MASK; in cdv_intel_dp_start_link_train()
1477 reg = DP; in cdv_intel_dp_start_link_train()
1480 REG_WRITE(intel_dp->output_reg, reg); in cdv_intel_dp_start_link_train()
1481 REG_READ(intel_dp->output_reg); in cdv_intel_dp_start_link_train()
1487 intel_dp->link_configuration, in cdv_intel_dp_start_link_train()
1490 memset(intel_dp->train_set, 0, 4); in cdv_intel_dp_start_link_train()
1496 reg = DP | DP_LINK_TRAIN_PAT_1; in cdv_intel_dp_start_link_train()
1499 /* Use intel_dp->train_set[0] to set the voltage and pre emphasis values */ in cdv_intel_dp_start_link_train()
1500 DRM_DEBUG_KMS("DP Link Train Set %x, Link_config %x, %x\n", in cdv_intel_dp_start_link_train()
1501 intel_dp->train_set[0], in cdv_intel_dp_start_link_train()
1502 intel_dp->link_configuration[0], in cdv_intel_dp_start_link_train()
1503 intel_dp->link_configuration[1]); in cdv_intel_dp_start_link_train()
1506 DRM_DEBUG_KMS("Failure in aux-transfer setting pattern 1\n"); in cdv_intel_dp_start_link_train()
1508 cdv_intel_dp_set_vswing_premph(encoder, intel_dp->train_set[0]); in cdv_intel_dp_start_link_train()
1517 DRM_DEBUG_KMS("DP Link status %x, %x, %x, %x, %x, %x\n", in cdv_intel_dp_start_link_train()
1518 intel_dp->link_status[0], intel_dp->link_status[1], intel_dp->link_status[2], in cdv_intel_dp_start_link_train()
1519 intel_dp->link_status[3], intel_dp->link_status[4], intel_dp->link_status[5]); in cdv_intel_dp_start_link_train()
1521 if (cdv_intel_clock_recovery_ok(intel_dp->link_status, intel_dp->lane_count)) { in cdv_intel_dp_start_link_train()
1528 for (i = 0; i < intel_dp->lane_count; i++) in cdv_intel_dp_start_link_train()
1529 if ((intel_dp->train_set[i] & DP_TRAIN_MAX_SWING_REACHED) == 0) in cdv_intel_dp_start_link_train()
1531 if (i == intel_dp->lane_count) in cdv_intel_dp_start_link_train()
1535 if ((intel_dp->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK) == voltage) { in cdv_intel_dp_start_link_train()
1541 voltage = intel_dp->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK; in cdv_intel_dp_start_link_train()
1543 /* Compute new intel_dp->train_set as requested by target */ in cdv_intel_dp_start_link_train()
1549 DRM_DEBUG_KMS("failure in DP pattern 1 training, train set %x\n", intel_dp->train_set[0]); in cdv_intel_dp_start_link_train()
1552 intel_dp->DP = DP; in cdv_intel_dp_start_link_train()
1558 struct drm_device *dev = encoder->base.dev; in cdv_intel_dp_complete_link_train()
1559 struct cdv_intel_dp *intel_dp = encoder->dev_priv; in cdv_intel_dp_complete_link_train()
1562 uint32_t DP = intel_dp->DP; in cdv_intel_dp_complete_link_train() local
1569 reg = DP | DP_LINK_TRAIN_PAT_2; in cdv_intel_dp_complete_link_train()
1573 DRM_DEBUG_KMS("DP Link Train Set %x, Link_config %x, %x\n", in cdv_intel_dp_complete_link_train()
1574 intel_dp->train_set[0], in cdv_intel_dp_complete_link_train()
1575 intel_dp->link_configuration[0], in cdv_intel_dp_complete_link_train()
1576 intel_dp->link_configuration[1]); in cdv_intel_dp_complete_link_train()
1581 DRM_DEBUG_KMS("Failure in aux-transfer setting pattern 2\n"); in cdv_intel_dp_complete_link_train()
1583 /* Use intel_dp->train_set[0] to set the voltage and pre emphasis values */ in cdv_intel_dp_complete_link_train()
1586 DRM_ERROR("failed to train DP, aborting\n"); in cdv_intel_dp_complete_link_train()
1591 cdv_intel_dp_set_vswing_premph(encoder, intel_dp->train_set[0]); in cdv_intel_dp_complete_link_train()
1599 DRM_DEBUG_KMS("DP Link status %x, %x, %x, %x, %x, %x\n", in cdv_intel_dp_complete_link_train()
1600 intel_dp->link_status[0], intel_dp->link_status[1], intel_dp->link_status[2], in cdv_intel_dp_complete_link_train()
1601 intel_dp->link_status[3], intel_dp->link_status[4], intel_dp->link_status[5]); in cdv_intel_dp_complete_link_train()
1604 if (!cdv_intel_clock_recovery_ok(intel_dp->link_status, intel_dp->lane_count)) { in cdv_intel_dp_complete_link_train()
1624 /* Compute new intel_dp->train_set as requested by target */ in cdv_intel_dp_complete_link_train()
1630 reg = DP | DP_LINK_TRAIN_OFF; in cdv_intel_dp_complete_link_train()
1632 REG_WRITE(intel_dp->output_reg, reg); in cdv_intel_dp_complete_link_train()
1633 REG_READ(intel_dp->output_reg); in cdv_intel_dp_complete_link_train()
1641 struct drm_device *dev = encoder->base.dev; in cdv_intel_dp_link_down()
1642 struct cdv_intel_dp *intel_dp = encoder->dev_priv; in cdv_intel_dp_link_down()
1643 uint32_t DP = intel_dp->DP; in cdv_intel_dp_link_down() local
1645 if ((REG_READ(intel_dp->output_reg) & DP_PORT_EN) == 0) in cdv_intel_dp_link_down()
1652 DP &= ~DP_LINK_TRAIN_MASK; in cdv_intel_dp_link_down()
1653 REG_WRITE(intel_dp->output_reg, DP | DP_LINK_TRAIN_PAT_IDLE); in cdv_intel_dp_link_down()
1655 REG_READ(intel_dp->output_reg); in cdv_intel_dp_link_down()
1659 REG_WRITE(intel_dp->output_reg, DP & ~DP_PORT_EN); in cdv_intel_dp_link_down()
1660 REG_READ(intel_dp->output_reg); in cdv_intel_dp_link_down()
1665 struct cdv_intel_dp *intel_dp = encoder->dev_priv; in cdv_dp_detect()
1669 if (cdv_intel_dp_aux_native_read(encoder, 0x000, intel_dp->dpcd, in cdv_dp_detect()
1670 sizeof (intel_dp->dpcd)) == sizeof (intel_dp->dpcd)) in cdv_dp_detect()
1672 if (intel_dp->dpcd[DP_DPCD_REV] != 0) in cdv_dp_detect()
1677 intel_dp->dpcd[0], intel_dp->dpcd[1], in cdv_dp_detect()
1678 intel_dp->dpcd[2], intel_dp->dpcd[3]); in cdv_dp_detect()
1683 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect DP connection.
1685 * \return true if DP port is connected.
1686 * \return false if DP port is disconnected.
1689 cdv_intel_dp_detect(struct drm_connector *connector, bool force) in cdv_intel_dp_detect() argument
1691 struct gma_encoder *encoder = gma_attached_encoder(connector); in cdv_intel_dp_detect()
1692 struct cdv_intel_dp *intel_dp = encoder->dev_priv; in cdv_intel_dp_detect()
1697 intel_dp->has_audio = false; in cdv_intel_dp_detect()
1708 if (intel_dp->force_audio) { in cdv_intel_dp_detect()
1709 intel_dp->has_audio = intel_dp->force_audio > 0; in cdv_intel_dp_detect()
1711 edid = drm_get_edid(connector, &intel_dp->adapter); in cdv_intel_dp_detect()
1713 intel_dp->has_audio = drm_detect_monitor_audio(edid); in cdv_intel_dp_detect()
1723 static int cdv_intel_dp_get_modes(struct drm_connector *connector) in cdv_intel_dp_get_modes() argument
1725 struct gma_encoder *intel_encoder = gma_attached_encoder(connector); in cdv_intel_dp_get_modes()
1726 struct cdv_intel_dp *intel_dp = intel_encoder->dev_priv; in cdv_intel_dp_get_modes()
1732 edid = drm_get_edid(connector, &intel_dp->adapter); in cdv_intel_dp_get_modes()
1734 drm_connector_update_edid_property(connector, edid); in cdv_intel_dp_get_modes()
1735 ret = drm_add_edid_modes(connector, edid); in cdv_intel_dp_get_modes()
1740 struct drm_device *dev = connector->dev; in cdv_intel_dp_get_modes()
1745 if (edp && !intel_dp->panel_fixed_mode) { in cdv_intel_dp_get_modes()
1747 list_for_each_entry(newmode, &connector->probed_modes, in cdv_intel_dp_get_modes()
1749 if (newmode->type & DRM_MODE_TYPE_PREFERRED) { in cdv_intel_dp_get_modes()
1750 intel_dp->panel_fixed_mode = in cdv_intel_dp_get_modes()
1759 if (!intel_dp->panel_fixed_mode && dev_priv->lfp_lvds_vbt_mode) { in cdv_intel_dp_get_modes()
1760 intel_dp->panel_fixed_mode = in cdv_intel_dp_get_modes()
1761 drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode); in cdv_intel_dp_get_modes()
1762 if (intel_dp->panel_fixed_mode) { in cdv_intel_dp_get_modes()
1763 intel_dp->panel_fixed_mode->type |= in cdv_intel_dp_get_modes()
1767 if (intel_dp->panel_fixed_mode != NULL) { in cdv_intel_dp_get_modes()
1769 mode = drm_mode_duplicate(dev, intel_dp->panel_fixed_mode); in cdv_intel_dp_get_modes()
1770 drm_mode_probed_add(connector, mode); in cdv_intel_dp_get_modes()
1779 cdv_intel_dp_detect_audio(struct drm_connector *connector) in cdv_intel_dp_detect_audio() argument
1781 struct gma_encoder *encoder = gma_attached_encoder(connector); in cdv_intel_dp_detect_audio()
1782 struct cdv_intel_dp *intel_dp = encoder->dev_priv; in cdv_intel_dp_detect_audio()
1790 edid = drm_get_edid(connector, &intel_dp->adapter); in cdv_intel_dp_detect_audio()
1802 cdv_intel_dp_set_property(struct drm_connector *connector, in cdv_intel_dp_set_property() argument
1806 struct drm_psb_private *dev_priv = to_drm_psb_private(connector->dev); in cdv_intel_dp_set_property()
1807 struct gma_encoder *encoder = gma_attached_encoder(connector); in cdv_intel_dp_set_property()
1808 struct cdv_intel_dp *intel_dp = encoder->dev_priv; in cdv_intel_dp_set_property()
1811 ret = drm_object_property_set_value(&connector->base, property, val); in cdv_intel_dp_set_property()
1815 if (property == dev_priv->force_audio_property) { in cdv_intel_dp_set_property()
1819 if (i == intel_dp->force_audio) in cdv_intel_dp_set_property()
1822 intel_dp->force_audio = i; in cdv_intel_dp_set_property()
1825 has_audio = cdv_intel_dp_detect_audio(connector); in cdv_intel_dp_set_property()
1829 if (has_audio == intel_dp->has_audio) in cdv_intel_dp_set_property()
1832 intel_dp->has_audio = has_audio; in cdv_intel_dp_set_property()
1836 if (property == dev_priv->broadcast_rgb_property) { in cdv_intel_dp_set_property()
1837 if (val == !!intel_dp->color_range) in cdv_intel_dp_set_property()
1840 intel_dp->color_range = val ? DP_COLOR_RANGE_16_235 : 0; in cdv_intel_dp_set_property()
1844 return -EINVAL; in cdv_intel_dp_set_property()
1847 if (encoder->base.crtc) { in cdv_intel_dp_set_property()
1848 struct drm_crtc *crtc = encoder->base.crtc; in cdv_intel_dp_set_property()
1849 drm_crtc_helper_set_mode(crtc, &crtc->mode, in cdv_intel_dp_set_property()
1850 crtc->x, crtc->y, in cdv_intel_dp_set_property()
1851 crtc->primary->fb); in cdv_intel_dp_set_property()
1858 cdv_intel_dp_destroy(struct drm_connector *connector) in cdv_intel_dp_destroy() argument
1860 struct gma_connector *gma_connector = to_gma_connector(connector); in cdv_intel_dp_destroy()
1861 struct gma_encoder *gma_encoder = gma_attached_encoder(connector); in cdv_intel_dp_destroy()
1862 struct cdv_intel_dp *intel_dp = gma_encoder->dev_priv; in cdv_intel_dp_destroy()
1865 /* cdv_intel_panel_destroy_backlight(connector->dev); */ in cdv_intel_dp_destroy()
1866 kfree(intel_dp->panel_fixed_mode); in cdv_intel_dp_destroy()
1867 intel_dp->panel_fixed_mode = NULL; in cdv_intel_dp_destroy()
1869 i2c_del_adapter(&intel_dp->adapter); in cdv_intel_dp_destroy()
1870 drm_connector_cleanup(connector); in cdv_intel_dp_destroy()
1896 static void cdv_intel_dp_add_properties(struct drm_connector *connector) in cdv_intel_dp_add_properties() argument
1898 cdv_intel_attach_force_audio_property(connector); in cdv_intel_dp_add_properties()
1899 cdv_intel_attach_broadcast_rgb_property(connector); in cdv_intel_dp_add_properties()
1902 /* check the VBT to see whether the eDP is on DP-D port */
1909 if (!dev_priv->child_dev_num) in cdv_intel_dpc_is_edp()
1912 for (i = 0; i < dev_priv->child_dev_num; i++) { in cdv_intel_dpc_is_edp()
1913 p_child = dev_priv->child_dev + i; in cdv_intel_dpc_is_edp()
1915 if (p_child->dvo_port == PORT_IDPC && in cdv_intel_dpc_is_edp()
1916 p_child->device_type == DEVICE_TYPE_eDP) in cdv_intel_dpc_is_edp()
1925 DP/eDP. TODO - investigate if we can turn it back to normality
1949 struct drm_connector *connector; in cdv_intel_dp_init() local
1968 connector = &gma_connector->base; in cdv_intel_dp_init()
1969 encoder = &gma_encoder->base; in cdv_intel_dp_init()
1971 drm_connector_init(dev, connector, &cdv_intel_dp_connector_funcs, type); in cdv_intel_dp_init()
1977 gma_encoder->type = INTEL_OUTPUT_DISPLAYPORT; in cdv_intel_dp_init()
1979 gma_encoder->type = INTEL_OUTPUT_EDP; in cdv_intel_dp_init()
1982 gma_encoder->dev_priv=intel_dp; in cdv_intel_dp_init()
1983 intel_dp->encoder = gma_encoder; in cdv_intel_dp_init()
1984 intel_dp->output_reg = output_reg; in cdv_intel_dp_init()
1987 drm_connector_helper_add(connector, &cdv_intel_dp_connector_helper_funcs); in cdv_intel_dp_init()
1989 connector->polled = DRM_CONNECTOR_POLL_HPD; in cdv_intel_dp_init()
1990 connector->interlace_allowed = false; in cdv_intel_dp_init()
1991 connector->doublescan_allowed = false; in cdv_intel_dp_init()
1996 name = "DPDDC-B"; in cdv_intel_dp_init()
1997 gma_encoder->ddi_select = (DP_MASK | DDI0_SELECT); in cdv_intel_dp_init()
2000 name = "DPDDC-C"; in cdv_intel_dp_init()
2001 gma_encoder->ddi_select = (DP_MASK | DDI1_SELECT); in cdv_intel_dp_init()
2009 cdv_intel_dp_add_properties(connector); in cdv_intel_dp_init()
2051 intel_dp->panel_power_up_delay = cur.t1_t3 / 10; in cdv_intel_dp_init()
2052 intel_dp->backlight_on_delay = cur.t8 / 10; in cdv_intel_dp_init()
2053 intel_dp->backlight_off_delay = cur.t9 / 10; in cdv_intel_dp_init()
2054 intel_dp->panel_power_down_delay = cur.t10 / 10; in cdv_intel_dp_init()
2055 intel_dp->panel_power_cycle_delay = (cur.t11_t12 - 1) * 100; in cdv_intel_dp_init()
2058 intel_dp->panel_power_up_delay, intel_dp->panel_power_down_delay, in cdv_intel_dp_init()
2059 intel_dp->panel_power_cycle_delay); in cdv_intel_dp_init()
2062 intel_dp->backlight_on_delay, intel_dp->backlight_off_delay); in cdv_intel_dp_init()
2067 intel_dp->dpcd, in cdv_intel_dp_init()
2068 sizeof(intel_dp->dpcd)); in cdv_intel_dp_init()
2074 cdv_intel_dp_destroy(connector); in cdv_intel_dp_init()
2078 intel_dp->dpcd[0], intel_dp->dpcd[1], in cdv_intel_dp_init()
2079 intel_dp->dpcd[2], intel_dp->dpcd[3]); in cdv_intel_dp_init()